[deliverable/binutils-gdb.git] / sim / mips / configure.ac

dnl Process this file with autoconf to produce a configure script.
AC_INIT(Makefile.in)
sinclude(../common/acinclude.m4)

SIM_AC_COMMON

dnl Options available in this module
SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
SIM_AC_OPTION_WARNINGS
SIM_AC_OPTION_RESERVED_BITS(1)

# DEPRECATED
#
# Instead of defining a `subtarget' macro, code should be checking
# the value of {STATE,CPU}_ARCHITECTURE to identify the architecture
# in question.
#
case "${target}" in
  mips64vr*-*-*)	SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;;
  mips*tx39*)           SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
  mips*-sde-elf*)       SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
  mips*-mti-elf*)       SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
  mipsisa32*-*-*)       SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
  mipsisa64*-*-*)       SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
  *)                    SIM_SUBTARGET="";;
esac
AC_SUBST(SIM_SUBTARGET)


#
# Select the byte order of the target
#
mips_endian=
default_endian=
case "${target}" in
  mips64el*-*-*)        mips_endian=LITTLE ;;
  mips64vr*el-*-*)      default_endian=LITTLE ;;
  mips64*-*-*)          default_endian=BIG ;;
  mips16*-*-*)          default_endian=BIG ;;
  mipsisa32*-*-*)       default_endian=BIG ;;
  mipsisa64*-*-*)       default_endian=BIG ;;
  mips*-*-*)            default_endian=BIG ;;
  *)                    default_endian=BIG ;;
esac
SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian)


#
# Select the bitsize of the target
#
mips_addr_bitsize=
case "${target}" in
  mips*-sde-elf*)       mips_bitsize=64 ; mips_msb=63 ;;
  mips*-mti-elf*)       mips_bitsize=64 ; mips_msb=63 ;;
  mips64*-*-*)          mips_bitsize=64 ; mips_msb=63 ;;
  mips16*-*-*)          mips_bitsize=64 ; mips_msb=63 ;;
  mipsisa32*-*-*)       mips_bitsize=32 ; mips_msb=31 ;;
  mipsisa64*-*-*)       mips_bitsize=64 ; mips_msb=63 ;;
  mips*-*-*)            mips_bitsize=32 ; mips_msb=31 ;;
  *)                    mips_bitsize=64 ; mips_msb=63 ;;
esac
SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize)


#
# Select the floating hardware support of the target
#
mips_fpu=HARDWARE_FLOATING_POINT
mips_fpu_bitsize=
case "${target}" in
  mips*tx39*)		mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
  mips*-sde-elf*)       mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
  mips*-mti-elf*)       mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
  mips64*-*-*)          mips_fpu=HARD_FLOATING_POINT ;;
  mips16*-*-*)          mips_fpu=HARD_FLOATING_POINT ;;
  mipsisa32*-*-*)       mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
  mipsisa64*-*-*)       mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
  mips*-*-*)            mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
  *)                    mips_fpu=HARD_FLOATING_POINT ;;
esac
SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize)


#
# Select the IGEN architecture
#
sim_gen=IGEN
sim_igen_machine="-M mipsIV"
sim_m16_machine="-M mips16,mipsIII"
sim_igen_filter="32,64,f"
sim_m16_filter="16"
sim_mach_default="mips8000"

case "${target}" in
  mips*tx39*)		sim_gen=IGEN
			sim_igen_filter="32,f"
			sim_igen_machine="-M r3900"
			;;
  mips64vr43*-*-*)	sim_gen=IGEN
			sim_igen_machine="-M mipsIV"
			sim_mach_default="mips8000"
			;;
  mips64vr5*-*-*)	sim_gen=IGEN
			sim_igen_machine="-M vr5000"
			sim_mach_default="mips5000"
			;;
  mips64vr41*)		sim_gen=M16
			sim_igen_machine="-M vr4100"
			sim_m16_machine="-M vr4100"
			sim_igen_filter="32,64,f"
			sim_m16_filter="16"
			sim_mach_default="mips4100"
                        ;;
  mips64vr-*-* | mips64vrel-*-*)
			sim_gen=MULTI
			sim_multi_configs="\
			  vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\
			  vr4120:mipsIII,mips16,vr4120:32,64:mips4120\
			  vr5000:mipsIV:32,64,f:mips4300,mips5000\
			  vr5400:mipsIV,vr5400:32,64,f:mips5400\
			  vr5500:mipsIV,vr5500:32,64,f:mips5500"
			sim_multi_default=mips5000
			;;
  mips*-sde-elf* | mips*-mti-elf*)
			sim_gen=MULTI
			sim_multi_configs="\
			  micromips:micromips64,micromipsdsp:32,64,f:mips_micromips\
			  mips64r2:mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,64,f:mipsisa64r2"
			sim_multi_default=mipsisa64r2
			;;
  mips64*-*-*)		sim_igen_filter="32,64,f"
			sim_gen=IGEN
			;;
  mips16*-*-*)		sim_gen=M16
			sim_igen_filter="32,64,f"
			sim_m16_filter="16"
			;;
  mipsisa32r2*-*-*)	sim_gen=MULTI
			sim_multi_configs="\
			  micromips:micromips32,micromipsdsp:32,f:mips_micromips\
			  mips32r2:mips32r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,f:mipsisa32r2"
			sim_multi_default=mipsisa32r2
			;;
  mipsisa32*-*-*)	sim_gen=M16
			sim_igen_machine="-M mips32,mips16,mips16e,smartmips"
			sim_m16_machine="-M mips16,mips16e,mips32"
			sim_igen_filter="32,f"
			sim_mach_default="mipsisa32"
			;;
  mipsisa64r2*-*-*)	sim_gen=M16
			sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
			sim_m16_machine="-M mips16,mips16e,mips64r2"
			sim_igen_filter="32,64,f"
			sim_mach_default="mipsisa64r2"
			;;
  mipsisa64sb1*-*-*)	sim_gen=IGEN
			sim_igen_machine="-M mips64,mips3d,sb1"
			sim_igen_filter="32,64,f"
			sim_mach_default="mips_sb1"
			;;
  mipsisa64*-*-*)	sim_gen=M16
			sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
			sim_m16_machine="-M mips16,mips16e,mips64"
			sim_igen_filter="32,64,f"
			sim_mach_default="mipsisa64"
			;;
  mips*lsi*)		sim_gen=M16
			sim_igen_machine="-M mipsIII,mips16"
			sim_m16_machine="-M mips16,mipsIII"
			sim_igen_filter="32,f"
			sim_m16_filter="16"
			sim_mach_default="mips4000"
			;;
  mips*-*-*)		sim_gen=IGEN
			sim_igen_filter="32,f"
			;;
esac

# The MULTI generator can combine several simulation engines into one.
# executable.  A configuration which uses the MULTI should set two
# variables: ${sim_multi_configs} and ${sim_multi_default}.
#
# ${sim_multi_configs} is the list of engines to build.  Each
# space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS,
# where:
#
# - NAME is a C-compatible prefix for the engine,
# - MACHINE is a -M argument,
# - FILTER is a -F argument, and
# - BFDMACHS is a comma-separated list of bfd machines that the
#     simulator can run.
#
# Each entry will have a separate simulation engine whose prefix is
# m32<NAME>.  If the machine list includes "mips16", there will also
# be a mips16 engine, prefix m16<NAME>.  The mips16 engine will be
# generated using the same machine list as the 32-bit version,
# but the filter will be "16" instead of FILTER.
#
# The simulator compares the bfd mach against BFDMACHS to decide
# which engine to use.  Entries in BFDMACHS should be bfd_mach
# values with "bfd_mach_" removed.  ${sim_multi_default} says
# which entry should be the default.
if test ${sim_gen} = MULTI; then

  # Simple sanity check.
  if test -z "${sim_multi_configs}" || test -z "${sim_multi_default}"; then
    AC_MSG_ERROR(Error in configure.ac: MULTI simulator not set up correctly)
  fi

  # Start in a known state.
  rm -f multi-include.h multi-run.c
  sim_multi_flags=
  sim_multi_src=
  sim_multi_obj=
  sim_multi_igen_configs=
  sim_seen_default=no

  cat << __EOF__ > multi-run.c
/* Main entry point for MULTI simulators.
   Copyright (C) 2003-2018 Free Software Foundation, Inc.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.

   --

   This file was generated by sim/mips/configure.  */

#include "sim-main.h"
#include "multi-include.h"
#include "elf-bfd.h"
#include "elf/mips.h"

#define SD sd
#define CPU cpu

void
sim_engine_run (SIM_DESC sd,
		int next_cpu_nr,
		int nr_cpus,
		int signal) /* ignore */
{
  int mach;

  if (STATE_ARCHITECTURE (sd) == NULL)
    mach = bfd_mach_${sim_multi_default};
  else if (elf_elfheader (STATE_PROG_BFD (sd))->e_flags
	   & EF_MIPS_ARCH_ASE_MICROMIPS)
    mach = bfd_mach_mips_micromips;
  else
    mach = STATE_ARCHITECTURE (SD)->mach;

  switch (mach)
    {
__EOF__

  for fc in ${sim_multi_configs}; do

    # Split up the entry.  ${c} contains the first three elements.
    # Note: outer sqaure brackets are m4 quotes.
    c=`echo ${fc} | sed ['s/:[^:]*$//']`
    bfdmachs=`echo ${fc} | sed 's/.*://'`
    name=`echo ${c} | sed 's/:.*//'`
    machine=`echo ${c} | sed 's/.*:\(.*\):.*/\1/'`
    filter=`echo ${c} | sed 's/.*://'`

    # Build the following lists:
    #
    #   sim_multi_flags: all -M and -F flags used by the simulator
    #   sim_multi_src: all makefile-generated source files
    #   sim_multi_obj: the objects for ${sim_multi_src}
    #   sim_multi_igen_configs: igen configuration strings.
    #
    # Each entry in ${sim_multi_igen_configs} is a prefix (m32
    # or m16) followed by the NAME, MACHINE and FILTER part of
    # the ${sim_multi_configs} entry.
    sim_multi_flags="${sim_multi_flags} -F ${filter} -M ${machine}"

    # Check whether special handling is needed.
    case ${c} in
      *:*mips16*:*)
	# Run igen twice, once for normal mode and once for mips16.
	ws="m32 m16"

	# The top-level function for the mips16 simulator is
	# in a file m16${name}_run.c, generated by the
	# tmp-run-multi Makefile rule.
	sim_multi_src="${sim_multi_src} m16${name}_run.c"
	sim_multi_obj="${sim_multi_obj} m16${name}_run.o"
	sim_multi_flags="${sim_multi_flags} -F 16"
	;;
      *:*micromips32*:*)
	# Run igen thrice, once for micromips32, once for micromips16,
	# and once for m32.
	ws="micromips_m32 micromips16 micromips32"

	# The top-level function for the micromips simulator is
	# in a file micromips${name}_run.c, generated by the
	# tmp-run-multi Makefile rule.
	sim_multi_src="${sim_multi_src} micromips${name}_run.c"
	sim_multi_obj="${sim_multi_obj} micromips${name}_run.o"
	sim_multi_flags="${sim_multi_flags} -F 16,32"
	;;
      *:*micromips64*:*)
	# Run igen thrice, once for micromips64, once for micromips16,
	# and once for m64.
	ws="micromips_m64 micromips16 micromips64"

	# The top-level function for the micromips simulator is
	# in a file micromips${name}_run.c, generated by the
	# tmp-run-multi Makefile rule.
	sim_multi_src="${sim_multi_src} micromips${name}_run.c"
	sim_multi_obj="${sim_multi_obj} micromips${name}_run.o"
	sim_multi_flags="${sim_multi_flags} -F 16,32,64"
	;;
      *)
	ws=m32
	;;
    esac

    # Now add the list of igen-generated files to ${sim_multi_src}
    # and ${sim_multi_obj}.
    for w in ${ws}; do
      for base in engine icache idecode model semantics support; do
	sim_multi_src="${sim_multi_src} ${w}${name}_${base}.c"
	sim_multi_src="${sim_multi_src} ${w}${name}_${base}.h"
	sim_multi_obj="${sim_multi_obj} ${w}${name}_${base}.o"
      done
      sim_multi_igen_configs="${sim_multi_igen_configs} ${w}${c}"
    done

    # Add an include for the engine.h file.  This file declares the
    # top-level foo_engine_run() function.
    echo "#include \"${w}${name}_engine.h\"" >> multi-include.h

    # Add case statements for this engine to sim_engine_run().
    for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
      echo "    case bfd_mach_${mach}:" >> multi-run.c
      if test ${mach} = ${sim_multi_default}; then
	echo "    default:" >> multi-run.c
	sim_seen_default=yes
      fi
    done
    echo "      ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \
      >> multi-run.c
    echo "      break;" >> multi-run.c
  done

  # Check whether we added a 'default:' label.
  if test ${sim_seen_default} = no; then
    AC_MSG_ERROR(Error in configure.ac: \${sim_multi_configs} doesn't have an entry for \${sim_multi_default})
  fi

  cat << __EOF__ >> multi-run.c
    }
}

int
mips_mach_multi (SIM_DESC sd)
{
  if (STATE_ARCHITECTURE (sd) == NULL)
    return bfd_mach_${sim_multi_default};

  switch (STATE_ARCHITECTURE (SD)->mach)
    {
__EOF__

  # Add case statements for this engine to mips_mach_multi().
  for fc in ${sim_multi_configs}; do

    # Split up the entry.  ${c} contains the first three elements.
    # Note: outer sqaure brackets are m4 quotes.
    c=`echo ${fc} | sed ['s/:[^:]*$//']`
    bfdmachs=`echo ${fc} | sed 's/.*://'`

    for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
      echo "    case bfd_mach_${mach}:" >> multi-run.c
    done
  done

  cat << __EOF__ >> multi-run.c
      return (STATE_ARCHITECTURE (SD)->mach);
    default:
      return bfd_mach_${sim_multi_default};
    }
}
__EOF__

  SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_MULTI"
else
  # For clean-extra
  sim_multi_src=doesnt-exist.c

  if test x"${sim_mach_default}" = x""; then
    AC_MSG_ERROR(Error in configure.ac: \${sim_mach_default} not defined)
  fi
  SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_DEFAULT=bfd_mach_${sim_mach_default}"
fi
sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
sim_m16_flags=" -F ${sim_m16_filter}  ${sim_m16_machine}  ${sim_igen_smp}"
sim_micromips16_flags=" -F ${sim_micromips16_filter}  ${sim_micromips16_machine}  ${sim_igen_smp}"
sim_micromips_flags=" -F ${sim_micromips_filter}  ${sim_micromips_machine}  ${sim_igen_smp}"
AC_SUBST(sim_igen_flags)
AC_SUBST(sim_m16_flags)
AC_SUBST(sim_micromips_flags)
AC_SUBST(sim_micromips16_flags)
AC_SUBST(sim_gen)
AC_SUBST(sim_multi_flags)
AC_SUBST(sim_multi_igen_configs)
AC_SUBST(sim_multi_src)
AC_SUBST(sim_multi_obj)
#
# Add simulated hardware devices
#
hw_enabled=no
case "${target}" in
  mips*tx39*)
	hw_enabled=yes
	hw_extra_devices="tx3904cpu tx3904irc tx3904tmr tx3904sio" 
	;;
  *)
	;;
esac
SIM_AC_OPTION_HARDWARE($hw_enabled,$hw_devices,$hw_extra_devices)


# Choose simulator engine
case "${target}" in
  *)    mips_igen_engine="engine.o"
	;;
esac
AC_SUBST(mips_igen_engine)


AC_PATH_X
mips_extra_libs=""
AC_SUBST(mips_extra_libs)

AC_CHECK_LIB(m, fabs)
AC_CHECK_FUNCS(aint anint sqrt)

SIM_AC_OUTPUT
Commit	Line	Data
c906108c	1	dnl Process this file with autoconf to produce a configure script.
c906108c	2	AC_INIT(Makefile.in)
9c082ca8	3	sinclude(../common/acinclude.m4)
c906108c	4
6ffe910a	5	SIM_AC_COMMON
35695fd6	6
c906108c	7	dnl Options available in this module
c906108c	8	SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
c906108c	9	SIM_AC_OPTION_WARNINGS
e6c674b8	10	SIM_AC_OPTION_RESERVED_BITS(1)
c906108c SS	11
	12	# DEPRECATED
	13	#
	14	# Instead of defining a `subtarget' macro, code should be checking
	15	# the value of {STATE,CPU}_ARCHITECTURE to identify the architecture
	16	# in question.
	17	#
	18	case "${target}" in
4c54fc26	19	mips64vr--*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;;
c906108c	20	mipstx39) SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
109ad085	21	mips-sde-elf) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
cc220243	22	mips-mti-elf) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
1e799e28 CD	23	mipsisa32--*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
1e799e28 CD	24	mipsisa64--*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
c906108c SS	25	*) SIM_SUBTARGET="";;
	26	esac
	27	AC_SUBST(SIM_SUBTARGET)
	28
	29
	30
	31	#
	32	# Select the byte order of the target
	33	#
	34	mips_endian=
	35	default_endian=
	36	case "${target}" in
1ac72f06 MF	37	mips64el--*) mips_endian=LITTLE ;;
	38	mips64vrel--*) default_endian=LITTLE ;;
	39	mips64--*) default_endian=BIG ;;
	40	mips16--*) default_endian=BIG ;;
	41	mipsisa32--*) default_endian=BIG ;;
	42	mipsisa64--*) default_endian=BIG ;;
	43	mips--*) default_endian=BIG ;;
	44	*) default_endian=BIG ;;
c906108c SS	45	esac
	46	SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian)
	47
	48
	49
	50	#
	51	# Select the bitsize of the target
	52	#
	53	mips_addr_bitsize=
	54	case "${target}" in
4b5d35ee	55	mips-sde-elf) mips_bitsize=64 ; mips_msb=63 ;;
cc220243	56	mips-mti-elf) mips_bitsize=64 ; mips_msb=63 ;;
c906108c SS	57	mips64--*) mips_bitsize=64 ; mips_msb=63 ;;
c906108c SS	58	mips16--*) mips_bitsize=64 ; mips_msb=63 ;;
1e799e28 CD	59	mipsisa32--*) mips_bitsize=32 ; mips_msb=31 ;;
1e799e28 CD	60	mipsisa64--*) mips_bitsize=64 ; mips_msb=63 ;;
c906108c SS	61	mips--*) mips_bitsize=32 ; mips_msb=31 ;;
	62	*) mips_bitsize=64 ; mips_msb=63 ;;
	63	esac
	64	SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize)
	65
	66
	67
	68	#
	69	# Select the floating hardware support of the target
	70	#
	71	mips_fpu=HARDWARE_FLOATING_POINT
	72	mips_fpu_bitsize=
	73	case "${target}" in
4b5d35ee TS	74	mipstx39) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
4b5d35ee TS	75	mips-sde-elf) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
cc220243	76	mips-mti-elf) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
c906108c SS	77	mips64--*) mips_fpu=HARD_FLOATING_POINT ;;
c906108c SS	78	mips16--*) mips_fpu=HARD_FLOATING_POINT ;;
1e799e28 CD	79	mipsisa32--*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
1e799e28 CD	80	mipsisa64--*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
c906108c SS	81	mips--*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
	82	*) mips_fpu=HARD_FLOATING_POINT ;;
	83	esac
	84	SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize)
	85
	86
	87
c906108c SS	88	#
	89	# Select the IGEN architecture
	90	#
	91	sim_gen=IGEN
	92	sim_igen_machine="-M mipsIV"
139181c8	93	sim_m16_machine="-M mips16,mipsIII"
c906108c SS	94	sim_igen_filter="32,64,f"
c906108c SS	95	sim_m16_filter="16"
4c54fc26 CD	96	sim_mach_default="mips8000"
4c54fc26 CD	97
c906108c SS	98	case "${target}" in
	99	mipstx39) sim_gen=IGEN
	100	sim_igen_filter="32,f"
	101	sim_igen_machine="-M r3900"
	102	;;
	103	mips64vr43--*) sim_gen=IGEN
	104	sim_igen_machine="-M mipsIV"
4c54fc26	105	sim_mach_default="mips8000"
c906108c SS	106	;;
	107	mips64vr5--*) sim_gen=IGEN
	108	sim_igen_machine="-M vr5000"
4c54fc26	109	sim_mach_default="mips5000"
c906108c SS	110	;;
	111	mips64vr41*) sim_gen=M16
	112	sim_igen_machine="-M vr4100"
	113	sim_m16_machine="-M vr4100"
	114	sim_igen_filter="32,64,f"
	115	sim_m16_filter="16"
4c54fc26	116	sim_mach_default="mips4100"
c906108c	117	;;
4c54fc26 CD	118	mips64vr-- \| mips64vrel--)
	119	sim_gen=MULTI
	120	sim_multi_configs="\
	121	vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\
	122	vr4120:mipsIII,mips16,vr4120:32,64:mips4120\
	123	vr5000:mipsIV:32,64,f:mips4300,mips5000\
	124	vr5400:mipsIV,vr5400:32,64,f:mips5400\
	125	vr5500:mipsIV,vr5500:32,64,f:mips5500"
	126	sim_multi_default=mips5000
	127	;;
cc220243	128	mips-sde-elf \| mips-mti-elf)
8e394ffc AB	129	sim_gen=MULTI
	130	sim_multi_configs="\
	131	micromips:micromips64,micromipsdsp:32,64,f:mips_micromips\
	132	mips64r2:mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,64,f:mipsisa64r2"
	133	sim_multi_default=mipsisa64r2
3669427c	134	;;
c906108c SS	135	mips64--*) sim_igen_filter="32,64,f"
	136	sim_gen=IGEN
	137	;;
	138	mips16--*) sim_gen=M16
	139	sim_igen_filter="32,64,f"
	140	sim_m16_filter="16"
	141	;;
8e394ffc AB	142	mipsisa32r2--*) sim_gen=MULTI
	143	sim_multi_configs="\
	144	micromips:micromips32,micromipsdsp:32,f:mips_micromips\
	145	mips32r2:mips32r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,f:mipsisa32r2"
	146	sim_multi_default=mipsisa32r2
e70cb6cd	147	;;
d5fb0879 RS	148	mipsisa32--*) sim_gen=M16
	149	sim_igen_machine="-M mips32,mips16,mips16e,smartmips"
	150	sim_m16_machine="-M mips16,mips16e,mips32"
	151	sim_igen_filter="32,f"
	152	sim_mach_default="mipsisa32"
1e799e28	153	;;
d5fb0879 RS	154	mipsisa64r2--*) sim_gen=M16
	155	sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
	156	sim_m16_machine="-M mips16,mips16e,mips64r2"
	157	sim_igen_filter="32,64,f"
	158	sim_mach_default="mipsisa64r2"
e70cb6cd	159	;;
7cbea089	160	mipsisa64sb1--*) sim_gen=IGEN
109ad085	161	sim_igen_machine="-M mips64,mips3d,sb1"
7cbea089	162	sim_igen_filter="32,64,f"
4c54fc26	163	sim_mach_default="mips_sb1"
7cbea089	164	;;
d5fb0879 RS	165	mipsisa64--*) sim_gen=M16
	166	sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
	167	sim_m16_machine="-M mips16,mips16e,mips64"
	168	sim_igen_filter="32,64,f"
	169	sim_mach_default="mipsisa64"
1e799e28	170	;;
109ad085	171	mipslsi) sim_gen=M16
c906108c SS	172	sim_igen_machine="-M mipsIII,mips16"
	173	sim_m16_machine="-M mips16,mipsIII"
	174	sim_igen_filter="32,f"
	175	sim_m16_filter="16"
4c54fc26	176	sim_mach_default="mips4000"
109ad085	177	;;
c906108c SS	178	mips--*) sim_gen=IGEN
	179	sim_igen_filter="32,f"
	180	;;
	181	esac
4c54fc26 CD	182
	183	# The MULTI generator can combine several simulation engines into one.
	184	# executable. A configuration which uses the MULTI should set two
	185	# variables: ${sim_multi_configs} and ${sim_multi_default}.
	186	#
	187	# ${sim_multi_configs} is the list of engines to build. Each
	188	# space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS,
	189	# where:
	190	#
	191	# - NAME is a C-compatible prefix for the engine,
	192	# - MACHINE is a -M argument,
	193	# - FILTER is a -F argument, and
	194	# - BFDMACHS is a comma-separated list of bfd machines that the
	195	# simulator can run.
	196	#
	197	# Each entry will have a separate simulation engine whose prefix is
	198	# m32<NAME>. If the machine list includes "mips16", there will also
	199	# be a mips16 engine, prefix m16<NAME>. The mips16 engine will be
	200	# generated using the same machine list as the 32-bit version,
	201	# but the filter will be "16" instead of FILTER.
	202	#
	203	# The simulator compares the bfd mach against BFDMACHS to decide
	204	# which engine to use. Entries in BFDMACHS should be bfd_mach
	205	# values with "bfd_mach_" removed. ${sim_multi_default} says
	206	# which entry should be the default.
	207	if test ${sim_gen} = MULTI; then
	208
	209	# Simple sanity check.
	210	if test -z "${sim_multi_configs}" \|\| test -z "${sim_multi_default}"; then
306f4178	211	AC_MSG_ERROR(Error in configure.ac: MULTI simulator not set up correctly)
4c54fc26 CD	212	fi
	213
	214	# Start in a known state.
	215	rm -f multi-include.h multi-run.c
	216	sim_multi_flags=
	217	sim_multi_src=
8e394ffc	218	sim_multi_obj=
4c54fc26 CD	219	sim_multi_igen_configs=
	220	sim_seen_default=no
	221
	222	cat << __EOF__ > multi-run.c
	223	/* Main entry point for MULTI simulators.
e2882c85	224	Copyright (C) 2003-2018 Free Software Foundation, Inc.
4c54fc26 CD	225
	226	This program is free software; you can redistribute it and/or modify
	227	it under the terms of the GNU General Public License as published by
35ee6e1e	228	the Free Software Foundation; either version 3 of the License, or
4c54fc26 CD	229	(at your option) any later version.
	230
	231	This program is distributed in the hope that it will be useful,
	232	but WITHOUT ANY WARRANTY; without even the implied warranty of
	233	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	234	GNU General Public License for more details.
	235
	236	You should have received a copy of the GNU General Public License
35ee6e1e	237	along with this program. If not, see <http://www.gnu.org/licenses/>.
4c54fc26 CD	238
	239	--
	240
	241	This file was generated by sim/mips/configure. */
	242
	243	#include "sim-main.h"
	244	#include "multi-include.h"
8e394ffc AB	245	#include "elf-bfd.h"
8e394ffc AB	246	#include "elf/mips.h"
4c54fc26 CD	247
	248	#define SD sd
	249	#define CPU cpu
	250
	251	void
	252	sim_engine_run (SIM_DESC sd,
	253	int next_cpu_nr,
	254	int nr_cpus,
	255	int signal) /* ignore */
	256	{
	257	int mach;
	258
	259	if (STATE_ARCHITECTURE (sd) == NULL)
	260	mach = bfd_mach_${sim_multi_default};
1554f758	261	else if (elf_elfheader (STATE_PROG_BFD (sd))->e_flags
8e394ffc AB	262	& EF_MIPS_ARCH_ASE_MICROMIPS)
8e394ffc AB	263	mach = bfd_mach_mips_micromips;
4c54fc26 CD	264	else
	265	mach = STATE_ARCHITECTURE (SD)->mach;
	266
	267	switch (mach)
	268	{
	269	__EOF__
	270
	271	for fc in ${sim_multi_configs}; do
	272
	273	# Split up the entry. ${c} contains the first three elements.
	274	# Note: outer sqaure brackets are m4 quotes.
	275	c=`echo ${fc} \| sed ['s/:[^:]*$//']`
	276	bfdmachs=`echo ${fc} \| sed 's/.*://'`
	277	name=`echo ${c} \| sed 's/:.*//'`
	278	machine=`echo ${c} \| sed 's/.:\(.\):.*/\1/'`
	279	filter=`echo ${c} \| sed 's/.*://'`
	280
	281	# Build the following lists:
	282	#
	283	# sim_multi_flags: all -M and -F flags used by the simulator
	284	# sim_multi_src: all makefile-generated source files
	285	# sim_multi_obj: the objects for ${sim_multi_src}
	286	# sim_multi_igen_configs: igen configuration strings.
	287	#
	288	# Each entry in ${sim_multi_igen_configs} is a prefix (m32
	289	# or m16) followed by the NAME, MACHINE and FILTER part of
	290	# the ${sim_multi_configs} entry.
	291	sim_multi_flags="${sim_multi_flags} -F ${filter} -M ${machine}"
	292
8e394ffc	293	# Check whether special handling is needed.
4c54fc26 CD	294	case ${c} in
	295	:mips16:)
	296	# Run igen twice, once for normal mode and once for mips16.
	297	ws="m32 m16"
	298
	299	# The top-level function for the mips16 simulator is
	300	# in a file m16${name}_run.c, generated by the
	301	# tmp-run-multi Makefile rule.
	302	sim_multi_src="${sim_multi_src} m16${name}_run.c"
	303	sim_multi_obj="${sim_multi_obj} m16${name}_run.o"
	304	sim_multi_flags="${sim_multi_flags} -F 16"
	305	;;
8e394ffc AB	306	:micromips32:)
	307	# Run igen thrice, once for micromips32, once for micromips16,
	308	# and once for m32.
	309	ws="micromips_m32 micromips16 micromips32"
	310
	311	# The top-level function for the micromips simulator is
	312	# in a file micromips${name}_run.c, generated by the
	313	# tmp-run-multi Makefile rule.
	314	sim_multi_src="${sim_multi_src} micromips${name}_run.c"
	315	sim_multi_obj="${sim_multi_obj} micromips${name}_run.o"
	316	sim_multi_flags="${sim_multi_flags} -F 16,32"
	317	;;
	318	:micromips64:)
	319	# Run igen thrice, once for micromips64, once for micromips16,
	320	# and once for m64.
	321	ws="micromips_m64 micromips16 micromips64"
	322
	323	# The top-level function for the micromips simulator is
	324	# in a file micromips${name}_run.c, generated by the
	325	# tmp-run-multi Makefile rule.
	326	sim_multi_src="${sim_multi_src} micromips${name}_run.c"
	327	sim_multi_obj="${sim_multi_obj} micromips${name}_run.o"
	328	sim_multi_flags="${sim_multi_flags} -F 16,32,64"
	329	;;
4c54fc26 CD	330	*)
	331	ws=m32
	332	;;
	333	esac
	334
	335	# Now add the list of igen-generated files to ${sim_multi_src}
	336	# and ${sim_multi_obj}.
	337	for w in ${ws}; do
	338	for base in engine icache idecode model semantics support; do
	339	sim_multi_src="${sim_multi_src} ${w}${name}_${base}.c"
	340	sim_multi_src="${sim_multi_src} ${w}${name}_${base}.h"
	341	sim_multi_obj="${sim_multi_obj} ${w}${name}_${base}.o"
	342	done
	343	sim_multi_igen_configs="${sim_multi_igen_configs} ${w}${c}"
	344	done
	345
	346	# Add an include for the engine.h file. This file declares the
	347	# top-level foo_engine_run() function.
	348	echo "#include \"${w}${name}_engine.h\"" >> multi-include.h
	349
	350	# Add case statements for this engine to sim_engine_run().
	351	for mach in `echo ${bfdmachs} \| sed 's/,/ /g'`; do
	352	echo " case bfd_mach_${mach}:" >> multi-run.c
	353	if test ${mach} = ${sim_multi_default}; then
	354	echo " default:" >> multi-run.c
	355	sim_seen_default=yes
	356	fi
	357	done
	358	echo " ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \
	359	>> multi-run.c
	360	echo " break;" >> multi-run.c
	361	done
	362
	363	# Check whether we added a 'default:' label.
	364	if test ${sim_seen_default} = no; then
306f4178	365	AC_MSG_ERROR(Error in configure.ac: \${sim_multi_configs} doesn't have an entry for \${sim_multi_default})
4c54fc26 CD	366	fi
	367
	368	cat << __EOF__ >> multi-run.c
	369	}
	370	}
	371
	372	int
	373	mips_mach_multi (SIM_DESC sd)
	374	{
	375	if (STATE_ARCHITECTURE (sd) == NULL)
	376	return bfd_mach_${sim_multi_default};
	377
	378	switch (STATE_ARCHITECTURE (SD)->mach)
	379	{
	380	__EOF__
	381
	382	# Add case statements for this engine to mips_mach_multi().
	383	for fc in ${sim_multi_configs}; do
	384
	385	# Split up the entry. ${c} contains the first three elements.
	386	# Note: outer sqaure brackets are m4 quotes.
	387	c=`echo ${fc} \| sed ['s/:[^:]*$//']`
	388	bfdmachs=`echo ${fc} \| sed 's/.*://'`
	389
	390	for mach in `echo ${bfdmachs} \| sed 's/,/ /g'`; do
	391	echo " case bfd_mach_${mach}:" >> multi-run.c
	392	done
	393	done
	394
	395	cat << __EOF__ >> multi-run.c
	396	return (STATE_ARCHITECTURE (SD)->mach);
	397	default:
	398	return bfd_mach_${sim_multi_default};
	399	}
	400	}
	401	__EOF__
	402
	403	SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_MULTI"
	404	else
	405	# For clean-extra
	406	sim_multi_src=doesnt-exist.c
	407
	408	if test x"${sim_mach_default}" = x""; then
306f4178	409	AC_MSG_ERROR(Error in configure.ac: \${sim_mach_default} not defined)
4c54fc26 CD	410	fi
	411	SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_DEFAULT=bfd_mach_${sim_mach_default}"
	412	fi
c906108c SS	413	sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
c906108c SS	414	sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}"
8e394ffc AB	415	sim_micromips16_flags=" -F ${sim_micromips16_filter} ${sim_micromips16_machine} ${sim_igen_smp}"
8e394ffc AB	416	sim_micromips_flags=" -F ${sim_micromips_filter} ${sim_micromips_machine} ${sim_igen_smp}"
c906108c SS	417	AC_SUBST(sim_igen_flags)
c906108c SS	418	AC_SUBST(sim_m16_flags)
8e394ffc AB	419	AC_SUBST(sim_micromips_flags)
8e394ffc AB	420	AC_SUBST(sim_micromips16_flags)
c906108c	421	AC_SUBST(sim_gen)
4c54fc26 CD	422	AC_SUBST(sim_multi_flags)
	423	AC_SUBST(sim_multi_igen_configs)
	424	AC_SUBST(sim_multi_src)
	425	AC_SUBST(sim_multi_obj)
c906108c SS	426	#
	427	# Add simulated hardware devices
	428	#
	429	hw_enabled=no
	430	case "${target}" in
	431	mipstx39)
	432	hw_enabled=yes
	433	hw_extra_devices="tx3904cpu tx3904irc tx3904tmr tx3904sio"
c906108c SS	434	;;
c906108c SS	435	*)
c906108c SS	436	;;
	437	esac
	438	SIM_AC_OPTION_HARDWARE($hw_enabled,$hw_devices,$hw_extra_devices)
c906108c SS	439
	440
	441	# Choose simulator engine
	442	case "${target}" in
	443	*) mips_igen_engine="engine.o"
	444	;;
	445	esac
	446	AC_SUBST(mips_igen_engine)
	447
	448
	449	AC_PATH_X
	450	mips_extra_libs=""
	451	AC_SUBST(mips_extra_libs)
	452
c906108c SS	453	AC_CHECK_LIB(m, fabs)
	454	AC_CHECK_FUNCS(aint anint sqrt)
	455
	456	SIM_AC_OUTPUT