Commit | Line | Data |
---|---|---|
b8dcd182 AG |
1 | 2010-01-13 Anthony Green <green@moxielogic.com> |
2 | ||
3 | * interp.c (sim_open): Initialize the SIM_DESC object properly | |
4 | with sim_config() and sim_post_argv_init(). | |
5 | ||
3725885a RW |
6 | 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
7 | ||
8 | * configure: Regenerate. | |
9 | ||
5c27d164 AG |
10 | 2009-09-10 Anthony Green <green@moxielogic.com> |
11 | ||
12 | * Makefile.in (install-dtb): New target. | |
13 | (moxie-gdb.dtb): New target. | |
14 | (SIM_CFLAGS): Define DTB macro on command line. | |
15 | (SIM_OBJS): Use common infrastructire. | |
16 | (dtbdir): Define install location for dtb file. | |
17 | ||
18 | * sim-main.h: New file. | |
19 | * moxie-gdb.dts: New file. | |
20 | * configure.ac: Check for dtc. Install dtb file. Remove some old | |
21 | cruft. | |
22 | * configure: Regenerate. | |
23 | * interp.c: Many changes to use common memory infrastructure. | |
24 | (load_dtb): New function. | |
25 | (sim_create_inferior): Call it. | |
26 | ||
d6416cdc RW |
27 | 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
28 | ||
81ecdfbb RW |
29 | * config.in: Regenerate. |
30 | * configure: Likewise. | |
31 | ||
d6416cdc RW |
32 | * configure: Regenerate. |
33 | ||
7a321525 AG |
34 | 2009-07-31 Anthony Green <green@moxielogic.com> |
35 | ||
36 | * interp.c: Increase simulated memory to 16MB. | |
37 | (sim_resume): Tweak swi system calls to support new ABI (up to 5 | |
38 | args in regs). Also simluate proper exception processing for | |
39 | Linux system calls. | |
40 | ||
41 | 2009-07-30 Anthony Green <green@moxielogic.com> | |
42 | ||
43 | * interp.c (sim_resume): Add system call software interrupt support. | |
44 | ||
86566200 AG |
45 | 2009-06-11 Anthony Green <green@moxielogic.com> |
46 | ||
47 | * interp.c (INST2OFFSET): Define. | |
48 | (sim_resume): Support new PC relative branch instructions. | |
49 | ||
77176dfc AG |
50 | 2009-05-09 Anthony Green <green@moxielogic.com> |
51 | ||
52 | * interp.c (sim_resume): Add missing breaks in switch. | |
53 | ||
fdd6fa61 AG |
54 | 2008-10-03 Anthony Green <green@moxielogic.com> |
55 | ||
56 | * interp.c (sim_resume): Add support for ldo.b, sto.b, ldo.s, sto.s. | |
57 | ||
58 | 2008-09-10 Anthony Green <green@moxielogic.com> | |
59 | ||
60 | * interp.c (NUM_SPRO_SREGS): New. | |
61 | (struct moxie_regset): Add sregs. | |
62 | (set_initial_gprs): Initialize sregs. | |
63 | (sim_resume): Add gsr and ssr support. | |
64 | ||
65 | 2008-09-04 Anthony Green <green@moxielogic.com> | |
66 | ||
67 | * interp.c (sim_resume): Add inc and dec instructions. | |
68 | ||
69 | 2008-09-04 Anthony Green <green@moxielogic.com> | |
70 | ||
71 | * interp.c (struct moxie_regset): Use an unsigned long long to keep | |
72 | track of instruction trace counts. | |
73 | * interp.c (sim_resume): Ditto. | |
74 | (sim_info): Ditto. | |
75 | ||
76 | 2008-08-22 Anthony Green <green@moxielogic.com> | |
77 | ||
78 | * interp.c (sim_resume): Remove debugging code. | |
79 | ||
80 | 2008-08-20 Anthony Green <green@moxielogic.com> | |
81 | ||
82 | * interp.c (TRACE): Add new tracing infrastructure. | |
83 | (sim_resume): Use it. | |
84 | (reg_names): Add new registers. | |
85 | (NUM_MOXIE_REGS): New registers. | |
86 | (PC_REGNO): New registers. | |
87 | (sim_resume): New instruction encodings. | |
88 | ||
89 | 2008-08-16 Anthony Green <green@moxielogic.com> | |
90 | ||
91 | * interp.c (sim_resume): Add SYS_read, and fix SYS_open and SYS_write. | |
92 | (convert_target_flags): New function. | |
93 | ||
94 | 2008-08-08 Anthony Green <green@moxielogic.com> | |
95 | ||
96 | * interp.c (sim_resume): Add SYS_open and SYS_write system call support. | |
97 | ||
98 | 2008-08-04 Anthony Green <green@moxielogic.com> | |
99 | ||
100 | * Makefile.in (SIM_EXTRA_LIBS): Add -lz. | |
101 | ||
102 | 2008-08-04 Anthony Green <green@moxielogic.com> | |
103 | ||
104 | * interp.c (sim_create_inferior): Set argc & argv in the target. | |
105 | ||
106 | 2008-04-12 Anthony Green <green@moxielogic.com> | |
107 | ||
108 | * interp.c (sim_resume): Add brk. | |
109 | ||
110 | 2008-04-10 Anthony Green <green@moxielogic.com> | |
111 | ||
112 | * interp.c (sim_resume): Add static chain pointer to call frame. | |
113 | ||
114 | 2008-03-24 Anthony Green <green@moxielogic.com> | |
115 | ||
116 | * interp.c (sim_resume): Add missing breaks. | |
117 | (sim_resume): Fix neg implementation. | |
118 | ||
119 | 2008-03-23 Anthony Green <green@moxielogic.com> | |
120 | ||
121 | * interp.c (sim_load): Don't require a .bss section. | |
122 | ||
123 | 2008-03-21 Anthony Green <green@moxielogic.com> | |
124 | ||
125 | * interp.c (sim_resume): Add swi, and, lshr, ashl, sub.l, neg, or, | |
126 | not, ashr, xor. | |
127 | ||
128 | 2008-03-20 Anthony Green <green@moxielogic.com> | |
129 | ||
130 | * interp.c (struct moxie_regset): Add condition code, cc. | |
131 | (CC_GT, CC_LT, CC_EQ, CC_GTU, CC_LTU): Define. | |
132 | (sim_resume): Add jmpa, jsr, cmp, beq, bne, blt, bgt, bltu, bgtu, | |
133 | bge, ble, bgeu, and bleu. | |
134 | (rbat, rsat, wbat, wsat): New functions. | |
135 | (sim_resume): Add ld.b, lda.b, ldi.b, ld.s, lda.s, ldi.s, st.b, | |
136 | sta.b, st.s, sta.s, jmp. | |
137 | ||
138 | 2008-03-19 Anthony Green <green@moxielogic.com> | |
139 | ||
140 | * interp.c (sim_resume): Add ld.l, st.l, lda.l, sta.l. | |
141 | jsra should set $fp == $sp. | |
142 | Fix jsra and ret semantics. | |
143 | ||
144 | 2008-03-18 Anthony Green <green@moxielogic.com> | |
145 | ||
146 | * interp.c (sim_resume): Add push, pop and add.l. | |
147 | ||
148 | 2008-03-16 Anthony Green <green@moxielogic.com> | |
149 | ||
150 | * interp.c (EXTRACT_WORD): Define. | |
151 | (rlat): Use EXTRACT_WORD. | |
152 | (sim_resume): Add jsra and ret. | |
153 | ||
154 | 2008-02-22 Anthony Green <green@moxielogic.com> | |
155 | ||
156 | * interp.c (reg_names): Define. | |
157 | (sim_resume): Use reg_names. | |
158 | ||
159 | 2008-02-21 Anthony Green <green@moxielogic.com> | |
160 | ||
161 | * config.in, configure, configure.ac, interp.c, Makefile.in, | |
162 | sysdep.h: Created. |