[deliverable/binutils-gdb.git] / sim / ppc / BUGS

ChangeLog

See the ChangeLog file looking for lines taged with the word FIXME.


COREFILE.C:

The implementation of corefile.c (defined by corefile.h) isn't the
best.  It is intended to be functionaly correct rather than fast.  One
option being considered is to add a data cache to reduce the overhead
of the most common case of data read/writes.


VEA:

Missing VEA system calls.

ppc-instructions:

Missing or commented out instructions.


64bit:

64bit target untested. 64bit host broken.  For instance use of scanf
"%x", &long long.


hw_*.c:

Better and more devices.

PORTABILITY:

(Notes taken from Michael Meissner): Heavy use of the ## operator -
fix using the clasic X/**/Y hack; Use of the signed keyword.  In
particular, signed char has no analogue in classic C (though most
implementations of classic C use signed chars); Use of long long which
restricts the target compiler to be GCC.


TRACING:

debug.c: Macro's should be extended to include:

	IS_*TRACE:	True if tracing enabled
	*TRACE_PREFIX:	Outputs just the prefix line

hw_trace.c: Flush, replace with a psim_set_tracing or some
	such program.


CIA/NIA:

Replace with functions to return/increment the CIA?


SMP & GDB:

GDB doesn't understand SMP!


OVERALL STRUCTURE:

A new file pstruct.h is to be created that contains a single flat data
structure containing:

		pstruct {
			events;
			core;
			processor[nr_cpus];
			monitor;
			devices;
			trace;
		}

The CPU's structure, in turn would contain the VM sub structures.

When SMP==0, everything would have PSTRUCT passed.  In SMP mode,
however, there are two choices: PSTRUCT + CPU_NR or PROCESSOR.  I
suspect the latter is better.

It is believed that this would significantly improve performance (at
the price of reduced control over object scope).


IGEN:

Igen at present can't do the following:

	o	duplication is an all or nothing afair.

		It should be configurable according to
		the instruction or the sub-table.


	o	Due to the naming, only a single generated
		simulator can be included in a program.

		IGEN should be able to generate multiple
		engines that can all be included in a program

	o	handle alternate architectures.


	o	Igen should support the generation of a
		disasembler and posibly an assembler.

		I suggest that the table be extended to
		include, for each instruction, additional
		lines describing the extual format of the
		instruction.

		One possible format is:

			"mtlr %RS":SPR.something
			"mtspr %SPR, %RS"
Commit	Line	Data
c906108c SS	1	ChangeLog
	2
	3	See the ChangeLog file looking for lines taged with the word FIXME.
	4
	5
	6	COREFILE.C:
	7
	8	The implementation of corefile.c (defined by corefile.h) isn't the
	9	best. It is intended to be functionaly correct rather than fast. One
	10	option being considered is to add a data cache to reduce the overhead
	11	of the most common case of data read/writes.
	12
	13
	14	VEA:
	15
	16	Missing VEA system calls.
	17
	18	ppc-instructions:
	19
	20	Missing or commented out instructions.
	21
	22
	23	64bit:
	24
	25	64bit target untested. 64bit host broken. For instance use of scanf
	26	"%x", &long long.
	27
	28
	29
	30	hw_*.c:
	31
	32	Better and more devices.
	33
	34	PORTABILITY:
	35
	36	(Notes taken from Michael Meissner): Heavy use of the ## operator -
	37	fix using the clasic X/**/Y hack; Use of the signed keyword. In
	38	particular, signed char has no analogue in classic C (though most
	39	implementations of classic C use signed chars); Use of long long which
	40	restricts the target compiler to be GCC.
	41
	42
	43	TRACING:
	44
	45	debug.c: Macro's should be extended to include:
	46
	47	IS_*TRACE: True if tracing enabled
	48	*TRACE_PREFIX: Outputs just the prefix line
	49
	50	hw_trace.c: Flush, replace with a psim_set_tracing or some
	51	such program.
	52
	53
	54	CIA/NIA:
	55
	56	Replace with functions to return/increment the CIA?
	57
	58
	59
	60	SMP & GDB:
	61
	62	GDB doesn't understand SMP!
	63
	64
65
66
67	OVERALL STRUCTURE:
68
69	A new file pstruct.h is to be created that contains a single flat data
70	structure containing:
71
72	pstruct {
73	events;
74	core;
75	processor[nr_cpus];
76	monitor;
77	devices;
78	trace;
79	}
80
81	The CPU's structure, in turn would contain the VM sub structures.
82
83	When SMP==0, everything would have PSTRUCT passed. In SMP mode,
84	however, there are two choices: PSTRUCT + CPU_NR or PROCESSOR. I
85	suspect the latter is better.
86
87	It is believed that this would significantly improve performance (at
88	the price of reduced control over object scope).
89
90
91
92
93	IGEN:
94
95	Igen at present can't do the following:
96
97	o duplication is an all or nothing afair.
98
99	It should be configurable according to
100	the instruction or the sub-table.
101
102
103	o Due to the naming, only a single generated
104	simulator can be included in a program.
105
106	IGEN should be able to generate multiple
107	engines that can all be included in a program
108
109	o handle alternate architectures.
110
111
112	o Igen should support the generation of a
113	disasembler and posibly an assembler.
114
115	I suggest that the table be extended to
116	include, for each instruction, additional
117	lines describing the extual format of the
118	instruction.
119
120	One possible format is:
121
122	"mtlr %RS":SPR.something
123	"mtspr %SPR, %RS"