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Merge remote-tracking branch 'omap_dss2/for-next'
[deliverable/linux.git] / sound / pci / emu10k1 / emu10k1x.c
CommitLineData
1da177e4
LT		 1/*
2 * Copyright (c) by Francisco Moraes <fmoraes@nc.rr.com>
3 * Driver EMU10K1X chips
4 *
5 * Parts of this code were adapted from audigyls.c driver which is
6 * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
7 *
8 * BUGS:
9 * --
10 *
11 * TODO:
12 *
13 * Chips (SB0200 model):
14 * - EMU10K1X-DBQ
15 * - STAC 9708T
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
30 *
31 */
1da177e4
LT		 32#include <linux/init.h>
33#include <linux/interrupt.h>
34#include <linux/pci.h>
9d2f928d 35#include <linux/dma-mapping.h>
1da177e4 36#include <linux/slab.h>
65a77217 37#include <linux/module.h>
1da177e4
LT		 38#include <sound/core.h>
39#include <sound/initval.h>
40#include <sound/pcm.h>
41#include <sound/ac97_codec.h>
42#include <sound/info.h>
43#include <sound/rawmidi.h>
44
45MODULE_AUTHOR("Francisco Moraes <fmoraes@nc.rr.com>");
46MODULE_DESCRIPTION("EMU10K1X");
47MODULE_LICENSE("GPL");
48MODULE_SUPPORTED_DEVICE("{{Dell Creative Labs,SB Live!}");
49
50// module parameters (see "Module Parameters")
51static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
52static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
a67ff6a5 53static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
1da177e4
LT		 54
55module_param_array(index, int, NULL, 0444);
56MODULE_PARM_DESC(index, "Index value for the EMU10K1X soundcard.");
57module_param_array(id, charp, NULL, 0444);
58MODULE_PARM_DESC(id, "ID string for the EMU10K1X soundcard.");
59module_param_array(enable, bool, NULL, 0444);
60MODULE_PARM_DESC(enable, "Enable the EMU10K1X soundcard.");
61
62
63// some definitions were borrowed from emu10k1 driver as they seem to be the same
64/************************************************************************************************/
65/* PCI function 0 registers, address = <val> + PCIBASE0 */
66/************************************************************************************************/
67
68#define PTR 0x00 /* Indexed register set pointer register */
69 /* NOTE: The CHANNELNUM and ADDRESS words can */
70 /* be modified independently of each other. */
71
72#define DATA 0x04 /* Indexed register set data register */
73
74#define IPR 0x08 /* Global interrupt pending register */
75 /* Clear pending interrupts by writing a 1 to */
76 /* the relevant bits and zero to the other bits */
77#define IPR_MIDITRANSBUFEMPTY 0x00000001 /* MIDI UART transmit buffer empty */
78#define IPR_MIDIRECVBUFEMPTY 0x00000002 /* MIDI UART receive buffer empty */
79#define IPR_CH_0_LOOP 0x00000800 /* Channel 0 loop */
80#define IPR_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */
81#define IPR_CAP_0_LOOP 0x00080000 /* Channel capture loop */
82#define IPR_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */
83
84#define INTE 0x0c /* Interrupt enable register */
85#define INTE_MIDITXENABLE 0x00000001 /* Enable MIDI transmit-buffer-empty interrupts */
86#define INTE_MIDIRXENABLE 0x00000002 /* Enable MIDI receive-buffer-empty interrupts */
87#define INTE_CH_0_LOOP 0x00000800 /* Channel 0 loop */
88#define INTE_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */
89#define INTE_CAP_0_LOOP 0x00080000 /* Channel capture loop */
90#define INTE_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */
91
92#define HCFG 0x14 /* Hardware config register */
93
94#define HCFG_LOCKSOUNDCACHE 0x00000008 /* 1 = Cancel bustmaster accesses to soundcache */
95 /* NOTE: This should generally never be used. */
96#define HCFG_AUDIOENABLE 0x00000001 /* 0 = CODECs transmit zero-valued samples */
97 /* Should be set to 1 when the EMU10K1 is */
98 /* completely initialized. */
99#define GPIO 0x18 /* Defaults: 00001080-Analog, 00001000-SPDIF. */
100
101
102#define AC97DATA 0x1c /* AC97 register set data register (16 bit) */
103
104#define AC97ADDRESS 0x1e /* AC97 register set address register (8 bit) */
105
106/********************************************************************************************************/
107/* Emu10k1x pointer-offset register set, accessed through the PTR and DATA registers */
108/********************************************************************************************************/
109#define PLAYBACK_LIST_ADDR 0x00 /* Base DMA address of a list of pointers to each period/size */
110 /* One list entry: 4 bytes for DMA address,
111 * 4 bytes for period_size << 16.
112 * One list entry is 8 bytes long.
113 * One list entry for each period in the buffer.
114 */
115#define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */
116#define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */
b595076a 117#define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA address */
1da177e4
LT		 118#define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size */
119#define PLAYBACK_POINTER 0x06 /* Playback period pointer. Sample currently in DAC */
120#define PLAYBACK_UNKNOWN1 0x07
121#define PLAYBACK_UNKNOWN2 0x08
122
123/* Only one capture channel supported */
124#define CAPTURE_DMA_ADDR 0x10 /* Capture DMA address */
125#define CAPTURE_BUFFER_SIZE 0x11 /* Capture buffer size */
126#define CAPTURE_POINTER 0x12 /* Capture buffer pointer. Sample currently in ADC */
127#define CAPTURE_UNKNOWN 0x13
128
129/* From 0x20 - 0x3f, last samples played on each channel */
130
131#define TRIGGER_CHANNEL 0x40 /* Trigger channel playback */
132#define TRIGGER_CHANNEL_0 0x00000001 /* Trigger channel 0 */
133#define TRIGGER_CHANNEL_1 0x00000002 /* Trigger channel 1 */
134#define TRIGGER_CHANNEL_2 0x00000004 /* Trigger channel 2 */
135#define TRIGGER_CAPTURE 0x00000100 /* Trigger capture channel */
136
137#define ROUTING 0x41 /* Setup sound routing ? */
138#define ROUTING_FRONT_LEFT 0x00000001
139#define ROUTING_FRONT_RIGHT 0x00000002
140#define ROUTING_REAR_LEFT 0x00000004
141#define ROUTING_REAR_RIGHT 0x00000008
142#define ROUTING_CENTER_LFE 0x00010000
143
144#define SPCS0 0x42 /* SPDIF output Channel Status 0 register */
145
146#define SPCS1 0x43 /* SPDIF output Channel Status 1 register */
147
148#define SPCS2 0x44 /* SPDIF output Channel Status 2 register */
149
150#define SPCS_CLKACCYMASK 0x30000000 /* Clock accuracy */
151#define SPCS_CLKACCY_1000PPM 0x00000000 /* 1000 parts per million */
152#define SPCS_CLKACCY_50PPM 0x10000000 /* 50 parts per million */
153#define SPCS_CLKACCY_VARIABLE 0x20000000 /* Variable accuracy */
154#define SPCS_SAMPLERATEMASK 0x0f000000 /* Sample rate */
155#define SPCS_SAMPLERATE_44 0x00000000 /* 44.1kHz sample rate */
156#define SPCS_SAMPLERATE_48 0x02000000 /* 48kHz sample rate */
157#define SPCS_SAMPLERATE_32 0x03000000 /* 32kHz sample rate */
158#define SPCS_CHANNELNUMMASK 0x00f00000 /* Channel number */
159#define SPCS_CHANNELNUM_UNSPEC 0x00000000 /* Unspecified channel number */
160#define SPCS_CHANNELNUM_LEFT 0x00100000 /* Left channel */
161#define SPCS_CHANNELNUM_RIGHT 0x00200000 /* Right channel */
162#define SPCS_SOURCENUMMASK 0x000f0000 /* Source number */
163#define SPCS_SOURCENUM_UNSPEC 0x00000000 /* Unspecified source number */
164#define SPCS_GENERATIONSTATUS 0x00008000 /* Originality flag (see IEC-958 spec) */
165#define SPCS_CATEGORYCODEMASK 0x00007f00 /* Category code (see IEC-958 spec) */
166#define SPCS_MODEMASK 0x000000c0 /* Mode (see IEC-958 spec) */
167#define SPCS_EMPHASISMASK 0x00000038 /* Emphasis */
168#define SPCS_EMPHASIS_NONE 0x00000000 /* No emphasis */
169#define SPCS_EMPHASIS_50_15 0x00000008 /* 50/15 usec 2 channel */
170#define SPCS_COPYRIGHT 0x00000004 /* Copyright asserted flag -- do not modify */
171#define SPCS_NOTAUDIODATA 0x00000002 /* 0 = Digital audio, 1 = not audio */
172#define SPCS_PROFESSIONAL 0x00000001 /* 0 = Consumer (IEC-958), 1 = pro (AES3-1992) */
173
174#define SPDIF_SELECT 0x45 /* Enables SPDIF or Analogue outputs 0-Analogue, 0x700-SPDIF */
175
176/* This is the MPU port on the card */
177#define MUDATA 0x47
178#define MUCMD 0x48
179#define MUSTAT MUCMD
180
181/* From 0x50 - 0x5f, last samples captured */
182
ddcecf6b 183/*
1da177e4
LT		 184 * The hardware has 3 channels for playback and 1 for capture.
185 * - channel 0 is the front channel
186 * - channel 1 is the rear channel
af901ca1 187 * - channel 2 is the center/lfe channel
1da177e4
LT		 188 * Volume is controlled by the AC97 for the front and rear channels by
189 * the PCM Playback Volume, Sigmatel Surround Playback Volume and
190 * Surround Playback Volume. The Sigmatel 4-Speaker Stereo switch affects
191 * the front/rear channel mixing in the REAR OUT jack. When using the
192 * 4-Speaker Stereo, both front and rear channels will be mixed in the
193 * REAR OUT.
194 * The center/lfe channel has no volume control and cannot be muted during
195 * playback.
196 */
197
4b32f1aa
TI		 198struct emu10k1x_voice {
199 struct emu10k1x *emu;
1da177e4
LT		 200 int number;
201 int use;
202
4b32f1aa 203 struct emu10k1x_pcm *epcm;
1da177e4
LT		 204};
205
4b32f1aa
TI		 206struct emu10k1x_pcm {
207 struct emu10k1x *emu;
208 struct snd_pcm_substream *substream;
209 struct emu10k1x_voice *voice;
1da177e4
LT		 210 unsigned short running;
211};
212
4b32f1aa
TI		 213struct emu10k1x_midi {
214 struct emu10k1x *emu;
215 struct snd_rawmidi *rmidi;
216 struct snd_rawmidi_substream *substream_input;
217 struct snd_rawmidi_substream *substream_output;
1da177e4
LT		 218 unsigned int midi_mode;
219 spinlock_t input_lock;
220 spinlock_t output_lock;
221 spinlock_t open_lock;
222 int tx_enable, rx_enable;
223 int port;
224 int ipr_tx, ipr_rx;
4b32f1aa
TI		 225 void (*interrupt)(struct emu10k1x *emu, unsigned int status);
226};
1da177e4
LT		 227
228// definition of the chip-specific record
4b32f1aa
TI		 229struct emu10k1x {
230 struct snd_card *card;
1da177e4
LT		 231 struct pci_dev *pci;
232
233 unsigned long port;
234 struct resource *res_port;
235 int irq;
236
01f681da 237 unsigned char revision; /* chip revision */
1da177e4
LT		 238 unsigned int serial; /* serial number */
239 unsigned short model; /* subsystem id */
240
241 spinlock_t emu_lock;
242 spinlock_t voice_lock;
243
4b32f1aa
TI		 244 struct snd_ac97 *ac97;
245 struct snd_pcm *pcm;
1da177e4 246
4b32f1aa
TI		 247 struct emu10k1x_voice voices[3];
248 struct emu10k1x_voice capture_voice;
1da177e4
LT		 249 u32 spdif_bits[3]; // SPDIF out setup
250
251 struct snd_dma_buffer dma_buffer;
252
4b32f1aa 253 struct emu10k1x_midi midi;
1da177e4
LT		 254};
255
256/* hardware definition */
4b32f1aa 257static struct snd_pcm_hardware snd_emu10k1x_playback_hw = {
1da177e4
LT		 258 .info = (SNDRV_PCM_INFO_MMAP |
259 SNDRV_PCM_INFO_INTERLEAVED |
260 SNDRV_PCM_INFO_BLOCK_TRANSFER |
261 SNDRV_PCM_INFO_MMAP_VALID),
262 .formats = SNDRV_PCM_FMTBIT_S16_LE,
263 .rates = SNDRV_PCM_RATE_48000,
264 .rate_min = 48000,
265 .rate_max = 48000,
266 .channels_min = 2,
267 .channels_max = 2,
268 .buffer_bytes_max = (32*1024),
269 .period_bytes_min = 64,
270 .period_bytes_max = (16*1024),
271 .periods_min = 2,
272 .periods_max = 8,
273 .fifo_size = 0,
274};
275
4b32f1aa 276static struct snd_pcm_hardware snd_emu10k1x_capture_hw = {
1da177e4
LT		 277 .info = (SNDRV_PCM_INFO_MMAP |
278 SNDRV_PCM_INFO_INTERLEAVED |
279 SNDRV_PCM_INFO_BLOCK_TRANSFER |
280 SNDRV_PCM_INFO_MMAP_VALID),
281 .formats = SNDRV_PCM_FMTBIT_S16_LE,
282 .rates = SNDRV_PCM_RATE_48000,
283 .rate_min = 48000,
284 .rate_max = 48000,
285 .channels_min = 2,
286 .channels_max = 2,
287 .buffer_bytes_max = (32*1024),
288 .period_bytes_min = 64,
289 .period_bytes_max = (16*1024),
290 .periods_min = 2,
291 .periods_max = 2,
292 .fifo_size = 0,
293};
294
4b32f1aa 295static unsigned int snd_emu10k1x_ptr_read(struct emu10k1x * emu,
1da177e4
LT		 296 unsigned int reg,
297 unsigned int chn)
298{
299 unsigned long flags;
300 unsigned int regptr, val;
301
302 regptr = (reg << 16) | chn;
303
304 spin_lock_irqsave(&emu->emu_lock, flags);
305 outl(regptr, emu->port + PTR);
306 val = inl(emu->port + DATA);
307 spin_unlock_irqrestore(&emu->emu_lock, flags);
308 return val;
309}
310
4b32f1aa 311static void snd_emu10k1x_ptr_write(struct emu10k1x *emu,
1da177e4
LT		 312 unsigned int reg,
313 unsigned int chn,
314 unsigned int data)
315{
316 unsigned int regptr;
317 unsigned long flags;
318
319 regptr = (reg << 16) | chn;
320
321 spin_lock_irqsave(&emu->emu_lock, flags);
322 outl(regptr, emu->port + PTR);
323 outl(data, emu->port + DATA);
324 spin_unlock_irqrestore(&emu->emu_lock, flags);
325}
326
4b32f1aa 327static void snd_emu10k1x_intr_enable(struct emu10k1x *emu, unsigned int intrenb)
1da177e4
LT		 328{
329 unsigned long flags;
f2948fc2
HH		 330 unsigned int intr_enable;
331
1da177e4 332 spin_lock_irqsave(&emu->emu_lock, flags);
f2948fc2
HH		 333 intr_enable = inl(emu->port + INTE) | intrenb;
334 outl(intr_enable, emu->port + INTE);
1da177e4
LT		 335 spin_unlock_irqrestore(&emu->emu_lock, flags);
336}
337
4b32f1aa 338static void snd_emu10k1x_intr_disable(struct emu10k1x *emu, unsigned int intrenb)
1da177e4
LT		 339{
340 unsigned long flags;
f2948fc2
HH		 341 unsigned int intr_enable;
342
1da177e4 343 spin_lock_irqsave(&emu->emu_lock, flags);
f2948fc2
HH		 344 intr_enable = inl(emu->port + INTE) & ~intrenb;
345 outl(intr_enable, emu->port + INTE);
1da177e4
LT		 346 spin_unlock_irqrestore(&emu->emu_lock, flags);
347}
348
4b32f1aa 349static void snd_emu10k1x_gpio_write(struct emu10k1x *emu, unsigned int value)
1da177e4
LT		 350{
351 unsigned long flags;
352
353 spin_lock_irqsave(&emu->emu_lock, flags);
354 outl(value, emu->port + GPIO);
355 spin_unlock_irqrestore(&emu->emu_lock, flags);
356}
357
4b32f1aa 358static void snd_emu10k1x_pcm_free_substream(struct snd_pcm_runtime *runtime)
1da177e4 359{
4d572776 360 kfree(runtime->private_data);
1da177e4
LT		 361}
362
4b32f1aa 363static void snd_emu10k1x_pcm_interrupt(struct emu10k1x *emu, struct emu10k1x_voice *voice)
1da177e4 364{
4b32f1aa 365 struct emu10k1x_pcm *epcm;
1da177e4
LT		 366
367 if ((epcm = voice->epcm) == NULL)
368 return;
369 if (epcm->substream == NULL)
370 return;
371#if 0
26bc6964
TI		 372 dev_info(emu->card->dev,
373 "IRQ: position = 0x%x, period = 0x%x, size = 0x%x\n",
1da177e4
LT		 374 epcm->substream->ops->pointer(epcm->substream),
375 snd_pcm_lib_period_bytes(epcm->substream),
376 snd_pcm_lib_buffer_bytes(epcm->substream));
377#endif
378 snd_pcm_period_elapsed(epcm->substream);
379}
380
381/* open callback */
4b32f1aa 382static int snd_emu10k1x_playback_open(struct snd_pcm_substream *substream)
1da177e4 383{
4b32f1aa
TI		 384 struct emu10k1x *chip = snd_pcm_substream_chip(substream);
385 struct emu10k1x_pcm *epcm;
386 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 387 int err;
388
389 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) {
390 return err;
391 }
392 if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
393 return err;
394
e560d8d8 395 epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
1da177e4
LT		 396 if (epcm == NULL)
397 return -ENOMEM;
398 epcm->emu = chip;
399 epcm->substream = substream;
400
401 runtime->private_data = epcm;
402 runtime->private_free = snd_emu10k1x_pcm_free_substream;
403
404 runtime->hw = snd_emu10k1x_playback_hw;
405
406 return 0;
407}
408
409/* close callback */
4b32f1aa 410static int snd_emu10k1x_playback_close(struct snd_pcm_substream *substream)
1da177e4
LT		 411{
412 return 0;
413}
414
415/* hw_params callback */
4b32f1aa
TI		 416static int snd_emu10k1x_pcm_hw_params(struct snd_pcm_substream *substream,
417 struct snd_pcm_hw_params *hw_params)
1da177e4 418{
4b32f1aa
TI		 419 struct snd_pcm_runtime *runtime = substream->runtime;
420 struct emu10k1x_pcm *epcm = runtime->private_data;
1da177e4
LT		 421
422 if (! epcm->voice) {
423 epcm->voice = &epcm->emu->voices[substream->pcm->device];
424 epcm->voice->use = 1;
425 epcm->voice->epcm = epcm;
426 }
427
428 return snd_pcm_lib_malloc_pages(substream,
429 params_buffer_bytes(hw_params));
430}
431
432/* hw_free callback */
4b32f1aa 433static int snd_emu10k1x_pcm_hw_free(struct snd_pcm_substream *substream)
1da177e4 434{
4b32f1aa
TI		 435 struct snd_pcm_runtime *runtime = substream->runtime;
436 struct emu10k1x_pcm *epcm;
1da177e4
LT		 437
438 if (runtime->private_data == NULL)
439 return 0;
440
441 epcm = runtime->private_data;
442
443 if (epcm->voice) {
444 epcm->voice->use = 0;
445 epcm->voice->epcm = NULL;
446 epcm->voice = NULL;
447 }
448
449 return snd_pcm_lib_free_pages(substream);
450}
451
452/* prepare callback */
4b32f1aa 453static int snd_emu10k1x_pcm_prepare(struct snd_pcm_substream *substream)
1da177e4 454{
4b32f1aa
TI		 455 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
456 struct snd_pcm_runtime *runtime = substream->runtime;
457 struct emu10k1x_pcm *epcm = runtime->private_data;
1da177e4
LT		 458 int voice = epcm->voice->number;
459 u32 *table_base = (u32 *)(emu->dma_buffer.area+1024*voice);
460 u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size);
461 int i;
462
9f4bd5dd 463 for(i = 0; i < runtime->periods; i++) {
1da177e4
LT		 464 *table_base++=runtime->dma_addr+(i*period_size_bytes);
465 *table_base++=period_size_bytes<<16;
466 }
467
468 snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_ADDR, voice, emu->dma_buffer.addr+1024*voice);
469 snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_SIZE, voice, (runtime->periods - 1) << 19);
470 snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_PTR, voice, 0);
471 snd_emu10k1x_ptr_write(emu, PLAYBACK_POINTER, voice, 0);
472 snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN1, voice, 0);
473 snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN2, voice, 0);
474 snd_emu10k1x_ptr_write(emu, PLAYBACK_DMA_ADDR, voice, runtime->dma_addr);
475
476 snd_emu10k1x_ptr_write(emu, PLAYBACK_PERIOD_SIZE, voice, frames_to_bytes(runtime, runtime->period_size)<<16);
477
478 return 0;
479}
480
481/* trigger callback */
4b32f1aa 482static int snd_emu10k1x_pcm_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 483 int cmd)
484{
4b32f1aa
TI		 485 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
486 struct snd_pcm_runtime *runtime = substream->runtime;
487 struct emu10k1x_pcm *epcm = runtime->private_data;
1da177e4
LT		 488 int channel = epcm->voice->number;
489 int result = 0;
490
26bc6964
TI		 491 /*
492 dev_dbg(emu->card->dev,
493 "trigger - emu10k1x = 0x%x, cmd = %i, pointer = %d\n",
494 (int)emu, cmd, (int)substream->ops->pointer(substream));
495 */
1da177e4
LT		 496
497 switch (cmd) {
498 case SNDRV_PCM_TRIGGER_START:
499 if(runtime->periods == 2)
500 snd_emu10k1x_intr_enable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
501 else
502 snd_emu10k1x_intr_enable(emu, INTE_CH_0_LOOP << channel);
503 epcm->running = 1;
504 snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|(TRIGGER_CHANNEL_0<<channel));
505 break;
506 case SNDRV_PCM_TRIGGER_STOP:
507 epcm->running = 0;
508 snd_emu10k1x_intr_disable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
509 snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CHANNEL_0<<channel));
510 break;
511 default:
512 result = -EINVAL;
513 break;
514 }
515 return result;
516}
517
518/* pointer callback */
519static snd_pcm_uframes_t
4b32f1aa 520snd_emu10k1x_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 521{
4b32f1aa
TI		 522 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
523 struct snd_pcm_runtime *runtime = substream->runtime;
524 struct emu10k1x_pcm *epcm = runtime->private_data;
1da177e4
LT		 525 int channel = epcm->voice->number;
526 snd_pcm_uframes_t ptr = 0, ptr1 = 0, ptr2= 0,ptr3 = 0,ptr4 = 0;
527
528 if (!epcm->running)
529 return 0;
530
531 ptr3 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
532 ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
533 ptr4 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
534
535 if(ptr4 == 0 && ptr1 == frames_to_bytes(runtime, runtime->buffer_size))
536 return 0;
537
538 if (ptr3 != ptr4)
539 ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
540 ptr2 = bytes_to_frames(runtime, ptr1);
541 ptr2 += (ptr4 >> 3) * runtime->period_size;
542 ptr = ptr2;
543
544 if (ptr >= runtime->buffer_size)
545 ptr -= runtime->buffer_size;
546
547 return ptr;
548}
549
550/* operators */
6769e988 551static const struct snd_pcm_ops snd_emu10k1x_playback_ops = {
1da177e4
LT		 552 .open = snd_emu10k1x_playback_open,
553 .close = snd_emu10k1x_playback_close,
554 .ioctl = snd_pcm_lib_ioctl,
555 .hw_params = snd_emu10k1x_pcm_hw_params,
556 .hw_free = snd_emu10k1x_pcm_hw_free,
557 .prepare = snd_emu10k1x_pcm_prepare,
558 .trigger = snd_emu10k1x_pcm_trigger,
559 .pointer = snd_emu10k1x_pcm_pointer,
560};
561
562/* open_capture callback */
4b32f1aa 563static int snd_emu10k1x_pcm_open_capture(struct snd_pcm_substream *substream)
1da177e4 564{
4b32f1aa
TI		 565 struct emu10k1x *chip = snd_pcm_substream_chip(substream);
566 struct emu10k1x_pcm *epcm;
567 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 568 int err;
569
570 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
571 return err;
572 if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
573 return err;
574
e560d8d8 575 epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
1da177e4
LT		 576 if (epcm == NULL)
577 return -ENOMEM;
578
579 epcm->emu = chip;
580 epcm->substream = substream;
581
582 runtime->private_data = epcm;
583 runtime->private_free = snd_emu10k1x_pcm_free_substream;
584
585 runtime->hw = snd_emu10k1x_capture_hw;
586
587 return 0;
588}
589
590/* close callback */
4b32f1aa 591static int snd_emu10k1x_pcm_close_capture(struct snd_pcm_substream *substream)
1da177e4
LT		 592{
593 return 0;
594}
595
596/* hw_params callback */
4b32f1aa
TI		 597static int snd_emu10k1x_pcm_hw_params_capture(struct snd_pcm_substream *substream,
598 struct snd_pcm_hw_params *hw_params)
1da177e4 599{
4b32f1aa
TI		 600 struct snd_pcm_runtime *runtime = substream->runtime;
601 struct emu10k1x_pcm *epcm = runtime->private_data;
1da177e4
LT		 602
603 if (! epcm->voice) {
604 if (epcm->emu->capture_voice.use)
605 return -EBUSY;
606 epcm->voice = &epcm->emu->capture_voice;
607 epcm->voice->epcm = epcm;
608 epcm->voice->use = 1;
609 }
610
611 return snd_pcm_lib_malloc_pages(substream,
612 params_buffer_bytes(hw_params));
613}
614
615/* hw_free callback */
4b32f1aa 616static int snd_emu10k1x_pcm_hw_free_capture(struct snd_pcm_substream *substream)
1da177e4 617{
4b32f1aa 618 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 619
4b32f1aa 620 struct emu10k1x_pcm *epcm;
1da177e4
LT		 621
622 if (runtime->private_data == NULL)
623 return 0;
624 epcm = runtime->private_data;
625
626 if (epcm->voice) {
627 epcm->voice->use = 0;
628 epcm->voice->epcm = NULL;
629 epcm->voice = NULL;
630 }
631
632 return snd_pcm_lib_free_pages(substream);
633}
634
635/* prepare capture callback */
4b32f1aa 636static int snd_emu10k1x_pcm_prepare_capture(struct snd_pcm_substream *substream)
1da177e4 637{
4b32f1aa
TI		 638 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
639 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 640
641 snd_emu10k1x_ptr_write(emu, CAPTURE_DMA_ADDR, 0, runtime->dma_addr);
642 snd_emu10k1x_ptr_write(emu, CAPTURE_BUFFER_SIZE, 0, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes
643 snd_emu10k1x_ptr_write(emu, CAPTURE_POINTER, 0, 0);
644 snd_emu10k1x_ptr_write(emu, CAPTURE_UNKNOWN, 0, 0);
645
646 return 0;
647}
648
649/* trigger_capture callback */
4b32f1aa 650static int snd_emu10k1x_pcm_trigger_capture(struct snd_pcm_substream *substream,
1da177e4
LT		 651 int cmd)
652{
4b32f1aa
TI		 653 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
654 struct snd_pcm_runtime *runtime = substream->runtime;
655 struct emu10k1x_pcm *epcm = runtime->private_data;
1da177e4
LT		 656 int result = 0;
657
658 switch (cmd) {
659 case SNDRV_PCM_TRIGGER_START:
660 snd_emu10k1x_intr_enable(emu, INTE_CAP_0_LOOP |
661 INTE_CAP_0_HALF_LOOP);
662 snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|TRIGGER_CAPTURE);
663 epcm->running = 1;
664 break;
665 case SNDRV_PCM_TRIGGER_STOP:
666 epcm->running = 0;
667 snd_emu10k1x_intr_disable(emu, INTE_CAP_0_LOOP |
668 INTE_CAP_0_HALF_LOOP);
669 snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CAPTURE));
670 break;
671 default:
672 result = -EINVAL;
673 break;
674 }
675 return result;
676}
677
678/* pointer_capture callback */
679static snd_pcm_uframes_t
4b32f1aa 680snd_emu10k1x_pcm_pointer_capture(struct snd_pcm_substream *substream)
1da177e4 681{
4b32f1aa
TI		 682 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
683 struct snd_pcm_runtime *runtime = substream->runtime;
684 struct emu10k1x_pcm *epcm = runtime->private_data;
1da177e4
LT		 685 snd_pcm_uframes_t ptr;
686
687 if (!epcm->running)
688 return 0;
689
690 ptr = bytes_to_frames(runtime, snd_emu10k1x_ptr_read(emu, CAPTURE_POINTER, 0));
691 if (ptr >= runtime->buffer_size)
692 ptr -= runtime->buffer_size;
693
694 return ptr;
695}
696
6769e988 697static const struct snd_pcm_ops snd_emu10k1x_capture_ops = {
1da177e4
LT		 698 .open = snd_emu10k1x_pcm_open_capture,
699 .close = snd_emu10k1x_pcm_close_capture,
700 .ioctl = snd_pcm_lib_ioctl,
701 .hw_params = snd_emu10k1x_pcm_hw_params_capture,
702 .hw_free = snd_emu10k1x_pcm_hw_free_capture,
703 .prepare = snd_emu10k1x_pcm_prepare_capture,
704 .trigger = snd_emu10k1x_pcm_trigger_capture,
705 .pointer = snd_emu10k1x_pcm_pointer_capture,
706};
707
4b32f1aa 708static unsigned short snd_emu10k1x_ac97_read(struct snd_ac97 *ac97,
1da177e4
LT		 709 unsigned short reg)
710{
4b32f1aa 711 struct emu10k1x *emu = ac97->private_data;
1da177e4
LT		 712 unsigned long flags;
713 unsigned short val;
714
715 spin_lock_irqsave(&emu->emu_lock, flags);
716 outb(reg, emu->port + AC97ADDRESS);
717 val = inw(emu->port + AC97DATA);
718 spin_unlock_irqrestore(&emu->emu_lock, flags);
719 return val;
720}
721
4b32f1aa 722static void snd_emu10k1x_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT		 723 unsigned short reg, unsigned short val)
724{
4b32f1aa 725 struct emu10k1x *emu = ac97->private_data;
1da177e4
LT		 726 unsigned long flags;
727
728 spin_lock_irqsave(&emu->emu_lock, flags);
729 outb(reg, emu->port + AC97ADDRESS);
730 outw(val, emu->port + AC97DATA);
731 spin_unlock_irqrestore(&emu->emu_lock, flags);
732}
733
4b32f1aa 734static int snd_emu10k1x_ac97(struct emu10k1x *chip)
1da177e4 735{
4b32f1aa
TI		 736 struct snd_ac97_bus *pbus;
737 struct snd_ac97_template ac97;
1da177e4 738 int err;
4b32f1aa 739 static struct snd_ac97_bus_ops ops = {
1da177e4
LT		 740 .write = snd_emu10k1x_ac97_write,
741 .read = snd_emu10k1x_ac97_read,
742 };
743
744 if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
745 return err;
746 pbus->no_vra = 1; /* we don't need VRA */
747
748 memset(&ac97, 0, sizeof(ac97));
749 ac97.private_data = chip;
750 ac97.scaps = AC97_SCAP_NO_SPDIF;
751 return snd_ac97_mixer(pbus, &ac97, &chip->ac97);
752}
753
4b32f1aa 754static int snd_emu10k1x_free(struct emu10k1x *chip)
1da177e4
LT		 755{
756 snd_emu10k1x_ptr_write(chip, TRIGGER_CHANNEL, 0, 0);
757 // disable interrupts
758 outl(0, chip->port + INTE);
759 // disable audio
760 outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG);
761
ebf029da 762 /* release the irq */
1da177e4 763 if (chip->irq >= 0)
437a5a46 764 free_irq(chip->irq, chip);
1da177e4 765
ebf029da
TI		 766 // release the i/o port
767 release_and_free_resource(chip->res_port);
768
1da177e4
LT		 769 // release the DMA
770 if (chip->dma_buffer.area) {
771 snd_dma_free_pages(&chip->dma_buffer);
772 }
773
774 pci_disable_device(chip->pci);
775
776 // release the data
777 kfree(chip);
778 return 0;
779}
780
4b32f1aa 781static int snd_emu10k1x_dev_free(struct snd_device *device)
1da177e4 782{
4b32f1aa 783 struct emu10k1x *chip = device->device_data;
1da177e4
LT		 784 return snd_emu10k1x_free(chip);
785}
786
7d12e780 787static irqreturn_t snd_emu10k1x_interrupt(int irq, void *dev_id)
1da177e4
LT		 788{
789 unsigned int status;
790
4b32f1aa
TI		 791 struct emu10k1x *chip = dev_id;
792 struct emu10k1x_voice *pvoice = chip->voices;
1da177e4
LT		 793 int i;
794 int mask;
795
796 status = inl(chip->port + IPR);
797
89173bd4
TI		 798 if (! status)
799 return IRQ_NONE;
800
801 // capture interrupt
802 if (status & (IPR_CAP_0_LOOP | IPR_CAP_0_HALF_LOOP)) {
f2948fc2
HH		 803 struct emu10k1x_voice *cap_voice = &chip->capture_voice;
804 if (cap_voice->use)
805 snd_emu10k1x_pcm_interrupt(chip, cap_voice);
89173bd4
TI		 806 else
807 snd_emu10k1x_intr_disable(chip,
808 INTE_CAP_0_LOOP |
809 INTE_CAP_0_HALF_LOOP);
810 }
1da177e4 811
89173bd4
TI		 812 mask = IPR_CH_0_LOOP|IPR_CH_0_HALF_LOOP;
813 for (i = 0; i < 3; i++) {
814 if (status & mask) {
815 if (pvoice->use)
816 snd_emu10k1x_pcm_interrupt(chip, pvoice);
817 else
818 snd_emu10k1x_intr_disable(chip, mask);
1da177e4 819 }
89173bd4
TI		 820 pvoice++;
821 mask <<= 1;
822 }
1da177e4 823
89173bd4
TI		 824 if (status & (IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY)) {
825 if (chip->midi.interrupt)
826 chip->midi.interrupt(chip, status);
827 else
828 snd_emu10k1x_intr_disable(chip, INTE_MIDITXENABLE|INTE_MIDIRXENABLE);
1da177e4 829 }
89173bd4
TI		 830
831 // acknowledge the interrupt if necessary
832 outl(status, chip->port + IPR);
1da177e4 833
26bc6964 834 /* dev_dbg(chip->card->dev, "interrupt %08x\n", status); */
1da177e4
LT		 835 return IRQ_HANDLED;
836}
837
3adc497f
TI		 838static const struct snd_pcm_chmap_elem surround_map[] = {
839 { .channels = 2,
840 .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
841 { }
842};
843
844static const struct snd_pcm_chmap_elem clfe_map[] = {
845 { .channels = 2,
846 .map = { SNDRV_CHMAP_FC, SNDRV_CHMAP_LFE } },
847 { }
848};
849
bb814c39 850static int snd_emu10k1x_pcm(struct emu10k1x *emu, int device)
1da177e4 851{
4b32f1aa 852 struct snd_pcm *pcm;
3adc497f 853 const struct snd_pcm_chmap_elem *map = NULL;
1da177e4
LT		 854 int err;
855 int capture = 0;
856
1da177e4
LT		 857 if (device == 0)
858 capture = 1;
859
860 if ((err = snd_pcm_new(emu->card, "emu10k1x", device, 1, capture, &pcm)) < 0)
861 return err;
862
863 pcm->private_data = emu;
1da177e4
LT		 864
865 switch(device) {
866 case 0:
867 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
868 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_emu10k1x_capture_ops);
869 break;
870 case 1:
871 case 2:
872 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
873 break;
874 }
875
876 pcm->info_flags = 0;
1da177e4
LT		 877 switch(device) {
878 case 0:
879 strcpy(pcm->name, "EMU10K1X Front");
3adc497f 880 map = snd_pcm_std_chmaps;
1da177e4
LT		 881 break;
882 case 1:
883 strcpy(pcm->name, "EMU10K1X Rear");
3adc497f 884 map = surround_map;
1da177e4
LT		 885 break;
886 case 2:
887 strcpy(pcm->name, "EMU10K1X Center/LFE");
3adc497f 888 map = clfe_map;
1da177e4
LT		 889 break;
890 }
891 emu->pcm = pcm;
892
893 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
894 snd_dma_pci_data(emu->pci),
895 32*1024, 32*1024);
896
bb814c39 897 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, map, 2,
3adc497f 898 1 << 2, NULL);
1da177e4
LT		 899}
900
e23e7a14
BP		 901static int snd_emu10k1x_create(struct snd_card *card,
902 struct pci_dev *pci,
903 struct emu10k1x **rchip)
1da177e4 904{
4b32f1aa 905 struct emu10k1x *chip;
1da177e4
LT		 906 int err;
907 int ch;
4b32f1aa 908 static struct snd_device_ops ops = {
1da177e4
LT		 909 .dev_free = snd_emu10k1x_dev_free,
910 };
9d2f928d 911
1da177e4 912 *rchip = NULL;
9d2f928d 913
1da177e4
LT		 914 if ((err = pci_enable_device(pci)) < 0)
915 return err;
ce0b6201
YH		 916 if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
917 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
26bc6964 918 dev_err(card->dev, "error to set 28bit mask DMA\n");
1da177e4
LT		 919 pci_disable_device(pci);
920 return -ENXIO;
921 }
9d2f928d 922
e560d8d8 923 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 924 if (chip == NULL) {
925 pci_disable_device(pci);
926 return -ENOMEM;
927 }
9d2f928d 928
1da177e4
LT		 929 chip->card = card;
930 chip->pci = pci;
931 chip->irq = -1;
932
933 spin_lock_init(&chip->emu_lock);
934 spin_lock_init(&chip->voice_lock);
935
936 chip->port = pci_resource_start(pci, 0);
937 if ((chip->res_port = request_region(chip->port, 8,
938 "EMU10K1X")) == NULL) {
26bc6964
TI		 939 dev_err(card->dev, "cannot allocate the port 0x%lx\n",
940 chip->port);
1da177e4
LT		 941 snd_emu10k1x_free(chip);
942 return -EBUSY;
943 }
944
945 if (request_irq(pci->irq, snd_emu10k1x_interrupt,
934c2b6d 946 IRQF_SHARED, KBUILD_MODNAME, chip)) {
26bc6964 947 dev_err(card->dev, "cannot grab irq %d\n", pci->irq);
1da177e4
LT		 948 snd_emu10k1x_free(chip);
949 return -EBUSY;
950 }
951 chip->irq = pci->irq;
952
953 if(snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
954 4 * 1024, &chip->dma_buffer) < 0) {
955 snd_emu10k1x_free(chip);
956 return -ENOMEM;
957 }
958
959 pci_set_master(pci);
960 /* read revision & serial */
44c10138 961 chip->revision = pci->revision;
1da177e4
LT		 962 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial);
963 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model);
26bc6964 964 dev_info(card->dev, "Model %04x Rev %08x Serial %08x\n", chip->model,
1da177e4
LT		 965 chip->revision, chip->serial);
966
967 outl(0, chip->port + INTE);
968
969 for(ch = 0; ch < 3; ch++) {
970 chip->voices[ch].emu = chip;
971 chip->voices[ch].number = ch;
972 }
973
974 /*
975 * Init to 0x02109204 :
976 * Clock accuracy = 0 (1000ppm)
977 * Sample Rate = 2 (48kHz)
978 * Audio Channel = 1 (Left of 2)
979 * Source Number = 0 (Unspecified)
980 * Generation Status = 1 (Original for Cat Code 12)
981 * Cat Code = 12 (Digital Signal Mixer)
982 * Mode = 0 (Mode 0)
983 * Emphasis = 0 (None)
984 * CP = 1 (Copyright unasserted)
985 * AN = 0 (Audio data)
986 * P = 0 (Consumer)
987 */
988 snd_emu10k1x_ptr_write(chip, SPCS0, 0,
989 chip->spdif_bits[0] =
990 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
991 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
992 SPCS_GENERATIONSTATUS | 0x00001200 |
993 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
994 snd_emu10k1x_ptr_write(chip, SPCS1, 0,
995 chip->spdif_bits[1] =
996 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
997 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
998 SPCS_GENERATIONSTATUS | 0x00001200 |
999 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
1000 snd_emu10k1x_ptr_write(chip, SPCS2, 0,
1001 chip->spdif_bits[2] =
1002 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1003 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1004 SPCS_GENERATIONSTATUS | 0x00001200 |
1005 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
1006
1007 snd_emu10k1x_ptr_write(chip, SPDIF_SELECT, 0, 0x700); // disable SPDIF
1008 snd_emu10k1x_ptr_write(chip, ROUTING, 0, 0x1003F); // routing
1009 snd_emu10k1x_gpio_write(chip, 0x1080); // analog mode
1010
1011 outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG);
1012
1013 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
1014 chip, &ops)) < 0) {
1015 snd_emu10k1x_free(chip);
1016 return err;
1017 }
1018 *rchip = chip;
1019 return 0;
1020}
1021
4b32f1aa
TI		 1022static void snd_emu10k1x_proc_reg_read(struct snd_info_entry *entry,
1023 struct snd_info_buffer *buffer)
1da177e4 1024{
4b32f1aa 1025 struct emu10k1x *emu = entry->private_data;
1da177e4
LT		 1026 unsigned long value,value1,value2;
1027 unsigned long flags;
1028 int i;
1029
1030 snd_iprintf(buffer, "Registers:\n\n");
1031 for(i = 0; i < 0x20; i+=4) {
1032 spin_lock_irqsave(&emu->emu_lock, flags);
1033 value = inl(emu->port + i);
1034 spin_unlock_irqrestore(&emu->emu_lock, flags);
1035 snd_iprintf(buffer, "Register %02X: %08lX\n", i, value);
1036 }
1037 snd_iprintf(buffer, "\nRegisters\n\n");
1038 for(i = 0; i <= 0x48; i++) {
1039 value = snd_emu10k1x_ptr_read(emu, i, 0);
1040 if(i < 0x10 || (i >= 0x20 && i < 0x40)) {
1041 value1 = snd_emu10k1x_ptr_read(emu, i, 1);
1042 value2 = snd_emu10k1x_ptr_read(emu, i, 2);
1043 snd_iprintf(buffer, "%02X: %08lX %08lX %08lX\n", i, value, value1, value2);
1044 } else {
1045 snd_iprintf(buffer, "%02X: %08lX\n", i, value);
1046 }
1047 }
1048}
1049
4b32f1aa
TI		 1050static void snd_emu10k1x_proc_reg_write(struct snd_info_entry *entry,
1051 struct snd_info_buffer *buffer)
1da177e4 1052{
4b32f1aa 1053 struct emu10k1x *emu = entry->private_data;
1da177e4
LT		 1054 char line[64];
1055 unsigned int reg, channel_id , val;
1056
1057 while (!snd_info_get_line(buffer, line, sizeof(line))) {
1058 if (sscanf(line, "%x %x %x", &reg, &channel_id, &val) != 3)
1059 continue;
1060
84ed1a19 1061 if (reg < 0x49 && val <= 0xffffffff && channel_id <= 2)
1da177e4
LT		 1062 snd_emu10k1x_ptr_write(emu, reg, channel_id, val);
1063 }
1064}
1065
e23e7a14 1066static int snd_emu10k1x_proc_init(struct emu10k1x *emu)
1da177e4 1067{
4b32f1aa 1068 struct snd_info_entry *entry;
1da177e4
LT		 1069
1070 if(! snd_card_proc_new(emu->card, "emu10k1x_regs", &entry)) {
bf850204 1071 snd_info_set_text_ops(entry, emu, snd_emu10k1x_proc_reg_read);
1da177e4 1072 entry->c.text.write = snd_emu10k1x_proc_reg_write;
bd7bf042 1073 entry->mode |= S_IWUSR;
1da177e4
LT		 1074 entry->private_data = emu;
1075 }
1076
1077 return 0;
1078}
1079
a5ce8890 1080#define snd_emu10k1x_shared_spdif_info snd_ctl_boolean_mono_info
1da177e4 1081
4b32f1aa
TI		 1082static int snd_emu10k1x_shared_spdif_get(struct snd_kcontrol *kcontrol,
1083 struct snd_ctl_elem_value *ucontrol)
1da177e4 1084{
4b32f1aa 1085 struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1086
1087 ucontrol->value.integer.value[0] = (snd_emu10k1x_ptr_read(emu, SPDIF_SELECT, 0) == 0x700) ? 0 : 1;
1088
1089 return 0;
1090}
1091
4b32f1aa
TI		 1092static int snd_emu10k1x_shared_spdif_put(struct snd_kcontrol *kcontrol,
1093 struct snd_ctl_elem_value *ucontrol)
1da177e4 1094{
4b32f1aa 1095 struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1096 unsigned int val;
1097 int change = 0;
1098
1099 val = ucontrol->value.integer.value[0] ;
1100
1101 if (val) {
1102 // enable spdif output
1103 snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x000);
1104 snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x700);
1105 snd_emu10k1x_gpio_write(emu, 0x1000);
1106 } else {
1107 // disable spdif output
1108 snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x700);
1109 snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x1003F);
1110 snd_emu10k1x_gpio_write(emu, 0x1080);
1111 }
1112 return change;
1113}
1114
e23e7a14 1115static struct snd_kcontrol_new snd_emu10k1x_shared_spdif =
1da177e4
LT		 1116{
1117 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1118 .name = "Analog/Digital Output Jack",
1119 .info = snd_emu10k1x_shared_spdif_info,
1120 .get = snd_emu10k1x_shared_spdif_get,
1121 .put = snd_emu10k1x_shared_spdif_put
1122};
1123
4b32f1aa 1124static int snd_emu10k1x_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1125{
1126 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1127 uinfo->count = 1;
1128 return 0;
1129}
1130
4b32f1aa
TI		 1131static int snd_emu10k1x_spdif_get(struct snd_kcontrol *kcontrol,
1132 struct snd_ctl_elem_value *ucontrol)
1da177e4 1133{
4b32f1aa 1134 struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1135 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1136
1137 ucontrol->value.iec958.status[0] = (emu->spdif_bits[idx] >> 0) & 0xff;
1138 ucontrol->value.iec958.status[1] = (emu->spdif_bits[idx] >> 8) & 0xff;
1139 ucontrol->value.iec958.status[2] = (emu->spdif_bits[idx] >> 16) & 0xff;
1140 ucontrol->value.iec958.status[3] = (emu->spdif_bits[idx] >> 24) & 0xff;
1141 return 0;
1142}
1143
4b32f1aa
TI		 1144static int snd_emu10k1x_spdif_get_mask(struct snd_kcontrol *kcontrol,
1145 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1146{
1147 ucontrol->value.iec958.status[0] = 0xff;
1148 ucontrol->value.iec958.status[1] = 0xff;
1149 ucontrol->value.iec958.status[2] = 0xff;
1150 ucontrol->value.iec958.status[3] = 0xff;
1151 return 0;
1152}
1153
4b32f1aa
TI		 1154static int snd_emu10k1x_spdif_put(struct snd_kcontrol *kcontrol,
1155 struct snd_ctl_elem_value *ucontrol)
1da177e4 1156{
4b32f1aa 1157 struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1158 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1159 int change;
1160 unsigned int val;
1161
1162 val = (ucontrol->value.iec958.status[0] << 0) |
1163 (ucontrol->value.iec958.status[1] << 8) |
1164 (ucontrol->value.iec958.status[2] << 16) |
1165 (ucontrol->value.iec958.status[3] << 24);
1166 change = val != emu->spdif_bits[idx];
1167 if (change) {
1168 snd_emu10k1x_ptr_write(emu, SPCS0 + idx, 0, val);
1169 emu->spdif_bits[idx] = val;
1170 }
1171 return change;
1172}
1173
4b32f1aa 1174static struct snd_kcontrol_new snd_emu10k1x_spdif_mask_control =
1da177e4
LT		 1175{
1176 .access = SNDRV_CTL_ELEM_ACCESS_READ,
5549d549 1177 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT		 1178 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
1179 .count = 3,
1180 .info = snd_emu10k1x_spdif_info,
1181 .get = snd_emu10k1x_spdif_get_mask
1182};
1183
4b32f1aa 1184static struct snd_kcontrol_new snd_emu10k1x_spdif_control =
1da177e4 1185{
5549d549 1186 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT		 1187 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1188 .count = 3,
1189 .info = snd_emu10k1x_spdif_info,
1190 .get = snd_emu10k1x_spdif_get,
1191 .put = snd_emu10k1x_spdif_put
1192};
1193
e23e7a14 1194static int snd_emu10k1x_mixer(struct emu10k1x *emu)
1da177e4
LT		 1195{
1196 int err;
4b32f1aa
TI		 1197 struct snd_kcontrol *kctl;
1198 struct snd_card *card = emu->card;
1da177e4
LT		 1199
1200 if ((kctl = snd_ctl_new1(&snd_emu10k1x_spdif_mask_control, emu)) == NULL)
1201 return -ENOMEM;
1202 if ((err = snd_ctl_add(card, kctl)))
1203 return err;
1204 if ((kctl = snd_ctl_new1(&snd_emu10k1x_shared_spdif, emu)) == NULL)
1205 return -ENOMEM;
1206 if ((err = snd_ctl_add(card, kctl)))
1207 return err;
1208 if ((kctl = snd_ctl_new1(&snd_emu10k1x_spdif_control, emu)) == NULL)
1209 return -ENOMEM;
1210 if ((err = snd_ctl_add(card, kctl)))
1211 return err;
1212
1213 return 0;
1214}
1215
1216#define EMU10K1X_MIDI_MODE_INPUT (1<<0)
1217#define EMU10K1X_MIDI_MODE_OUTPUT (1<<1)
1218
4b32f1aa 1219static inline unsigned char mpu401_read(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int idx)
1da177e4
LT		 1220{
1221 return (unsigned char)snd_emu10k1x_ptr_read(emu, mpu->port + idx, 0);
1222}
1223
4b32f1aa 1224static inline void mpu401_write(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int data, int idx)
1da177e4
LT		 1225{
1226 snd_emu10k1x_ptr_write(emu, mpu->port + idx, 0, data);
1227}
1228
1229#define mpu401_write_data(emu, mpu, data) mpu401_write(emu, mpu, data, 0)
1230#define mpu401_write_cmd(emu, mpu, data) mpu401_write(emu, mpu, data, 1)
1231#define mpu401_read_data(emu, mpu) mpu401_read(emu, mpu, 0)
1232#define mpu401_read_stat(emu, mpu) mpu401_read(emu, mpu, 1)
1233
1234#define mpu401_input_avail(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x80))
1235#define mpu401_output_ready(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x40))
1236
1237#define MPU401_RESET 0xff
1238#define MPU401_ENTER_UART 0x3f
1239#define MPU401_ACK 0xfe
1240
4b32f1aa 1241static void mpu401_clear_rx(struct emu10k1x *emu, struct emu10k1x_midi *mpu)
1da177e4
LT		 1242{
1243 int timeout = 100000;
1244 for (; timeout > 0 && mpu401_input_avail(emu, mpu); timeout--)
1245 mpu401_read_data(emu, mpu);
1246#ifdef CONFIG_SND_DEBUG
1247 if (timeout <= 0)
26bc6964
TI		 1248 dev_err(emu->card->dev,
1249 "cmd: clear rx timeout (status = 0x%x)\n",
1250 mpu401_read_stat(emu, mpu));
1da177e4
LT		 1251#endif
1252}
1253
1254/*
1255
1256 */
1257
4b32f1aa
TI		 1258static void do_emu10k1x_midi_interrupt(struct emu10k1x *emu,
1259 struct emu10k1x_midi *midi, unsigned int status)
1da177e4
LT		 1260{
1261 unsigned char byte;
1262
1263 if (midi->rmidi == NULL) {
1264 snd_emu10k1x_intr_disable(emu, midi->tx_enable | midi->rx_enable);
1265 return;
1266 }
1267
1268 spin_lock(&midi->input_lock);
1269 if ((status & midi->ipr_rx) && mpu401_input_avail(emu, midi)) {
1270 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
1271 mpu401_clear_rx(emu, midi);
1272 } else {
1273 byte = mpu401_read_data(emu, midi);
1274 if (midi->substream_input)
1275 snd_rawmidi_receive(midi->substream_input, &byte, 1);
1276 }
1277 }
1278 spin_unlock(&midi->input_lock);
1279
1280 spin_lock(&midi->output_lock);
1281 if ((status & midi->ipr_tx) && mpu401_output_ready(emu, midi)) {
1282 if (midi->substream_output &&
1283 snd_rawmidi_transmit(midi->substream_output, &byte, 1) == 1) {
1284 mpu401_write_data(emu, midi, byte);
1285 } else {
1286 snd_emu10k1x_intr_disable(emu, midi->tx_enable);
1287 }
1288 }
1289 spin_unlock(&midi->output_lock);
1290}
1291
4b32f1aa 1292static void snd_emu10k1x_midi_interrupt(struct emu10k1x *emu, unsigned int status)
1da177e4
LT		 1293{
1294 do_emu10k1x_midi_interrupt(emu, &emu->midi, status);
1295}
1296
b130807d 1297static int snd_emu10k1x_midi_cmd(struct emu10k1x * emu,
4b32f1aa 1298 struct emu10k1x_midi *midi, unsigned char cmd, int ack)
1da177e4
LT		 1299{
1300 unsigned long flags;
1301 int timeout, ok;
1302
1303 spin_lock_irqsave(&midi->input_lock, flags);
1304 mpu401_write_data(emu, midi, 0x00);
1305 /* mpu401_clear_rx(emu, midi); */
1306
1307 mpu401_write_cmd(emu, midi, cmd);
1308 if (ack) {
1309 ok = 0;
1310 timeout = 10000;
1311 while (!ok && timeout-- > 0) {
1312 if (mpu401_input_avail(emu, midi)) {
1313 if (mpu401_read_data(emu, midi) == MPU401_ACK)
1314 ok = 1;
1315 }
1316 }
1317 if (!ok && mpu401_read_data(emu, midi) == MPU401_ACK)
1318 ok = 1;
1319 } else {
1320 ok = 1;
1321 }
1322 spin_unlock_irqrestore(&midi->input_lock, flags);
b130807d 1323 if (!ok) {
26bc6964
TI		 1324 dev_err(emu->card->dev,
1325 "midi_cmd: 0x%x failed at 0x%lx (status = 0x%x, data = 0x%x)!!!\n",
1da177e4
LT		 1326 cmd, emu->port,
1327 mpu401_read_stat(emu, midi),
1328 mpu401_read_data(emu, midi));
b130807d
RD		 1329 return 1;
1330 }
1331 return 0;
1da177e4
LT		 1332}
1333
4b32f1aa 1334static int snd_emu10k1x_midi_input_open(struct snd_rawmidi_substream *substream)
1da177e4 1335{
4b32f1aa
TI		 1336 struct emu10k1x *emu;
1337 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1da177e4
LT		 1338 unsigned long flags;
1339
1340 emu = midi->emu;
da3cec35
TI		 1341 if (snd_BUG_ON(!emu))
1342 return -ENXIO;
1da177e4
LT		 1343 spin_lock_irqsave(&midi->open_lock, flags);
1344 midi->midi_mode |= EMU10K1X_MIDI_MODE_INPUT;
1345 midi->substream_input = substream;
1346 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
1347 spin_unlock_irqrestore(&midi->open_lock, flags);
b130807d
RD		 1348 if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1))
1349 goto error_out;
1350 if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1))
1351 goto error_out;
1da177e4
LT		 1352 } else {
1353 spin_unlock_irqrestore(&midi->open_lock, flags);
1354 }
1355 return 0;
b130807d
RD		 1356
1357error_out:
1358 return -EIO;
1da177e4
LT		 1359}
1360
4b32f1aa 1361static int snd_emu10k1x_midi_output_open(struct snd_rawmidi_substream *substream)
1da177e4 1362{
4b32f1aa
TI		 1363 struct emu10k1x *emu;
1364 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1da177e4
LT		 1365 unsigned long flags;
1366
1367 emu = midi->emu;
da3cec35
TI		 1368 if (snd_BUG_ON(!emu))
1369 return -ENXIO;
1da177e4
LT		 1370 spin_lock_irqsave(&midi->open_lock, flags);
1371 midi->midi_mode |= EMU10K1X_MIDI_MODE_OUTPUT;
1372 midi->substream_output = substream;
1373 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
1374 spin_unlock_irqrestore(&midi->open_lock, flags);
b130807d
RD		 1375 if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1))
1376 goto error_out;
1377 if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1))
1378 goto error_out;
1da177e4
LT		 1379 } else {
1380 spin_unlock_irqrestore(&midi->open_lock, flags);
1381 }
1382 return 0;
b130807d
RD		 1383
1384error_out:
1385 return -EIO;
1da177e4
LT		 1386}
1387
4b32f1aa 1388static int snd_emu10k1x_midi_input_close(struct snd_rawmidi_substream *substream)
1da177e4 1389{
4b32f1aa
TI		 1390 struct emu10k1x *emu;
1391 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1da177e4 1392 unsigned long flags;
b130807d 1393 int err = 0;
1da177e4
LT		 1394
1395 emu = midi->emu;
da3cec35
TI		 1396 if (snd_BUG_ON(!emu))
1397 return -ENXIO;
1da177e4
LT		 1398 spin_lock_irqsave(&midi->open_lock, flags);
1399 snd_emu10k1x_intr_disable(emu, midi->rx_enable);
1400 midi->midi_mode &= ~EMU10K1X_MIDI_MODE_INPUT;
1401 midi->substream_input = NULL;
1402 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
1403 spin_unlock_irqrestore(&midi->open_lock, flags);
b130807d 1404 err = snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
1da177e4
LT		 1405 } else {
1406 spin_unlock_irqrestore(&midi->open_lock, flags);
1407 }
b130807d 1408 return err;
1da177e4
LT		 1409}
1410
4b32f1aa 1411static int snd_emu10k1x_midi_output_close(struct snd_rawmidi_substream *substream)
1da177e4 1412{
4b32f1aa
TI		 1413 struct emu10k1x *emu;
1414 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1da177e4 1415 unsigned long flags;
b130807d 1416 int err = 0;
1da177e4
LT		 1417
1418 emu = midi->emu;
da3cec35
TI		 1419 if (snd_BUG_ON(!emu))
1420 return -ENXIO;
1da177e4
LT		 1421 spin_lock_irqsave(&midi->open_lock, flags);
1422 snd_emu10k1x_intr_disable(emu, midi->tx_enable);
1423 midi->midi_mode &= ~EMU10K1X_MIDI_MODE_OUTPUT;
1424 midi->substream_output = NULL;
1425 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
1426 spin_unlock_irqrestore(&midi->open_lock, flags);
b130807d 1427 err = snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
1da177e4
LT		 1428 } else {
1429 spin_unlock_irqrestore(&midi->open_lock, flags);
1430 }
b130807d 1431 return err;
1da177e4
LT		 1432}
1433
4b32f1aa 1434static void snd_emu10k1x_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
1da177e4 1435{
4b32f1aa
TI		 1436 struct emu10k1x *emu;
1437 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1da177e4 1438 emu = midi->emu;
da3cec35
TI		 1439 if (snd_BUG_ON(!emu))
1440 return;
1da177e4
LT		 1441
1442 if (up)
1443 snd_emu10k1x_intr_enable(emu, midi->rx_enable);
1444 else
1445 snd_emu10k1x_intr_disable(emu, midi->rx_enable);
1446}
1447
4b32f1aa 1448static void snd_emu10k1x_midi_output_trigger(struct snd_rawmidi_substream *substream, int up)
1da177e4 1449{
4b32f1aa
TI		 1450 struct emu10k1x *emu;
1451 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1da177e4
LT		 1452 unsigned long flags;
1453
1454 emu = midi->emu;
da3cec35
TI		 1455 if (snd_BUG_ON(!emu))
1456 return;
1da177e4
LT		 1457
1458 if (up) {
1459 int max = 4;
1460 unsigned char byte;
1461
1462 /* try to send some amount of bytes here before interrupts */
1463 spin_lock_irqsave(&midi->output_lock, flags);
1464 while (max > 0) {
1465 if (mpu401_output_ready(emu, midi)) {
1466 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT) ||
1467 snd_rawmidi_transmit(substream, &byte, 1) != 1) {
1468 /* no more data */
1469 spin_unlock_irqrestore(&midi->output_lock, flags);
1470 return;
1471 }
1472 mpu401_write_data(emu, midi, byte);
1473 max--;
1474 } else {
1475 break;
1476 }
1477 }
1478 spin_unlock_irqrestore(&midi->output_lock, flags);
1479 snd_emu10k1x_intr_enable(emu, midi->tx_enable);
1480 } else {
1481 snd_emu10k1x_intr_disable(emu, midi->tx_enable);
1482 }
1483}
1484
1485/*
1486
1487 */
1488
4b32f1aa 1489static struct snd_rawmidi_ops snd_emu10k1x_midi_output =
1da177e4
LT		 1490{
1491 .open = snd_emu10k1x_midi_output_open,
1492 .close = snd_emu10k1x_midi_output_close,
1493 .trigger = snd_emu10k1x_midi_output_trigger,
1494};
1495
4b32f1aa 1496static struct snd_rawmidi_ops snd_emu10k1x_midi_input =
1da177e4
LT		 1497{
1498 .open = snd_emu10k1x_midi_input_open,
1499 .close = snd_emu10k1x_midi_input_close,
1500 .trigger = snd_emu10k1x_midi_input_trigger,
1501};
1502
4b32f1aa 1503static void snd_emu10k1x_midi_free(struct snd_rawmidi *rmidi)
1da177e4 1504{
4b32f1aa 1505 struct emu10k1x_midi *midi = rmidi->private_data;
1da177e4
LT		 1506 midi->interrupt = NULL;
1507 midi->rmidi = NULL;
1508}
1509
e23e7a14
BP		 1510static int emu10k1x_midi_init(struct emu10k1x *emu,
1511 struct emu10k1x_midi *midi, int device,
1512 char *name)
1da177e4 1513{
4b32f1aa 1514 struct snd_rawmidi *rmidi;
1da177e4
LT		 1515 int err;
1516
1517 if ((err = snd_rawmidi_new(emu->card, name, device, 1, 1, &rmidi)) < 0)
1518 return err;
1519 midi->emu = emu;
1520 spin_lock_init(&midi->open_lock);
1521 spin_lock_init(&midi->input_lock);
1522 spin_lock_init(&midi->output_lock);
1523 strcpy(rmidi->name, name);
1524 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_emu10k1x_midi_output);
1525 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_emu10k1x_midi_input);
1526 rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
1527 SNDRV_RAWMIDI_INFO_INPUT |
1528 SNDRV_RAWMIDI_INFO_DUPLEX;
1529 rmidi->private_data = midi;
1530 rmidi->private_free = snd_emu10k1x_midi_free;
1531 midi->rmidi = rmidi;
1532 return 0;
1533}
1534
e23e7a14 1535static int snd_emu10k1x_midi(struct emu10k1x *emu)
1da177e4 1536{
4b32f1aa 1537 struct emu10k1x_midi *midi = &emu->midi;
1da177e4
LT		 1538 int err;
1539
1540 if ((err = emu10k1x_midi_init(emu, midi, 0, "EMU10K1X MPU-401 (UART)")) < 0)
1541 return err;
1542
1543 midi->tx_enable = INTE_MIDITXENABLE;
1544 midi->rx_enable = INTE_MIDIRXENABLE;
1545 midi->port = MUDATA;
1546 midi->ipr_tx = IPR_MIDITRANSBUFEMPTY;
1547 midi->ipr_rx = IPR_MIDIRECVBUFEMPTY;
1548 midi->interrupt = snd_emu10k1x_midi_interrupt;
1549 return 0;
1550}
1551
e23e7a14
BP		 1552static int snd_emu10k1x_probe(struct pci_dev *pci,
1553 const struct pci_device_id *pci_id)
1da177e4
LT		 1554{
1555 static int dev;
4b32f1aa
TI		 1556 struct snd_card *card;
1557 struct emu10k1x *chip;
1da177e4
LT		 1558 int err;
1559
1560 if (dev >= SNDRV_CARDS)
1561 return -ENODEV;
1562 if (!enable[dev]) {
1563 dev++;
1564 return -ENOENT;
1565 }
1566
60c5772b
TI		 1567 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1568 0, &card);
e58de7ba
TI		 1569 if (err < 0)
1570 return err;
1da177e4
LT		 1571
1572 if ((err = snd_emu10k1x_create(card, pci, &chip)) < 0) {
1573 snd_card_free(card);
1574 return err;
1575 }
1576
bb814c39 1577 if ((err = snd_emu10k1x_pcm(chip, 0)) < 0) {
1da177e4
LT		 1578 snd_card_free(card);
1579 return err;
1580 }
bb814c39 1581 if ((err = snd_emu10k1x_pcm(chip, 1)) < 0) {
1da177e4
LT		 1582 snd_card_free(card);
1583 return err;
1584 }
bb814c39 1585 if ((err = snd_emu10k1x_pcm(chip, 2)) < 0) {
1da177e4
LT		 1586 snd_card_free(card);
1587 return err;
1588 }
1589
1590 if ((err = snd_emu10k1x_ac97(chip)) < 0) {
1591 snd_card_free(card);
1592 return err;
1593 }
1594
1595 if ((err = snd_emu10k1x_mixer(chip)) < 0) {
1596 snd_card_free(card);
1597 return err;
1598 }
1599
1600 if ((err = snd_emu10k1x_midi(chip)) < 0) {
1601 snd_card_free(card);
1602 return err;
1603 }
1604
1605 snd_emu10k1x_proc_init(chip);
1606
1607 strcpy(card->driver, "EMU10K1X");
1608 strcpy(card->shortname, "Dell Sound Blaster Live!");
1609 sprintf(card->longname, "%s at 0x%lx irq %i",
1610 card->shortname, chip->port, chip->irq);
1611
1612 if ((err = snd_card_register(card)) < 0) {
1613 snd_card_free(card);
1614 return err;
1615 }
1616
1617 pci_set_drvdata(pci, card);
1618 dev++;
1619 return 0;
1620}
1621
e23e7a14 1622static void snd_emu10k1x_remove(struct pci_dev *pci)
1da177e4
LT		 1623{
1624 snd_card_free(pci_get_drvdata(pci));
1da177e4
LT		 1625}
1626
1627// PCI IDs
9baa3c34 1628static const struct pci_device_id snd_emu10k1x_ids[] = {
0d7392e5 1629 { PCI_VDEVICE(CREATIVE, 0x0006), 0 }, /* Dell OEM version (EMU10K1) */
1da177e4
LT		 1630 { 0, }
1631};
1632MODULE_DEVICE_TABLE(pci, snd_emu10k1x_ids);
1633
1634// pci_driver definition
e9f66d9b 1635static struct pci_driver emu10k1x_driver = {
3733e424 1636 .name = KBUILD_MODNAME,
1da177e4
LT		 1637 .id_table = snd_emu10k1x_ids,
1638 .probe = snd_emu10k1x_probe,
e23e7a14 1639 .remove = snd_emu10k1x_remove,
1da177e4
LT		 1640};
1641
e9f66d9b 1642module_pci_driver(emu10k1x_driver);
Linux kernel - Deliverables
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