Merge branches 'acpica-fixes' and 'device-properties-fixes'
[deliverable/linux.git] / sound / pci / es1938.c
CommitLineData
1da177e4
LT
1/*
2 * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
3 * Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
c1017a4c 4 * Jaroslav Kysela <perex@perex.cz>,
1da177e4
LT
5 * Thomas Sailer <sailer@ife.ee.ethz.ch>,
6 * Abramo Bagnara <abramo@alsa-project.org>,
7 * Markus Gruber <gruber@eikon.tum.de>
8 *
9 * Rewritten from sonicvibes.c source.
10 *
11 * TODO:
12 * Rewrite better spinlocks
13 *
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 *
29 */
30
31/*
32 NOTES:
33 - Capture data is written unaligned starting from dma_base + 1 so I need to
34 disable mmap and to add a copy callback.
35 - After several cycle of the following:
36 while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
37 a "playback write error (DMA or IRQ trouble?)" may happen.
38 This is due to playback interrupts not generated.
39 I suspect a timing issue.
40 - Sometimes the interrupt handler is invoked wrongly during playback.
41 This generates some harmless "Unexpected hw_pointer: wrong interrupt
42 acknowledge".
43 I've seen that using small period sizes.
44 Reproducible with:
45 mpg123 test.mp3 &
46 hdparm -t -T /dev/hda
47*/
48
49
1da177e4
LT
50#include <linux/init.h>
51#include <linux/interrupt.h>
52#include <linux/pci.h>
53#include <linux/slab.h>
54#include <linux/gameport.h>
65a77217 55#include <linux/module.h>
1da177e4 56#include <linux/delay.h>
910638ae 57#include <linux/dma-mapping.h>
6cbbfe1c 58#include <linux/io.h>
1da177e4
LT
59#include <sound/core.h>
60#include <sound/control.h>
61#include <sound/pcm.h>
62#include <sound/opl3.h>
63#include <sound/mpu401.h>
64#include <sound/initval.h>
0b593972 65#include <sound/tlv.h>
1da177e4 66
1da177e4
LT
67MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
68MODULE_DESCRIPTION("ESS Solo-1");
69MODULE_LICENSE("GPL");
70MODULE_SUPPORTED_DEVICE("{{ESS,ES1938},"
71 "{ESS,ES1946},"
72 "{ESS,ES1969},"
73 "{TerraTec,128i PCI}}");
74
75#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
76#define SUPPORT_JOYSTICK 1
77#endif
78
1da177e4
LT
79static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
80static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
a67ff6a5 81static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
1da177e4
LT
82
83module_param_array(index, int, NULL, 0444);
84MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
85module_param_array(id, charp, NULL, 0444);
86MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
87module_param_array(enable, bool, NULL, 0444);
88MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
89
90#define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
91
92#define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
93
94#define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
95
96#define SL_PCI_LEGACYCONTROL 0x40
97#define SL_PCI_CONFIG 0x50
98#define SL_PCI_DDMACONTROL 0x60
99
100#define ESSIO_REG_AUDIO2DMAADDR 0
101#define ESSIO_REG_AUDIO2DMACOUNT 4
102#define ESSIO_REG_AUDIO2MODE 6
103#define ESSIO_REG_IRQCONTROL 7
104
105#define ESSDM_REG_DMAADDR 0x00
106#define ESSDM_REG_DMACOUNT 0x04
107#define ESSDM_REG_DMACOMMAND 0x08
108#define ESSDM_REG_DMASTATUS 0x08
109#define ESSDM_REG_DMAMODE 0x0b
110#define ESSDM_REG_DMACLEAR 0x0d
111#define ESSDM_REG_DMAMASK 0x0f
112
113#define ESSSB_REG_FMLOWADDR 0x00
114#define ESSSB_REG_FMHIGHADDR 0x02
115#define ESSSB_REG_MIXERADDR 0x04
116#define ESSSB_REG_MIXERDATA 0x05
117
118#define ESSSB_IREG_AUDIO1 0x14
119#define ESSSB_IREG_MICMIX 0x1a
120#define ESSSB_IREG_RECSRC 0x1c
121#define ESSSB_IREG_MASTER 0x32
122#define ESSSB_IREG_FM 0x36
123#define ESSSB_IREG_AUXACD 0x38
124#define ESSSB_IREG_AUXB 0x3a
125#define ESSSB_IREG_PCSPEAKER 0x3c
126#define ESSSB_IREG_LINE 0x3e
127#define ESSSB_IREG_SPATCONTROL 0x50
128#define ESSSB_IREG_SPATLEVEL 0x52
129#define ESSSB_IREG_MASTER_LEFT 0x60
130#define ESSSB_IREG_MASTER_RIGHT 0x62
131#define ESSSB_IREG_MPU401CONTROL 0x64
132#define ESSSB_IREG_MICMIXRECORD 0x68
133#define ESSSB_IREG_AUDIO2RECORD 0x69
134#define ESSSB_IREG_AUXACDRECORD 0x6a
135#define ESSSB_IREG_FMRECORD 0x6b
136#define ESSSB_IREG_AUXBRECORD 0x6c
137#define ESSSB_IREG_MONO 0x6d
138#define ESSSB_IREG_LINERECORD 0x6e
139#define ESSSB_IREG_MONORECORD 0x6f
140#define ESSSB_IREG_AUDIO2SAMPLE 0x70
141#define ESSSB_IREG_AUDIO2MODE 0x71
142#define ESSSB_IREG_AUDIO2FILTER 0x72
143#define ESSSB_IREG_AUDIO2TCOUNTL 0x74
144#define ESSSB_IREG_AUDIO2TCOUNTH 0x76
145#define ESSSB_IREG_AUDIO2CONTROL1 0x78
146#define ESSSB_IREG_AUDIO2CONTROL2 0x7a
147#define ESSSB_IREG_AUDIO2 0x7c
148
149#define ESSSB_REG_RESET 0x06
150
151#define ESSSB_REG_READDATA 0x0a
152#define ESSSB_REG_WRITEDATA 0x0c
153#define ESSSB_REG_READSTATUS 0x0c
154
155#define ESSSB_REG_STATUS 0x0e
156
157#define ESS_CMD_EXTSAMPLERATE 0xa1
158#define ESS_CMD_FILTERDIV 0xa2
159#define ESS_CMD_DMACNTRELOADL 0xa4
160#define ESS_CMD_DMACNTRELOADH 0xa5
161#define ESS_CMD_ANALOGCONTROL 0xa8
162#define ESS_CMD_IRQCONTROL 0xb1
163#define ESS_CMD_DRQCONTROL 0xb2
164#define ESS_CMD_RECLEVEL 0xb4
165#define ESS_CMD_SETFORMAT 0xb6
166#define ESS_CMD_SETFORMAT2 0xb7
167#define ESS_CMD_DMACONTROL 0xb8
168#define ESS_CMD_DMATYPE 0xb9
169#define ESS_CMD_OFFSETLEFT 0xba
170#define ESS_CMD_OFFSETRIGHT 0xbb
171#define ESS_CMD_READREG 0xc0
172#define ESS_CMD_ENABLEEXT 0xc6
173#define ESS_CMD_PAUSEDMA 0xd0
174#define ESS_CMD_ENABLEAUDIO1 0xd1
175#define ESS_CMD_STOPAUDIO1 0xd3
176#define ESS_CMD_AUDIO1STATUS 0xd8
177#define ESS_CMD_CONTDMA 0xd4
178#define ESS_CMD_TESTIRQ 0xf2
179
180#define ESS_RECSRC_MIC 0
181#define ESS_RECSRC_AUXACD 2
182#define ESS_RECSRC_AUXB 5
183#define ESS_RECSRC_LINE 6
184#define ESS_RECSRC_NONE 7
185
186#define DAC1 0x01
187#define ADC1 0x02
188#define DAC2 0x04
189
190/*
191
192 */
193
1da177e4
LT
194#define SAVED_REG_SIZE 32 /* max. number of registers to save */
195
e571f594 196struct es1938 {
1da177e4
LT
197 int irq;
198
199 unsigned long io_port;
200 unsigned long sb_port;
201 unsigned long vc_port;
202 unsigned long mpu_port;
203 unsigned long game_port;
204 unsigned long ddma_port;
205
206 unsigned char irqmask;
207 unsigned char revision;
208
e571f594
TI
209 struct snd_kcontrol *hw_volume;
210 struct snd_kcontrol *hw_switch;
211 struct snd_kcontrol *master_volume;
212 struct snd_kcontrol *master_switch;
1da177e4
LT
213
214 struct pci_dev *pci;
e571f594
TI
215 struct snd_card *card;
216 struct snd_pcm *pcm;
217 struct snd_pcm_substream *capture_substream;
218 struct snd_pcm_substream *playback1_substream;
219 struct snd_pcm_substream *playback2_substream;
220 struct snd_rawmidi *rmidi;
1da177e4
LT
221
222 unsigned int dma1_size;
223 unsigned int dma2_size;
224 unsigned int dma1_start;
225 unsigned int dma2_start;
226 unsigned int dma1_shift;
227 unsigned int dma2_shift;
19e2e3c3 228 unsigned int last_capture_dmaaddr;
1da177e4
LT
229 unsigned int active;
230
231 spinlock_t reg_lock;
232 spinlock_t mixer_lock;
e571f594 233 struct snd_info_entry *proc_entry;
1da177e4
LT
234
235#ifdef SUPPORT_JOYSTICK
236 struct gameport *gameport;
237#endif
c7561cd8 238#ifdef CONFIG_PM_SLEEP
1da177e4
LT
239 unsigned char saved_regs[SAVED_REG_SIZE];
240#endif
241};
242
7d12e780 243static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
1da177e4 244
9baa3c34 245static const struct pci_device_id snd_es1938_ids[] = {
28d27aae 246 { PCI_VDEVICE(ESS, 0x1969), 0, }, /* Solo-1 */
1da177e4
LT
247 { 0, }
248};
249
250MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
251
252#define RESET_LOOP_TIMEOUT 0x10000
253#define WRITE_LOOP_TIMEOUT 0x10000
254#define GET_LOOP_TIMEOUT 0x01000
255
1da177e4
LT
256/* -----------------------------------------------------------------
257 * Write to a mixer register
258 * -----------------------------------------------------------------*/
e571f594 259static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
1da177e4
LT
260{
261 unsigned long flags;
262 spin_lock_irqsave(&chip->mixer_lock, flags);
263 outb(reg, SLSB_REG(chip, MIXERADDR));
264 outb(val, SLSB_REG(chip, MIXERDATA));
265 spin_unlock_irqrestore(&chip->mixer_lock, flags);
ebebecaa 266 dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val);
1da177e4
LT
267}
268
269/* -----------------------------------------------------------------
270 * Read from a mixer register
271 * -----------------------------------------------------------------*/
e571f594 272static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT
273{
274 int data;
275 unsigned long flags;
276 spin_lock_irqsave(&chip->mixer_lock, flags);
277 outb(reg, SLSB_REG(chip, MIXERADDR));
278 data = inb(SLSB_REG(chip, MIXERDATA));
279 spin_unlock_irqrestore(&chip->mixer_lock, flags);
ebebecaa 280 dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data);
1da177e4
LT
281 return data;
282}
283
284/* -----------------------------------------------------------------
285 * Write to some bits of a mixer register (return old value)
286 * -----------------------------------------------------------------*/
e571f594
TI
287static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
288 unsigned char mask, unsigned char val)
1da177e4
LT
289{
290 unsigned long flags;
291 unsigned char old, new, oval;
292 spin_lock_irqsave(&chip->mixer_lock, flags);
293 outb(reg, SLSB_REG(chip, MIXERADDR));
294 old = inb(SLSB_REG(chip, MIXERDATA));
295 oval = old & mask;
296 if (val != oval) {
297 new = (old & ~mask) | (val & mask);
298 outb(new, SLSB_REG(chip, MIXERDATA));
ebebecaa
TI
299 dev_dbg(chip->card->dev,
300 "Mixer reg %02x was %02x, set to %02x\n",
99b359ba 301 reg, old, new);
1da177e4
LT
302 }
303 spin_unlock_irqrestore(&chip->mixer_lock, flags);
304 return oval;
305}
306
307/* -----------------------------------------------------------------
308 * Write command to Controller Registers
309 * -----------------------------------------------------------------*/
e571f594 310static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
1da177e4
LT
311{
312 int i;
313 unsigned char v;
314 for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
315 if (!(v = inb(SLSB_REG(chip, READSTATUS)) & 0x80)) {
316 outb(cmd, SLSB_REG(chip, WRITEDATA));
317 return;
318 }
319 }
ebebecaa
TI
320 dev_err(chip->card->dev,
321 "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
1da177e4
LT
322}
323
324/* -----------------------------------------------------------------
325 * Read the Read Data Buffer
326 * -----------------------------------------------------------------*/
e571f594 327static int snd_es1938_get_byte(struct es1938 *chip)
1da177e4
LT
328{
329 int i;
330 unsigned char v;
331 for (i = GET_LOOP_TIMEOUT; i; i--)
332 if ((v = inb(SLSB_REG(chip, STATUS))) & 0x80)
333 return inb(SLSB_REG(chip, READDATA));
ebebecaa 334 dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v);
1da177e4
LT
335 return -ENODEV;
336}
337
338/* -----------------------------------------------------------------
339 * Write value cmd register
340 * -----------------------------------------------------------------*/
e571f594 341static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
1da177e4
LT
342{
343 unsigned long flags;
344 spin_lock_irqsave(&chip->reg_lock, flags);
345 snd_es1938_write_cmd(chip, reg);
346 snd_es1938_write_cmd(chip, val);
347 spin_unlock_irqrestore(&chip->reg_lock, flags);
ebebecaa 348 dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val);
1da177e4
LT
349}
350
351/* -----------------------------------------------------------------
352 * Read data from cmd register and return it
353 * -----------------------------------------------------------------*/
e571f594 354static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT
355{
356 unsigned char val;
357 unsigned long flags;
358 spin_lock_irqsave(&chip->reg_lock, flags);
359 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
360 snd_es1938_write_cmd(chip, reg);
361 val = snd_es1938_get_byte(chip);
362 spin_unlock_irqrestore(&chip->reg_lock, flags);
ebebecaa 363 dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val);
1da177e4
LT
364 return val;
365}
366
367/* -----------------------------------------------------------------
368 * Write data to cmd register and return old value
369 * -----------------------------------------------------------------*/
e571f594
TI
370static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
371 unsigned char val)
1da177e4
LT
372{
373 unsigned long flags;
374 unsigned char old, new, oval;
375 spin_lock_irqsave(&chip->reg_lock, flags);
376 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
377 snd_es1938_write_cmd(chip, reg);
378 old = snd_es1938_get_byte(chip);
379 oval = old & mask;
380 if (val != oval) {
381 snd_es1938_write_cmd(chip, reg);
382 new = (old & ~mask) | (val & mask);
383 snd_es1938_write_cmd(chip, new);
ebebecaa 384 dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n",
99b359ba 385 reg, old, new);
1da177e4
LT
386 }
387 spin_unlock_irqrestore(&chip->reg_lock, flags);
388 return oval;
389}
390
391/* --------------------------------------------------------------------
392 * Reset the chip
393 * --------------------------------------------------------------------*/
e571f594 394static void snd_es1938_reset(struct es1938 *chip)
1da177e4
LT
395{
396 int i;
397
398 outb(3, SLSB_REG(chip, RESET));
399 inb(SLSB_REG(chip, RESET));
400 outb(0, SLSB_REG(chip, RESET));
401 for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
402 if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
403 if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
404 goto __next;
405 }
406 }
ebebecaa 407 dev_err(chip->card->dev, "ESS Solo-1 reset failed\n");
1da177e4
LT
408
409 __next:
410 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
411
412 /* Demand transfer DMA: 4 bytes per DMA request */
413 snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
414
415 /* Change behaviour of register A1
416 4x oversampling
417 2nd channel DAC asynchronous */
418 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
419 /* enable/select DMA channel and IRQ channel */
420 snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
421 snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
422 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
423 /* Set spatializer parameters to recommended values */
424 snd_es1938_mixer_write(chip, 0x54, 0x8f);
425 snd_es1938_mixer_write(chip, 0x56, 0x95);
426 snd_es1938_mixer_write(chip, 0x58, 0x94);
427 snd_es1938_mixer_write(chip, 0x5a, 0x80);
428}
429
430/* --------------------------------------------------------------------
431 * Reset the FIFOs
432 * --------------------------------------------------------------------*/
e571f594 433static void snd_es1938_reset_fifo(struct es1938 *chip)
1da177e4
LT
434{
435 outb(2, SLSB_REG(chip, RESET));
436 outb(0, SLSB_REG(chip, RESET));
437}
438
e571f594 439static struct snd_ratnum clocks[2] = {
1da177e4
LT
440 {
441 .num = 793800,
442 .den_min = 1,
443 .den_max = 128,
444 .den_step = 1,
445 },
446 {
447 .num = 768000,
448 .den_min = 1,
449 .den_max = 128,
450 .den_step = 1,
451 }
452};
453
e571f594 454static struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
1da177e4
LT
455 .nrats = 2,
456 .rats = clocks,
457};
458
459
e571f594
TI
460static void snd_es1938_rate_set(struct es1938 *chip,
461 struct snd_pcm_substream *substream,
1da177e4
LT
462 int mode)
463{
464 unsigned int bits, div0;
e571f594 465 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
466 if (runtime->rate_num == clocks[0].num)
467 bits = 128 - runtime->rate_den;
468 else
469 bits = 256 - runtime->rate_den;
470
471 /* set filter register */
472 div0 = 256 - 7160000*20/(8*82*runtime->rate);
473
474 if (mode == DAC2) {
475 snd_es1938_mixer_write(chip, 0x70, bits);
476 snd_es1938_mixer_write(chip, 0x72, div0);
477 } else {
478 snd_es1938_write(chip, 0xA1, bits);
479 snd_es1938_write(chip, 0xA2, div0);
480 }
481}
482
483/* --------------------------------------------------------------------
484 * Configure Solo1 builtin DMA Controller
485 * --------------------------------------------------------------------*/
486
e571f594 487static void snd_es1938_playback1_setdma(struct es1938 *chip)
1da177e4
LT
488{
489 outb(0x00, SLIO_REG(chip, AUDIO2MODE));
490 outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
491 outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
492 outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
493}
494
e571f594 495static void snd_es1938_playback2_setdma(struct es1938 *chip)
1da177e4
LT
496{
497 /* Enable DMA controller */
498 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
499 /* 1. Master reset */
500 outb(0, SLDM_REG(chip, DMACLEAR));
501 /* 2. Mask DMA */
502 outb(1, SLDM_REG(chip, DMAMASK));
503 outb(0x18, SLDM_REG(chip, DMAMODE));
504 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
505 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
506 /* 3. Unmask DMA */
507 outb(0, SLDM_REG(chip, DMAMASK));
508}
509
e571f594 510static void snd_es1938_capture_setdma(struct es1938 *chip)
1da177e4
LT
511{
512 /* Enable DMA controller */
513 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
514 /* 1. Master reset */
515 outb(0, SLDM_REG(chip, DMACLEAR));
516 /* 2. Mask DMA */
517 outb(1, SLDM_REG(chip, DMAMASK));
518 outb(0x14, SLDM_REG(chip, DMAMODE));
519 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
19e2e3c3 520 chip->last_capture_dmaaddr = chip->dma1_start;
1da177e4
LT
521 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
522 /* 3. Unmask DMA */
523 outb(0, SLDM_REG(chip, DMAMASK));
524}
525
526/* ----------------------------------------------------------------------
527 *
528 * *** PCM part ***
529 */
530
e571f594 531static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT
532 int cmd)
533{
e571f594 534 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
535 int val;
536 switch (cmd) {
537 case SNDRV_PCM_TRIGGER_START:
93b9f426 538 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT
539 val = 0x0f;
540 chip->active |= ADC1;
541 break;
542 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 543 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT
544 val = 0x00;
545 chip->active &= ~ADC1;
546 break;
547 default:
548 return -EINVAL;
549 }
550 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
551 return 0;
552}
553
e571f594 554static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
1da177e4
LT
555 int cmd)
556{
e571f594 557 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
558 switch (cmd) {
559 case SNDRV_PCM_TRIGGER_START:
93b9f426 560 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT
561 /* According to the documentation this should be:
562 0x13 but that value may randomly swap stereo channels */
563 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
564 udelay(10);
565 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
566 /* This two stage init gives the FIFO -> DAC connection time to
567 * settle before first data from DMA flows in. This should ensure
568 * no swapping of stereo channels. Report a bug if otherwise :-) */
569 outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
570 chip->active |= DAC2;
571 break;
572 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 573 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT
574 outb(0, SLIO_REG(chip, AUDIO2MODE));
575 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
576 chip->active &= ~DAC2;
577 break;
578 default:
579 return -EINVAL;
580 }
581 return 0;
582}
583
e571f594 584static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
1da177e4
LT
585 int cmd)
586{
e571f594 587 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
588 int val;
589 switch (cmd) {
590 case SNDRV_PCM_TRIGGER_START:
93b9f426 591 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT
592 val = 5;
593 chip->active |= DAC1;
594 break;
595 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 596 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT
597 val = 0;
598 chip->active &= ~DAC1;
599 break;
600 default:
601 return -EINVAL;
602 }
603 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
604 return 0;
605}
606
e571f594 607static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT
608 int cmd)
609{
610 switch (substream->number) {
611 case 0:
612 return snd_es1938_playback1_trigger(substream, cmd);
613 case 1:
614 return snd_es1938_playback2_trigger(substream, cmd);
615 }
616 snd_BUG();
617 return -EINVAL;
618}
619
620/* --------------------------------------------------------------------
621 * First channel for Extended Mode Audio 1 ADC Operation
622 * --------------------------------------------------------------------*/
e571f594 623static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 624{
e571f594
TI
625 struct es1938 *chip = snd_pcm_substream_chip(substream);
626 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
627 int u, is8, mono;
628 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
629 unsigned int count = snd_pcm_lib_period_bytes(substream);
630
631 chip->dma1_size = size;
632 chip->dma1_start = runtime->dma_addr;
633
634 mono = (runtime->channels > 1) ? 0 : 1;
635 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
636 u = snd_pcm_format_unsigned(runtime->format);
637
638 chip->dma1_shift = 2 - mono - is8;
639
640 snd_es1938_reset_fifo(chip);
641
642 /* program type */
643 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
644
645 /* set clock and counters */
646 snd_es1938_rate_set(chip, substream, ADC1);
647
648 count = 0x10000 - count;
649 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
650 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
651
652 /* initialize and configure ADC */
653 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
654 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
655 (u ? 0x00 : 0x20) |
656 (is8 ? 0x00 : 0x04) |
657 (mono ? 0x40 : 0x08));
658
659 // snd_es1938_reset_fifo(chip);
660
661 /* 11. configure system interrupt controller and DMA controller */
662 snd_es1938_capture_setdma(chip);
663
664 return 0;
665}
666
667
668/* ------------------------------------------------------------------------------
669 * Second Audio channel DAC Operation
670 * ------------------------------------------------------------------------------*/
e571f594 671static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
1da177e4 672{
e571f594
TI
673 struct es1938 *chip = snd_pcm_substream_chip(substream);
674 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
675 int u, is8, mono;
676 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
677 unsigned int count = snd_pcm_lib_period_bytes(substream);
678
679 chip->dma2_size = size;
680 chip->dma2_start = runtime->dma_addr;
681
682 mono = (runtime->channels > 1) ? 0 : 1;
683 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
684 u = snd_pcm_format_unsigned(runtime->format);
685
686 chip->dma2_shift = 2 - mono - is8;
687
688 snd_es1938_reset_fifo(chip);
689
690 /* set clock and counters */
691 snd_es1938_rate_set(chip, substream, DAC2);
692
693 count >>= 1;
694 count = 0x10000 - count;
695 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
696 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
697
698 /* initialize and configure Audio 2 DAC */
e571f594
TI
699 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
700 (mono ? 0 : 2) | (is8 ? 0 : 1));
1da177e4
LT
701
702 /* program DMA */
703 snd_es1938_playback1_setdma(chip);
704
705 return 0;
706}
707
e571f594 708static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
1da177e4 709{
e571f594
TI
710 struct es1938 *chip = snd_pcm_substream_chip(substream);
711 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
712 int u, is8, mono;
713 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
714 unsigned int count = snd_pcm_lib_period_bytes(substream);
715
716 chip->dma1_size = size;
717 chip->dma1_start = runtime->dma_addr;
718
719 mono = (runtime->channels > 1) ? 0 : 1;
720 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
721 u = snd_pcm_format_unsigned(runtime->format);
722
723 chip->dma1_shift = 2 - mono - is8;
724
725 count = 0x10000 - count;
726
727 /* reset */
728 snd_es1938_reset_fifo(chip);
729
730 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
731
732 /* set clock and counters */
733 snd_es1938_rate_set(chip, substream, DAC1);
734 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
735 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
736
737 /* initialized and configure DAC */
738 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
739 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
740 snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
741 0x90 | (mono ? 0x40 : 0x08) |
742 (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
743
744 /* program DMA */
745 snd_es1938_playback2_setdma(chip);
746
747 return 0;
748}
749
e571f594 750static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
1da177e4
LT
751{
752 switch (substream->number) {
753 case 0:
754 return snd_es1938_playback1_prepare(substream);
755 case 1:
756 return snd_es1938_playback2_prepare(substream);
757 }
758 snd_BUG();
759 return -EINVAL;
760}
761
19e2e3c3
HL
762/* during the incrementing of dma counters the DMA register reads sometimes
763 returns garbage. To ensure a valid hw pointer, the following checks which
764 should be very unlikely to fail are used:
765 - is the current DMA address in the valid DMA range ?
766 - is the sum of DMA address and DMA counter pointing to the last DMA byte ?
767 One can argue this could differ by one byte depending on which register is
768 updated first, so the implementation below allows for that.
769*/
e571f594 770static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 771{
e571f594 772 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4 773 size_t ptr;
19e2e3c3 774#if 0
1da177e4 775 size_t old, new;
1da177e4
LT
776 /* This stuff is *needed*, don't ask why - AB */
777 old = inw(SLDM_REG(chip, DMACOUNT));
778 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
779 old = new;
780 ptr = chip->dma1_size - 1 - new;
781#else
19e2e3c3
HL
782 size_t count;
783 unsigned int diff;
784
785 ptr = inl(SLDM_REG(chip, DMAADDR));
786 count = inw(SLDM_REG(chip, DMACOUNT));
787 diff = chip->dma1_start + chip->dma1_size - ptr - count;
788
789 if (diff > 3 || ptr < chip->dma1_start
790 || ptr >= chip->dma1_start+chip->dma1_size)
791 ptr = chip->last_capture_dmaaddr; /* bad, use last saved */
792 else
793 chip->last_capture_dmaaddr = ptr; /* good, remember it */
794
795 ptr -= chip->dma1_start;
1da177e4
LT
796#endif
797 return ptr >> chip->dma1_shift;
798}
799
e571f594 800static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
1da177e4 801{
e571f594 802 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
803 size_t ptr;
804#if 1
805 ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
806#else
807 ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
808#endif
809 return ptr >> chip->dma2_shift;
810}
811
e571f594 812static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
1da177e4 813{
e571f594 814 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
815 size_t ptr;
816 size_t old, new;
817#if 1
818 /* This stuff is *needed*, don't ask why - AB */
819 old = inw(SLDM_REG(chip, DMACOUNT));
820 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
821 old = new;
822 ptr = chip->dma1_size - 1 - new;
823#else
824 ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
825#endif
826 return ptr >> chip->dma1_shift;
827}
828
e571f594 829static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
1da177e4
LT
830{
831 switch (substream->number) {
832 case 0:
833 return snd_es1938_playback1_pointer(substream);
834 case 1:
835 return snd_es1938_playback2_pointer(substream);
836 }
837 snd_BUG();
838 return -EINVAL;
839}
840
e571f594 841static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
1da177e4
LT
842 int channel,
843 snd_pcm_uframes_t pos,
844 void __user *dst,
845 snd_pcm_uframes_t count)
846{
e571f594
TI
847 struct snd_pcm_runtime *runtime = substream->runtime;
848 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
849 pos <<= chip->dma1_shift;
850 count <<= chip->dma1_shift;
da3cec35
TI
851 if (snd_BUG_ON(pos + count > chip->dma1_size))
852 return -EINVAL;
1da177e4
LT
853 if (pos + count < chip->dma1_size) {
854 if (copy_to_user(dst, runtime->dma_area + pos + 1, count))
855 return -EFAULT;
856 } else {
857 if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1))
858 return -EFAULT;
859 if (put_user(runtime->dma_area[0], ((unsigned char __user *)dst) + count - 1))
860 return -EFAULT;
861 }
862 return 0;
863}
864
865/*
866 * buffer management
867 */
e571f594
TI
868static int snd_es1938_pcm_hw_params(struct snd_pcm_substream *substream,
869 struct snd_pcm_hw_params *hw_params)
1da177e4
LT
870
871{
872 int err;
873
874 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
875 return err;
876 return 0;
877}
878
e571f594 879static int snd_es1938_pcm_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT
880{
881 return snd_pcm_lib_free_pages(substream);
882}
883
884/* ----------------------------------------------------------------------
885 * Audio1 Capture (ADC)
886 * ----------------------------------------------------------------------*/
e571f594 887static struct snd_pcm_hardware snd_es1938_capture =
1da177e4
LT
888{
889 .info = (SNDRV_PCM_INFO_INTERLEAVED |
890 SNDRV_PCM_INFO_BLOCK_TRANSFER),
e571f594
TI
891 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
892 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
1da177e4
LT
893 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
894 .rate_min = 6000,
895 .rate_max = 48000,
896 .channels_min = 1,
897 .channels_max = 2,
898 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
899 .period_bytes_min = 64,
900 .period_bytes_max = 0x8000,
901 .periods_min = 1,
902 .periods_max = 1024,
903 .fifo_size = 256,
904};
905
906/* -----------------------------------------------------------------------
907 * Audio2 Playback (DAC)
908 * -----------------------------------------------------------------------*/
e571f594 909static struct snd_pcm_hardware snd_es1938_playback =
1da177e4
LT
910{
911 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
912 SNDRV_PCM_INFO_BLOCK_TRANSFER |
913 SNDRV_PCM_INFO_MMAP_VALID),
e571f594
TI
914 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
915 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
1da177e4
LT
916 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
917 .rate_min = 6000,
918 .rate_max = 48000,
919 .channels_min = 1,
920 .channels_max = 2,
921 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
922 .period_bytes_min = 64,
923 .period_bytes_max = 0x8000,
924 .periods_min = 1,
925 .periods_max = 1024,
926 .fifo_size = 256,
927};
928
e571f594 929static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
1da177e4 930{
e571f594
TI
931 struct es1938 *chip = snd_pcm_substream_chip(substream);
932 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
933
934 if (chip->playback2_substream)
935 return -EAGAIN;
936 chip->capture_substream = substream;
937 runtime->hw = snd_es1938_capture;
938 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
939 &hw_constraints_clocks);
940 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
941 return 0;
942}
943
e571f594 944static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
1da177e4 945{
e571f594
TI
946 struct es1938 *chip = snd_pcm_substream_chip(substream);
947 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
948
949 switch (substream->number) {
950 case 0:
951 chip->playback1_substream = substream;
952 break;
953 case 1:
954 if (chip->capture_substream)
955 return -EAGAIN;
956 chip->playback2_substream = substream;
957 break;
958 default:
959 snd_BUG();
960 return -EINVAL;
961 }
962 runtime->hw = snd_es1938_playback;
963 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
964 &hw_constraints_clocks);
965 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
966 return 0;
967}
968
e571f594 969static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
1da177e4 970{
e571f594 971 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
972
973 chip->capture_substream = NULL;
974 return 0;
975}
976
e571f594 977static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
1da177e4 978{
e571f594 979 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
980
981 switch (substream->number) {
982 case 0:
983 chip->playback1_substream = NULL;
984 break;
985 case 1:
986 chip->playback2_substream = NULL;
987 break;
988 default:
989 snd_BUG();
990 return -EINVAL;
991 }
992 return 0;
993}
994
e571f594 995static struct snd_pcm_ops snd_es1938_playback_ops = {
1da177e4
LT
996 .open = snd_es1938_playback_open,
997 .close = snd_es1938_playback_close,
998 .ioctl = snd_pcm_lib_ioctl,
999 .hw_params = snd_es1938_pcm_hw_params,
1000 .hw_free = snd_es1938_pcm_hw_free,
1001 .prepare = snd_es1938_playback_prepare,
1002 .trigger = snd_es1938_playback_trigger,
1003 .pointer = snd_es1938_playback_pointer,
1004};
1005
e571f594 1006static struct snd_pcm_ops snd_es1938_capture_ops = {
1da177e4
LT
1007 .open = snd_es1938_capture_open,
1008 .close = snd_es1938_capture_close,
1009 .ioctl = snd_pcm_lib_ioctl,
1010 .hw_params = snd_es1938_pcm_hw_params,
1011 .hw_free = snd_es1938_pcm_hw_free,
1012 .prepare = snd_es1938_capture_prepare,
1013 .trigger = snd_es1938_capture_trigger,
1014 .pointer = snd_es1938_capture_pointer,
1015 .copy = snd_es1938_capture_copy,
1016};
1017
e23e7a14 1018static int snd_es1938_new_pcm(struct es1938 *chip, int device)
1da177e4 1019{
e571f594 1020 struct snd_pcm *pcm;
1da177e4
LT
1021 int err;
1022
1023 if ((err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm)) < 0)
1024 return err;
1025 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
1026 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
1027
1028 pcm->private_data = chip;
1da177e4
LT
1029 pcm->info_flags = 0;
1030 strcpy(pcm->name, "ESS Solo-1");
1031
1032 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1033 snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
1034
1035 chip->pcm = pcm;
1036 return 0;
1037}
1038
1039/* -------------------------------------------------------------------
1040 *
1041 * *** Mixer part ***
1042 */
1043
e571f594
TI
1044static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol,
1045 struct snd_ctl_elem_info *uinfo)
1da177e4 1046{
6b6b295e 1047 static const char * const texts[8] = {
1da177e4
LT
1048 "Mic", "Mic Master", "CD", "AOUT",
1049 "Mic1", "Mix", "Line", "Master"
1050 };
1051
6b6b295e 1052 return snd_ctl_enum_info(uinfo, 1, 8, texts);
1da177e4
LT
1053}
1054
e571f594
TI
1055static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol,
1056 struct snd_ctl_elem_value *ucontrol)
1da177e4 1057{
e571f594 1058 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1059 ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
1060 return 0;
1061}
1062
e571f594
TI
1063static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol,
1064 struct snd_ctl_elem_value *ucontrol)
1da177e4 1065{
e571f594 1066 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1067 unsigned char val = ucontrol->value.enumerated.item[0];
1068
1069 if (val > 7)
1070 return -EINVAL;
1071 return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
1072}
1073
a5ce8890 1074#define snd_es1938_info_spatializer_enable snd_ctl_boolean_mono_info
1da177e4 1075
e571f594
TI
1076static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol,
1077 struct snd_ctl_elem_value *ucontrol)
1da177e4 1078{
e571f594 1079 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1080 unsigned char val = snd_es1938_mixer_read(chip, 0x50);
1081 ucontrol->value.integer.value[0] = !!(val & 8);
1082 return 0;
1083}
1084
e571f594
TI
1085static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol,
1086 struct snd_ctl_elem_value *ucontrol)
1da177e4 1087{
e571f594 1088 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1089 unsigned char oval, nval;
1090 int change;
1091 nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
1092 oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
1093 change = nval != oval;
1094 if (change) {
1095 snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
1096 snd_es1938_mixer_write(chip, 0x50, nval);
1097 }
1098 return change;
1099}
1100
e571f594
TI
1101static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol,
1102 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1103{
1104 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1105 uinfo->count = 2;
1106 uinfo->value.integer.min = 0;
1107 uinfo->value.integer.max = 63;
1108 return 0;
1109}
1110
e571f594
TI
1111static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol,
1112 struct snd_ctl_elem_value *ucontrol)
1da177e4 1113{
e571f594 1114 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1115 ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
1116 ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
1117 return 0;
1118}
1119
a5ce8890 1120#define snd_es1938_info_hw_switch snd_ctl_boolean_stereo_info
1da177e4 1121
e571f594
TI
1122static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol,
1123 struct snd_ctl_elem_value *ucontrol)
1da177e4 1124{
e571f594 1125 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1126 ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
1127 ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
1128 return 0;
1129}
1130
e571f594 1131static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol)
1da177e4 1132{
e571f594 1133 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1134 chip->master_volume = NULL;
1135 chip->master_switch = NULL;
1136 chip->hw_volume = NULL;
1137 chip->hw_switch = NULL;
1138}
1139
e571f594 1140static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg,
1da177e4
LT
1141 unsigned char mask, unsigned char val)
1142{
1143 if (reg < 0xa0)
1144 return snd_es1938_mixer_bits(chip, reg, mask, val);
1145 else
1146 return snd_es1938_bits(chip, reg, mask, val);
1147}
1148
e571f594 1149static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT
1150{
1151 if (reg < 0xa0)
1152 return snd_es1938_mixer_read(chip, reg);
1153 else
1154 return snd_es1938_read(chip, reg);
1155}
1156
0b593972
TI
1157#define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
1158{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1159 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1160 .name = xname, .index = xindex, \
1161 .info = snd_es1938_info_single, \
1162 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1163 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
1164 .tlv = { .p = xtlv } }
1da177e4
LT
1165#define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
1166{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1167 .info = snd_es1938_info_single, \
1168 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1169 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1170
e571f594
TI
1171static int snd_es1938_info_single(struct snd_kcontrol *kcontrol,
1172 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1173{
1174 int mask = (kcontrol->private_value >> 16) & 0xff;
1175
1176 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1177 uinfo->count = 1;
1178 uinfo->value.integer.min = 0;
1179 uinfo->value.integer.max = mask;
1180 return 0;
1181}
1182
e571f594
TI
1183static int snd_es1938_get_single(struct snd_kcontrol *kcontrol,
1184 struct snd_ctl_elem_value *ucontrol)
1da177e4 1185{
e571f594 1186 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1187 int reg = kcontrol->private_value & 0xff;
1188 int shift = (kcontrol->private_value >> 8) & 0xff;
1189 int mask = (kcontrol->private_value >> 16) & 0xff;
1190 int invert = (kcontrol->private_value >> 24) & 0xff;
1191 int val;
1192
1193 val = snd_es1938_reg_read(chip, reg);
1194 ucontrol->value.integer.value[0] = (val >> shift) & mask;
1195 if (invert)
1196 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1197 return 0;
1198}
1199
e571f594
TI
1200static int snd_es1938_put_single(struct snd_kcontrol *kcontrol,
1201 struct snd_ctl_elem_value *ucontrol)
1da177e4 1202{
e571f594 1203 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1204 int reg = kcontrol->private_value & 0xff;
1205 int shift = (kcontrol->private_value >> 8) & 0xff;
1206 int mask = (kcontrol->private_value >> 16) & 0xff;
1207 int invert = (kcontrol->private_value >> 24) & 0xff;
1208 unsigned char val;
1209
1210 val = (ucontrol->value.integer.value[0] & mask);
1211 if (invert)
1212 val = mask - val;
1213 mask <<= shift;
1214 val <<= shift;
1215 return snd_es1938_reg_bits(chip, reg, mask, val) != val;
1216}
1217
0b593972
TI
1218#define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
1219{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1220 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1221 .name = xname, .index = xindex, \
1222 .info = snd_es1938_info_double, \
1223 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1224 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
1225 .tlv = { .p = xtlv } }
1da177e4
LT
1226#define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1227{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1228 .info = snd_es1938_info_double, \
1229 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1230 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1231
e571f594
TI
1232static int snd_es1938_info_double(struct snd_kcontrol *kcontrol,
1233 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1234{
1235 int mask = (kcontrol->private_value >> 24) & 0xff;
1236
1237 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1238 uinfo->count = 2;
1239 uinfo->value.integer.min = 0;
1240 uinfo->value.integer.max = mask;
1241 return 0;
1242}
1243
e571f594
TI
1244static int snd_es1938_get_double(struct snd_kcontrol *kcontrol,
1245 struct snd_ctl_elem_value *ucontrol)
1da177e4 1246{
e571f594 1247 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1248 int left_reg = kcontrol->private_value & 0xff;
1249 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1250 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1251 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1252 int mask = (kcontrol->private_value >> 24) & 0xff;
1253 int invert = (kcontrol->private_value >> 22) & 1;
1254 unsigned char left, right;
1255
1256 left = snd_es1938_reg_read(chip, left_reg);
1257 if (left_reg != right_reg)
1258 right = snd_es1938_reg_read(chip, right_reg);
1259 else
1260 right = left;
1261 ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
1262 ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
1263 if (invert) {
1264 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1265 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1266 }
1267 return 0;
1268}
1269
e571f594
TI
1270static int snd_es1938_put_double(struct snd_kcontrol *kcontrol,
1271 struct snd_ctl_elem_value *ucontrol)
1da177e4 1272{
e571f594 1273 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1274 int left_reg = kcontrol->private_value & 0xff;
1275 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1276 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1277 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1278 int mask = (kcontrol->private_value >> 24) & 0xff;
1279 int invert = (kcontrol->private_value >> 22) & 1;
1280 int change;
1281 unsigned char val1, val2, mask1, mask2;
1282
1283 val1 = ucontrol->value.integer.value[0] & mask;
1284 val2 = ucontrol->value.integer.value[1] & mask;
1285 if (invert) {
1286 val1 = mask - val1;
1287 val2 = mask - val2;
1288 }
1289 val1 <<= shift_left;
1290 val2 <<= shift_right;
1291 mask1 = mask << shift_left;
1292 mask2 = mask << shift_right;
1293 if (left_reg != right_reg) {
1294 change = 0;
1295 if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
1296 change = 1;
1297 if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
1298 change = 1;
1299 } else {
1300 change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
1301 val1 | val2) != (val1 | val2));
1302 }
1303 return change;
1304}
1305
093eef41 1306static const DECLARE_TLV_DB_RANGE(db_scale_master,
0b593972
TI
1307 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1308 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
093eef41 1309);
0b593972 1310
093eef41 1311static const DECLARE_TLV_DB_RANGE(db_scale_audio1,
0b593972
TI
1312 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1313 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
093eef41 1314);
0b593972 1315
093eef41 1316static const DECLARE_TLV_DB_RANGE(db_scale_audio2,
0b593972
TI
1317 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1318 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
093eef41 1319);
0b593972 1320
093eef41 1321static const DECLARE_TLV_DB_RANGE(db_scale_mic,
0b593972
TI
1322 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1323 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
093eef41 1324);
0b593972 1325
093eef41 1326static const DECLARE_TLV_DB_RANGE(db_scale_line,
0b593972
TI
1327 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1328 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
093eef41 1329);
0b593972 1330
0cb29ea0 1331static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0);
0b593972 1332
e571f594 1333static struct snd_kcontrol_new snd_es1938_controls[] = {
0b593972
TI
1334ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0,
1335 db_scale_master),
1da177e4
LT
1336ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
1337{
1338 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1339 .name = "Hardware Master Playback Volume",
1340 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1341 .info = snd_es1938_info_hw_volume,
1342 .get = snd_es1938_get_hw_volume,
1343},
1344{
1345 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
dbf91dd4 1346 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
0b593972 1347 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4 1348 .name = "Hardware Master Playback Switch",
1da177e4
LT
1349 .info = snd_es1938_info_hw_switch,
1350 .get = snd_es1938_get_hw_switch,
0b593972 1351 .tlv = { .p = db_scale_master },
1da177e4
LT
1352},
1353ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
0b593972
TI
1354ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0,
1355 db_scale_line),
1da177e4 1356ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
0b593972
TI
1357ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0,
1358 db_scale_mic),
1359ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1360 db_scale_line),
1361ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0,
1362 db_scale_mic),
1363ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0,
1364 db_scale_line),
1365ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0,
1366 db_scale_capture),
d355c82a 1367ES1938_SINGLE("Beep Volume", 0, 0x3c, 0, 7, 0),
1da177e4
LT
1368ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
1369ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
1370{
1371 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1372 .name = "Capture Source",
1373 .info = snd_es1938_info_mux,
1374 .get = snd_es1938_get_mux,
1375 .put = snd_es1938_put_mux,
1376},
0b593972
TI
1377ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1378 db_scale_line),
1379ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0,
1380 db_scale_audio2),
1381ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0,
1382 db_scale_mic),
1383ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0,
1384 db_scale_line),
1385ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0,
1386 db_scale_mic),
1387ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0,
1388 db_scale_line),
1389ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0,
1390 db_scale_line),
1391ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0,
1392 db_scale_line),
1393ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0,
1394 db_scale_audio2),
1395ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0,
1396 db_scale_audio1),
1da177e4
LT
1397ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
1398{
1399 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1400 .name = "3D Control - Switch",
1401 .info = snd_es1938_info_spatializer_enable,
1402 .get = snd_es1938_get_spatializer_enable,
1403 .put = snd_es1938_put_spatializer_enable,
1404},
1405ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
1406};
1407
1408
1409/* ---------------------------------------------------------------------------- */
1410/* ---------------------------------------------------------------------------- */
1411
1412/*
1413 * initialize the chip - used by resume callback, too
1414 */
e571f594 1415static void snd_es1938_chip_init(struct es1938 *chip)
1da177e4
LT
1416{
1417 /* reset chip */
1418 snd_es1938_reset(chip);
1419
1420 /* configure native mode */
1421
1422 /* enable bus master */
1423 pci_set_master(chip->pci);
1424
1425 /* disable legacy audio */
1426 pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
1427
1428 /* set DDMA base */
1429 pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
1430
1431 /* set DMA/IRQ policy */
1432 pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
1433
1434 /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
1435 outb(0xf0, SLIO_REG(chip, IRQCONTROL));
1436
1437 /* reset DMA */
1438 outb(0, SLDM_REG(chip, DMACLEAR));
1439}
1440
c7561cd8 1441#ifdef CONFIG_PM_SLEEP
1da177e4
LT
1442/*
1443 * PM support
1444 */
1445
1446static unsigned char saved_regs[SAVED_REG_SIZE+1] = {
1447 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
1448 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
1449 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
1450 0xa8, 0xb4,
1451};
1452
1453
68cb2b55 1454static int es1938_suspend(struct device *dev)
1da177e4 1455{
68cb2b55 1456 struct snd_card *card = dev_get_drvdata(dev);
b34a580e 1457 struct es1938 *chip = card->private_data;
1da177e4
LT
1458 unsigned char *s, *d;
1459
b34a580e 1460 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4
LT
1461 snd_pcm_suspend_all(chip->pcm);
1462
1463 /* save mixer-related registers */
1464 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
1465 *d = snd_es1938_reg_read(chip, *s);
1466
1467 outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
30b35399 1468 if (chip->irq >= 0) {
b34a580e 1469 free_irq(chip->irq, chip);
30b35399
TI
1470 chip->irq = -1;
1471 }
1da177e4
LT
1472 return 0;
1473}
1474
68cb2b55 1475static int es1938_resume(struct device *dev)
1da177e4 1476{
68cb2b55
TI
1477 struct pci_dev *pci = to_pci_dev(dev);
1478 struct snd_card *card = dev_get_drvdata(dev);
b34a580e 1479 struct es1938 *chip = card->private_data;
1da177e4
LT
1480 unsigned char *s, *d;
1481
30b35399 1482 if (request_irq(pci->irq, snd_es1938_interrupt,
934c2b6d 1483 IRQF_SHARED, KBUILD_MODNAME, chip)) {
ebebecaa
TI
1484 dev_err(dev, "unable to grab IRQ %d, disabling device\n",
1485 pci->irq);
30b35399
TI
1486 snd_card_disconnect(card);
1487 return -EIO;
1488 }
b34a580e 1489 chip->irq = pci->irq;
1da177e4
LT
1490 snd_es1938_chip_init(chip);
1491
1492 /* restore mixer-related registers */
1493 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
1494 if (*s < 0xa0)
1495 snd_es1938_mixer_write(chip, *s, *d);
1496 else
1497 snd_es1938_write(chip, *s, *d);
1498 }
1499
b34a580e 1500 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT
1501 return 0;
1502}
68cb2b55
TI
1503
1504static SIMPLE_DEV_PM_OPS(es1938_pm, es1938_suspend, es1938_resume);
1505#define ES1938_PM_OPS &es1938_pm
1506#else
1507#define ES1938_PM_OPS NULL
c7561cd8 1508#endif /* CONFIG_PM_SLEEP */
1da177e4
LT
1509
1510#ifdef SUPPORT_JOYSTICK
e23e7a14 1511static int snd_es1938_create_gameport(struct es1938 *chip)
1da177e4
LT
1512{
1513 struct gameport *gp;
1514
1515 chip->gameport = gp = gameport_allocate_port();
1516 if (!gp) {
ebebecaa
TI
1517 dev_err(chip->card->dev,
1518 "cannot allocate memory for gameport\n");
1da177e4
LT
1519 return -ENOMEM;
1520 }
1521
1522 gameport_set_name(gp, "ES1938");
1523 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1524 gameport_set_dev_parent(gp, &chip->pci->dev);
1525 gp->io = chip->game_port;
1526
1527 gameport_register_port(gp);
1528
1529 return 0;
1530}
1531
e571f594 1532static void snd_es1938_free_gameport(struct es1938 *chip)
1da177e4
LT
1533{
1534 if (chip->gameport) {
1535 gameport_unregister_port(chip->gameport);
1536 chip->gameport = NULL;
1537 }
1538}
1539#else
e571f594
TI
1540static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; }
1541static inline void snd_es1938_free_gameport(struct es1938 *chip) { }
1da177e4
LT
1542#endif /* SUPPORT_JOYSTICK */
1543
e571f594 1544static int snd_es1938_free(struct es1938 *chip)
1da177e4
LT
1545{
1546 /* disable irqs */
1547 outb(0x00, SLIO_REG(chip, IRQCONTROL));
1548 if (chip->rmidi)
1549 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
1550
1551 snd_es1938_free_gameport(chip);
1552
f000fd80 1553 if (chip->irq >= 0)
e571f594 1554 free_irq(chip->irq, chip);
1da177e4
LT
1555 pci_release_regions(chip->pci);
1556 pci_disable_device(chip->pci);
1557 kfree(chip);
1558 return 0;
1559}
1560
e571f594 1561static int snd_es1938_dev_free(struct snd_device *device)
1da177e4 1562{
e571f594 1563 struct es1938 *chip = device->device_data;
1da177e4
LT
1564 return snd_es1938_free(chip);
1565}
1566
e23e7a14
BP
1567static int snd_es1938_create(struct snd_card *card,
1568 struct pci_dev *pci,
1569 struct es1938 **rchip)
1da177e4 1570{
e571f594 1571 struct es1938 *chip;
1da177e4 1572 int err;
e571f594 1573 static struct snd_device_ops ops = {
1da177e4
LT
1574 .dev_free = snd_es1938_dev_free,
1575 };
1576
1577 *rchip = NULL;
1578
1579 /* enable PCI device */
1580 if ((err = pci_enable_device(pci)) < 0)
1581 return err;
1582 /* check, if we can restrict PCI DMA transfers to 24 bits */
412b979c
QL
1583 if (dma_set_mask(&pci->dev, DMA_BIT_MASK(24)) < 0 ||
1584 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(24)) < 0) {
ebebecaa
TI
1585 dev_err(card->dev,
1586 "architecture does not support 24bit PCI busmaster DMA\n");
1da177e4
LT
1587 pci_disable_device(pci);
1588 return -ENXIO;
1589 }
1590
e560d8d8 1591 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT
1592 if (chip == NULL) {
1593 pci_disable_device(pci);
1594 return -ENOMEM;
1595 }
1596 spin_lock_init(&chip->reg_lock);
1597 spin_lock_init(&chip->mixer_lock);
1598 chip->card = card;
1599 chip->pci = pci;
30b35399 1600 chip->irq = -1;
1da177e4
LT
1601 if ((err = pci_request_regions(pci, "ESS Solo-1")) < 0) {
1602 kfree(chip);
1603 pci_disable_device(pci);
1604 return err;
1605 }
1606 chip->io_port = pci_resource_start(pci, 0);
1607 chip->sb_port = pci_resource_start(pci, 1);
1608 chip->vc_port = pci_resource_start(pci, 2);
1609 chip->mpu_port = pci_resource_start(pci, 3);
1610 chip->game_port = pci_resource_start(pci, 4);
437a5a46 1611 if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED,
934c2b6d 1612 KBUILD_MODNAME, chip)) {
ebebecaa 1613 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT
1614 snd_es1938_free(chip);
1615 return -EBUSY;
1616 }
1617 chip->irq = pci->irq;
ebebecaa
TI
1618 dev_dbg(card->dev,
1619 "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
1da177e4 1620 chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
1da177e4
LT
1621
1622 chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */
1623
1624 snd_es1938_chip_init(chip);
1625
1da177e4
LT
1626 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1627 snd_es1938_free(chip);
1628 return err;
1629 }
1630
1da177e4
LT
1631 *rchip = chip;
1632 return 0;
1633}
1634
1635/* --------------------------------------------------------------------
1636 * Interrupt handler
1637 * -------------------------------------------------------------------- */
7d12e780 1638static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id)
1da177e4 1639{
e571f594 1640 struct es1938 *chip = dev_id;
1da177e4
LT
1641 unsigned char status, audiostatus;
1642 int handled = 0;
1643
1644 status = inb(SLIO_REG(chip, IRQCONTROL));
1645#if 0
ebebecaa
TI
1646 dev_dbg(chip->card->dev,
1647 "Es1938debug - interrupt status: =0x%x\n", status);
1da177e4
LT
1648#endif
1649
1650 /* AUDIO 1 */
1651 if (status & 0x10) {
1652#if 0
ebebecaa 1653 dev_dbg(chip->card->dev,
ee419653 1654 "Es1938debug - AUDIO channel 1 interrupt\n");
ebebecaa 1655 dev_dbg(chip->card->dev,
ee419653 1656 "Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
e571f594 1657 inw(SLDM_REG(chip, DMACOUNT)));
ebebecaa 1658 dev_dbg(chip->card->dev,
ee419653 1659 "Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
e571f594 1660 inl(SLDM_REG(chip, DMAADDR)));
ebebecaa 1661 dev_dbg(chip->card->dev,
ee419653 1662 "Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
e571f594 1663 inl(SLDM_REG(chip, DMASTATUS)));
1da177e4
LT
1664#endif
1665 /* clear irq */
1666 handled = 1;
1667 audiostatus = inb(SLSB_REG(chip, STATUS));
1668 if (chip->active & ADC1)
1669 snd_pcm_period_elapsed(chip->capture_substream);
1670 else if (chip->active & DAC1)
1671 snd_pcm_period_elapsed(chip->playback2_substream);
1672 }
1673
1674 /* AUDIO 2 */
1675 if (status & 0x20) {
1676#if 0
ebebecaa 1677 dev_dbg(chip->card->dev,
ee419653 1678 "Es1938debug - AUDIO channel 2 interrupt\n");
ebebecaa 1679 dev_dbg(chip->card->dev,
ee419653 1680 "Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
e571f594 1681 inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
ebebecaa 1682 dev_dbg(chip->card->dev,
ee419653 1683 "Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
e571f594 1684 inl(SLIO_REG(chip, AUDIO2DMAADDR)));
1da177e4
LT
1685
1686#endif
1687 /* clear irq */
1688 handled = 1;
1689 snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
1690 if (chip->active & DAC2)
1691 snd_pcm_period_elapsed(chip->playback1_substream);
1692 }
1693
1694 /* Hardware volume */
1695 if (status & 0x40) {
1696 int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
1697 handled = 1;
1698 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
1699 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
1700 if (!split) {
e571f594
TI
1701 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1702 &chip->master_switch->id);
1703 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1704 &chip->master_volume->id);
1da177e4
LT
1705 }
1706 /* ack interrupt */
1707 snd_es1938_mixer_write(chip, 0x66, 0x00);
1708 }
1709
1710 /* MPU401 */
1711 if (status & 0x80) {
1712 // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
1713 // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
1714 // andreas@flying-snail.de
1715 // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
1716 if (chip->rmidi) {
1717 handled = 1;
7d12e780 1718 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1da177e4
LT
1719 }
1720 }
1721 return IRQ_RETVAL(handled);
1722}
1723
1724#define ES1938_DMA_SIZE 64
1725
e23e7a14 1726static int snd_es1938_mixer(struct es1938 *chip)
1da177e4 1727{
e571f594 1728 struct snd_card *card;
1da177e4
LT
1729 unsigned int idx;
1730 int err;
1731
1732 card = chip->card;
1733
1734 strcpy(card->mixername, "ESS Solo-1");
1735
1736 for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
e571f594 1737 struct snd_kcontrol *kctl;
1da177e4
LT
1738 kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
1739 switch (idx) {
1740 case 0:
1741 chip->master_volume = kctl;
1742 kctl->private_free = snd_es1938_hwv_free;
1743 break;
1744 case 1:
1745 chip->master_switch = kctl;
1746 kctl->private_free = snd_es1938_hwv_free;
1747 break;
1748 case 2:
1749 chip->hw_volume = kctl;
1750 kctl->private_free = snd_es1938_hwv_free;
1751 break;
1752 case 3:
1753 chip->hw_switch = kctl;
1754 kctl->private_free = snd_es1938_hwv_free;
1755 break;
1756 }
1757 if ((err = snd_ctl_add(card, kctl)) < 0)
1758 return err;
1759 }
1760 return 0;
1761}
1762
1763
e23e7a14
BP
1764static int snd_es1938_probe(struct pci_dev *pci,
1765 const struct pci_device_id *pci_id)
1da177e4
LT
1766{
1767 static int dev;
e571f594
TI
1768 struct snd_card *card;
1769 struct es1938 *chip;
1770 struct snd_opl3 *opl3;
1da177e4
LT
1771 int idx, err;
1772
1773 if (dev >= SNDRV_CARDS)
1774 return -ENODEV;
1775 if (!enable[dev]) {
1776 dev++;
1777 return -ENOENT;
1778 }
1779
60c5772b
TI
1780 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1781 0, &card);
e58de7ba
TI
1782 if (err < 0)
1783 return err;
1da177e4
LT
1784 for (idx = 0; idx < 5; idx++) {
1785 if (pci_resource_start(pci, idx) == 0 ||
1786 !(pci_resource_flags(pci, idx) & IORESOURCE_IO)) {
1787 snd_card_free(card);
1788 return -ENODEV;
1789 }
1790 }
1791 if ((err = snd_es1938_create(card, pci, &chip)) < 0) {
1792 snd_card_free(card);
1793 return err;
1794 }
b34a580e 1795 card->private_data = chip;
1da177e4
LT
1796
1797 strcpy(card->driver, "ES1938");
1798 strcpy(card->shortname, "ESS ES1938 (Solo-1)");
1799 sprintf(card->longname, "%s rev %i, irq %i",
1800 card->shortname,
1801 chip->revision,
1802 chip->irq);
1803
1804 if ((err = snd_es1938_new_pcm(chip, 0)) < 0) {
1805 snd_card_free(card);
1806 return err;
1807 }
1808 if ((err = snd_es1938_mixer(chip)) < 0) {
1809 snd_card_free(card);
1810 return err;
1811 }
1812 if (snd_opl3_create(card,
1813 SLSB_REG(chip, FMLOWADDR),
1814 SLSB_REG(chip, FMHIGHADDR),
1815 OPL3_HW_OPL3, 1, &opl3) < 0) {
ebebecaa 1816 dev_err(card->dev, "OPL3 not detected at 0x%lx\n",
1da177e4
LT
1817 SLSB_REG(chip, FMLOWADDR));
1818 } else {
1819 if ((err = snd_opl3_timer_new(opl3, 0, 1)) < 0) {
1820 snd_card_free(card);
1821 return err;
1822 }
1823 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1824 snd_card_free(card);
1825 return err;
1826 }
1827 }
1828 if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
dba8b469
CL
1829 chip->mpu_port,
1830 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
1831 -1, &chip->rmidi) < 0) {
ebebecaa 1832 dev_err(card->dev, "unable to initialize MPU-401\n");
1da177e4
LT
1833 } else {
1834 // this line is vital for MIDI interrupt handling on ess-solo1
1835 // andreas@flying-snail.de
1836 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
1837 }
1838
1839 snd_es1938_create_gameport(chip);
1840
1841 if ((err = snd_card_register(card)) < 0) {
1842 snd_card_free(card);
1843 return err;
1844 }
1845
1846 pci_set_drvdata(pci, card);
1847 dev++;
1848 return 0;
1849}
1850
e23e7a14 1851static void snd_es1938_remove(struct pci_dev *pci)
1da177e4
LT
1852{
1853 snd_card_free(pci_get_drvdata(pci));
1da177e4
LT
1854}
1855
e9f66d9b 1856static struct pci_driver es1938_driver = {
3733e424 1857 .name = KBUILD_MODNAME,
1da177e4
LT
1858 .id_table = snd_es1938_ids,
1859 .probe = snd_es1938_probe,
e23e7a14 1860 .remove = snd_es1938_remove,
68cb2b55
TI
1861 .driver = {
1862 .pm = ES1938_PM_OPS,
1863 },
1da177e4
LT
1864};
1865
e9f66d9b 1866module_pci_driver(es1938_driver);
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