projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge remote-tracking branch 'lightnvm/for-next'
[deliverable/linux.git] / sound / soc / codecs / da7213.c
CommitLineData
ef5c2eba
AT		 1/*
2 * DA7213 ALSA SoC Codec Driver
3 *
4 * Copyright (c) 2013 Dialog Semiconductor
5 *
6 * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
7 * Based on DA9055 ALSA SoC codec driver.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
6e7c4443 15#include <linux/clk.h>
ef5c2eba
AT		 16#include <linux/delay.h>
17#include <linux/i2c.h>
18#include <linux/regmap.h>
19#include <linux/slab.h>
20#include <linux/module.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/soc.h>
24#include <sound/initval.h>
25#include <sound/tlv.h>
26
27#include <sound/da7213.h>
28#include "da7213.h"
29
30
31/* Gain and Volume */
32e933be 32static const DECLARE_TLV_DB_RANGE(aux_vol_tlv,
ef5c2eba
AT		 33 /* -54dB */
34 0x0, 0x11, TLV_DB_SCALE_ITEM(-5400, 0, 0),
35 /* -52.5dB to 15dB */
36 0x12, 0x3f, TLV_DB_SCALE_ITEM(-5250, 150, 0)
32e933be 37);
ef5c2eba 38
32e933be 39static const DECLARE_TLV_DB_RANGE(digital_gain_tlv,
ef5c2eba
AT		 40 0x0, 0x07, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
41 /* -78dB to 12dB */
42 0x08, 0x7f, TLV_DB_SCALE_ITEM(-7800, 75, 0)
32e933be 43);
ef5c2eba 44
32e933be 45static const DECLARE_TLV_DB_RANGE(alc_analog_gain_tlv,
ef5c2eba
AT		 46 0x0, 0x0, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
47 /* 0dB to 36dB */
48 0x01, 0x07, TLV_DB_SCALE_ITEM(0, 600, 0)
32e933be 49);
ef5c2eba
AT		 50
51static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -600, 600, 0);
52static const DECLARE_TLV_DB_SCALE(mixin_gain_tlv, -450, 150, 0);
53static const DECLARE_TLV_DB_SCALE(eq_gain_tlv, -1050, 150, 0);
54static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -5700, 100, 0);
55static const DECLARE_TLV_DB_SCALE(lineout_vol_tlv, -4800, 100, 0);
56static const DECLARE_TLV_DB_SCALE(alc_threshold_tlv, -9450, 150, 0);
57static const DECLARE_TLV_DB_SCALE(alc_gain_tlv, 0, 600, 0);
58
59/* ADC and DAC voice mode (8kHz) high pass cutoff value */
60static const char * const da7213_voice_hpf_corner_txt[] = {
61 "2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz"
62};
63
c99f8b21
TI		 64static SOC_ENUM_SINGLE_DECL(da7213_dac_voice_hpf_corner,
65 DA7213_DAC_FILTERS1,
66 DA7213_VOICE_HPF_CORNER_SHIFT,
67 da7213_voice_hpf_corner_txt);
ef5c2eba 68
c99f8b21
TI		 69static SOC_ENUM_SINGLE_DECL(da7213_adc_voice_hpf_corner,
70 DA7213_ADC_FILTERS1,
71 DA7213_VOICE_HPF_CORNER_SHIFT,
72 da7213_voice_hpf_corner_txt);
ef5c2eba
AT		 73
74/* ADC and DAC high pass filter cutoff value */
75static const char * const da7213_audio_hpf_corner_txt[] = {
76 "Fs/24000", "Fs/12000", "Fs/6000", "Fs/3000"
77};
78
c99f8b21
TI		 79static SOC_ENUM_SINGLE_DECL(da7213_dac_audio_hpf_corner,
80 DA7213_DAC_FILTERS1
81 , DA7213_AUDIO_HPF_CORNER_SHIFT,
82 da7213_audio_hpf_corner_txt);
ef5c2eba 83
c99f8b21
TI		 84static SOC_ENUM_SINGLE_DECL(da7213_adc_audio_hpf_corner,
85 DA7213_ADC_FILTERS1,
86 DA7213_AUDIO_HPF_CORNER_SHIFT,
87 da7213_audio_hpf_corner_txt);
ef5c2eba
AT		 88
89/* Gain ramping rate value */
90static const char * const da7213_gain_ramp_rate_txt[] = {
91 "nominal rate * 8", "nominal rate * 16", "nominal rate / 16",
92 "nominal rate / 32"
93};
94
c99f8b21
TI		 95static SOC_ENUM_SINGLE_DECL(da7213_gain_ramp_rate,
96 DA7213_GAIN_RAMP_CTRL,
97 DA7213_GAIN_RAMP_RATE_SHIFT,
98 da7213_gain_ramp_rate_txt);
ef5c2eba
AT		 99
100/* DAC noise gate setup time value */
101static const char * const da7213_dac_ng_setup_time_txt[] = {
102 "256 samples", "512 samples", "1024 samples", "2048 samples"
103};
104
c99f8b21
TI		 105static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_setup_time,
106 DA7213_DAC_NG_SETUP_TIME,
107 DA7213_DAC_NG_SETUP_TIME_SHIFT,
108 da7213_dac_ng_setup_time_txt);
ef5c2eba
AT		 109
110/* DAC noise gate rampup rate value */
111static const char * const da7213_dac_ng_rampup_txt[] = {
112 "0.02 ms/dB", "0.16 ms/dB"
113};
114
c99f8b21
TI		 115static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_rampup_rate,
116 DA7213_DAC_NG_SETUP_TIME,
117 DA7213_DAC_NG_RAMPUP_RATE_SHIFT,
118 da7213_dac_ng_rampup_txt);
ef5c2eba
AT		 119
120/* DAC noise gate rampdown rate value */
121static const char * const da7213_dac_ng_rampdown_txt[] = {
122 "0.64 ms/dB", "20.48 ms/dB"
123};
124
c99f8b21
TI		 125static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_rampdown_rate,
126 DA7213_DAC_NG_SETUP_TIME,
127 DA7213_DAC_NG_RAMPDN_RATE_SHIFT,
128 da7213_dac_ng_rampdown_txt);
ef5c2eba
AT		 129
130/* DAC soft mute rate value */
131static const char * const da7213_dac_soft_mute_rate_txt[] = {
132 "1", "2", "4", "8", "16", "32", "64"
133};
134
c99f8b21
TI		 135static SOC_ENUM_SINGLE_DECL(da7213_dac_soft_mute_rate,
136 DA7213_DAC_FILTERS5,
137 DA7213_DAC_SOFTMUTE_RATE_SHIFT,
138 da7213_dac_soft_mute_rate_txt);
ef5c2eba
AT		 139
140/* ALC Attack Rate select */
141static const char * const da7213_alc_attack_rate_txt[] = {
142 "44/fs", "88/fs", "176/fs", "352/fs", "704/fs", "1408/fs", "2816/fs",
143 "5632/fs", "11264/fs", "22528/fs", "45056/fs", "90112/fs", "180224/fs"
144};
145
c99f8b21
TI		 146static SOC_ENUM_SINGLE_DECL(da7213_alc_attack_rate,
147 DA7213_ALC_CTRL2,
148 DA7213_ALC_ATTACK_SHIFT,
149 da7213_alc_attack_rate_txt);
ef5c2eba
AT		 150
151/* ALC Release Rate select */
152static const char * const da7213_alc_release_rate_txt[] = {
153 "176/fs", "352/fs", "704/fs", "1408/fs", "2816/fs", "5632/fs",
154 "11264/fs", "22528/fs", "45056/fs", "90112/fs", "180224/fs"
155};
156
c99f8b21
TI		 157static SOC_ENUM_SINGLE_DECL(da7213_alc_release_rate,
158 DA7213_ALC_CTRL2,
159 DA7213_ALC_RELEASE_SHIFT,
160 da7213_alc_release_rate_txt);
ef5c2eba
AT		 161
162/* ALC Hold Time select */
163static const char * const da7213_alc_hold_time_txt[] = {
164 "62/fs", "124/fs", "248/fs", "496/fs", "992/fs", "1984/fs", "3968/fs",
165 "7936/fs", "15872/fs", "31744/fs", "63488/fs", "126976/fs",
166 "253952/fs", "507904/fs", "1015808/fs", "2031616/fs"
167};
168
c99f8b21
TI		 169static SOC_ENUM_SINGLE_DECL(da7213_alc_hold_time,
170 DA7213_ALC_CTRL3,
171 DA7213_ALC_HOLD_SHIFT,
172 da7213_alc_hold_time_txt);
ef5c2eba
AT		 173
174/* ALC Input Signal Tracking rate select */
175static const char * const da7213_alc_integ_rate_txt[] = {
176 "1/4", "1/16", "1/256", "1/65536"
177};
178
c99f8b21
TI		 179static SOC_ENUM_SINGLE_DECL(da7213_alc_integ_attack_rate,
180 DA7213_ALC_CTRL3,
181 DA7213_ALC_INTEG_ATTACK_SHIFT,
182 da7213_alc_integ_rate_txt);
ef5c2eba 183
c99f8b21
TI		 184static SOC_ENUM_SINGLE_DECL(da7213_alc_integ_release_rate,
185 DA7213_ALC_CTRL3,
186 DA7213_ALC_INTEG_RELEASE_SHIFT,
187 da7213_alc_integ_rate_txt);
ef5c2eba
AT		 188
189
190/*
191 * Control Functions
192 */
193
194static int da7213_get_alc_data(struct snd_soc_codec *codec, u8 reg_val)
195{
196 int mid_data, top_data;
197 int sum = 0;
198 u8 iteration;
199
200 for (iteration = 0; iteration < DA7213_ALC_AVG_ITERATIONS;
201 iteration++) {
202 /* Select the left or right channel and capture data */
203 snd_soc_write(codec, DA7213_ALC_CIC_OP_LVL_CTRL, reg_val);
204
205 /* Select middle 8 bits for read back from data register */
206 snd_soc_write(codec, DA7213_ALC_CIC_OP_LVL_CTRL,
207 reg_val | DA7213_ALC_DATA_MIDDLE);
208 mid_data = snd_soc_read(codec, DA7213_ALC_CIC_OP_LVL_DATA);
209
210 /* Select top 8 bits for read back from data register */
211 snd_soc_write(codec, DA7213_ALC_CIC_OP_LVL_CTRL,
212 reg_val | DA7213_ALC_DATA_TOP);
213 top_data = snd_soc_read(codec, DA7213_ALC_CIC_OP_LVL_DATA);
214
215 sum += ((mid_data << 8) | (top_data << 16));
216 }
217
218 return sum / DA7213_ALC_AVG_ITERATIONS;
219}
220
221static void da7213_alc_calib_man(struct snd_soc_codec *codec)
222{
223 u8 reg_val;
224 int avg_left_data, avg_right_data, offset_l, offset_r;
225
226 /* Calculate average for Left and Right data */
227 /* Left Data */
228 avg_left_data = da7213_get_alc_data(codec,
229 DA7213_ALC_CIC_OP_CHANNEL_LEFT);
230 /* Right Data */
231 avg_right_data = da7213_get_alc_data(codec,
232 DA7213_ALC_CIC_OP_CHANNEL_RIGHT);
233
234 /* Calculate DC offset */
235 offset_l = -avg_left_data;
236 offset_r = -avg_right_data;
237
238 reg_val = (offset_l & DA7213_ALC_OFFSET_15_8) >> 8;
239 snd_soc_write(codec, DA7213_ALC_OFFSET_MAN_M_L, reg_val);
240 reg_val = (offset_l & DA7213_ALC_OFFSET_19_16) >> 16;
241 snd_soc_write(codec, DA7213_ALC_OFFSET_MAN_U_L, reg_val);
242
243 reg_val = (offset_r & DA7213_ALC_OFFSET_15_8) >> 8;
244 snd_soc_write(codec, DA7213_ALC_OFFSET_MAN_M_R, reg_val);
245 reg_val = (offset_r & DA7213_ALC_OFFSET_19_16) >> 16;
246 snd_soc_write(codec, DA7213_ALC_OFFSET_MAN_U_R, reg_val);
247
248 /* Enable analog/digital gain mode & offset cancellation */
249 snd_soc_update_bits(codec, DA7213_ALC_CTRL1,
250 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE,
251 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE);
252}
253
254static void da7213_alc_calib_auto(struct snd_soc_codec *codec)
255{
256 u8 alc_ctrl1;
257
258 /* Begin auto calibration and wait for completion */
259 snd_soc_update_bits(codec, DA7213_ALC_CTRL1, DA7213_ALC_AUTO_CALIB_EN,
260 DA7213_ALC_AUTO_CALIB_EN);
261 do {
262 alc_ctrl1 = snd_soc_read(codec, DA7213_ALC_CTRL1);
263 } while (alc_ctrl1 & DA7213_ALC_AUTO_CALIB_EN);
264
265 /* If auto calibration fails, fall back to digital gain only mode */
266 if (alc_ctrl1 & DA7213_ALC_CALIB_OVERFLOW) {
267 dev_warn(codec->dev,
268 "ALC auto calibration failed with overflow\n");
269 snd_soc_update_bits(codec, DA7213_ALC_CTRL1,
270 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE,
271 0);
272 } else {
273 /* Enable analog/digital gain mode & offset cancellation */
274 snd_soc_update_bits(codec, DA7213_ALC_CTRL1,
275 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE,
276 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE);
277 }
278
279}
280
281static void da7213_alc_calib(struct snd_soc_codec *codec)
282{
283 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
284 u8 adc_l_ctrl, adc_r_ctrl;
285 u8 mixin_l_sel, mixin_r_sel;
286 u8 mic_1_ctrl, mic_2_ctrl;
287
288 /* Save current values from ADC control registers */
289 adc_l_ctrl = snd_soc_read(codec, DA7213_ADC_L_CTRL);
290 adc_r_ctrl = snd_soc_read(codec, DA7213_ADC_R_CTRL);
291
292 /* Save current values from MIXIN_L/R_SELECT registers */
293 mixin_l_sel = snd_soc_read(codec, DA7213_MIXIN_L_SELECT);
294 mixin_r_sel = snd_soc_read(codec, DA7213_MIXIN_R_SELECT);
295
296 /* Save current values from MIC control registers */
297 mic_1_ctrl = snd_soc_read(codec, DA7213_MIC_1_CTRL);
298 mic_2_ctrl = snd_soc_read(codec, DA7213_MIC_2_CTRL);
299
300 /* Enable ADC Left and Right */
301 snd_soc_update_bits(codec, DA7213_ADC_L_CTRL, DA7213_ADC_EN,
302 DA7213_ADC_EN);
303 snd_soc_update_bits(codec, DA7213_ADC_R_CTRL, DA7213_ADC_EN,
304 DA7213_ADC_EN);
305
306 /* Enable MIC paths */
307 snd_soc_update_bits(codec, DA7213_MIXIN_L_SELECT,
308 DA7213_MIXIN_L_MIX_SELECT_MIC_1 |
309 DA7213_MIXIN_L_MIX_SELECT_MIC_2,
310 DA7213_MIXIN_L_MIX_SELECT_MIC_1 |
311 DA7213_MIXIN_L_MIX_SELECT_MIC_2);
312 snd_soc_update_bits(codec, DA7213_MIXIN_R_SELECT,
313 DA7213_MIXIN_R_MIX_SELECT_MIC_2 |
314 DA7213_MIXIN_R_MIX_SELECT_MIC_1,
315 DA7213_MIXIN_R_MIX_SELECT_MIC_2 |
316 DA7213_MIXIN_R_MIX_SELECT_MIC_1);
317
318 /* Mute MIC PGAs */
319 snd_soc_update_bits(codec, DA7213_MIC_1_CTRL, DA7213_MUTE_EN,
320 DA7213_MUTE_EN);
321 snd_soc_update_bits(codec, DA7213_MIC_2_CTRL, DA7213_MUTE_EN,
322 DA7213_MUTE_EN);
323
324 /* Perform calibration */
325 if (da7213->alc_calib_auto)
326 da7213_alc_calib_auto(codec);
327 else
328 da7213_alc_calib_man(codec);
329
330 /* Restore MIXIN_L/R_SELECT registers to their original states */
331 snd_soc_write(codec, DA7213_MIXIN_L_SELECT, mixin_l_sel);
332 snd_soc_write(codec, DA7213_MIXIN_R_SELECT, mixin_r_sel);
333
334 /* Restore ADC control registers to their original states */
335 snd_soc_write(codec, DA7213_ADC_L_CTRL, adc_l_ctrl);
336 snd_soc_write(codec, DA7213_ADC_R_CTRL, adc_r_ctrl);
337
338 /* Restore original values of MIC control registers */
339 snd_soc_write(codec, DA7213_MIC_1_CTRL, mic_1_ctrl);
340 snd_soc_write(codec, DA7213_MIC_2_CTRL, mic_2_ctrl);
341}
342
343static int da7213_put_mixin_gain(struct snd_kcontrol *kcontrol,
344 struct snd_ctl_elem_value *ucontrol)
345{
ea53bf77 346 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
ef5c2eba
AT		 347 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
348 int ret;
349
350 ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
351
352 /* If ALC in operation, make sure calibrated offsets are updated */
353 if ((!ret) && (da7213->alc_en))
354 da7213_alc_calib(codec);
355
356 return ret;
357}
358
359static int da7213_put_alc_sw(struct snd_kcontrol *kcontrol,
360 struct snd_ctl_elem_value *ucontrol)
361{
ea53bf77 362 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
ef5c2eba
AT		 363 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
364
365 /* Force ALC offset calibration if enabling ALC */
366 if (ucontrol->value.integer.value[0] ||
367 ucontrol->value.integer.value[1]) {
368 if (!da7213->alc_en) {
369 da7213_alc_calib(codec);
370 da7213->alc_en = true;
371 }
372 } else {
373 da7213->alc_en = false;
374 }
375
376 return snd_soc_put_volsw(kcontrol, ucontrol);
377}
378
379
380/*
381 * KControls
382 */
383
384static const struct snd_kcontrol_new da7213_snd_controls[] = {
385
386 /* Volume controls */
387 SOC_SINGLE_TLV("Mic 1 Volume", DA7213_MIC_1_GAIN,
388 DA7213_MIC_AMP_GAIN_SHIFT, DA7213_MIC_AMP_GAIN_MAX,
389 DA7213_NO_INVERT, mic_vol_tlv),
390 SOC_SINGLE_TLV("Mic 2 Volume", DA7213_MIC_2_GAIN,
391 DA7213_MIC_AMP_GAIN_SHIFT, DA7213_MIC_AMP_GAIN_MAX,
392 DA7213_NO_INVERT, mic_vol_tlv),
393 SOC_DOUBLE_R_TLV("Aux Volume", DA7213_AUX_L_GAIN, DA7213_AUX_R_GAIN,
394 DA7213_AUX_AMP_GAIN_SHIFT, DA7213_AUX_AMP_GAIN_MAX,
395 DA7213_NO_INVERT, aux_vol_tlv),
396 SOC_DOUBLE_R_EXT_TLV("Mixin PGA Volume", DA7213_MIXIN_L_GAIN,
397 DA7213_MIXIN_R_GAIN, DA7213_MIXIN_AMP_GAIN_SHIFT,
398 DA7213_MIXIN_AMP_GAIN_MAX, DA7213_NO_INVERT,
399 snd_soc_get_volsw_2r, da7213_put_mixin_gain,
400 mixin_gain_tlv),
401 SOC_DOUBLE_R_TLV("ADC Volume", DA7213_ADC_L_GAIN, DA7213_ADC_R_GAIN,
402 DA7213_ADC_AMP_GAIN_SHIFT, DA7213_ADC_AMP_GAIN_MAX,
403 DA7213_NO_INVERT, digital_gain_tlv),
404 SOC_DOUBLE_R_TLV("DAC Volume", DA7213_DAC_L_GAIN, DA7213_DAC_R_GAIN,
405 DA7213_DAC_AMP_GAIN_SHIFT, DA7213_DAC_AMP_GAIN_MAX,
406 DA7213_NO_INVERT, digital_gain_tlv),
407 SOC_DOUBLE_R_TLV("Headphone Volume", DA7213_HP_L_GAIN, DA7213_HP_R_GAIN,
408 DA7213_HP_AMP_GAIN_SHIFT, DA7213_HP_AMP_GAIN_MAX,
409 DA7213_NO_INVERT, hp_vol_tlv),
410 SOC_SINGLE_TLV("Lineout Volume", DA7213_LINE_GAIN,
411 DA7213_LINE_AMP_GAIN_SHIFT, DA7213_LINE_AMP_GAIN_MAX,
412 DA7213_NO_INVERT, lineout_vol_tlv),
413
414 /* DAC Equalizer controls */
415 SOC_SINGLE("DAC EQ Switch", DA7213_DAC_FILTERS4, DA7213_DAC_EQ_EN_SHIFT,
416 DA7213_DAC_EQ_EN_MAX, DA7213_NO_INVERT),
417 SOC_SINGLE_TLV("DAC EQ1 Volume", DA7213_DAC_FILTERS2,
418 DA7213_DAC_EQ_BAND1_SHIFT, DA7213_DAC_EQ_BAND_MAX,
419 DA7213_NO_INVERT, eq_gain_tlv),
420 SOC_SINGLE_TLV("DAC EQ2 Volume", DA7213_DAC_FILTERS2,
421 DA7213_DAC_EQ_BAND2_SHIFT, DA7213_DAC_EQ_BAND_MAX,
422 DA7213_NO_INVERT, eq_gain_tlv),
423 SOC_SINGLE_TLV("DAC EQ3 Volume", DA7213_DAC_FILTERS3,
424 DA7213_DAC_EQ_BAND3_SHIFT, DA7213_DAC_EQ_BAND_MAX,
425 DA7213_NO_INVERT, eq_gain_tlv),
426 SOC_SINGLE_TLV("DAC EQ4 Volume", DA7213_DAC_FILTERS3,
427 DA7213_DAC_EQ_BAND4_SHIFT, DA7213_DAC_EQ_BAND_MAX,
428 DA7213_NO_INVERT, eq_gain_tlv),
429 SOC_SINGLE_TLV("DAC EQ5 Volume", DA7213_DAC_FILTERS4,
430 DA7213_DAC_EQ_BAND5_SHIFT, DA7213_DAC_EQ_BAND_MAX,
431 DA7213_NO_INVERT, eq_gain_tlv),
432
433 /* High Pass Filter and Voice Mode controls */
434 SOC_SINGLE("ADC HPF Switch", DA7213_ADC_FILTERS1, DA7213_HPF_EN_SHIFT,
435 DA7213_HPF_EN_MAX, DA7213_NO_INVERT),
436 SOC_ENUM("ADC HPF Cutoff", da7213_adc_audio_hpf_corner),
437 SOC_SINGLE("ADC Voice Mode Switch", DA7213_ADC_FILTERS1,
438 DA7213_VOICE_EN_SHIFT, DA7213_VOICE_EN_MAX,
439 DA7213_NO_INVERT),
440 SOC_ENUM("ADC Voice Cutoff", da7213_adc_voice_hpf_corner),
441
442 SOC_SINGLE("DAC HPF Switch", DA7213_DAC_FILTERS1, DA7213_HPF_EN_SHIFT,
443 DA7213_HPF_EN_MAX, DA7213_NO_INVERT),
444 SOC_ENUM("DAC HPF Cutoff", da7213_dac_audio_hpf_corner),
445 SOC_SINGLE("DAC Voice Mode Switch", DA7213_DAC_FILTERS1,
446 DA7213_VOICE_EN_SHIFT, DA7213_VOICE_EN_MAX,
447 DA7213_NO_INVERT),
448 SOC_ENUM("DAC Voice Cutoff", da7213_dac_voice_hpf_corner),
449
450 /* Mute controls */
451 SOC_SINGLE("Mic 1 Switch", DA7213_MIC_1_CTRL, DA7213_MUTE_EN_SHIFT,
452 DA7213_MUTE_EN_MAX, DA7213_INVERT),
453 SOC_SINGLE("Mic 2 Switch", DA7213_MIC_2_CTRL, DA7213_MUTE_EN_SHIFT,
454 DA7213_MUTE_EN_MAX, DA7213_INVERT),
455 SOC_DOUBLE_R("Aux Switch", DA7213_AUX_L_CTRL, DA7213_AUX_R_CTRL,
456 DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT),
457 SOC_DOUBLE_R("Mixin PGA Switch", DA7213_MIXIN_L_CTRL,
458 DA7213_MIXIN_R_CTRL, DA7213_MUTE_EN_SHIFT,
459 DA7213_MUTE_EN_MAX, DA7213_INVERT),
460 SOC_DOUBLE_R("ADC Switch", DA7213_ADC_L_CTRL, DA7213_ADC_R_CTRL,
461 DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT),
462 SOC_DOUBLE_R("Headphone Switch", DA7213_HP_L_CTRL, DA7213_HP_R_CTRL,
463 DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT),
464 SOC_SINGLE("Lineout Switch", DA7213_LINE_CTRL, DA7213_MUTE_EN_SHIFT,
465 DA7213_MUTE_EN_MAX, DA7213_INVERT),
466 SOC_SINGLE("DAC Soft Mute Switch", DA7213_DAC_FILTERS5,
467 DA7213_DAC_SOFTMUTE_EN_SHIFT, DA7213_DAC_SOFTMUTE_EN_MAX,
468 DA7213_NO_INVERT),
469 SOC_ENUM("DAC Soft Mute Rate", da7213_dac_soft_mute_rate),
470
471 /* Zero Cross controls */
472 SOC_DOUBLE_R("Aux ZC Switch", DA7213_AUX_L_CTRL, DA7213_AUX_R_CTRL,
473 DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, DA7213_NO_INVERT),
474 SOC_DOUBLE_R("Mixin PGA ZC Switch", DA7213_MIXIN_L_CTRL,
475 DA7213_MIXIN_R_CTRL, DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX,
476 DA7213_NO_INVERT),
477 SOC_DOUBLE_R("Headphone ZC Switch", DA7213_HP_L_CTRL, DA7213_HP_R_CTRL,
478 DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, DA7213_NO_INVERT),
479
480 /* Gain Ramping controls */
481 SOC_DOUBLE_R("Aux Gain Ramping Switch", DA7213_AUX_L_CTRL,
482 DA7213_AUX_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
483 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
484 SOC_DOUBLE_R("Mixin Gain Ramping Switch", DA7213_MIXIN_L_CTRL,
485 DA7213_MIXIN_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
486 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
487 SOC_DOUBLE_R("ADC Gain Ramping Switch", DA7213_ADC_L_CTRL,
488 DA7213_ADC_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
489 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
490 SOC_DOUBLE_R("DAC Gain Ramping Switch", DA7213_DAC_L_CTRL,
491 DA7213_DAC_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
492 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
493 SOC_DOUBLE_R("Headphone Gain Ramping Switch", DA7213_HP_L_CTRL,
494 DA7213_HP_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
495 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
496 SOC_SINGLE("Lineout Gain Ramping Switch", DA7213_LINE_CTRL,
497 DA7213_GAIN_RAMP_EN_SHIFT, DA7213_GAIN_RAMP_EN_MAX,
498 DA7213_NO_INVERT),
499 SOC_ENUM("Gain Ramping Rate", da7213_gain_ramp_rate),
500
501 /* DAC Noise Gate controls */
502 SOC_SINGLE("DAC NG Switch", DA7213_DAC_NG_CTRL, DA7213_DAC_NG_EN_SHIFT,
503 DA7213_DAC_NG_EN_MAX, DA7213_NO_INVERT),
504 SOC_ENUM("DAC NG Setup Time", da7213_dac_ng_setup_time),
505 SOC_ENUM("DAC NG Rampup Rate", da7213_dac_ng_rampup_rate),
506 SOC_ENUM("DAC NG Rampdown Rate", da7213_dac_ng_rampdown_rate),
507 SOC_SINGLE("DAC NG OFF Threshold", DA7213_DAC_NG_OFF_THRESHOLD,
508 DA7213_DAC_NG_THRESHOLD_SHIFT, DA7213_DAC_NG_THRESHOLD_MAX,
509 DA7213_NO_INVERT),
510 SOC_SINGLE("DAC NG ON Threshold", DA7213_DAC_NG_ON_THRESHOLD,
511 DA7213_DAC_NG_THRESHOLD_SHIFT, DA7213_DAC_NG_THRESHOLD_MAX,
512 DA7213_NO_INVERT),
513
514 /* DAC Routing & Inversion */
515 SOC_DOUBLE("DAC Mono Switch", DA7213_DIG_ROUTING_DAC,
516 DA7213_DAC_L_MONO_SHIFT, DA7213_DAC_R_MONO_SHIFT,
517 DA7213_DAC_MONO_MAX, DA7213_NO_INVERT),
518 SOC_DOUBLE("DAC Invert Switch", DA7213_DIG_CTRL, DA7213_DAC_L_INV_SHIFT,
519 DA7213_DAC_R_INV_SHIFT, DA7213_DAC_INV_MAX,
520 DA7213_NO_INVERT),
521
522 /* DMIC controls */
523 SOC_DOUBLE_R("DMIC Switch", DA7213_MIXIN_L_SELECT,
524 DA7213_MIXIN_R_SELECT, DA7213_DMIC_EN_SHIFT,
525 DA7213_DMIC_EN_MAX, DA7213_NO_INVERT),
526
527 /* ALC Controls */
528 SOC_DOUBLE_EXT("ALC Switch", DA7213_ALC_CTRL1, DA7213_ALC_L_EN_SHIFT,
529 DA7213_ALC_R_EN_SHIFT, DA7213_ALC_EN_MAX,
530 DA7213_NO_INVERT, snd_soc_get_volsw, da7213_put_alc_sw),
531 SOC_ENUM("ALC Attack Rate", da7213_alc_attack_rate),
532 SOC_ENUM("ALC Release Rate", da7213_alc_release_rate),
533 SOC_ENUM("ALC Hold Time", da7213_alc_hold_time),
534 /*
535 * Rate at which input signal envelope is tracked as the signal gets
536 * larger
537 */
538 SOC_ENUM("ALC Integ Attack Rate", da7213_alc_integ_attack_rate),
539 /*
540 * Rate at which input signal envelope is tracked as the signal gets
541 * smaller
542 */
543 SOC_ENUM("ALC Integ Release Rate", da7213_alc_integ_release_rate),
544 SOC_SINGLE_TLV("ALC Noise Threshold Volume", DA7213_ALC_NOISE,
545 DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX,
546 DA7213_INVERT, alc_threshold_tlv),
547 SOC_SINGLE_TLV("ALC Min Threshold Volume", DA7213_ALC_TARGET_MIN,
548 DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX,
549 DA7213_INVERT, alc_threshold_tlv),
550 SOC_SINGLE_TLV("ALC Max Threshold Volume", DA7213_ALC_TARGET_MAX,
551 DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX,
552 DA7213_INVERT, alc_threshold_tlv),
553 SOC_SINGLE_TLV("ALC Max Attenuation Volume", DA7213_ALC_GAIN_LIMITS,
554 DA7213_ALC_ATTEN_MAX_SHIFT,
555 DA7213_ALC_ATTEN_GAIN_MAX_MAX, DA7213_NO_INVERT,
556 alc_gain_tlv),
557 SOC_SINGLE_TLV("ALC Max Gain Volume", DA7213_ALC_GAIN_LIMITS,
558 DA7213_ALC_GAIN_MAX_SHIFT, DA7213_ALC_ATTEN_GAIN_MAX_MAX,
559 DA7213_NO_INVERT, alc_gain_tlv),
560 SOC_SINGLE_TLV("ALC Min Analog Gain Volume", DA7213_ALC_ANA_GAIN_LIMITS,
561 DA7213_ALC_ANA_GAIN_MIN_SHIFT, DA7213_ALC_ANA_GAIN_MAX,
562 DA7213_NO_INVERT, alc_analog_gain_tlv),
563 SOC_SINGLE_TLV("ALC Max Analog Gain Volume", DA7213_ALC_ANA_GAIN_LIMITS,
564 DA7213_ALC_ANA_GAIN_MAX_SHIFT, DA7213_ALC_ANA_GAIN_MAX,
565 DA7213_NO_INVERT, alc_analog_gain_tlv),
566 SOC_SINGLE("ALC Anticlip Mode Switch", DA7213_ALC_ANTICLIP_CTRL,
567 DA7213_ALC_ANTICLIP_EN_SHIFT, DA7213_ALC_ANTICLIP_EN_MAX,
568 DA7213_NO_INVERT),
569 SOC_SINGLE("ALC Anticlip Level", DA7213_ALC_ANTICLIP_LEVEL,
570 DA7213_ALC_ANTICLIP_LEVEL_SHIFT,
571 DA7213_ALC_ANTICLIP_LEVEL_MAX, DA7213_NO_INVERT),
572};
573
574
575/*
576 * DAPM
577 */
578
579/*
580 * Enums
581 */
582
583/* MIC PGA source select */
584static const char * const da7213_mic_amp_in_sel_txt[] = {
585 "Differential", "MIC_P", "MIC_N"
586};
587
c99f8b21
TI		 588static SOC_ENUM_SINGLE_DECL(da7213_mic_1_amp_in_sel,
589 DA7213_MIC_1_CTRL,
590 DA7213_MIC_AMP_IN_SEL_SHIFT,
591 da7213_mic_amp_in_sel_txt);
ef5c2eba
AT		 592static const struct snd_kcontrol_new da7213_mic_1_amp_in_sel_mux =
593 SOC_DAPM_ENUM("Mic 1 Amp Source MUX", da7213_mic_1_amp_in_sel);
594
c99f8b21
TI		 595static SOC_ENUM_SINGLE_DECL(da7213_mic_2_amp_in_sel,
596 DA7213_MIC_2_CTRL,
597 DA7213_MIC_AMP_IN_SEL_SHIFT,
598 da7213_mic_amp_in_sel_txt);
ef5c2eba
AT		 599static const struct snd_kcontrol_new da7213_mic_2_amp_in_sel_mux =
600 SOC_DAPM_ENUM("Mic 2 Amp Source MUX", da7213_mic_2_amp_in_sel);
601
602/* DAI routing select */
603static const char * const da7213_dai_src_txt[] = {
604 "ADC Left", "ADC Right", "DAI Input Left", "DAI Input Right"
605};
606
c99f8b21
TI		 607static SOC_ENUM_SINGLE_DECL(da7213_dai_l_src,
608 DA7213_DIG_ROUTING_DAI,
609 DA7213_DAI_L_SRC_SHIFT,
610 da7213_dai_src_txt);
ef5c2eba
AT		 611static const struct snd_kcontrol_new da7213_dai_l_src_mux =
612 SOC_DAPM_ENUM("DAI Left Source MUX", da7213_dai_l_src);
613
c99f8b21
TI		 614static SOC_ENUM_SINGLE_DECL(da7213_dai_r_src,
615 DA7213_DIG_ROUTING_DAI,
616 DA7213_DAI_R_SRC_SHIFT,
617 da7213_dai_src_txt);
ef5c2eba
AT		 618static const struct snd_kcontrol_new da7213_dai_r_src_mux =
619 SOC_DAPM_ENUM("DAI Right Source MUX", da7213_dai_r_src);
620
621/* DAC routing select */
622static const char * const da7213_dac_src_txt[] = {
623 "ADC Output Left", "ADC Output Right", "DAI Input Left",
624 "DAI Input Right"
625};
626
c99f8b21
TI		 627static SOC_ENUM_SINGLE_DECL(da7213_dac_l_src,
628 DA7213_DIG_ROUTING_DAC,
629 DA7213_DAC_L_SRC_SHIFT,
630 da7213_dac_src_txt);
ef5c2eba
AT		 631static const struct snd_kcontrol_new da7213_dac_l_src_mux =
632 SOC_DAPM_ENUM("DAC Left Source MUX", da7213_dac_l_src);
633
c99f8b21
TI		 634static SOC_ENUM_SINGLE_DECL(da7213_dac_r_src,
635 DA7213_DIG_ROUTING_DAC,
636 DA7213_DAC_R_SRC_SHIFT,
637 da7213_dac_src_txt);
ef5c2eba
AT		 638static const struct snd_kcontrol_new da7213_dac_r_src_mux =
639 SOC_DAPM_ENUM("DAC Right Source MUX", da7213_dac_r_src);
640
641/*
642 * Mixer Controls
643 */
644
645/* Mixin Left */
646static const struct snd_kcontrol_new da7213_dapm_mixinl_controls[] = {
647 SOC_DAPM_SINGLE("Aux Left Switch", DA7213_MIXIN_L_SELECT,
648 DA7213_MIXIN_L_MIX_SELECT_AUX_L_SHIFT,
649 DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
650 SOC_DAPM_SINGLE("Mic 1 Switch", DA7213_MIXIN_L_SELECT,
651 DA7213_MIXIN_L_MIX_SELECT_MIC_1_SHIFT,
652 DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
653 SOC_DAPM_SINGLE("Mic 2 Switch", DA7213_MIXIN_L_SELECT,
654 DA7213_MIXIN_L_MIX_SELECT_MIC_2_SHIFT,
655 DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
656 SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXIN_L_SELECT,
657 DA7213_MIXIN_L_MIX_SELECT_MIXIN_R_SHIFT,
658 DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
659};
660
661/* Mixin Right */
662static const struct snd_kcontrol_new da7213_dapm_mixinr_controls[] = {
663 SOC_DAPM_SINGLE("Aux Right Switch", DA7213_MIXIN_R_SELECT,
664 DA7213_MIXIN_R_MIX_SELECT_AUX_R_SHIFT,
665 DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
666 SOC_DAPM_SINGLE("Mic 2 Switch", DA7213_MIXIN_R_SELECT,
667 DA7213_MIXIN_R_MIX_SELECT_MIC_2_SHIFT,
668 DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
669 SOC_DAPM_SINGLE("Mic 1 Switch", DA7213_MIXIN_R_SELECT,
670 DA7213_MIXIN_R_MIX_SELECT_MIC_1_SHIFT,
671 DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
672 SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXIN_R_SELECT,
673 DA7213_MIXIN_R_MIX_SELECT_MIXIN_L_SHIFT,
674 DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
675};
676
677/* Mixout Left */
678static const struct snd_kcontrol_new da7213_dapm_mixoutl_controls[] = {
679 SOC_DAPM_SINGLE("Aux Left Switch", DA7213_MIXOUT_L_SELECT,
680 DA7213_MIXOUT_L_MIX_SELECT_AUX_L_SHIFT,
681 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
682 SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXOUT_L_SELECT,
683 DA7213_MIXOUT_L_MIX_SELECT_MIXIN_L_SHIFT,
684 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
685 SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXOUT_L_SELECT,
686 DA7213_MIXOUT_L_MIX_SELECT_MIXIN_R_SHIFT,
687 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
688 SOC_DAPM_SINGLE("DAC Left Switch", DA7213_MIXOUT_L_SELECT,
689 DA7213_MIXOUT_L_MIX_SELECT_DAC_L_SHIFT,
690 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
691 SOC_DAPM_SINGLE("Aux Left Invert Switch", DA7213_MIXOUT_L_SELECT,
692 DA7213_MIXOUT_L_MIX_SELECT_AUX_L_INVERTED_SHIFT,
693 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
694 SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA7213_MIXOUT_L_SELECT,
695 DA7213_MIXOUT_L_MIX_SELECT_MIXIN_L_INVERTED_SHIFT,
696 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
697 SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA7213_MIXOUT_L_SELECT,
698 DA7213_MIXOUT_L_MIX_SELECT_MIXIN_R_INVERTED_SHIFT,
699 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
700};
701
702/* Mixout Right */
703static const struct snd_kcontrol_new da7213_dapm_mixoutr_controls[] = {
704 SOC_DAPM_SINGLE("Aux Right Switch", DA7213_MIXOUT_R_SELECT,
705 DA7213_MIXOUT_R_MIX_SELECT_AUX_R_SHIFT,
706 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
707 SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXOUT_R_SELECT,
708 DA7213_MIXOUT_R_MIX_SELECT_MIXIN_R_SHIFT,
709 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
710 SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXOUT_R_SELECT,
711 DA7213_MIXOUT_R_MIX_SELECT_MIXIN_L_SHIFT,
712 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
713 SOC_DAPM_SINGLE("DAC Right Switch", DA7213_MIXOUT_R_SELECT,
714 DA7213_MIXOUT_R_MIX_SELECT_DAC_R_SHIFT,
715 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
716 SOC_DAPM_SINGLE("Aux Right Invert Switch", DA7213_MIXOUT_R_SELECT,
717 DA7213_MIXOUT_R_MIX_SELECT_AUX_R_INVERTED_SHIFT,
718 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
719 SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA7213_MIXOUT_R_SELECT,
720 DA7213_MIXOUT_R_MIX_SELECT_MIXIN_R_INVERTED_SHIFT,
721 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
722 SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA7213_MIXOUT_R_SELECT,
723 DA7213_MIXOUT_R_MIX_SELECT_MIXIN_L_INVERTED_SHIFT,
724 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
725};
726
727
a0d5caea
AT		 728/*
729 * DAPM Events
730 */
731
732static int da7213_dai_event(struct snd_soc_dapm_widget *w,
733 struct snd_kcontrol *kcontrol, int event)
734{
735 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
736 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
d575b0b0
AT		 737 u8 pll_ctrl, pll_status;
738 int i = 0;
739 bool srm_lock = false;
a0d5caea
AT		 740
741 switch (event) {
742 case SND_SOC_DAPM_PRE_PMU:
743 /* Enable DAI clks for master mode */
744 if (da7213->master)
745 snd_soc_update_bits(codec, DA7213_DAI_CLK_MODE,
746 DA7213_DAI_CLK_EN_MASK,
747 DA7213_DAI_CLK_EN_MASK);
d575b0b0 748
7e28fd46
AT		 749 /* PC synchronised to DAI */
750 snd_soc_update_bits(codec, DA7213_PC_COUNT,
751 DA7213_PC_FREERUN_MASK, 0);
752
d936d527 753 /* If SRM not enabled then nothing more to do */
d575b0b0
AT		 754 pll_ctrl = snd_soc_read(codec, DA7213_PLL_CTRL);
755 if (!(pll_ctrl & DA7213_PLL_SRM_EN))
756 return 0;
757
d936d527
AT		 758 /* Assist 32KHz mode PLL lock */
759 if (pll_ctrl & DA7213_PLL_32K_MODE) {
760 snd_soc_write(codec, 0xF0, 0x8B);
761 snd_soc_write(codec, 0xF2, 0x03);
762 snd_soc_write(codec, 0xF0, 0x00);
763 }
764
d575b0b0
AT		 765 /* Check SRM has locked */
766 do {
767 pll_status = snd_soc_read(codec, DA7213_PLL_STATUS);
768 if (pll_status & DA7219_PLL_SRM_LOCK) {
769 srm_lock = true;
770 } else {
771 ++i;
772 msleep(50);
773 }
774 } while ((i < DA7213_SRM_CHECK_RETRIES) & (!srm_lock));
775
776 if (!srm_lock)
777 dev_warn(codec->dev, "SRM failed to lock\n");
778
a0d5caea
AT		 779 return 0;
780 case SND_SOC_DAPM_POST_PMD:
d936d527
AT		 781 /* Revert 32KHz PLL lock udpates if applied previously */
782 pll_ctrl = snd_soc_read(codec, DA7213_PLL_CTRL);
783 if (pll_ctrl & DA7213_PLL_32K_MODE) {
784 snd_soc_write(codec, 0xF0, 0x8B);
785 snd_soc_write(codec, 0xF2, 0x01);
786 snd_soc_write(codec, 0xF0, 0x00);
787 }
788
7e28fd46
AT		 789 /* PC free-running */
790 snd_soc_update_bits(codec, DA7213_PC_COUNT,
791 DA7213_PC_FREERUN_MASK,
792 DA7213_PC_FREERUN_MASK);
793
a0d5caea
AT		 794 /* Disable DAI clks if in master mode */
795 if (da7213->master)
796 snd_soc_update_bits(codec, DA7213_DAI_CLK_MODE,
797 DA7213_DAI_CLK_EN_MASK, 0);
798 return 0;
799 default:
800 return -EINVAL;
801 }
802}
803
804
ef5c2eba
AT		 805/*
806 * DAPM widgets
807 */
808
809static const struct snd_soc_dapm_widget da7213_dapm_widgets[] = {
810 /*
811 * Input & Output
812 */
813
814 /* Use a supply here as this controls both input & output DAIs */
815 SND_SOC_DAPM_SUPPLY("DAI", DA7213_DAI_CTRL, DA7213_DAI_EN_SHIFT,
a0d5caea
AT		 816 DA7213_NO_INVERT, da7213_dai_event,
817 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
ef5c2eba
AT		 818
819 /*
820 * Input
821 */
822
823 /* Input Lines */
824 SND_SOC_DAPM_INPUT("MIC1"),
825 SND_SOC_DAPM_INPUT("MIC2"),
826 SND_SOC_DAPM_INPUT("AUXL"),
827 SND_SOC_DAPM_INPUT("AUXR"),
828
829 /* MUXs for Mic PGA source selection */
830 SND_SOC_DAPM_MUX("Mic 1 Amp Source MUX", SND_SOC_NOPM, 0, 0,
831 &da7213_mic_1_amp_in_sel_mux),
832 SND_SOC_DAPM_MUX("Mic 2 Amp Source MUX", SND_SOC_NOPM, 0, 0,
833 &da7213_mic_2_amp_in_sel_mux),
834
835 /* Input PGAs */
836 SND_SOC_DAPM_PGA("Mic 1 PGA", DA7213_MIC_1_CTRL, DA7213_AMP_EN_SHIFT,
837 DA7213_NO_INVERT, NULL, 0),
838 SND_SOC_DAPM_PGA("Mic 2 PGA", DA7213_MIC_2_CTRL, DA7213_AMP_EN_SHIFT,
839 DA7213_NO_INVERT, NULL, 0),
840 SND_SOC_DAPM_PGA("Aux Left PGA", DA7213_AUX_L_CTRL, DA7213_AMP_EN_SHIFT,
841 DA7213_NO_INVERT, NULL, 0),
842 SND_SOC_DAPM_PGA("Aux Right PGA", DA7213_AUX_R_CTRL,
843 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
844 SND_SOC_DAPM_PGA("Mixin Left PGA", DA7213_MIXIN_L_CTRL,
845 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
846 SND_SOC_DAPM_PGA("Mixin Right PGA", DA7213_MIXIN_R_CTRL,
847 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
848
849 /* Mic Biases */
850 SND_SOC_DAPM_SUPPLY("Mic Bias 1", DA7213_MICBIAS_CTRL,
851 DA7213_MICBIAS1_EN_SHIFT, DA7213_NO_INVERT,
852 NULL, 0),
853 SND_SOC_DAPM_SUPPLY("Mic Bias 2", DA7213_MICBIAS_CTRL,
854 DA7213_MICBIAS2_EN_SHIFT, DA7213_NO_INVERT,
855 NULL, 0),
856
857 /* Input Mixers */
858 SND_SOC_DAPM_MIXER("Mixin Left", SND_SOC_NOPM, 0, 0,
859 &da7213_dapm_mixinl_controls[0],
860 ARRAY_SIZE(da7213_dapm_mixinl_controls)),
861 SND_SOC_DAPM_MIXER("Mixin Right", SND_SOC_NOPM, 0, 0,
862 &da7213_dapm_mixinr_controls[0],
863 ARRAY_SIZE(da7213_dapm_mixinr_controls)),
864
865 /* ADCs */
866 SND_SOC_DAPM_ADC("ADC Left", NULL, DA7213_ADC_L_CTRL,
867 DA7213_ADC_EN_SHIFT, DA7213_NO_INVERT),
868 SND_SOC_DAPM_ADC("ADC Right", NULL, DA7213_ADC_R_CTRL,
869 DA7213_ADC_EN_SHIFT, DA7213_NO_INVERT),
870
871 /* DAI */
872 SND_SOC_DAPM_MUX("DAI Left Source MUX", SND_SOC_NOPM, 0, 0,
873 &da7213_dai_l_src_mux),
874 SND_SOC_DAPM_MUX("DAI Right Source MUX", SND_SOC_NOPM, 0, 0,
875 &da7213_dai_r_src_mux),
876 SND_SOC_DAPM_AIF_OUT("DAIOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0),
877 SND_SOC_DAPM_AIF_OUT("DAIOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0),
878
879 /*
880 * Output
881 */
882
883 /* DAI */
884 SND_SOC_DAPM_AIF_IN("DAIINL", "Playback", 0, SND_SOC_NOPM, 0, 0),
885 SND_SOC_DAPM_AIF_IN("DAIINR", "Playback", 1, SND_SOC_NOPM, 0, 0),
886 SND_SOC_DAPM_MUX("DAC Left Source MUX", SND_SOC_NOPM, 0, 0,
887 &da7213_dac_l_src_mux),
888 SND_SOC_DAPM_MUX("DAC Right Source MUX", SND_SOC_NOPM, 0, 0,
889 &da7213_dac_r_src_mux),
890
891 /* DACs */
892 SND_SOC_DAPM_DAC("DAC Left", NULL, DA7213_DAC_L_CTRL,
893 DA7213_DAC_EN_SHIFT, DA7213_NO_INVERT),
894 SND_SOC_DAPM_DAC("DAC Right", NULL, DA7213_DAC_R_CTRL,
895 DA7213_DAC_EN_SHIFT, DA7213_NO_INVERT),
896
897 /* Output Mixers */
898 SND_SOC_DAPM_MIXER("Mixout Left", SND_SOC_NOPM, 0, 0,
899 &da7213_dapm_mixoutl_controls[0],
900 ARRAY_SIZE(da7213_dapm_mixoutl_controls)),
901 SND_SOC_DAPM_MIXER("Mixout Right", SND_SOC_NOPM, 0, 0,
902 &da7213_dapm_mixoutr_controls[0],
903 ARRAY_SIZE(da7213_dapm_mixoutr_controls)),
904
905 /* Output PGAs */
906 SND_SOC_DAPM_PGA("Mixout Left PGA", DA7213_MIXOUT_L_CTRL,
907 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
908 SND_SOC_DAPM_PGA("Mixout Right PGA", DA7213_MIXOUT_R_CTRL,
909 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
910 SND_SOC_DAPM_PGA("Lineout PGA", DA7213_LINE_CTRL, DA7213_AMP_EN_SHIFT,
911 DA7213_NO_INVERT, NULL, 0),
912 SND_SOC_DAPM_PGA("Headphone Left PGA", DA7213_HP_L_CTRL,
913 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
914 SND_SOC_DAPM_PGA("Headphone Right PGA", DA7213_HP_R_CTRL,
915 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
916
917 /* Charge Pump */
918 SND_SOC_DAPM_SUPPLY("Charge Pump", DA7213_CP_CTRL, DA7213_CP_EN_SHIFT,
919 DA7213_NO_INVERT, NULL, 0),
920
921 /* Output Lines */
922 SND_SOC_DAPM_OUTPUT("HPL"),
923 SND_SOC_DAPM_OUTPUT("HPR"),
924 SND_SOC_DAPM_OUTPUT("LINE"),
925};
926
927
928/*
929 * DAPM audio route definition
930 */
931
932static const struct snd_soc_dapm_route da7213_audio_map[] = {
933 /* Dest Connecting Widget source */
934
935 /* Input path */
936 {"MIC1", NULL, "Mic Bias 1"},
937 {"MIC2", NULL, "Mic Bias 2"},
938
939 {"Mic 1 Amp Source MUX", "Differential", "MIC1"},
940 {"Mic 1 Amp Source MUX", "MIC_P", "MIC1"},
941 {"Mic 1 Amp Source MUX", "MIC_N", "MIC1"},
942
943 {"Mic 2 Amp Source MUX", "Differential", "MIC2"},
944 {"Mic 2 Amp Source MUX", "MIC_P", "MIC2"},
945 {"Mic 2 Amp Source MUX", "MIC_N", "MIC2"},
946
947 {"Mic 1 PGA", NULL, "Mic 1 Amp Source MUX"},
948 {"Mic 2 PGA", NULL, "Mic 2 Amp Source MUX"},
949
950 {"Aux Left PGA", NULL, "AUXL"},
951 {"Aux Right PGA", NULL, "AUXR"},
952
953 {"Mixin Left", "Aux Left Switch", "Aux Left PGA"},
954 {"Mixin Left", "Mic 1 Switch", "Mic 1 PGA"},
955 {"Mixin Left", "Mic 2 Switch", "Mic 2 PGA"},
956 {"Mixin Left", "Mixin Right Switch", "Mixin Right PGA"},
957
958 {"Mixin Right", "Aux Right Switch", "Aux Right PGA"},
959 {"Mixin Right", "Mic 2 Switch", "Mic 2 PGA"},
960 {"Mixin Right", "Mic 1 Switch", "Mic 1 PGA"},
961 {"Mixin Right", "Mixin Left Switch", "Mixin Left PGA"},
962
963 {"Mixin Left PGA", NULL, "Mixin Left"},
964 {"ADC Left", NULL, "Mixin Left PGA"},
965
966 {"Mixin Right PGA", NULL, "Mixin Right"},
967 {"ADC Right", NULL, "Mixin Right PGA"},
968
969 {"DAI Left Source MUX", "ADC Left", "ADC Left"},
970 {"DAI Left Source MUX", "ADC Right", "ADC Right"},
971 {"DAI Left Source MUX", "DAI Input Left", "DAIINL"},
972 {"DAI Left Source MUX", "DAI Input Right", "DAIINR"},
973
974 {"DAI Right Source MUX", "ADC Left", "ADC Left"},
975 {"DAI Right Source MUX", "ADC Right", "ADC Right"},
976 {"DAI Right Source MUX", "DAI Input Left", "DAIINL"},
977 {"DAI Right Source MUX", "DAI Input Right", "DAIINR"},
978
979 {"DAIOUTL", NULL, "DAI Left Source MUX"},
980 {"DAIOUTR", NULL, "DAI Right Source MUX"},
981
982 {"DAIOUTL", NULL, "DAI"},
983 {"DAIOUTR", NULL, "DAI"},
984
985 /* Output path */
986 {"DAIINL", NULL, "DAI"},
987 {"DAIINR", NULL, "DAI"},
988
989 {"DAC Left Source MUX", "ADC Output Left", "ADC Left"},
990 {"DAC Left Source MUX", "ADC Output Right", "ADC Right"},
991 {"DAC Left Source MUX", "DAI Input Left", "DAIINL"},
992 {"DAC Left Source MUX", "DAI Input Right", "DAIINR"},
993
994 {"DAC Right Source MUX", "ADC Output Left", "ADC Left"},
995 {"DAC Right Source MUX", "ADC Output Right", "ADC Right"},
996 {"DAC Right Source MUX", "DAI Input Left", "DAIINL"},
997 {"DAC Right Source MUX", "DAI Input Right", "DAIINR"},
998
999 {"DAC Left", NULL, "DAC Left Source MUX"},
1000 {"DAC Right", NULL, "DAC Right Source MUX"},
1001
1002 {"Mixout Left", "Aux Left Switch", "Aux Left PGA"},
1003 {"Mixout Left", "Mixin Left Switch", "Mixin Left PGA"},
1004 {"Mixout Left", "Mixin Right Switch", "Mixin Right PGA"},
1005 {"Mixout Left", "DAC Left Switch", "DAC Left"},
1006 {"Mixout Left", "Aux Left Invert Switch", "Aux Left PGA"},
1007 {"Mixout Left", "Mixin Left Invert Switch", "Mixin Left PGA"},
1008 {"Mixout Left", "Mixin Right Invert Switch", "Mixin Right PGA"},
1009
1010 {"Mixout Right", "Aux Right Switch", "Aux Right PGA"},
1011 {"Mixout Right", "Mixin Right Switch", "Mixin Right PGA"},
1012 {"Mixout Right", "Mixin Left Switch", "Mixin Left PGA"},
1013 {"Mixout Right", "DAC Right Switch", "DAC Right"},
1014 {"Mixout Right", "Aux Right Invert Switch", "Aux Right PGA"},
1015 {"Mixout Right", "Mixin Right Invert Switch", "Mixin Right PGA"},
1016 {"Mixout Right", "Mixin Left Invert Switch", "Mixin Left PGA"},
1017
1018 {"Mixout Left PGA", NULL, "Mixout Left"},
1019 {"Mixout Right PGA", NULL, "Mixout Right"},
1020
1021 {"Headphone Left PGA", NULL, "Mixout Left PGA"},
1022 {"Headphone Left PGA", NULL, "Charge Pump"},
1023 {"HPL", NULL, "Headphone Left PGA"},
1024
1025 {"Headphone Right PGA", NULL, "Mixout Right PGA"},
1026 {"Headphone Right PGA", NULL, "Charge Pump"},
1027 {"HPR", NULL, "Headphone Right PGA"},
1028
1029 {"Lineout PGA", NULL, "Mixout Right PGA"},
1030 {"LINE", NULL, "Lineout PGA"},
1031};
1032
c418a84a 1033static const struct reg_default da7213_reg_defaults[] = {
ef5c2eba
AT		 1034 { DA7213_DIG_ROUTING_DAI, 0x10 },
1035 { DA7213_SR, 0x0A },
1036 { DA7213_REFERENCES, 0x80 },
1037 { DA7213_PLL_FRAC_TOP, 0x00 },
1038 { DA7213_PLL_FRAC_BOT, 0x00 },
1039 { DA7213_PLL_INTEGER, 0x20 },
1040 { DA7213_PLL_CTRL, 0x0C },
1041 { DA7213_DAI_CLK_MODE, 0x01 },
1042 { DA7213_DAI_CTRL, 0x08 },
1043 { DA7213_DIG_ROUTING_DAC, 0x32 },
1044 { DA7213_AUX_L_GAIN, 0x35 },
1045 { DA7213_AUX_R_GAIN, 0x35 },
1046 { DA7213_MIXIN_L_SELECT, 0x00 },
1047 { DA7213_MIXIN_R_SELECT, 0x00 },
1048 { DA7213_MIXIN_L_GAIN, 0x03 },
1049 { DA7213_MIXIN_R_GAIN, 0x03 },
1050 { DA7213_ADC_L_GAIN, 0x6F },
1051 { DA7213_ADC_R_GAIN, 0x6F },
1052 { DA7213_ADC_FILTERS1, 0x80 },
1053 { DA7213_MIC_1_GAIN, 0x01 },
1054 { DA7213_MIC_2_GAIN, 0x01 },
1055 { DA7213_DAC_FILTERS5, 0x00 },
1056 { DA7213_DAC_FILTERS2, 0x88 },
1057 { DA7213_DAC_FILTERS3, 0x88 },
1058 { DA7213_DAC_FILTERS4, 0x08 },
1059 { DA7213_DAC_FILTERS1, 0x80 },
1060 { DA7213_DAC_L_GAIN, 0x6F },
1061 { DA7213_DAC_R_GAIN, 0x6F },
1062 { DA7213_CP_CTRL, 0x61 },
1063 { DA7213_HP_L_GAIN, 0x39 },
1064 { DA7213_HP_R_GAIN, 0x39 },
1065 { DA7213_LINE_GAIN, 0x30 },
1066 { DA7213_MIXOUT_L_SELECT, 0x00 },
1067 { DA7213_MIXOUT_R_SELECT, 0x00 },
1068 { DA7213_SYSTEM_MODES_INPUT, 0x00 },
1069 { DA7213_SYSTEM_MODES_OUTPUT, 0x00 },
1070 { DA7213_AUX_L_CTRL, 0x44 },
1071 { DA7213_AUX_R_CTRL, 0x44 },
1072 { DA7213_MICBIAS_CTRL, 0x11 },
1073 { DA7213_MIC_1_CTRL, 0x40 },
1074 { DA7213_MIC_2_CTRL, 0x40 },
1075 { DA7213_MIXIN_L_CTRL, 0x40 },
1076 { DA7213_MIXIN_R_CTRL, 0x40 },
1077 { DA7213_ADC_L_CTRL, 0x40 },
1078 { DA7213_ADC_R_CTRL, 0x40 },
1079 { DA7213_DAC_L_CTRL, 0x48 },
1080 { DA7213_DAC_R_CTRL, 0x40 },
1081 { DA7213_HP_L_CTRL, 0x41 },
1082 { DA7213_HP_R_CTRL, 0x40 },
1083 { DA7213_LINE_CTRL, 0x40 },
1084 { DA7213_MIXOUT_L_CTRL, 0x10 },
1085 { DA7213_MIXOUT_R_CTRL, 0x10 },
1086 { DA7213_LDO_CTRL, 0x00 },
1087 { DA7213_IO_CTRL, 0x00 },
1088 { DA7213_GAIN_RAMP_CTRL, 0x00},
1089 { DA7213_MIC_CONFIG, 0x00 },
1090 { DA7213_PC_COUNT, 0x00 },
1091 { DA7213_CP_VOL_THRESHOLD1, 0x32 },
1092 { DA7213_CP_DELAY, 0x95 },
1093 { DA7213_CP_DETECTOR, 0x00 },
1094 { DA7213_DAI_OFFSET, 0x00 },
1095 { DA7213_DIG_CTRL, 0x00 },
1096 { DA7213_ALC_CTRL2, 0x00 },
1097 { DA7213_ALC_CTRL3, 0x00 },
1098 { DA7213_ALC_NOISE, 0x3F },
1099 { DA7213_ALC_TARGET_MIN, 0x3F },
1100 { DA7213_ALC_TARGET_MAX, 0x00 },
1101 { DA7213_ALC_GAIN_LIMITS, 0xFF },
1102 { DA7213_ALC_ANA_GAIN_LIMITS, 0x71 },
1103 { DA7213_ALC_ANTICLIP_CTRL, 0x00 },
1104 { DA7213_ALC_ANTICLIP_LEVEL, 0x00 },
1105 { DA7213_ALC_OFFSET_MAN_M_L, 0x00 },
1106 { DA7213_ALC_OFFSET_MAN_U_L, 0x00 },
1107 { DA7213_ALC_OFFSET_MAN_M_R, 0x00 },
1108 { DA7213_ALC_OFFSET_MAN_U_R, 0x00 },
1109 { DA7213_ALC_CIC_OP_LVL_CTRL, 0x00 },
1110 { DA7213_DAC_NG_SETUP_TIME, 0x00 },
1111 { DA7213_DAC_NG_OFF_THRESHOLD, 0x00 },
1112 { DA7213_DAC_NG_ON_THRESHOLD, 0x00 },
1113 { DA7213_DAC_NG_CTRL, 0x00 },
1114};
1115
1116static bool da7213_volatile_register(struct device *dev, unsigned int reg)
1117{
1118 switch (reg) {
1119 case DA7213_STATUS1:
1120 case DA7213_PLL_STATUS:
1121 case DA7213_AUX_L_GAIN_STATUS:
1122 case DA7213_AUX_R_GAIN_STATUS:
1123 case DA7213_MIC_1_GAIN_STATUS:
1124 case DA7213_MIC_2_GAIN_STATUS:
1125 case DA7213_MIXIN_L_GAIN_STATUS:
1126 case DA7213_MIXIN_R_GAIN_STATUS:
1127 case DA7213_ADC_L_GAIN_STATUS:
1128 case DA7213_ADC_R_GAIN_STATUS:
1129 case DA7213_DAC_L_GAIN_STATUS:
1130 case DA7213_DAC_R_GAIN_STATUS:
1131 case DA7213_HP_L_GAIN_STATUS:
1132 case DA7213_HP_R_GAIN_STATUS:
1133 case DA7213_LINE_GAIN_STATUS:
1134 case DA7213_ALC_CTRL1:
1135 case DA7213_ALC_OFFSET_AUTO_M_L:
1136 case DA7213_ALC_OFFSET_AUTO_U_L:
1137 case DA7213_ALC_OFFSET_AUTO_M_R:
1138 case DA7213_ALC_OFFSET_AUTO_U_R:
1139 case DA7213_ALC_CIC_OP_LVL_DATA:
1140 return 1;
1141 default:
1142 return 0;
1143 }
1144}
1145
1146static int da7213_hw_params(struct snd_pcm_substream *substream,
1147 struct snd_pcm_hw_params *params,
1148 struct snd_soc_dai *dai)
1149{
1150 struct snd_soc_codec *codec = dai->codec;
1151 u8 dai_ctrl = 0;
1152 u8 fs;
1153
1154 /* Set DAI format */
e7610743
MB		 1155 switch (params_width(params)) {
1156 case 16:
ef5c2eba
AT		 1157 dai_ctrl |= DA7213_DAI_WORD_LENGTH_S16_LE;
1158 break;
e7610743 1159 case 20:
ef5c2eba
AT		 1160 dai_ctrl |= DA7213_DAI_WORD_LENGTH_S20_LE;
1161 break;
e7610743 1162 case 24:
ef5c2eba
AT		 1163 dai_ctrl |= DA7213_DAI_WORD_LENGTH_S24_LE;
1164 break;
e7610743 1165 case 32:
ef5c2eba
AT		 1166 dai_ctrl |= DA7213_DAI_WORD_LENGTH_S32_LE;
1167 break;
1168 default:
1169 return -EINVAL;
1170 }
1171
1172 /* Set sampling rate */
1173 switch (params_rate(params)) {
1174 case 8000:
1175 fs = DA7213_SR_8000;
1176 break;
1177 case 11025:
1178 fs = DA7213_SR_11025;
1179 break;
1180 case 12000:
1181 fs = DA7213_SR_12000;
1182 break;
1183 case 16000:
1184 fs = DA7213_SR_16000;
1185 break;
1186 case 22050:
1187 fs = DA7213_SR_22050;
1188 break;
1189 case 32000:
1190 fs = DA7213_SR_32000;
1191 break;
1192 case 44100:
1193 fs = DA7213_SR_44100;
1194 break;
1195 case 48000:
1196 fs = DA7213_SR_48000;
1197 break;
1198 case 88200:
1199 fs = DA7213_SR_88200;
1200 break;
1201 case 96000:
1202 fs = DA7213_SR_96000;
1203 break;
1204 default:
1205 return -EINVAL;
1206 }
1207
1208 snd_soc_update_bits(codec, DA7213_DAI_CTRL, DA7213_DAI_WORD_LENGTH_MASK,
1209 dai_ctrl);
1210 snd_soc_write(codec, DA7213_SR, fs);
1211
1212 return 0;
1213}
1214
1215static int da7213_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
1216{
1217 struct snd_soc_codec *codec = codec_dai->codec;
1218 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
1219 u8 dai_clk_mode = 0, dai_ctrl = 0;
1220
1221 /* Set master/slave mode */
1222 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1223 case SND_SOC_DAIFMT_CBM_CFM:
ef5c2eba
AT		 1224 da7213->master = true;
1225 break;
1226 case SND_SOC_DAIFMT_CBS_CFS:
ef5c2eba
AT		 1227 da7213->master = false;
1228 break;
1229 default:
1230 return -EINVAL;
1231 }
1232
1233 /* Set clock normal/inverted */
1234 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1235 case SND_SOC_DAIFMT_NB_NF:
1236 break;
1237 case SND_SOC_DAIFMT_NB_IF:
1238 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV;
1239 break;
1240 case SND_SOC_DAIFMT_IB_NF:
1241 dai_clk_mode |= DA7213_DAI_CLK_POL_INV;
1242 break;
1243 case SND_SOC_DAIFMT_IB_IF:
1244 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV | DA7213_DAI_CLK_POL_INV;
1245 break;
1246 default:
1247 return -EINVAL;
1248 }
1249
1250 /* Only I2S is supported */
1251 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1252 case SND_SOC_DAIFMT_I2S:
1253 dai_ctrl |= DA7213_DAI_FORMAT_I2S_MODE;
1254 break;
1255 case SND_SOC_DAIFMT_LEFT_J:
1256 dai_ctrl |= DA7213_DAI_FORMAT_LEFT_J;
1257 break;
1258 case SND_SOC_DAIFMT_RIGHT_J:
1259 dai_ctrl |= DA7213_DAI_FORMAT_RIGHT_J;
1260 break;
1261 default:
1262 return -EINVAL;
1263 }
1264
5d764912
AT		 1265 /* By default only 64 BCLK per WCLK is supported */
1266 dai_clk_mode |= DA7213_DAI_BCLKS_PER_WCLK_64;
ef5c2eba
AT		 1267
1268 snd_soc_write(codec, DA7213_DAI_CLK_MODE, dai_clk_mode);
1269 snd_soc_update_bits(codec, DA7213_DAI_CTRL, DA7213_DAI_FORMAT_MASK,
1270 dai_ctrl);
1271
1272 return 0;
1273}
1274
1275static int da7213_mute(struct snd_soc_dai *dai, int mute)
1276{
1277 struct snd_soc_codec *codec = dai->codec;
1278
1279 if (mute) {
1280 snd_soc_update_bits(codec, DA7213_DAC_L_CTRL,
1281 DA7213_MUTE_EN, DA7213_MUTE_EN);
1282 snd_soc_update_bits(codec, DA7213_DAC_R_CTRL,
1283 DA7213_MUTE_EN, DA7213_MUTE_EN);
1284 } else {
1285 snd_soc_update_bits(codec, DA7213_DAC_L_CTRL,
1286 DA7213_MUTE_EN, 0);
1287 snd_soc_update_bits(codec, DA7213_DAC_R_CTRL,
1288 DA7213_MUTE_EN, 0);
1289 }
1290
1291 return 0;
1292}
1293
1294#define DA7213_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1295 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1296
1297static int da7213_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1298 int clk_id, unsigned int freq, int dir)
1299{
1300 struct snd_soc_codec *codec = codec_dai->codec;
1301 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
6e7c4443
AT		 1302 int ret = 0;
1303
1304 if ((da7213->clk_src == clk_id) && (da7213->mclk_rate == freq))
1305 return 0;
1306
1307 if (((freq < 5000000) && (freq != 32768)) || (freq > 54000000)) {
1308 dev_err(codec_dai->dev, "Unsupported MCLK value %d\n",
1309 freq);
1310 return -EINVAL;
1311 }
ef5c2eba
AT		 1312
1313 switch (clk_id) {
1314 case DA7213_CLKSRC_MCLK:
4c75225a
AT		 1315 snd_soc_update_bits(codec, DA7213_PLL_CTRL,
1316 DA7213_PLL_MCLK_SQR_EN, 0);
6e7c4443
AT		 1317 break;
1318 case DA7213_CLKSRC_MCLK_SQR:
4c75225a
AT		 1319 snd_soc_update_bits(codec, DA7213_PLL_CTRL,
1320 DA7213_PLL_MCLK_SQR_EN,
1321 DA7213_PLL_MCLK_SQR_EN);
ef5c2eba
AT		 1322 break;
1323 default:
1324 dev_err(codec_dai->dev, "Unknown clock source %d\n", clk_id);
1325 return -EINVAL;
1326 }
6e7c4443
AT		 1327
1328 da7213->clk_src = clk_id;
1329
1330 if (da7213->mclk) {
1331 freq = clk_round_rate(da7213->mclk, freq);
1332 ret = clk_set_rate(da7213->mclk, freq);
1333 if (ret) {
1334 dev_err(codec_dai->dev, "Failed to set clock rate %d\n",
1335 freq);
1336 return ret;
1337 }
1338 }
1339
1340 da7213->mclk_rate = freq;
1341
1342 return 0;
ef5c2eba
AT		 1343}
1344
4c75225a 1345/* Supported PLL input frequencies are 32KHz, 5MHz - 54MHz. */
ef5c2eba
AT		 1346static int da7213_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1347 int source, unsigned int fref, unsigned int fout)
1348{
1349 struct snd_soc_codec *codec = codec_dai->codec;
1350 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
1351
1352 u8 pll_ctrl, indiv_bits, indiv;
1353 u8 pll_frac_top, pll_frac_bot, pll_integer;
1354 u32 freq_ref;
1355 u64 frac_div;
1356
ef5c2eba 1357 /* Workout input divider based on MCLK rate */
abc189ea 1358 if (da7213->mclk_rate == 32768) {
4c75225a
AT		 1359 if (!da7213->master) {
1360 dev_err(codec->dev,
1361 "32KHz only valid if codec is clock master\n");
1362 return -EINVAL;
1363 }
1364
ef5c2eba 1365 /* 32KHz PLL Mode */
1e62c52d
AT		 1366 indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ;
1367 indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL;
4c75225a 1368 source = DA7213_SYSCLK_PLL_32KHZ;
ef5c2eba 1369 freq_ref = 3750000;
4c75225a 1370
ef5c2eba 1371 } else {
ef5c2eba 1372 if (da7213->mclk_rate < 5000000) {
4c75225a
AT		 1373 dev_err(codec->dev,
1374 "PLL input clock %d below valid range\n",
1375 da7213->mclk_rate);
1376 return -EINVAL;
1e62c52d
AT		 1377 } else if (da7213->mclk_rate <= 9000000) {
1378 indiv_bits = DA7213_PLL_INDIV_5_TO_9_MHZ;
1379 indiv = DA7213_PLL_INDIV_5_TO_9_MHZ_VAL;
1380 } else if (da7213->mclk_rate <= 18000000) {
1381 indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ;
1382 indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL;
1383 } else if (da7213->mclk_rate <= 36000000) {
1384 indiv_bits = DA7213_PLL_INDIV_18_TO_36_MHZ;
1385 indiv = DA7213_PLL_INDIV_18_TO_36_MHZ_VAL;
ef5c2eba 1386 } else if (da7213->mclk_rate <= 54000000) {
1e62c52d
AT		 1387 indiv_bits = DA7213_PLL_INDIV_36_TO_54_MHZ;
1388 indiv = DA7213_PLL_INDIV_36_TO_54_MHZ_VAL;
ef5c2eba 1389 } else {
4c75225a
AT		 1390 dev_err(codec->dev,
1391 "PLL input clock %d above valid range\n",
1392 da7213->mclk_rate);
1393 return -EINVAL;
ef5c2eba
AT		 1394 }
1395 freq_ref = (da7213->mclk_rate / indiv);
1396 }
1397
4c75225a 1398 pll_ctrl = indiv_bits;
ef5c2eba 1399
4c75225a
AT		 1400 /* Configure PLL */
1401 switch (source) {
1402 case DA7213_SYSCLK_MCLK:
1403 snd_soc_update_bits(codec, DA7213_PLL_CTRL,
1404 DA7213_PLL_INDIV_MASK |
1405 DA7213_PLL_MODE_MASK, pll_ctrl);
ef5c2eba 1406 return 0;
4c75225a
AT		 1407 case DA7213_SYSCLK_PLL:
1408 break;
1409 case DA7213_SYSCLK_PLL_SRM:
1410 pll_ctrl |= DA7213_PLL_SRM_EN;
1411 fout = DA7213_PLL_FREQ_OUT_94310400;
1412 break;
1413 case DA7213_SYSCLK_PLL_32KHZ:
1414 if (da7213->mclk_rate != 32768) {
1415 dev_err(codec->dev,
1416 "32KHz mode only valid with 32KHz MCLK\n");
1417 return -EINVAL;
1418 }
ef5c2eba 1419
4c75225a 1420 pll_ctrl |= DA7213_PLL_32K_MODE | DA7213_PLL_SRM_EN;
ef5c2eba 1421 fout = DA7213_PLL_FREQ_OUT_94310400;
4c75225a
AT		 1422 break;
1423 default:
1424 dev_err(codec->dev, "Invalid PLL config\n");
1425 return -EINVAL;
ef5c2eba
AT		 1426 }
1427
ef5c2eba
AT		 1428 /* Calculate dividers for PLL */
1429 pll_integer = fout / freq_ref;
1430 frac_div = (u64)(fout % freq_ref) * 8192ULL;
1431 do_div(frac_div, freq_ref);
1432 pll_frac_top = (frac_div >> DA7213_BYTE_SHIFT) & DA7213_BYTE_MASK;
1433 pll_frac_bot = (frac_div) & DA7213_BYTE_MASK;
1434
1435 /* Write PLL dividers */
1436 snd_soc_write(codec, DA7213_PLL_FRAC_TOP, pll_frac_top);
1437 snd_soc_write(codec, DA7213_PLL_FRAC_BOT, pll_frac_bot);
1438 snd_soc_write(codec, DA7213_PLL_INTEGER, pll_integer);
1439
1440 /* Enable PLL */
1441 pll_ctrl |= DA7213_PLL_EN;
4c75225a
AT		 1442 snd_soc_update_bits(codec, DA7213_PLL_CTRL,
1443 DA7213_PLL_INDIV_MASK | DA7213_PLL_MODE_MASK,
1444 pll_ctrl);
ef5c2eba 1445
d936d527
AT		 1446 /* Assist 32KHz mode PLL lock */
1447 if (source == DA7213_SYSCLK_PLL_32KHZ) {
1448 snd_soc_write(codec, 0xF0, 0x8B);
1449 snd_soc_write(codec, 0xF1, 0x03);
1450 snd_soc_write(codec, 0xF1, 0x01);
1451 snd_soc_write(codec, 0xF0, 0x00);
1452 }
ef5c2eba
AT		 1453
1454 return 0;
ef5c2eba
AT		 1455}
1456
1457/* DAI operations */
1458static const struct snd_soc_dai_ops da7213_dai_ops = {
1459 .hw_params = da7213_hw_params,
1460 .set_fmt = da7213_set_dai_fmt,
1461 .set_sysclk = da7213_set_dai_sysclk,
1462 .set_pll = da7213_set_dai_pll,
1463 .digital_mute = da7213_mute,
1464};
1465
1466static struct snd_soc_dai_driver da7213_dai = {
1467 .name = "da7213-hifi",
1468 /* Playback Capabilities */
1469 .playback = {
1470 .stream_name = "Playback",
1471 .channels_min = 1,
1472 .channels_max = 2,
1473 .rates = SNDRV_PCM_RATE_8000_96000,
1474 .formats = DA7213_FORMATS,
1475 },
1476 /* Capture Capabilities */
1477 .capture = {
1478 .stream_name = "Capture",
1479 .channels_min = 1,
1480 .channels_max = 2,
1481 .rates = SNDRV_PCM_RATE_8000_96000,
1482 .formats = DA7213_FORMATS,
1483 },
1484 .ops = &da7213_dai_ops,
1485 .symmetric_rates = 1,
1486};
1487
1488static int da7213_set_bias_level(struct snd_soc_codec *codec,
1489 enum snd_soc_bias_level level)
1490{
6e7c4443
AT		 1491 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
1492 int ret;
1493
ef5c2eba
AT		 1494 switch (level) {
1495 case SND_SOC_BIAS_ON:
ef5c2eba 1496 break;
f612680f
AT		 1497 case SND_SOC_BIAS_PREPARE:
1498 /* Enable MCLK for transition to ON state */
1499 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_STANDBY) {
6e7c4443
AT		 1500 if (da7213->mclk) {
1501 ret = clk_prepare_enable(da7213->mclk);
1502 if (ret) {
1503 dev_err(codec->dev,
1504 "Failed to enable mclk\n");
1505 return ret;
1506 }
1507 }
f612680f
AT		 1508 }
1509 break;
1510 case SND_SOC_BIAS_STANDBY:
1511 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
ef5c2eba
AT		 1512 /* Enable VMID reference & master bias */
1513 snd_soc_update_bits(codec, DA7213_REFERENCES,
1514 DA7213_VMID_EN | DA7213_BIAS_EN,
1515 DA7213_VMID_EN | DA7213_BIAS_EN);
f612680f
AT		 1516 } else {
1517 /* Remove MCLK */
1518 if (da7213->mclk)
1519 clk_disable_unprepare(da7213->mclk);
ef5c2eba
AT		 1520 }
1521 break;
1522 case SND_SOC_BIAS_OFF:
1523 /* Disable VMID reference & master bias */
1524 snd_soc_update_bits(codec, DA7213_REFERENCES,
1525 DA7213_VMID_EN | DA7213_BIAS_EN, 0);
1526 break;
1527 }
ef5c2eba
AT		 1528 return 0;
1529}
1530
e90996a3
AT		 1531/* DT */
1532static const struct of_device_id da7213_of_match[] = {
1533 { .compatible = "dlg,da7213", },
1534 { }
1535};
1536MODULE_DEVICE_TABLE(of, da7213_of_match);
1537
1538static enum da7213_micbias_voltage
1539 da7213_of_micbias_lvl(struct snd_soc_codec *codec, u32 val)
1540{
1541 switch (val) {
1542 case 1600:
1543 return DA7213_MICBIAS_1_6V;
1544 case 2200:
1545 return DA7213_MICBIAS_2_2V;
1546 case 2500:
1547 return DA7213_MICBIAS_2_5V;
1548 case 3000:
1549 return DA7213_MICBIAS_3_0V;
1550 default:
1551 dev_warn(codec->dev, "Invalid micbias level\n");
1552 return DA7213_MICBIAS_2_2V;
1553 }
1554}
1555
1556static enum da7213_dmic_data_sel
1557 da7213_of_dmic_data_sel(struct snd_soc_codec *codec, const char *str)
1558{
1559 if (!strcmp(str, "lrise_rfall")) {
1560 return DA7213_DMIC_DATA_LRISE_RFALL;
1561 } else if (!strcmp(str, "lfall_rrise")) {
1562 return DA7213_DMIC_DATA_LFALL_RRISE;
1563 } else {
1564 dev_warn(codec->dev, "Invalid DMIC data select type\n");
1565 return DA7213_DMIC_DATA_LRISE_RFALL;
1566 }
1567}
1568
1569static enum da7213_dmic_samplephase
1570 da7213_of_dmic_samplephase(struct snd_soc_codec *codec, const char *str)
1571{
1572 if (!strcmp(str, "on_clkedge")) {
1573 return DA7213_DMIC_SAMPLE_ON_CLKEDGE;
1574 } else if (!strcmp(str, "between_clkedge")) {
1575 return DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE;
1576 } else {
1577 dev_warn(codec->dev, "Invalid DMIC sample phase\n");
1578 return DA7213_DMIC_SAMPLE_ON_CLKEDGE;
1579 }
1580}
1581
1582static enum da7213_dmic_clk_rate
1583 da7213_of_dmic_clkrate(struct snd_soc_codec *codec, u32 val)
1584{
1585 switch (val) {
1586 case 1500000:
1587 return DA7213_DMIC_CLK_1_5MHZ;
1588 case 3000000:
1589 return DA7213_DMIC_CLK_3_0MHZ;
1590 default:
1591 dev_warn(codec->dev, "Invalid DMIC clock rate\n");
1592 return DA7213_DMIC_CLK_1_5MHZ;
1593 }
1594}
1595
1596static struct da7213_platform_data
1597 *da7213_of_to_pdata(struct snd_soc_codec *codec)
1598{
1599 struct device_node *np = codec->dev->of_node;
1600 struct da7213_platform_data *pdata;
1601 const char *of_str;
1602 u32 of_val32;
1603
1604 pdata = devm_kzalloc(codec->dev, sizeof(*pdata), GFP_KERNEL);
1605 if (!pdata) {
1606 dev_warn(codec->dev, "Failed to allocate memory for pdata\n");
1607 return NULL;
1608 }
1609
1610 if (of_property_read_u32(np, "dlg,micbias1-lvl", &of_val32) >= 0)
1611 pdata->micbias1_lvl = da7213_of_micbias_lvl(codec, of_val32);
1612 else
1613 pdata->micbias1_lvl = DA7213_MICBIAS_2_2V;
1614
1615 if (of_property_read_u32(np, "dlg,micbias2-lvl", &of_val32) >= 0)
1616 pdata->micbias2_lvl = da7213_of_micbias_lvl(codec, of_val32);
1617 else
1618 pdata->micbias2_lvl = DA7213_MICBIAS_2_2V;
1619
1620 if (!of_property_read_string(np, "dlg,dmic-data-sel", &of_str))
1621 pdata->dmic_data_sel = da7213_of_dmic_data_sel(codec, of_str);
1622 else
1623 pdata->dmic_data_sel = DA7213_DMIC_DATA_LRISE_RFALL;
1624
1625 if (!of_property_read_string(np, "dlg,dmic-samplephase", &of_str))
1626 pdata->dmic_samplephase =
1627 da7213_of_dmic_samplephase(codec, of_str);
1628 else
1629 pdata->dmic_samplephase = DA7213_DMIC_SAMPLE_ON_CLKEDGE;
1630
1631 if (of_property_read_u32(np, "dlg,dmic-clkrate", &of_val32) >= 0)
1632 pdata->dmic_clk_rate = da7213_of_dmic_clkrate(codec, of_val32);
1633 else
1634 pdata->dmic_clk_rate = DA7213_DMIC_CLK_3_0MHZ;
1635
1636 return pdata;
1637}
1638
1639
ef5c2eba
AT		 1640static int da7213_probe(struct snd_soc_codec *codec)
1641{
ef5c2eba 1642 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
ef5c2eba 1643
ef5c2eba
AT		 1644 /* Default to using ALC auto offset calibration mode. */
1645 snd_soc_update_bits(codec, DA7213_ALC_CTRL1,
1646 DA7213_ALC_CALIB_MODE_MAN, 0);
1647 da7213->alc_calib_auto = true;
1648
7e28fd46
AT		 1649 /* Default PC counter to free-running */
1650 snd_soc_update_bits(codec, DA7213_PC_COUNT, DA7213_PC_FREERUN_MASK,
1651 DA7213_PC_FREERUN_MASK);
1652
ef5c2eba
AT		 1653 /* Enable all Gain Ramps */
1654 snd_soc_update_bits(codec, DA7213_AUX_L_CTRL,
1655 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1656 snd_soc_update_bits(codec, DA7213_AUX_R_CTRL,
1657 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1658 snd_soc_update_bits(codec, DA7213_MIXIN_L_CTRL,
1659 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1660 snd_soc_update_bits(codec, DA7213_MIXIN_R_CTRL,
1661 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1662 snd_soc_update_bits(codec, DA7213_ADC_L_CTRL,
1663 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1664 snd_soc_update_bits(codec, DA7213_ADC_R_CTRL,
1665 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1666 snd_soc_update_bits(codec, DA7213_DAC_L_CTRL,
1667 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1668 snd_soc_update_bits(codec, DA7213_DAC_R_CTRL,
1669 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1670 snd_soc_update_bits(codec, DA7213_HP_L_CTRL,
1671 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1672 snd_soc_update_bits(codec, DA7213_HP_R_CTRL,
1673 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1674 snd_soc_update_bits(codec, DA7213_LINE_CTRL,
1675 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1676
1677 /*
1678 * There are two separate control bits for input and output mixers as
1679 * well as headphone and line outs.
1680 * One to enable corresponding amplifier and other to enable its
1681 * output. As amplifier bits are related to power control, they are
1682 * being managed by DAPM while other (non power related) bits are
1683 * enabled here
1684 */
1685 snd_soc_update_bits(codec, DA7213_MIXIN_L_CTRL,
1686 DA7213_MIXIN_MIX_EN, DA7213_MIXIN_MIX_EN);
1687 snd_soc_update_bits(codec, DA7213_MIXIN_R_CTRL,
1688 DA7213_MIXIN_MIX_EN, DA7213_MIXIN_MIX_EN);
1689
1690 snd_soc_update_bits(codec, DA7213_MIXOUT_L_CTRL,
1691 DA7213_MIXOUT_MIX_EN, DA7213_MIXOUT_MIX_EN);
1692 snd_soc_update_bits(codec, DA7213_MIXOUT_R_CTRL,
1693 DA7213_MIXOUT_MIX_EN, DA7213_MIXOUT_MIX_EN);
1694
1695 snd_soc_update_bits(codec, DA7213_HP_L_CTRL,
1696 DA7213_HP_AMP_OE, DA7213_HP_AMP_OE);
1697 snd_soc_update_bits(codec, DA7213_HP_R_CTRL,
1698 DA7213_HP_AMP_OE, DA7213_HP_AMP_OE);
1699
1700 snd_soc_update_bits(codec, DA7213_LINE_CTRL,
1701 DA7213_LINE_AMP_OE, DA7213_LINE_AMP_OE);
1702
e90996a3
AT		 1703 /* Handle DT/Platform data */
1704 if (codec->dev->of_node)
1705 da7213->pdata = da7213_of_to_pdata(codec);
1706 else
1707 da7213->pdata = dev_get_platdata(codec->dev);
1708
ef5c2eba
AT		 1709 /* Set platform data values */
1710 if (da7213->pdata) {
e90996a3 1711 struct da7213_platform_data *pdata = da7213->pdata;
ef5c2eba
AT		 1712 u8 micbias_lvl = 0, dmic_cfg = 0;
1713
1714 /* Set Mic Bias voltages */
1715 switch (pdata->micbias1_lvl) {
1716 case DA7213_MICBIAS_1_6V:
1717 case DA7213_MICBIAS_2_2V:
1718 case DA7213_MICBIAS_2_5V:
1719 case DA7213_MICBIAS_3_0V:
1720 micbias_lvl |= (pdata->micbias1_lvl <<
1721 DA7213_MICBIAS1_LEVEL_SHIFT);
1722 break;
1723 }
1724 switch (pdata->micbias2_lvl) {
1725 case DA7213_MICBIAS_1_6V:
1726 case DA7213_MICBIAS_2_2V:
1727 case DA7213_MICBIAS_2_5V:
1728 case DA7213_MICBIAS_3_0V:
1729 micbias_lvl |= (pdata->micbias2_lvl <<
1730 DA7213_MICBIAS2_LEVEL_SHIFT);
1731 break;
1732 }
1733 snd_soc_update_bits(codec, DA7213_MICBIAS_CTRL,
1734 DA7213_MICBIAS1_LEVEL_MASK |
1735 DA7213_MICBIAS2_LEVEL_MASK, micbias_lvl);
1736
1737 /* Set DMIC configuration */
1738 switch (pdata->dmic_data_sel) {
1739 case DA7213_DMIC_DATA_LFALL_RRISE:
1740 case DA7213_DMIC_DATA_LRISE_RFALL:
1741 dmic_cfg |= (pdata->dmic_data_sel <<
1742 DA7213_DMIC_DATA_SEL_SHIFT);
1743 break;
1744 }
61559af1 1745 switch (pdata->dmic_samplephase) {
ef5c2eba
AT		 1746 case DA7213_DMIC_SAMPLE_ON_CLKEDGE:
1747 case DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE:
61559af1 1748 dmic_cfg |= (pdata->dmic_samplephase <<
ef5c2eba
AT		 1749 DA7213_DMIC_SAMPLEPHASE_SHIFT);
1750 break;
1751 }
61559af1 1752 switch (pdata->dmic_clk_rate) {
ef5c2eba
AT		 1753 case DA7213_DMIC_CLK_3_0MHZ:
1754 case DA7213_DMIC_CLK_1_5MHZ:
61559af1 1755 dmic_cfg |= (pdata->dmic_clk_rate <<
ef5c2eba
AT		 1756 DA7213_DMIC_CLK_RATE_SHIFT);
1757 break;
1758 }
1759 snd_soc_update_bits(codec, DA7213_MIC_CONFIG,
1760 DA7213_DMIC_DATA_SEL_MASK |
1761 DA7213_DMIC_SAMPLEPHASE_MASK |
1762 DA7213_DMIC_CLK_RATE_MASK, dmic_cfg);
6e7c4443 1763 }
ef5c2eba 1764
6e7c4443
AT		 1765 /* Check if MCLK provided */
1766 da7213->mclk = devm_clk_get(codec->dev, "mclk");
1767 if (IS_ERR(da7213->mclk)) {
1768 if (PTR_ERR(da7213->mclk) != -ENOENT)
1769 return PTR_ERR(da7213->mclk);
1770 else
1771 da7213->mclk = NULL;
ef5c2eba 1772 }
e90996a3 1773
ef5c2eba
AT		 1774 return 0;
1775}
1776
1777static struct snd_soc_codec_driver soc_codec_dev_da7213 = {
1778 .probe = da7213_probe,
1779 .set_bias_level = da7213_set_bias_level,
1780
92d2a233
KM		 1781 .component_driver = {
1782 .controls = da7213_snd_controls,
1783 .num_controls = ARRAY_SIZE(da7213_snd_controls),
1784 .dapm_widgets = da7213_dapm_widgets,
1785 .num_dapm_widgets = ARRAY_SIZE(da7213_dapm_widgets),
1786 .dapm_routes = da7213_audio_map,
1787 .num_dapm_routes = ARRAY_SIZE(da7213_audio_map),
1788 },
ef5c2eba
AT		 1789};
1790
1791static const struct regmap_config da7213_regmap_config = {
1792 .reg_bits = 8,
1793 .val_bits = 8,
1794
1795 .reg_defaults = da7213_reg_defaults,
1796 .num_reg_defaults = ARRAY_SIZE(da7213_reg_defaults),
1797 .volatile_reg = da7213_volatile_register,
1798 .cache_type = REGCACHE_RBTREE,
1799};
1800
1801static int da7213_i2c_probe(struct i2c_client *i2c,
1802 const struct i2c_device_id *id)
1803{
1804 struct da7213_priv *da7213;
ef5c2eba
AT		 1805 int ret;
1806
1807 da7213 = devm_kzalloc(&i2c->dev, sizeof(struct da7213_priv),
1808 GFP_KERNEL);
1809 if (!da7213)
1810 return -ENOMEM;
1811
ef5c2eba
AT		 1812 i2c_set_clientdata(i2c, da7213);
1813
1814 da7213->regmap = devm_regmap_init_i2c(i2c, &da7213_regmap_config);
1815 if (IS_ERR(da7213->regmap)) {
1816 ret = PTR_ERR(da7213->regmap);
1817 dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret);
1818 return ret;
1819 }
1820
1821 ret = snd_soc_register_codec(&i2c->dev,
1822 &soc_codec_dev_da7213, &da7213_dai, 1);
1823 if (ret < 0) {
1824 dev_err(&i2c->dev, "Failed to register da7213 codec: %d\n",
1825 ret);
1826 }
1827 return ret;
1828}
1829
1830static int da7213_remove(struct i2c_client *client)
1831{
1832 snd_soc_unregister_codec(&client->dev);
1833 return 0;
1834}
1835
1836static const struct i2c_device_id da7213_i2c_id[] = {
1837 { "da7213", 0 },
1838 { }
1839};
1840MODULE_DEVICE_TABLE(i2c, da7213_i2c_id);
1841
1842/* I2C codec control layer */
1843static struct i2c_driver da7213_i2c_driver = {
1844 .driver = {
1845 .name = "da7213",
e90996a3 1846 .of_match_table = of_match_ptr(da7213_of_match),
ef5c2eba
AT		 1847 },
1848 .probe = da7213_i2c_probe,
1849 .remove = da7213_remove,
1850 .id_table = da7213_i2c_id,
1851};
1852
1853module_i2c_driver(da7213_i2c_driver);
1854
1855MODULE_DESCRIPTION("ASoC DA7213 Codec driver");
1856MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>");
1857MODULE_LICENSE("GPL");
Linux kernel - Deliverables
This page took 0.275595 seconds and 5 git commands to generate.