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Merge remote-tracking branch 'selinux/next'
[deliverable/linux.git] / sound / soc / codecs / rt5616.c
CommitLineData
b1d15059
BL		 1/*
2 * rt5616.c -- RT5616 ALSA SoC audio codec driver
3 *
4 * Copyright 2015 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/init.h>
76d3204e 15#include <linux/clk.h>
b1d15059
BL		 16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/i2c.h>
19#include <linux/platform_device.h>
20#include <linux/spi/spi.h>
21#include <sound/core.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/soc.h>
25#include <sound/soc-dapm.h>
26#include <sound/initval.h>
27#include <sound/tlv.h>
28
29#include "rl6231.h"
30#include "rt5616.h"
31
32#define RT5616_PR_RANGE_BASE (0xff + 1)
33#define RT5616_PR_SPACING 0x100
34
35#define RT5616_PR_BASE (RT5616_PR_RANGE_BASE + (0 * RT5616_PR_SPACING))
36
37static const struct regmap_range_cfg rt5616_ranges[] = {
38 {
39 .name = "PR",
40 .range_min = RT5616_PR_BASE,
41 .range_max = RT5616_PR_BASE + 0xf8,
42 .selector_reg = RT5616_PRIV_INDEX,
43 .selector_mask = 0xff,
44 .selector_shift = 0x0,
45 .window_start = RT5616_PRIV_DATA,
46 .window_len = 0x1,
47 },
48};
49
50static const struct reg_sequence init_list[] = {
51 {RT5616_PR_BASE + 0x3d, 0x3e00},
52 {RT5616_PR_BASE + 0x25, 0x6110},
53 {RT5616_PR_BASE + 0x20, 0x611f},
54 {RT5616_PR_BASE + 0x21, 0x4040},
55 {RT5616_PR_BASE + 0x23, 0x0004},
56};
99081589 57
b1d15059
BL		 58#define RT5616_INIT_REG_LEN ARRAY_SIZE(init_list)
59
60static const struct reg_default rt5616_reg[] = {
61 { 0x00, 0x0021 },
62 { 0x02, 0xc8c8 },
63 { 0x03, 0xc8c8 },
64 { 0x05, 0x0000 },
65 { 0x0d, 0x0000 },
66 { 0x0f, 0x0808 },
67 { 0x19, 0xafaf },
68 { 0x1c, 0x2f2f },
69 { 0x1e, 0x0000 },
70 { 0x27, 0x7860 },
71 { 0x29, 0x8080 },
72 { 0x2a, 0x5252 },
73 { 0x3b, 0x0000 },
74 { 0x3c, 0x006f },
75 { 0x3d, 0x0000 },
76 { 0x3e, 0x006f },
77 { 0x45, 0x6000 },
78 { 0x4d, 0x0000 },
79 { 0x4e, 0x0000 },
80 { 0x4f, 0x0279 },
81 { 0x50, 0x0000 },
82 { 0x51, 0x0000 },
83 { 0x52, 0x0279 },
84 { 0x53, 0xf000 },
85 { 0x61, 0x0000 },
86 { 0x62, 0x0000 },
87 { 0x63, 0x00c0 },
88 { 0x64, 0x0000 },
89 { 0x65, 0x0000 },
90 { 0x66, 0x0000 },
91 { 0x70, 0x8000 },
92 { 0x73, 0x1104 },
93 { 0x74, 0x0c00 },
94 { 0x80, 0x0000 },
95 { 0x81, 0x0000 },
96 { 0x82, 0x0000 },
97 { 0x8b, 0x0600 },
98 { 0x8e, 0x0004 },
99 { 0x8f, 0x1100 },
100 { 0x90, 0x0000 },
101 { 0x91, 0x0000 },
102 { 0x92, 0x0000 },
103 { 0x93, 0x2000 },
104 { 0x94, 0x0200 },
105 { 0x95, 0x0000 },
106 { 0xb0, 0x2080 },
107 { 0xb1, 0x0000 },
108 { 0xb2, 0x0000 },
109 { 0xb4, 0x2206 },
110 { 0xb5, 0x1f00 },
111 { 0xb6, 0x0000 },
112 { 0xb7, 0x0000 },
113 { 0xbb, 0x0000 },
114 { 0xbc, 0x0000 },
115 { 0xbd, 0x0000 },
116 { 0xbe, 0x0000 },
117 { 0xbf, 0x0000 },
118 { 0xc0, 0x0100 },
119 { 0xc1, 0x0000 },
120 { 0xc2, 0x0000 },
121 { 0xc8, 0x0000 },
122 { 0xc9, 0x0000 },
123 { 0xca, 0x0000 },
124 { 0xcb, 0x0000 },
125 { 0xcc, 0x0000 },
126 { 0xcd, 0x0000 },
127 { 0xce, 0x0000 },
128 { 0xcf, 0x0013 },
129 { 0xd0, 0x0680 },
130 { 0xd1, 0x1c17 },
131 { 0xd3, 0xb320 },
132 { 0xd4, 0x0000 },
133 { 0xd6, 0x0000 },
134 { 0xd7, 0x0000 },
135 { 0xd9, 0x0809 },
136 { 0xda, 0x0000 },
137 { 0xfa, 0x0010 },
138 { 0xfb, 0x0000 },
139 { 0xfc, 0x0000 },
140 { 0xfe, 0x10ec },
141 { 0xff, 0x6281 },
142};
143
144struct rt5616_priv {
145 struct snd_soc_codec *codec;
146 struct delayed_work patch_work;
147 struct regmap *regmap;
76d3204e 148 struct clk *mclk;
b1d15059
BL		 149
150 int sysclk;
151 int sysclk_src;
152 int lrck[RT5616_AIFS];
153 int bclk[RT5616_AIFS];
154 int master[RT5616_AIFS];
155
156 int pll_src;
157 int pll_in;
158 int pll_out;
159
160};
161
162static bool rt5616_volatile_register(struct device *dev, unsigned int reg)
163{
164 int i;
165
166 for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) {
167 if (reg >= rt5616_ranges[i].range_min &&
99081589 168 reg <= rt5616_ranges[i].range_max)
b1d15059 169 return true;
b1d15059
BL		 170 }
171
172 switch (reg) {
173 case RT5616_RESET:
174 case RT5616_PRIV_DATA:
175 case RT5616_EQ_CTRL1:
176 case RT5616_DRC_AGC_1:
177 case RT5616_IRQ_CTRL2:
178 case RT5616_INT_IRQ_ST:
179 case RT5616_PGM_REG_ARR1:
180 case RT5616_PGM_REG_ARR3:
181 case RT5616_VENDOR_ID:
182 case RT5616_DEVICE_ID:
183 return true;
184 default:
185 return false;
186 }
187}
188
189static bool rt5616_readable_register(struct device *dev, unsigned int reg)
190{
191 int i;
192
193 for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) {
194 if (reg >= rt5616_ranges[i].range_min &&
99081589 195 reg <= rt5616_ranges[i].range_max)
b1d15059 196 return true;
b1d15059
BL		 197 }
198
199 switch (reg) {
200 case RT5616_RESET:
201 case RT5616_VERSION_ID:
202 case RT5616_VENDOR_ID:
203 case RT5616_DEVICE_ID:
204 case RT5616_HP_VOL:
205 case RT5616_LOUT_CTRL1:
206 case RT5616_LOUT_CTRL2:
207 case RT5616_IN1_IN2:
208 case RT5616_INL1_INR1_VOL:
209 case RT5616_DAC1_DIG_VOL:
210 case RT5616_ADC_DIG_VOL:
211 case RT5616_ADC_BST_VOL:
212 case RT5616_STO1_ADC_MIXER:
213 case RT5616_AD_DA_MIXER:
214 case RT5616_STO_DAC_MIXER:
215 case RT5616_REC_L1_MIXER:
216 case RT5616_REC_L2_MIXER:
217 case RT5616_REC_R1_MIXER:
218 case RT5616_REC_R2_MIXER:
219 case RT5616_HPO_MIXER:
220 case RT5616_OUT_L1_MIXER:
221 case RT5616_OUT_L2_MIXER:
222 case RT5616_OUT_L3_MIXER:
223 case RT5616_OUT_R1_MIXER:
224 case RT5616_OUT_R2_MIXER:
225 case RT5616_OUT_R3_MIXER:
226 case RT5616_LOUT_MIXER:
227 case RT5616_PWR_DIG1:
228 case RT5616_PWR_DIG2:
229 case RT5616_PWR_ANLG1:
230 case RT5616_PWR_ANLG2:
231 case RT5616_PWR_MIXER:
232 case RT5616_PWR_VOL:
233 case RT5616_PRIV_INDEX:
234 case RT5616_PRIV_DATA:
235 case RT5616_I2S1_SDP:
236 case RT5616_ADDA_CLK1:
237 case RT5616_ADDA_CLK2:
238 case RT5616_GLB_CLK:
239 case RT5616_PLL_CTRL1:
240 case RT5616_PLL_CTRL2:
241 case RT5616_HP_OVCD:
242 case RT5616_DEPOP_M1:
243 case RT5616_DEPOP_M2:
244 case RT5616_DEPOP_M3:
245 case RT5616_CHARGE_PUMP:
246 case RT5616_PV_DET_SPK_G:
247 case RT5616_MICBIAS:
248 case RT5616_A_JD_CTL1:
249 case RT5616_A_JD_CTL2:
250 case RT5616_EQ_CTRL1:
251 case RT5616_EQ_CTRL2:
252 case RT5616_WIND_FILTER:
253 case RT5616_DRC_AGC_1:
254 case RT5616_DRC_AGC_2:
255 case RT5616_DRC_AGC_3:
256 case RT5616_SVOL_ZC:
257 case RT5616_JD_CTRL1:
258 case RT5616_JD_CTRL2:
259 case RT5616_IRQ_CTRL1:
260 case RT5616_IRQ_CTRL2:
261 case RT5616_INT_IRQ_ST:
262 case RT5616_GPIO_CTRL1:
263 case RT5616_GPIO_CTRL2:
264 case RT5616_GPIO_CTRL3:
265 case RT5616_PGM_REG_ARR1:
266 case RT5616_PGM_REG_ARR2:
267 case RT5616_PGM_REG_ARR3:
268 case RT5616_PGM_REG_ARR4:
269 case RT5616_PGM_REG_ARR5:
270 case RT5616_SCB_FUNC:
271 case RT5616_SCB_CTRL:
272 case RT5616_BASE_BACK:
273 case RT5616_MP3_PLUS1:
274 case RT5616_MP3_PLUS2:
275 case RT5616_ADJ_HPF_CTRL1:
276 case RT5616_ADJ_HPF_CTRL2:
277 case RT5616_HP_CALIB_AMP_DET:
278 case RT5616_HP_CALIB2:
279 case RT5616_SV_ZCD1:
280 case RT5616_SV_ZCD2:
281 case RT5616_D_MISC:
282 case RT5616_DUMMY2:
283 case RT5616_DUMMY3:
284 return true;
285 default:
286 return false;
287 }
288}
289
290static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
291static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
292static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
293static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
294static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
295
296/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
297static unsigned int bst_tlv[] = {
298 TLV_DB_RANGE_HEAD(7),
299 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
300 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
301 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
302 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
303 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
304 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
305 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
306};
307
308static const struct snd_kcontrol_new rt5616_snd_controls[] = {
309 /* Headphone Output Volume */
310 SOC_DOUBLE("HP Playback Switch", RT5616_HP_VOL,
99081589 311 RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
d7fcd136
JL		 312 SOC_DOUBLE("HPVOL Playback Switch", RT5616_HP_VOL,
313 RT5616_VOL_L_SFT, RT5616_VOL_R_SFT, 1, 1),
b1d15059 314 SOC_DOUBLE_TLV("HP Playback Volume", RT5616_HP_VOL,
99081589 315 RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv),
b1d15059
BL		 316 /* OUTPUT Control */
317 SOC_DOUBLE("OUT Playback Switch", RT5616_LOUT_CTRL1,
99081589 318 RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
b1d15059 319 SOC_DOUBLE("OUT Channel Switch", RT5616_LOUT_CTRL1,
99081589 320 RT5616_VOL_L_SFT, RT5616_VOL_R_SFT, 1, 1),
b1d15059 321 SOC_DOUBLE_TLV("OUT Playback Volume", RT5616_LOUT_CTRL1,
99081589 322 RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv),
b1d15059
BL		 323
324 /* DAC Digital Volume */
325 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5616_DAC1_DIG_VOL,
99081589
CW		 326 RT5616_L_VOL_SFT, RT5616_R_VOL_SFT,
327 175, 0, dac_vol_tlv),
b1d15059 328 /* IN1/IN2 Control */
e2133b64 329 SOC_SINGLE_TLV("IN1 Boost Volume", RT5616_IN1_IN2,
99081589 330 RT5616_BST_SFT1, 8, 0, bst_tlv),
e2133b64 331 SOC_SINGLE_TLV("IN2 Boost Volume", RT5616_IN1_IN2,
99081589 332 RT5616_BST_SFT2, 8, 0, bst_tlv),
b1d15059
BL		 333 /* INL/INR Volume Control */
334 SOC_DOUBLE_TLV("IN Capture Volume", RT5616_INL1_INR1_VOL,
99081589
CW		 335 RT5616_INL_VOL_SFT, RT5616_INR_VOL_SFT,
336 31, 1, in_vol_tlv),
b1d15059
BL		 337 /* ADC Digital Volume Control */
338 SOC_DOUBLE("ADC Capture Switch", RT5616_ADC_DIG_VOL,
99081589 339 RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
b1d15059 340 SOC_DOUBLE_TLV("ADC Capture Volume", RT5616_ADC_DIG_VOL,
99081589
CW		 341 RT5616_L_VOL_SFT, RT5616_R_VOL_SFT,
342 127, 0, adc_vol_tlv),
b1d15059
BL		 343
344 /* ADC Boost Volume Control */
e2133b64 345 SOC_DOUBLE_TLV("ADC Boost Volume", RT5616_ADC_BST_VOL,
99081589
CW		 346 RT5616_ADC_L_BST_SFT, RT5616_ADC_R_BST_SFT,
347 3, 0, adc_bst_tlv),
b1d15059
BL		 348};
349
350static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
99081589 351 struct snd_soc_dapm_widget *sink)
b1d15059
BL		 352{
353 unsigned int val;
354
355 val = snd_soc_read(snd_soc_dapm_to_codec(source->dapm), RT5616_GLB_CLK);
356 val &= RT5616_SCLK_SRC_MASK;
357 if (val == RT5616_SCLK_SRC_PLL1)
358 return 1;
359 else
360 return 0;
361}
362
363/* Digital Mixer */
364static const struct snd_kcontrol_new rt5616_sto1_adc_l_mix[] = {
365 SOC_DAPM_SINGLE("ADC1 Switch", RT5616_STO1_ADC_MIXER,
366 RT5616_M_STO1_ADC_L1_SFT, 1, 1),
367};
368
369static const struct snd_kcontrol_new rt5616_sto1_adc_r_mix[] = {
370 SOC_DAPM_SINGLE("ADC1 Switch", RT5616_STO1_ADC_MIXER,
371 RT5616_M_STO1_ADC_R1_SFT, 1, 1),
372};
373
374static const struct snd_kcontrol_new rt5616_dac_l_mix[] = {
375 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5616_AD_DA_MIXER,
376 RT5616_M_ADCMIX_L_SFT, 1, 1),
377 SOC_DAPM_SINGLE("INF1 Switch", RT5616_AD_DA_MIXER,
378 RT5616_M_IF1_DAC_L_SFT, 1, 1),
379};
380
381static const struct snd_kcontrol_new rt5616_dac_r_mix[] = {
382 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5616_AD_DA_MIXER,
383 RT5616_M_ADCMIX_R_SFT, 1, 1),
384 SOC_DAPM_SINGLE("INF1 Switch", RT5616_AD_DA_MIXER,
385 RT5616_M_IF1_DAC_R_SFT, 1, 1),
386};
387
388static const struct snd_kcontrol_new rt5616_sto_dac_l_mix[] = {
389 SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_STO_DAC_MIXER,
390 RT5616_M_DAC_L1_MIXL_SFT, 1, 1),
391 SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_STO_DAC_MIXER,
392 RT5616_M_DAC_R1_MIXL_SFT, 1, 1),
393};
394
395static const struct snd_kcontrol_new rt5616_sto_dac_r_mix[] = {
396 SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_STO_DAC_MIXER,
397 RT5616_M_DAC_R1_MIXR_SFT, 1, 1),
398 SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_STO_DAC_MIXER,
399 RT5616_M_DAC_L1_MIXR_SFT, 1, 1),
400};
401
402/* Analog Input Mixer */
403static const struct snd_kcontrol_new rt5616_rec_l_mix[] = {
404 SOC_DAPM_SINGLE("INL1 Switch", RT5616_REC_L2_MIXER,
405 RT5616_M_IN1_L_RM_L_SFT, 1, 1),
406 SOC_DAPM_SINGLE("BST2 Switch", RT5616_REC_L2_MIXER,
407 RT5616_M_BST2_RM_L_SFT, 1, 1),
408 SOC_DAPM_SINGLE("BST1 Switch", RT5616_REC_L2_MIXER,
409 RT5616_M_BST1_RM_L_SFT, 1, 1),
410};
411
412static const struct snd_kcontrol_new rt5616_rec_r_mix[] = {
413 SOC_DAPM_SINGLE("INR1 Switch", RT5616_REC_R2_MIXER,
414 RT5616_M_IN1_R_RM_R_SFT, 1, 1),
415 SOC_DAPM_SINGLE("BST2 Switch", RT5616_REC_R2_MIXER,
416 RT5616_M_BST2_RM_R_SFT, 1, 1),
417 SOC_DAPM_SINGLE("BST1 Switch", RT5616_REC_R2_MIXER,
418 RT5616_M_BST1_RM_R_SFT, 1, 1),
419};
420
421/* Analog Output Mixer */
422
423static const struct snd_kcontrol_new rt5616_out_l_mix[] = {
424 SOC_DAPM_SINGLE("BST1 Switch", RT5616_OUT_L3_MIXER,
425 RT5616_M_BST1_OM_L_SFT, 1, 1),
426 SOC_DAPM_SINGLE("BST2 Switch", RT5616_OUT_L3_MIXER,
427 RT5616_M_BST2_OM_L_SFT, 1, 1),
428 SOC_DAPM_SINGLE("INL1 Switch", RT5616_OUT_L3_MIXER,
429 RT5616_M_IN1_L_OM_L_SFT, 1, 1),
430 SOC_DAPM_SINGLE("REC MIXL Switch", RT5616_OUT_L3_MIXER,
431 RT5616_M_RM_L_OM_L_SFT, 1, 1),
432 SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_OUT_L3_MIXER,
433 RT5616_M_DAC_L1_OM_L_SFT, 1, 1),
434};
435
436static const struct snd_kcontrol_new rt5616_out_r_mix[] = {
437 SOC_DAPM_SINGLE("BST2 Switch", RT5616_OUT_R3_MIXER,
438 RT5616_M_BST2_OM_R_SFT, 1, 1),
439 SOC_DAPM_SINGLE("BST1 Switch", RT5616_OUT_R3_MIXER,
440 RT5616_M_BST1_OM_R_SFT, 1, 1),
441 SOC_DAPM_SINGLE("INR1 Switch", RT5616_OUT_R3_MIXER,
442 RT5616_M_IN1_R_OM_R_SFT, 1, 1),
443 SOC_DAPM_SINGLE("REC MIXR Switch", RT5616_OUT_R3_MIXER,
444 RT5616_M_RM_R_OM_R_SFT, 1, 1),
445 SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_OUT_R3_MIXER,
446 RT5616_M_DAC_R1_OM_R_SFT, 1, 1),
447};
448
449static const struct snd_kcontrol_new rt5616_hpo_mix[] = {
450 SOC_DAPM_SINGLE("DAC1 Switch", RT5616_HPO_MIXER,
451 RT5616_M_DAC1_HM_SFT, 1, 1),
452 SOC_DAPM_SINGLE("HPVOL Switch", RT5616_HPO_MIXER,
453 RT5616_M_HPVOL_HM_SFT, 1, 1),
454};
455
456static const struct snd_kcontrol_new rt5616_lout_mix[] = {
457 SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_LOUT_MIXER,
458 RT5616_M_DAC_L1_LM_SFT, 1, 1),
459 SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_LOUT_MIXER,
460 RT5616_M_DAC_R1_LM_SFT, 1, 1),
461 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5616_LOUT_MIXER,
462 RT5616_M_OV_L_LM_SFT, 1, 1),
463 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5616_LOUT_MIXER,
464 RT5616_M_OV_R_LM_SFT, 1, 1),
465};
466
467static int rt5616_adc_event(struct snd_soc_dapm_widget *w,
99081589 468 struct snd_kcontrol *kcontrol, int event)
b1d15059
BL		 469{
470 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
471
472 switch (event) {
473 case SND_SOC_DAPM_POST_PMU:
474 snd_soc_update_bits(codec, RT5616_ADC_DIG_VOL,
99081589 475 RT5616_L_MUTE | RT5616_R_MUTE, 0);
b1d15059
BL		 476 break;
477
478 case SND_SOC_DAPM_POST_PMD:
479 snd_soc_update_bits(codec, RT5616_ADC_DIG_VOL,
99081589
CW		 480 RT5616_L_MUTE | RT5616_R_MUTE,
481 RT5616_L_MUTE | RT5616_R_MUTE);
b1d15059
BL		 482 break;
483
484 default:
485 return 0;
486 }
487
488 return 0;
489}
490
491static int rt5616_charge_pump_event(struct snd_soc_dapm_widget *w,
99081589 492 struct snd_kcontrol *kcontrol, int event)
b1d15059
BL		 493{
494 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
495
496 switch (event) {
497 case SND_SOC_DAPM_POST_PMU:
498 /* depop parameters */
499 snd_soc_update_bits(codec, RT5616_DEPOP_M2,
99081589 500 RT5616_DEPOP_MASK, RT5616_DEPOP_MAN);
b1d15059 501 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589
CW		 502 RT5616_HP_CP_MASK | RT5616_HP_SG_MASK |
503 RT5616_HP_CB_MASK, RT5616_HP_CP_PU |
504 RT5616_HP_SG_DIS | RT5616_HP_CB_PU);
b1d15059 505 snd_soc_write(codec, RT5616_PR_BASE +
99081589 506 RT5616_HP_DCC_INT1, 0x9f00);
b1d15059
BL		 507 /* headphone amp power on */
508 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
99081589 509 RT5616_PWR_FV1 | RT5616_PWR_FV2, 0);
b1d15059 510 snd_soc_update_bits(codec, RT5616_PWR_VOL,
99081589
CW		 511 RT5616_PWR_HV_L | RT5616_PWR_HV_R,
512 RT5616_PWR_HV_L | RT5616_PWR_HV_R);
b1d15059 513 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
99081589
CW		 514 RT5616_PWR_HP_L | RT5616_PWR_HP_R |
515 RT5616_PWR_HA, RT5616_PWR_HP_L |
516 RT5616_PWR_HP_R | RT5616_PWR_HA);
b1d15059
BL		 517 msleep(50);
518 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
99081589
CW		 519 RT5616_PWR_FV1 | RT5616_PWR_FV2,
520 RT5616_PWR_FV1 | RT5616_PWR_FV2);
b1d15059
BL		 521
522 snd_soc_update_bits(codec, RT5616_CHARGE_PUMP,
99081589 523 RT5616_PM_HP_MASK, RT5616_PM_HP_HV);
b1d15059 524 snd_soc_update_bits(codec, RT5616_PR_BASE +
99081589 525 RT5616_CHOP_DAC_ADC, 0x0200, 0x0200);
b1d15059 526 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589
CW		 527 RT5616_HP_CO_MASK | RT5616_HP_SG_MASK,
528 RT5616_HP_CO_EN | RT5616_HP_SG_EN);
b1d15059
BL		 529 break;
530 case SND_SOC_DAPM_PRE_PMD:
531 snd_soc_update_bits(codec, RT5616_PR_BASE +
99081589 532 RT5616_CHOP_DAC_ADC, 0x0200, 0x0);
b1d15059 533 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589
CW		 534 RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK |
535 RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS |
536 RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS);
b1d15059
BL		 537 /* headphone amp power down */
538 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589
CW		 539 RT5616_SMT_TRIG_MASK |
540 RT5616_HP_CD_PD_MASK | RT5616_HP_CO_MASK |
541 RT5616_HP_CP_MASK | RT5616_HP_SG_MASK |
542 RT5616_HP_CB_MASK,
543 RT5616_SMT_TRIG_DIS | RT5616_HP_CD_PD_EN |
544 RT5616_HP_CO_DIS | RT5616_HP_CP_PD |
545 RT5616_HP_SG_EN | RT5616_HP_CB_PD);
b1d15059 546 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
99081589
CW		 547 RT5616_PWR_HP_L | RT5616_PWR_HP_R |
548 RT5616_PWR_HA, 0);
b1d15059
BL		 549 break;
550 default:
551 return 0;
552 }
553
554 return 0;
555}
556
557static int rt5616_hp_event(struct snd_soc_dapm_widget *w,
99081589 558 struct snd_kcontrol *kcontrol, int event)
b1d15059
BL		 559{
560 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
561
562 switch (event) {
563 case SND_SOC_DAPM_POST_PMU:
564 /* headphone unmute sequence */
565 snd_soc_update_bits(codec, RT5616_DEPOP_M3,
99081589
CW		 566 RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK |
567 RT5616_CP_FQ3_MASK,
568 RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ1_SFT |
569 RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT |
570 RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ3_SFT);
b1d15059 571 snd_soc_write(codec, RT5616_PR_BASE +
99081589 572 RT5616_MAMP_INT_REG2, 0xfc00);
b1d15059 573 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589 574 RT5616_SMT_TRIG_MASK, RT5616_SMT_TRIG_EN);
b1d15059 575 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589 576 RT5616_RSTN_MASK, RT5616_RSTN_EN);
b1d15059 577 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589
CW		 578 RT5616_RSTN_MASK | RT5616_HP_L_SMT_MASK |
579 RT5616_HP_R_SMT_MASK, RT5616_RSTN_DIS |
580 RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN);
b1d15059 581 snd_soc_update_bits(codec, RT5616_HP_VOL,
99081589 582 RT5616_L_MUTE | RT5616_R_MUTE, 0);
b1d15059
BL		 583 msleep(100);
584 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589
CW		 585 RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK |
586 RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS |
587 RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS);
b1d15059
BL		 588 msleep(20);
589 snd_soc_update_bits(codec, RT5616_HP_CALIB_AMP_DET,
99081589 590 RT5616_HPD_PS_MASK, RT5616_HPD_PS_EN);
b1d15059
BL		 591 break;
592
593 case SND_SOC_DAPM_PRE_PMD:
594 /* headphone mute sequence */
595 snd_soc_update_bits(codec, RT5616_DEPOP_M3,
99081589
CW		 596 RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK |
597 RT5616_CP_FQ3_MASK,
598 RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ1_SFT |
599 RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT |
600 RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ3_SFT);
b1d15059 601 snd_soc_write(codec, RT5616_PR_BASE +
99081589 602 RT5616_MAMP_INT_REG2, 0xfc00);
b1d15059 603 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589 604 RT5616_HP_SG_MASK, RT5616_HP_SG_EN);
b1d15059 605 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589 606 RT5616_RSTP_MASK, RT5616_RSTP_EN);
b1d15059 607 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589
CW		 608 RT5616_RSTP_MASK | RT5616_HP_L_SMT_MASK |
609 RT5616_HP_R_SMT_MASK, RT5616_RSTP_DIS |
610 RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN);
b1d15059 611 snd_soc_update_bits(codec, RT5616_HP_CALIB_AMP_DET,
99081589 612 RT5616_HPD_PS_MASK, RT5616_HPD_PS_DIS);
b1d15059
BL		 613 msleep(90);
614 snd_soc_update_bits(codec, RT5616_HP_VOL,
99081589
CW		 615 RT5616_L_MUTE | RT5616_R_MUTE,
616 RT5616_L_MUTE | RT5616_R_MUTE);
b1d15059
BL		 617 msleep(30);
618 break;
619
620 default:
621 return 0;
622 }
623
624 return 0;
625}
626
627static int rt5616_lout_event(struct snd_soc_dapm_widget *w,
99081589 628 struct snd_kcontrol *kcontrol, int event)
b1d15059
BL		 629{
630 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
631
632 switch (event) {
633 case SND_SOC_DAPM_POST_PMU:
634 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
99081589 635 RT5616_PWR_LM, RT5616_PWR_LM);
b1d15059 636 snd_soc_update_bits(codec, RT5616_LOUT_CTRL1,
99081589 637 RT5616_L_MUTE | RT5616_R_MUTE, 0);
b1d15059
BL		 638 break;
639
640 case SND_SOC_DAPM_PRE_PMD:
641 snd_soc_update_bits(codec, RT5616_LOUT_CTRL1,
99081589
CW		 642 RT5616_L_MUTE | RT5616_R_MUTE,
643 RT5616_L_MUTE | RT5616_R_MUTE);
b1d15059 644 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
99081589 645 RT5616_PWR_LM, 0);
b1d15059
BL		 646 break;
647
648 default:
649 return 0;
650 }
651
652 return 0;
653}
654
655static int rt5616_bst1_event(struct snd_soc_dapm_widget *w,
99081589 656 struct snd_kcontrol *kcontrol, int event)
b1d15059
BL		 657{
658 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
659
660 switch (event) {
661 case SND_SOC_DAPM_POST_PMU:
662 snd_soc_update_bits(codec, RT5616_PWR_ANLG2,
99081589 663 RT5616_PWR_BST1_OP2, RT5616_PWR_BST1_OP2);
b1d15059
BL		 664 break;
665
666 case SND_SOC_DAPM_PRE_PMD:
667 snd_soc_update_bits(codec, RT5616_PWR_ANLG2,
99081589 668 RT5616_PWR_BST1_OP2, 0);
b1d15059
BL		 669 break;
670
671 default:
672 return 0;
673 }
674
675 return 0;
676}
677
678static int rt5616_bst2_event(struct snd_soc_dapm_widget *w,
99081589 679 struct snd_kcontrol *kcontrol, int event)
b1d15059
BL		 680{
681 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
682
683 switch (event) {
684 case SND_SOC_DAPM_POST_PMU:
685 snd_soc_update_bits(codec, RT5616_PWR_ANLG2,
99081589 686 RT5616_PWR_BST2_OP2, RT5616_PWR_BST2_OP2);
b1d15059
BL		 687 break;
688
689 case SND_SOC_DAPM_PRE_PMD:
690 snd_soc_update_bits(codec, RT5616_PWR_ANLG2,
99081589 691 RT5616_PWR_BST2_OP2, 0);
b1d15059
BL		 692 break;
693
694 default:
695 return 0;
696 }
697
698 return 0;
699}
700
701static const struct snd_soc_dapm_widget rt5616_dapm_widgets[] = {
702 SND_SOC_DAPM_SUPPLY("PLL1", RT5616_PWR_ANLG2,
99081589 703 RT5616_PWR_PLL_BIT, 0, NULL, 0),
b1d15059
BL		 704 /* Input Side */
705 /* micbias */
706 SND_SOC_DAPM_SUPPLY("LDO", RT5616_PWR_ANLG1,
99081589 707 RT5616_PWR_LDO_BIT, 0, NULL, 0),
b1d15059 708 SND_SOC_DAPM_SUPPLY("micbias1", RT5616_PWR_ANLG2,
99081589 709 RT5616_PWR_MB1_BIT, 0, NULL, 0),
b1d15059
BL		 710
711 /* Input Lines */
712 SND_SOC_DAPM_INPUT("MIC1"),
713 SND_SOC_DAPM_INPUT("MIC2"),
714
715 SND_SOC_DAPM_INPUT("IN1P"),
716 SND_SOC_DAPM_INPUT("IN2P"),
717 SND_SOC_DAPM_INPUT("IN2N"),
718
719 /* Boost */
720 SND_SOC_DAPM_PGA_E("BST1", RT5616_PWR_ANLG2,
99081589
CW		 721 RT5616_PWR_BST1_BIT, 0, NULL, 0, rt5616_bst1_event,
722 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
b1d15059 723 SND_SOC_DAPM_PGA_E("BST2", RT5616_PWR_ANLG2,
99081589
CW		 724 RT5616_PWR_BST2_BIT, 0, NULL, 0, rt5616_bst2_event,
725 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
b1d15059
BL		 726 /* Input Volume */
727 SND_SOC_DAPM_PGA("INL1 VOL", RT5616_PWR_VOL,
99081589 728 RT5616_PWR_IN1_L_BIT, 0, NULL, 0),
b1d15059 729 SND_SOC_DAPM_PGA("INR1 VOL", RT5616_PWR_VOL,
99081589 730 RT5616_PWR_IN1_R_BIT, 0, NULL, 0),
b1d15059 731 SND_SOC_DAPM_PGA("INL2 VOL", RT5616_PWR_VOL,
99081589 732 RT5616_PWR_IN2_L_BIT, 0, NULL, 0),
b1d15059 733 SND_SOC_DAPM_PGA("INR2 VOL", RT5616_PWR_VOL,
99081589 734 RT5616_PWR_IN2_R_BIT, 0, NULL, 0),
b1d15059
BL		 735
736 /* REC Mixer */
737 SND_SOC_DAPM_MIXER("RECMIXL", RT5616_PWR_MIXER, RT5616_PWR_RM_L_BIT, 0,
99081589 738 rt5616_rec_l_mix, ARRAY_SIZE(rt5616_rec_l_mix)),
b1d15059 739 SND_SOC_DAPM_MIXER("RECMIXR", RT5616_PWR_MIXER, RT5616_PWR_RM_R_BIT, 0,
99081589 740 rt5616_rec_r_mix, ARRAY_SIZE(rt5616_rec_r_mix)),
b1d15059
BL		 741 /* ADCs */
742 SND_SOC_DAPM_ADC_E("ADC L", NULL, RT5616_PWR_DIG1,
99081589
CW		 743 RT5616_PWR_ADC_L_BIT, 0, rt5616_adc_event,
744 SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
b1d15059 745 SND_SOC_DAPM_ADC_E("ADC R", NULL, RT5616_PWR_DIG1,
99081589
CW		 746 RT5616_PWR_ADC_R_BIT, 0, rt5616_adc_event,
747 SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
b1d15059
BL		 748
749 /* ADC Mixer */
750 SND_SOC_DAPM_SUPPLY("stereo1 filter", RT5616_PWR_DIG2,
99081589 751 RT5616_PWR_ADC_STO1_F_BIT, 0, NULL, 0),
b1d15059 752 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0,
99081589
CW		 753 rt5616_sto1_adc_l_mix,
754 ARRAY_SIZE(rt5616_sto1_adc_l_mix)),
b1d15059 755 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0,
99081589
CW		 756 rt5616_sto1_adc_r_mix,
757 ARRAY_SIZE(rt5616_sto1_adc_r_mix)),
b1d15059
BL		 758
759 /* Digital Interface */
760 SND_SOC_DAPM_SUPPLY("I2S1", RT5616_PWR_DIG1,
99081589 761 RT5616_PWR_I2S1_BIT, 0, NULL, 0),
b1d15059
BL		 762 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
763 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
764 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
765 SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
766
767 /* Digital Interface Select */
768
769 /* Audio Interface */
770 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
771 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
772
773 /* Audio DSP */
774 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
775
776 /* Output Side */
777 /* DAC mixer before sound effect */
778 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
99081589 779 rt5616_dac_l_mix, ARRAY_SIZE(rt5616_dac_l_mix)),
b1d15059 780 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
99081589 781 rt5616_dac_r_mix, ARRAY_SIZE(rt5616_dac_r_mix)),
b1d15059
BL		 782
783 SND_SOC_DAPM_SUPPLY("Stero1 DAC Power", RT5616_PWR_DIG2,
99081589 784 RT5616_PWR_DAC_STO1_F_BIT, 0, NULL, 0),
b1d15059
BL		 785
786 /* DAC Mixer */
787 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
99081589
CW		 788 rt5616_sto_dac_l_mix,
789 ARRAY_SIZE(rt5616_sto_dac_l_mix)),
b1d15059 790 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
99081589
CW		 791 rt5616_sto_dac_r_mix,
792 ARRAY_SIZE(rt5616_sto_dac_r_mix)),
b1d15059
BL		 793
794 /* DACs */
795 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5616_PWR_DIG1,
99081589 796 RT5616_PWR_DAC_L1_BIT, 0),
b1d15059 797 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5616_PWR_DIG1,
99081589 798 RT5616_PWR_DAC_R1_BIT, 0),
b1d15059
BL		 799 /* OUT Mixer */
800 SND_SOC_DAPM_MIXER("OUT MIXL", RT5616_PWR_MIXER, RT5616_PWR_OM_L_BIT,
99081589 801 0, rt5616_out_l_mix, ARRAY_SIZE(rt5616_out_l_mix)),
b1d15059 802 SND_SOC_DAPM_MIXER("OUT MIXR", RT5616_PWR_MIXER, RT5616_PWR_OM_R_BIT,
99081589 803 0, rt5616_out_r_mix, ARRAY_SIZE(rt5616_out_r_mix)),
b1d15059
BL		 804 /* Output Volume */
805 SND_SOC_DAPM_PGA("OUTVOL L", RT5616_PWR_VOL,
99081589 806 RT5616_PWR_OV_L_BIT, 0, NULL, 0),
b1d15059 807 SND_SOC_DAPM_PGA("OUTVOL R", RT5616_PWR_VOL,
99081589 808 RT5616_PWR_OV_R_BIT, 0, NULL, 0),
b1d15059 809 SND_SOC_DAPM_PGA("HPOVOL L", RT5616_PWR_VOL,
99081589 810 RT5616_PWR_HV_L_BIT, 0, NULL, 0),
b1d15059 811 SND_SOC_DAPM_PGA("HPOVOL R", RT5616_PWR_VOL,
99081589 812 RT5616_PWR_HV_R_BIT, 0, NULL, 0),
b1d15059 813 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM,
99081589 814 0, 0, NULL, 0),
b1d15059 815 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM,
99081589 816 0, 0, NULL, 0),
b1d15059 817 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM,
99081589 818 0, 0, NULL, 0),
b1d15059 819 SND_SOC_DAPM_PGA("INL1", RT5616_PWR_VOL,
99081589 820 RT5616_PWR_IN1_L_BIT, 0, NULL, 0),
b1d15059 821 SND_SOC_DAPM_PGA("INR1", RT5616_PWR_VOL,
99081589 822 RT5616_PWR_IN1_R_BIT, 0, NULL, 0),
b1d15059 823 SND_SOC_DAPM_PGA("INL2", RT5616_PWR_VOL,
99081589 824 RT5616_PWR_IN2_L_BIT, 0, NULL, 0),
b1d15059 825 SND_SOC_DAPM_PGA("INR2", RT5616_PWR_VOL,
99081589 826 RT5616_PWR_IN2_R_BIT, 0, NULL, 0),
b1d15059
BL		 827 /* HPO/LOUT/Mono Mixer */
828 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
99081589 829 rt5616_hpo_mix, ARRAY_SIZE(rt5616_hpo_mix)),
b1d15059 830 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0,
99081589 831 rt5616_lout_mix, ARRAY_SIZE(rt5616_lout_mix)),
b1d15059
BL		 832
833 SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0,
99081589
CW		 834 rt5616_hp_event, SND_SOC_DAPM_PRE_PMD |
835 SND_SOC_DAPM_POST_PMU),
b1d15059 836 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0,
99081589
CW		 837 rt5616_lout_event, SND_SOC_DAPM_PRE_PMD |
838 SND_SOC_DAPM_POST_PMU),
b1d15059
BL		 839
840 SND_SOC_DAPM_SUPPLY_S("Charge Pump", 1, SND_SOC_NOPM, 0, 0,
99081589
CW		 841 rt5616_charge_pump_event, SND_SOC_DAPM_POST_PMU |
842 SND_SOC_DAPM_PRE_PMD),
b1d15059
BL		 843
844 /* Output Lines */
845 SND_SOC_DAPM_OUTPUT("HPOL"),
846 SND_SOC_DAPM_OUTPUT("HPOR"),
847 SND_SOC_DAPM_OUTPUT("LOUTL"),
848 SND_SOC_DAPM_OUTPUT("LOUTR"),
849};
850
851static const struct snd_soc_dapm_route rt5616_dapm_routes[] = {
852 {"IN1P", NULL, "LDO"},
853 {"IN2P", NULL, "LDO"},
854
855 {"IN1P", NULL, "MIC1"},
856 {"IN2P", NULL, "MIC2"},
857 {"IN2N", NULL, "MIC2"},
858
859 {"BST1", NULL, "IN1P"},
860 {"BST2", NULL, "IN2P"},
861 {"BST2", NULL, "IN2N"},
862 {"BST1", NULL, "micbias1"},
863 {"BST2", NULL, "micbias1"},
864
865 {"INL1 VOL", NULL, "IN2P"},
866 {"INR1 VOL", NULL, "IN2N"},
867
868 {"RECMIXL", "INL1 Switch", "INL1 VOL"},
869 {"RECMIXL", "BST2 Switch", "BST2"},
870 {"RECMIXL", "BST1 Switch", "BST1"},
871
872 {"RECMIXR", "INR1 Switch", "INR1 VOL"},
873 {"RECMIXR", "BST2 Switch", "BST2"},
874 {"RECMIXR", "BST1 Switch", "BST1"},
875
876 {"ADC L", NULL, "RECMIXL"},
877 {"ADC R", NULL, "RECMIXR"},
878
879 {"Stereo1 ADC MIXL", "ADC1 Switch", "ADC L"},
880 {"Stereo1 ADC MIXL", NULL, "stereo1 filter"},
881 {"stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll},
882
883 {"Stereo1 ADC MIXR", "ADC1 Switch", "ADC R"},
884 {"Stereo1 ADC MIXR", NULL, "stereo1 filter"},
885 {"stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll},
886
887 {"IF1 ADC1", NULL, "Stereo1 ADC MIXL"},
888 {"IF1 ADC1", NULL, "Stereo1 ADC MIXR"},
889 {"IF1 ADC1", NULL, "I2S1"},
890
891 {"AIF1TX", NULL, "IF1 ADC1"},
892
893 {"IF1 DAC", NULL, "AIF1RX"},
894 {"IF1 DAC", NULL, "I2S1"},
895
896 {"IF1 DAC1 L", NULL, "IF1 DAC"},
897 {"IF1 DAC1 R", NULL, "IF1 DAC"},
898
899 {"DAC MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL"},
900 {"DAC MIXL", "INF1 Switch", "IF1 DAC1 L"},
901 {"DAC MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR"},
902 {"DAC MIXR", "INF1 Switch", "IF1 DAC1 R"},
903
904 {"Audio DSP", NULL, "DAC MIXL"},
905 {"Audio DSP", NULL, "DAC MIXR"},
906
907 {"Stereo DAC MIXL", "DAC L1 Switch", "Audio DSP"},
908 {"Stereo DAC MIXL", "DAC R1 Switch", "DAC MIXR"},
909 {"Stereo DAC MIXL", NULL, "Stero1 DAC Power"},
910 {"Stereo DAC MIXR", "DAC R1 Switch", "Audio DSP"},
911 {"Stereo DAC MIXR", "DAC L1 Switch", "DAC MIXL"},
912 {"Stereo DAC MIXR", NULL, "Stero1 DAC Power"},
913
914 {"DAC L1", NULL, "Stereo DAC MIXL"},
915 {"DAC L1", NULL, "PLL1", is_sys_clk_from_pll},
916 {"DAC R1", NULL, "Stereo DAC MIXR"},
917 {"DAC R1", NULL, "PLL1", is_sys_clk_from_pll},
918
919 {"OUT MIXL", "BST1 Switch", "BST1"},
920 {"OUT MIXL", "BST2 Switch", "BST2"},
921 {"OUT MIXL", "INL1 Switch", "INL1 VOL"},
922 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
923 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
924
925 {"OUT MIXR", "BST2 Switch", "BST2"},
926 {"OUT MIXR", "BST1 Switch", "BST1"},
927 {"OUT MIXR", "INR1 Switch", "INR1 VOL"},
928 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
929 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
930
931 {"HPOVOL L", NULL, "OUT MIXL"},
932 {"HPOVOL R", NULL, "OUT MIXR"},
933 {"OUTVOL L", NULL, "OUT MIXL"},
934 {"OUTVOL R", NULL, "OUT MIXR"},
935
936 {"DAC 1", NULL, "DAC L1"},
937 {"DAC 1", NULL, "DAC R1"},
938 {"HPOVOL", NULL, "HPOVOL L"},
939 {"HPOVOL", NULL, "HPOVOL R"},
940 {"HPO MIX", "DAC1 Switch", "DAC 1"},
941 {"HPO MIX", "HPVOL Switch", "HPOVOL"},
942
943 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
944 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
945 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
946 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
947
948 {"HP amp", NULL, "HPO MIX"},
949 {"HP amp", NULL, "Charge Pump"},
950 {"HPOL", NULL, "HP amp"},
951 {"HPOR", NULL, "HP amp"},
952
953 {"LOUT amp", NULL, "LOUT MIX"},
954 {"LOUT amp", NULL, "Charge Pump"},
955 {"LOUTL", NULL, "LOUT amp"},
956 {"LOUTR", NULL, "LOUT amp"},
957
958};
959
960static int rt5616_hw_params(struct snd_pcm_substream *substream,
99081589
CW		 961 struct snd_pcm_hw_params *params,
962 struct snd_soc_dai *dai)
b1d15059
BL		 963{
964 struct snd_soc_pcm_runtime *rtd = substream->private_data;
965 struct snd_soc_codec *codec = rtd->codec;
966 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
967 unsigned int val_len = 0, val_clk, mask_clk;
968 int pre_div, bclk_ms, frame_size;
969
970 rt5616->lrck[dai->id] = params_rate(params);
971
972 pre_div = rl6231_get_clk_info(rt5616->sysclk, rt5616->lrck[dai->id]);
973
974 if (pre_div < 0) {
975 dev_err(codec->dev, "Unsupported clock setting\n");
976 return -EINVAL;
977 }
978 frame_size = snd_soc_params_to_frame_size(params);
979 if (frame_size < 0) {
980 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
981 return -EINVAL;
982 }
983 bclk_ms = frame_size > 32 ? 1 : 0;
984 rt5616->bclk[dai->id] = rt5616->lrck[dai->id] * (32 << bclk_ms);
985
986 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
987 rt5616->bclk[dai->id], rt5616->lrck[dai->id]);
988 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
99081589 989 bclk_ms, pre_div, dai->id);
b1d15059
BL		 990
991 switch (params_format(params)) {
992 case SNDRV_PCM_FORMAT_S16_LE:
993 break;
994 case SNDRV_PCM_FORMAT_S20_3LE:
995 val_len |= RT5616_I2S_DL_20;
996 break;
997 case SNDRV_PCM_FORMAT_S24_LE:
998 val_len |= RT5616_I2S_DL_24;
999 break;
1000 case SNDRV_PCM_FORMAT_S8:
1001 val_len |= RT5616_I2S_DL_8;
1002 break;
1003 default:
1004 return -EINVAL;
1005 }
1006
1007 mask_clk = RT5616_I2S_PD1_MASK;
1008 val_clk = pre_div << RT5616_I2S_PD1_SFT;
1009 snd_soc_update_bits(codec, RT5616_I2S1_SDP,
99081589 1010 RT5616_I2S_DL_MASK, val_len);
b1d15059
BL		 1011 snd_soc_update_bits(codec, RT5616_ADDA_CLK1, mask_clk, val_clk);
1012
b1d15059
BL		 1013 return 0;
1014}
1015
1016static int rt5616_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1017{
1018 struct snd_soc_codec *codec = dai->codec;
1019 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1020 unsigned int reg_val = 0;
1021
1022 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1023 case SND_SOC_DAIFMT_CBM_CFM:
1024 rt5616->master[dai->id] = 1;
1025 break;
1026 case SND_SOC_DAIFMT_CBS_CFS:
1027 reg_val |= RT5616_I2S_MS_S;
1028 rt5616->master[dai->id] = 0;
1029 break;
1030 default:
1031 return -EINVAL;
1032 }
1033
1034 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1035 case SND_SOC_DAIFMT_NB_NF:
1036 break;
1037 case SND_SOC_DAIFMT_IB_NF:
1038 reg_val |= RT5616_I2S_BP_INV;
1039 break;
1040 default:
1041 return -EINVAL;
1042 }
1043
1044 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1045 case SND_SOC_DAIFMT_I2S:
1046 break;
1047 case SND_SOC_DAIFMT_LEFT_J:
1048 reg_val |= RT5616_I2S_DF_LEFT;
1049 break;
1050 case SND_SOC_DAIFMT_DSP_A:
1051 reg_val |= RT5616_I2S_DF_PCM_A;
1052 break;
1053 case SND_SOC_DAIFMT_DSP_B:
1054 reg_val |= RT5616_I2S_DF_PCM_B;
1055 break;
1056 default:
1057 return -EINVAL;
1058 }
1059
1060 snd_soc_update_bits(codec, RT5616_I2S1_SDP,
99081589
CW		 1061 RT5616_I2S_MS_MASK | RT5616_I2S_BP_MASK |
1062 RT5616_I2S_DF_MASK, reg_val);
b1d15059
BL		 1063
1064 return 0;
1065}
1066
1067static int rt5616_set_dai_sysclk(struct snd_soc_dai *dai,
99081589 1068 int clk_id, unsigned int freq, int dir)
b1d15059
BL		 1069{
1070 struct snd_soc_codec *codec = dai->codec;
1071 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1072 unsigned int reg_val = 0;
1073
1074 if (freq == rt5616->sysclk && clk_id == rt5616->sysclk_src)
1075 return 0;
1076
1077 switch (clk_id) {
1078 case RT5616_SCLK_S_MCLK:
1079 reg_val |= RT5616_SCLK_SRC_MCLK;
1080 break;
1081 case RT5616_SCLK_S_PLL1:
1082 reg_val |= RT5616_SCLK_SRC_PLL1;
1083 break;
1084 default:
1085 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1086 return -EINVAL;
1087 }
99081589 1088
b1d15059 1089 snd_soc_update_bits(codec, RT5616_GLB_CLK,
99081589 1090 RT5616_SCLK_SRC_MASK, reg_val);
b1d15059
BL		 1091 rt5616->sysclk = freq;
1092 rt5616->sysclk_src = clk_id;
1093
1094 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1095
1096 return 0;
1097}
1098
1099static int rt5616_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
99081589 1100 unsigned int freq_in, unsigned int freq_out)
b1d15059
BL		 1101{
1102 struct snd_soc_codec *codec = dai->codec;
1103 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1104 struct rl6231_pll_code pll_code;
1105 int ret;
1106
1107 if (source == rt5616->pll_src && freq_in == rt5616->pll_in &&
1108 freq_out == rt5616->pll_out)
1109 return 0;
1110
1111 if (!freq_in || !freq_out) {
1112 dev_dbg(codec->dev, "PLL disabled\n");
1113
1114 rt5616->pll_in = 0;
1115 rt5616->pll_out = 0;
1116 snd_soc_update_bits(codec, RT5616_GLB_CLK,
99081589
CW		 1117 RT5616_SCLK_SRC_MASK,
1118 RT5616_SCLK_SRC_MCLK);
b1d15059
BL		 1119 return 0;
1120 }
1121
1122 switch (source) {
1123 case RT5616_PLL1_S_MCLK:
1124 snd_soc_update_bits(codec, RT5616_GLB_CLK,
99081589
CW		 1125 RT5616_PLL1_SRC_MASK,
1126 RT5616_PLL1_SRC_MCLK);
b1d15059
BL		 1127 break;
1128 case RT5616_PLL1_S_BCLK1:
1129 case RT5616_PLL1_S_BCLK2:
1130 snd_soc_update_bits(codec, RT5616_GLB_CLK,
99081589
CW		 1131 RT5616_PLL1_SRC_MASK,
1132 RT5616_PLL1_SRC_BCLK1);
b1d15059
BL		 1133 break;
1134 default:
1135 dev_err(codec->dev, "Unknown PLL source %d\n", source);
1136 return -EINVAL;
1137 }
1138
1139 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
1140 if (ret < 0) {
1141 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
1142 return ret;
1143 }
1144
1145 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
1146 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
1147 pll_code.n_code, pll_code.k_code);
1148
1149 snd_soc_write(codec, RT5616_PLL_CTRL1,
99081589 1150 pll_code.n_code << RT5616_PLL_N_SFT | pll_code.k_code);
b1d15059 1151 snd_soc_write(codec, RT5616_PLL_CTRL2,
99081589
CW		 1152 (pll_code.m_bp ? 0 : pll_code.m_code) <<
1153 RT5616_PLL_M_SFT |
1154 pll_code.m_bp << RT5616_PLL_M_BP_SFT);
b1d15059
BL		 1155
1156 rt5616->pll_in = freq_in;
1157 rt5616->pll_out = freq_out;
1158 rt5616->pll_src = source;
1159
1160 return 0;
1161}
1162
1163static int rt5616_set_bias_level(struct snd_soc_codec *codec,
99081589 1164 enum snd_soc_bias_level level)
b1d15059 1165{
76d3204e
CW		 1166 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1167 int ret;
1168
b1d15059 1169 switch (level) {
76d3204e
CW		 1170
1171 case SND_SOC_BIAS_ON:
1172 break;
1173
1174 case SND_SOC_BIAS_PREPARE:
1175 /*
1176 * SND_SOC_BIAS_PREPARE is called while preparing for a
1177 * transition to ON or away from ON. If current bias_level
1178 * is SND_SOC_BIAS_ON, then it is preparing for a transition
1179 * away from ON. Disable the clock in that case, otherwise
1180 * enable it.
1181 */
1182 if (IS_ERR(rt5616->mclk))
1183 break;
1184
1185 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_ON) {
1186 clk_disable_unprepare(rt5616->mclk);
1187 } else {
1188 ret = clk_prepare_enable(rt5616->mclk);
1189 if (ret)
1190 return ret;
1191 }
1192 break;
1193
b1d15059
BL		 1194 case SND_SOC_BIAS_STANDBY:
1195 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
1196 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
99081589
CW		 1197 RT5616_PWR_VREF1 | RT5616_PWR_MB |
1198 RT5616_PWR_BG | RT5616_PWR_VREF2,
1199 RT5616_PWR_VREF1 | RT5616_PWR_MB |
1200 RT5616_PWR_BG | RT5616_PWR_VREF2);
b1d15059
BL		 1201 mdelay(10);
1202 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
99081589
CW		 1203 RT5616_PWR_FV1 | RT5616_PWR_FV2,
1204 RT5616_PWR_FV1 | RT5616_PWR_FV2);
b1d15059 1205 snd_soc_update_bits(codec, RT5616_D_MISC,
99081589
CW		 1206 RT5616_D_GATE_EN,
1207 RT5616_D_GATE_EN);
b1d15059
BL		 1208 }
1209 break;
1210
1211 case SND_SOC_BIAS_OFF:
1212 snd_soc_update_bits(codec, RT5616_D_MISC, RT5616_D_GATE_EN, 0);
1213 snd_soc_write(codec, RT5616_PWR_DIG1, 0x0000);
1214 snd_soc_write(codec, RT5616_PWR_DIG2, 0x0000);
1215 snd_soc_write(codec, RT5616_PWR_VOL, 0x0000);
1216 snd_soc_write(codec, RT5616_PWR_MIXER, 0x0000);
1217 snd_soc_write(codec, RT5616_PWR_ANLG1, 0x0000);
1218 snd_soc_write(codec, RT5616_PWR_ANLG2, 0x0000);
1219 break;
1220
1221 default:
1222 break;
1223 }
1224
1225 return 0;
1226}
1227
1228static int rt5616_probe(struct snd_soc_codec *codec)
1229{
1230 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1231
76d3204e
CW		 1232 /* Check if MCLK provided */
1233 rt5616->mclk = devm_clk_get(codec->dev, "mclk");
1234 if (PTR_ERR(rt5616->mclk) == -EPROBE_DEFER)
1235 return -EPROBE_DEFER;
1236
b1d15059
BL		 1237 rt5616->codec = codec;
1238
1239 return 0;
1240}
1241
1242#ifdef CONFIG_PM
1243static int rt5616_suspend(struct snd_soc_codec *codec)
1244{
1245 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1246
1247 regcache_cache_only(rt5616->regmap, true);
1248 regcache_mark_dirty(rt5616->regmap);
1249
1250 return 0;
1251}
1252
1253static int rt5616_resume(struct snd_soc_codec *codec)
1254{
1255 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1256
1257 regcache_cache_only(rt5616->regmap, false);
1258 regcache_sync(rt5616->regmap);
1259 return 0;
1260}
1261#else
1262#define rt5616_suspend NULL
1263#define rt5616_resume NULL
1264#endif
1265
4e26ad80 1266#define RT5616_STEREO_RATES SNDRV_PCM_RATE_8000_192000
b1d15059
BL		 1267#define RT5616_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1268 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1269
b1d15059
BL		 1270struct snd_soc_dai_ops rt5616_aif_dai_ops = {
1271 .hw_params = rt5616_hw_params,
1272 .set_fmt = rt5616_set_dai_fmt,
1273 .set_sysclk = rt5616_set_dai_sysclk,
1274 .set_pll = rt5616_set_dai_pll,
1275};
1276
1277struct snd_soc_dai_driver rt5616_dai[] = {
1278 {
1279 .name = "rt5616-aif1",
1280 .id = RT5616_AIF1,
1281 .playback = {
1282 .stream_name = "AIF1 Playback",
1283 .channels_min = 1,
1284 .channels_max = 2,
1285 .rates = RT5616_STEREO_RATES,
1286 .formats = RT5616_FORMATS,
1287 },
1288 .capture = {
1289 .stream_name = "AIF1 Capture",
1290 .channels_min = 1,
1291 .channels_max = 2,
1292 .rates = RT5616_STEREO_RATES,
1293 .formats = RT5616_FORMATS,
1294 },
1295 .ops = &rt5616_aif_dai_ops,
1296 },
1297};
1298
1299static struct snd_soc_codec_driver soc_codec_dev_rt5616 = {
1300 .probe = rt5616_probe,
1301 .suspend = rt5616_suspend,
1302 .resume = rt5616_resume,
1303 .set_bias_level = rt5616_set_bias_level,
1304 .idle_bias_off = true,
947cd148
KM		 1305 .component_driver = {
1306 .controls = rt5616_snd_controls,
1307 .num_controls = ARRAY_SIZE(rt5616_snd_controls),
1308 .dapm_widgets = rt5616_dapm_widgets,
1309 .num_dapm_widgets = ARRAY_SIZE(rt5616_dapm_widgets),
1310 .dapm_routes = rt5616_dapm_routes,
1311 .num_dapm_routes = ARRAY_SIZE(rt5616_dapm_routes),
1312 },
b1d15059
BL		 1313};
1314
1315static const struct regmap_config rt5616_regmap = {
1316 .reg_bits = 8,
1317 .val_bits = 16,
1318 .use_single_rw = true,
1319 .max_register = RT5616_DEVICE_ID + 1 + (ARRAY_SIZE(rt5616_ranges) *
1320 RT5616_PR_SPACING),
1321 .volatile_reg = rt5616_volatile_register,
1322 .readable_reg = rt5616_readable_register,
1323 .cache_type = REGCACHE_RBTREE,
1324 .reg_defaults = rt5616_reg,
1325 .num_reg_defaults = ARRAY_SIZE(rt5616_reg),
1326 .ranges = rt5616_ranges,
1327 .num_ranges = ARRAY_SIZE(rt5616_ranges),
1328};
1329
1330static const struct i2c_device_id rt5616_i2c_id[] = {
1331 { "rt5616", 0 },
1332 { }
1333};
1334MODULE_DEVICE_TABLE(i2c, rt5616_i2c_id);
1335
e17ff2de
CW		 1336#if defined(CONFIG_OF)
1337static const struct of_device_id rt5616_of_match[] = {
1338 { .compatible = "realtek,rt5616", },
1339 {},
1340};
1341MODULE_DEVICE_TABLE(of, rt5616_of_match);
1342#endif
1343
b1d15059 1344static int rt5616_i2c_probe(struct i2c_client *i2c,
99081589 1345 const struct i2c_device_id *id)
b1d15059
BL		 1346{
1347 struct rt5616_priv *rt5616;
1348 unsigned int val;
1349 int ret;
1350
1351 rt5616 = devm_kzalloc(&i2c->dev, sizeof(struct rt5616_priv),
99081589
CW		 1352 GFP_KERNEL);
1353 if (!rt5616)
b1d15059
BL		 1354 return -ENOMEM;
1355
1356 i2c_set_clientdata(i2c, rt5616);
1357
1358 rt5616->regmap = devm_regmap_init_i2c(i2c, &rt5616_regmap);
1359 if (IS_ERR(rt5616->regmap)) {
1360 ret = PTR_ERR(rt5616->regmap);
1361 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1362 ret);
1363 return ret;
1364 }
1365
1366 regmap_read(rt5616->regmap, RT5616_DEVICE_ID, &val);
1367 if (val != 0x6281) {
1368 dev_err(&i2c->dev,
1369 "Device with ID register %#x is not rt5616\n",
1370 val);
36ddd489 1371 return -ENODEV;
b1d15059
BL		 1372 }
1373 regmap_write(rt5616->regmap, RT5616_RESET, 0);
1374 regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
99081589
CW		 1375 RT5616_PWR_VREF1 | RT5616_PWR_MB |
1376 RT5616_PWR_BG | RT5616_PWR_VREF2,
1377 RT5616_PWR_VREF1 | RT5616_PWR_MB |
1378 RT5616_PWR_BG | RT5616_PWR_VREF2);
b1d15059
BL		 1379 mdelay(10);
1380 regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
99081589
CW		 1381 RT5616_PWR_FV1 | RT5616_PWR_FV2,
1382 RT5616_PWR_FV1 | RT5616_PWR_FV2);
b1d15059
BL		 1383
1384 ret = regmap_register_patch(rt5616->regmap, init_list,
1385 ARRAY_SIZE(init_list));
1386 if (ret != 0)
1387 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
1388
1389 regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
99081589 1390 RT5616_PWR_LDO_DVO_MASK, RT5616_PWR_LDO_DVO_1_2V);
b1d15059
BL		 1391
1392 return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5616,
99081589 1393 rt5616_dai, ARRAY_SIZE(rt5616_dai));
b1d15059
BL		 1394}
1395
1396static int rt5616_i2c_remove(struct i2c_client *i2c)
1397{
1398 snd_soc_unregister_codec(&i2c->dev);
1399
1400 return 0;
1401}
1402
1403static void rt5616_i2c_shutdown(struct i2c_client *client)
1404{
1405 struct rt5616_priv *rt5616 = i2c_get_clientdata(client);
1406
1407 regmap_write(rt5616->regmap, RT5616_HP_VOL, 0xc8c8);
1408 regmap_write(rt5616->regmap, RT5616_LOUT_CTRL1, 0xc8c8);
b1d15059
BL		 1409}
1410
1411static struct i2c_driver rt5616_i2c_driver = {
1412 .driver = {
1413 .name = "rt5616",
e17ff2de 1414 .of_match_table = of_match_ptr(rt5616_of_match),
b1d15059
BL		 1415 },
1416 .probe = rt5616_i2c_probe,
1417 .remove = rt5616_i2c_remove,
1418 .shutdown = rt5616_i2c_shutdown,
1419 .id_table = rt5616_i2c_id,
1420};
1421module_i2c_driver(rt5616_i2c_driver);
1422
1423MODULE_DESCRIPTION("ASoC RT5616 driver");
1424MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
1425MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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