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Merge remote-tracking branch 'vfio/next'
[deliverable/linux.git] / sound / soc / codecs / wm8753.c
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1f53aee0
LG		 1/*
2 * wm8753.c -- WM8753 ALSA Soc Audio driver
3 *
656baaeb 4 * Copyright 2003-11 Wolfson Microelectronics PLC.
d331124d 5 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
1f53aee0
LG		 6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * Notes:
13 * The WM8753 is a low power, high quality stereo codec with integrated PCM
14 * codec designed for portable digital telephony applications.
15 *
16 * Dual DAI:-
17 *
18 * This driver support 2 DAI PCM's. This makes the default PCM available for
19 * HiFi audio (e.g. MP3, ogg) playback/capture and the other PCM available for
20 * voice.
21 *
22 * Please note that the voice PCM can be connected directly to a Bluetooth
23 * codec or GSM modem and thus cannot be read or written to, although it is
24 * available to be configured with snd_hw_params(), etc and kcontrols in the
25 * normal alsa manner.
26 *
27 * Fast DAI switching:-
28 *
29 * The driver can now fast switch between the DAI configurations via a
30 * an alsa kcontrol. This allows the PCM to remain open.
31 *
32 */
33
34#include <linux/module.h>
1f53aee0
LG		 35#include <linux/kernel.h>
36#include <linux/init.h>
37#include <linux/delay.h>
38#include <linux/pm.h>
39#include <linux/i2c.h>
70e14122 40#include <linux/of_device.h>
d3398ff0 41#include <linux/regmap.h>
dd0c0c80 42#include <linux/spi/spi.h>
5a0e3ad6 43#include <linux/slab.h>
1f53aee0
LG		 44#include <sound/core.h>
45#include <sound/pcm.h>
46#include <sound/pcm_params.h>
47#include <sound/soc.h>
1f53aee0 48#include <sound/initval.h>
2d6a4ac9 49#include <sound/tlv.h>
1f53aee0
LG		 50#include <asm/div64.h>
51
52#include "wm8753.h"
53
1f53aee0
LG		 54static int caps_charge = 2000;
55module_param(caps_charge, int, 0);
56MODULE_PARM_DESC(caps_charge, "WM8753 cap charge time (msecs)");
57
338ee253
LPC		 58static int wm8753_hifi_write_dai_fmt(struct snd_soc_codec *codec,
59 unsigned int fmt);
60static int wm8753_voice_write_dai_fmt(struct snd_soc_codec *codec,
61 unsigned int fmt);
1f53aee0 62
1f53aee0
LG		 63/*
64 * wm8753 register cache
65 * We can't read the WM8753 register space when we
66 * are using 2 wire for device control, so we cache them instead.
67 */
d3398ff0
MB		 68static const struct reg_default wm8753_reg_defaults[] = {
69 { 0x00, 0x0000 },
70 { 0x01, 0x0008 },
71 { 0x02, 0x0000 },
72 { 0x03, 0x000a },
73 { 0x04, 0x000a },
74 { 0x05, 0x0033 },
75 { 0x06, 0x0000 },
76 { 0x07, 0x0007 },
77 { 0x08, 0x00ff },
78 { 0x09, 0x00ff },
79 { 0x0a, 0x000f },
80 { 0x0b, 0x000f },
81 { 0x0c, 0x007b },
82 { 0x0d, 0x0000 },
83 { 0x0e, 0x0032 },
84 { 0x0f, 0x0000 },
85 { 0x10, 0x00c3 },
86 { 0x11, 0x00c3 },
87 { 0x12, 0x00c0 },
88 { 0x13, 0x0000 },
89 { 0x14, 0x0000 },
90 { 0x15, 0x0000 },
91 { 0x16, 0x0000 },
92 { 0x17, 0x0000 },
93 { 0x18, 0x0000 },
94 { 0x19, 0x0000 },
95 { 0x1a, 0x0000 },
96 { 0x1b, 0x0000 },
97 { 0x1c, 0x0000 },
98 { 0x1d, 0x0000 },
99 { 0x1e, 0x0000 },
100 { 0x1f, 0x0000 },
101 { 0x20, 0x0055 },
102 { 0x21, 0x0005 },
103 { 0x22, 0x0050 },
104 { 0x23, 0x0055 },
105 { 0x24, 0x0050 },
106 { 0x25, 0x0055 },
107 { 0x26, 0x0050 },
108 { 0x27, 0x0055 },
109 { 0x28, 0x0079 },
110 { 0x29, 0x0079 },
111 { 0x2a, 0x0079 },
112 { 0x2b, 0x0079 },
113 { 0x2c, 0x0079 },
114 { 0x2d, 0x0000 },
115 { 0x2e, 0x0000 },
116 { 0x2f, 0x0000 },
117 { 0x30, 0x0000 },
118 { 0x31, 0x0097 },
119 { 0x32, 0x0097 },
120 { 0x33, 0x0000 },
121 { 0x34, 0x0004 },
122 { 0x35, 0x0000 },
123 { 0x36, 0x0083 },
124 { 0x37, 0x0024 },
125 { 0x38, 0x01ba },
126 { 0x39, 0x0000 },
127 { 0x3a, 0x0083 },
128 { 0x3b, 0x0024 },
129 { 0x3c, 0x01ba },
130 { 0x3d, 0x0000 },
131 { 0x3e, 0x0000 },
132 { 0x3f, 0x0000 },
1f53aee0
LG		 133};
134
d3398ff0
MB		 135static bool wm8753_volatile(struct device *dev, unsigned int reg)
136{
137 return reg == WM8753_RESET;
138}
139
c2bac160
MB		 140/* codec private data */
141struct wm8753_priv {
d3398ff0 142 struct regmap *regmap;
c2bac160
MB		 143 unsigned int sysclk;
144 unsigned int pcmclk;
338ee253
LPC		 145
146 unsigned int voice_fmt;
147 unsigned int hifi_fmt;
148
f0fba2ad 149 int dai_func;
35afd922 150 struct delayed_work charge_work;
c2bac160
MB		 151};
152
776065e3 153#define wm8753_reset(c) snd_soc_write(c, WM8753_RESET, 0)
1f53aee0
LG		 154
155/*
156 * WM8753 Controls
157 */
158static const char *wm8753_base[] = {"Linear Control", "Adaptive Boost"};
159static const char *wm8753_base_filter[] =
160 {"130Hz @ 48kHz", "200Hz @ 48kHz", "100Hz @ 16kHz", "400Hz @ 48kHz",
161 "100Hz @ 8kHz", "200Hz @ 8kHz"};
162static const char *wm8753_treble[] = {"8kHz", "4kHz"};
163static const char *wm8753_alc_func[] = {"Off", "Right", "Left", "Stereo"};
164static const char *wm8753_ng_type[] = {"Constant PGA Gain", "Mute ADC Output"};
165static const char *wm8753_3d_func[] = {"Capture", "Playback"};
166static const char *wm8753_3d_uc[] = {"2.2kHz", "1.5kHz"};
167static const char *wm8753_3d_lc[] = {"200Hz", "500Hz"};
168static const char *wm8753_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"};
169static const char *wm8753_mono_mix[] = {"Stereo", "Left", "Right", "Mono"};
170static const char *wm8753_dac_phase[] = {"Non Inverted", "Inverted"};
171static const char *wm8753_line_mix[] = {"Line 1 + 2", "Line 1 - 2",
172 "Line 1", "Line 2"};
173static const char *wm8753_mono_mux[] = {"Line Mix", "Rx Mix"};
174static const char *wm8753_right_mux[] = {"Line 2", "Rx Mix"};
175static const char *wm8753_left_mux[] = {"Line 1", "Rx Mix"};
176static const char *wm8753_rxmsel[] = {"RXP - RXN", "RXP + RXN", "RXP", "RXN"};
177static const char *wm8753_sidetone_mux[] = {"Left PGA", "Mic 1", "Mic 2",
178 "Right PGA"};
179static const char *wm8753_mono2_src[] = {"Inverted Mono 1", "Left", "Right",
180 "Left + Right"};
181static const char *wm8753_out3[] = {"VREF", "ROUT2", "Left + Right"};
182static const char *wm8753_out4[] = {"VREF", "Capture ST", "LOUT2"};
183static const char *wm8753_radcsel[] = {"PGA", "Line or RXP-RXN", "Sidetone"};
184static const char *wm8753_ladcsel[] = {"PGA", "Line or RXP-RXN", "Line"};
185static const char *wm8753_mono_adc[] = {"Stereo", "Analogue Mix Left",
186 "Analogue Mix Right", "Digital Mono Mix"};
187static const char *wm8753_adc_hp[] = {"3.4Hz @ 48kHz", "82Hz @ 16k",
188 "82Hz @ 8kHz", "170Hz @ 8kHz"};
189static const char *wm8753_adc_filter[] = {"HiFi", "Voice"};
190static const char *wm8753_mic_sel[] = {"Mic 1", "Mic 2", "Mic 3"};
191static const char *wm8753_dai_mode[] = {"DAI 0", "DAI 1", "DAI 2", "DAI 3"};
192static const char *wm8753_dat_sel[] = {"Stereo", "Left ADC", "Right ADC",
193 "Channel Swap"};
ae092c9e 194static const char *wm8753_rout2_phase[] = {"Non Inverted", "Inverted"};
1f53aee0
LG		 195
196static const struct soc_enum wm8753_enum[] = {
197SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base),
198SOC_ENUM_SINGLE(WM8753_BASS, 4, 6, wm8753_base_filter),
199SOC_ENUM_SINGLE(WM8753_TREBLE, 6, 2, wm8753_treble),
200SOC_ENUM_SINGLE(WM8753_ALC1, 7, 4, wm8753_alc_func),
201SOC_ENUM_SINGLE(WM8753_NGATE, 1, 2, wm8753_ng_type),
202SOC_ENUM_SINGLE(WM8753_3D, 7, 2, wm8753_3d_func),
203SOC_ENUM_SINGLE(WM8753_3D, 6, 2, wm8753_3d_uc),
204SOC_ENUM_SINGLE(WM8753_3D, 5, 2, wm8753_3d_lc),
205SOC_ENUM_SINGLE(WM8753_DAC, 1, 4, wm8753_deemp),
206SOC_ENUM_SINGLE(WM8753_DAC, 4, 4, wm8753_mono_mix),
207SOC_ENUM_SINGLE(WM8753_DAC, 6, 2, wm8753_dac_phase),
208SOC_ENUM_SINGLE(WM8753_INCTL1, 3, 4, wm8753_line_mix),
209SOC_ENUM_SINGLE(WM8753_INCTL1, 2, 2, wm8753_mono_mux),
210SOC_ENUM_SINGLE(WM8753_INCTL1, 1, 2, wm8753_right_mux),
211SOC_ENUM_SINGLE(WM8753_INCTL1, 0, 2, wm8753_left_mux),
212SOC_ENUM_SINGLE(WM8753_INCTL2, 6, 4, wm8753_rxmsel),
213SOC_ENUM_SINGLE(WM8753_INCTL2, 4, 4, wm8753_sidetone_mux),
214SOC_ENUM_SINGLE(WM8753_OUTCTL, 7, 4, wm8753_mono2_src),
215SOC_ENUM_SINGLE(WM8753_OUTCTL, 0, 3, wm8753_out3),
216SOC_ENUM_SINGLE(WM8753_ADCTL2, 7, 3, wm8753_out4),
217SOC_ENUM_SINGLE(WM8753_ADCIN, 2, 3, wm8753_radcsel),
218SOC_ENUM_SINGLE(WM8753_ADCIN, 0, 3, wm8753_ladcsel),
219SOC_ENUM_SINGLE(WM8753_ADCIN, 4, 4, wm8753_mono_adc),
220SOC_ENUM_SINGLE(WM8753_ADC, 2, 4, wm8753_adc_hp),
221SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753_adc_filter),
222SOC_ENUM_SINGLE(WM8753_MICBIAS, 6, 3, wm8753_mic_sel),
223SOC_ENUM_SINGLE(WM8753_IOCTL, 2, 4, wm8753_dai_mode),
224SOC_ENUM_SINGLE(WM8753_ADC, 7, 4, wm8753_dat_sel),
ae092c9e 225SOC_ENUM_SINGLE(WM8753_OUTCTL, 2, 2, wm8753_rout2_phase),
1f53aee0
LG		 226};
227
228
229static int wm8753_get_dai(struct snd_kcontrol *kcontrol,
230 struct snd_ctl_elem_value *ucontrol)
231{
ea53bf77 232 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
338ee253 233 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1f53aee0 234
0cad1053 235 ucontrol->value.enumerated.item[0] = wm8753->dai_func;
1f53aee0
LG		 236 return 0;
237}
238
239static int wm8753_set_dai(struct snd_kcontrol *kcontrol,
240 struct snd_ctl_elem_value *ucontrol)
241{
ea53bf77 242 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
f0fba2ad 243 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
338ee253
LPC		 244 u16 ioctl;
245
0cad1053 246 if (wm8753->dai_func == ucontrol->value.enumerated.item[0])
2391a0e0
TJL		 247 return 0;
248
5c898e74 249 if (snd_soc_codec_is_active(codec))
338ee253
LPC		 250 return -EBUSY;
251
252 ioctl = snd_soc_read(codec, WM8753_IOCTL);
253
0cad1053 254 wm8753->dai_func = ucontrol->value.enumerated.item[0];
338ee253
LPC		 255
256 if (((ioctl >> 2) & 0x3) == wm8753->dai_func)
257 return 1;
258
259 ioctl = (ioctl & 0x1f3) | (wm8753->dai_func << 2);
260 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1f53aee0 261
1f53aee0 262
338ee253
LPC		 263 wm8753_hifi_write_dai_fmt(codec, wm8753->hifi_fmt);
264 wm8753_voice_write_dai_fmt(codec, wm8753->voice_fmt);
1f53aee0 265
1f53aee0
LG		 266 return 1;
267}
268
2cc8c609
MM		 269static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 300, 0);
270static const DECLARE_TLV_DB_SCALE(mic_preamp_tlv, 1200, 600, 0);
271static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
272static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
11c3727c 273static const DECLARE_TLV_DB_RANGE(out_tlv,
2cc8c609
MM		 274 /* 0000000 - 0101111 = "Analogue mute" */
275 0, 48, TLV_DB_SCALE_ITEM(-25500, 0, 0),
11c3727c
LPC		 276 48, 127, TLV_DB_SCALE_ITEM(-7300, 100, 0)
277);
2cc8c609
MM		 278static const DECLARE_TLV_DB_SCALE(mix_tlv, -1500, 300, 0);
279static const DECLARE_TLV_DB_SCALE(voice_mix_tlv, -1200, 300, 0);
280static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
2d6a4ac9 281
1f53aee0 282static const struct snd_kcontrol_new wm8753_snd_controls[] = {
2cc8c609
MM		 283SOC_DOUBLE_R_TLV("PCM Volume", WM8753_LDAC, WM8753_RDAC, 0, 255, 0, dac_tlv),
284
285SOC_DOUBLE_R_TLV("ADC Capture Volume", WM8753_LADC, WM8753_RADC, 0, 255, 0,
286 adc_tlv),
287
288SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8753_LOUT1V, WM8753_ROUT1V,
289 0, 127, 0, out_tlv),
290SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8753_LOUT2V, WM8753_ROUT2V, 0,
291 127, 0, out_tlv),
292
293SOC_SINGLE_TLV("Mono Playback Volume", WM8753_MOUTV, 0, 127, 0, out_tlv),
294
295SOC_DOUBLE_R_TLV("Bypass Playback Volume", WM8753_LOUTM1, WM8753_ROUTM1, 4, 7,
296 1, mix_tlv),
297SOC_DOUBLE_R_TLV("Sidetone Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 4,
298 7, 1, mix_tlv),
299SOC_DOUBLE_R_TLV("Voice Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 0, 7,
300 1, voice_mix_tlv),
301
302SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8753_LOUT1V, WM8753_ROUT1V, 7,
303 1, 0),
304SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8753_LOUT2V, WM8753_ROUT2V, 7,
305 1, 0),
306
307SOC_SINGLE_TLV("Mono Bypass Playback Volume", WM8753_MOUTM1, 4, 7, 1, mix_tlv),
308SOC_SINGLE_TLV("Mono Sidetone Playback Volume", WM8753_MOUTM2, 4, 7, 1,
309 mix_tlv),
310SOC_SINGLE_TLV("Mono Voice Playback Volume", WM8753_MOUTM2, 0, 7, 1,
311 voice_mix_tlv),
1f53aee0
LG		 312SOC_SINGLE("Mono Playback ZC Switch", WM8753_MOUTV, 7, 1, 0),
313
314SOC_ENUM("Bass Boost", wm8753_enum[0]),
315SOC_ENUM("Bass Filter", wm8753_enum[1]),
316SOC_SINGLE("Bass Volume", WM8753_BASS, 0, 15, 1),
317
318SOC_SINGLE("Treble Volume", WM8753_TREBLE, 0, 15, 1),
319SOC_ENUM("Treble Cut-off", wm8753_enum[2]),
320
2cc8c609
MM		 321SOC_DOUBLE_TLV("Sidetone Capture Volume", WM8753_RECMIX1, 0, 4, 7, 1,
322 rec_mix_tlv),
323SOC_SINGLE_TLV("Voice Sidetone Capture Volume", WM8753_RECMIX2, 0, 7, 1,
324 rec_mix_tlv),
1f53aee0 325
2cc8c609
MM		 326SOC_DOUBLE_R_TLV("Capture Volume", WM8753_LINVOL, WM8753_RINVOL, 0, 63, 0,
327 pga_tlv),
1f53aee0
LG		 328SOC_DOUBLE_R("Capture ZC Switch", WM8753_LINVOL, WM8753_RINVOL, 6, 1, 0),
329SOC_DOUBLE_R("Capture Switch", WM8753_LINVOL, WM8753_RINVOL, 7, 1, 1),
330
331SOC_ENUM("Capture Filter Select", wm8753_enum[23]),
332SOC_ENUM("Capture Filter Cut-off", wm8753_enum[24]),
333SOC_SINGLE("Capture Filter Switch", WM8753_ADC, 0, 1, 1),
334
335SOC_SINGLE("ALC Capture Target Volume", WM8753_ALC1, 0, 7, 0),
336SOC_SINGLE("ALC Capture Max Volume", WM8753_ALC1, 4, 7, 0),
337SOC_ENUM("ALC Capture Function", wm8753_enum[3]),
338SOC_SINGLE("ALC Capture ZC Switch", WM8753_ALC2, 8, 1, 0),
339SOC_SINGLE("ALC Capture Hold Time", WM8753_ALC2, 0, 15, 1),
340SOC_SINGLE("ALC Capture Decay Time", WM8753_ALC3, 4, 15, 1),
341SOC_SINGLE("ALC Capture Attack Time", WM8753_ALC3, 0, 15, 0),
342SOC_SINGLE("ALC Capture NG Threshold", WM8753_NGATE, 3, 31, 0),
343SOC_ENUM("ALC Capture NG Type", wm8753_enum[4]),
344SOC_SINGLE("ALC Capture NG Switch", WM8753_NGATE, 0, 1, 0),
345
346SOC_ENUM("3D Function", wm8753_enum[5]),
347SOC_ENUM("3D Upper Cut-off", wm8753_enum[6]),
348SOC_ENUM("3D Lower Cut-off", wm8753_enum[7]),
349SOC_SINGLE("3D Volume", WM8753_3D, 1, 15, 0),
350SOC_SINGLE("3D Switch", WM8753_3D, 0, 1, 0),
351
352SOC_SINGLE("Capture 6dB Attenuate", WM8753_ADCTL1, 2, 1, 0),
353SOC_SINGLE("Playback 6dB Attenuate", WM8753_ADCTL1, 1, 1, 0),
354
355SOC_ENUM("De-emphasis", wm8753_enum[8]),
356SOC_ENUM("Playback Mono Mix", wm8753_enum[9]),
357SOC_ENUM("Playback Phase", wm8753_enum[10]),
358
2cc8c609
MM		 359SOC_SINGLE_TLV("Mic2 Capture Volume", WM8753_INCTL1, 7, 3, 0, mic_preamp_tlv),
360SOC_SINGLE_TLV("Mic1 Capture Volume", WM8753_INCTL1, 5, 3, 0, mic_preamp_tlv),
1f53aee0
LG		 361
362SOC_ENUM_EXT("DAI Mode", wm8753_enum[26], wm8753_get_dai, wm8753_set_dai),
363
364SOC_ENUM("ADC Data Select", wm8753_enum[27]),
ae092c9e 365SOC_ENUM("ROUT2 Phase", wm8753_enum[28]),
1f53aee0
LG		 366};
367
1f53aee0
LG		 368/*
369 * _DAPM_ Controls
370 */
371
372/* Left Mixer */
373static const struct snd_kcontrol_new wm8753_left_mixer_controls[] = {
374SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_LOUTM2, 8, 1, 0),
375SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_LOUTM2, 7, 1, 0),
376SOC_DAPM_SINGLE("Left Playback Switch", WM8753_LOUTM1, 8, 1, 0),
377SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_LOUTM1, 7, 1, 0),
378};
379
380/* Right mixer */
381static const struct snd_kcontrol_new wm8753_right_mixer_controls[] = {
382SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_ROUTM2, 8, 1, 0),
383SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_ROUTM2, 7, 1, 0),
384SOC_DAPM_SINGLE("Right Playback Switch", WM8753_ROUTM1, 8, 1, 0),
385SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_ROUTM1, 7, 1, 0),
386};
387
388/* Mono mixer */
389static const struct snd_kcontrol_new wm8753_mono_mixer_controls[] = {
390SOC_DAPM_SINGLE("Left Playback Switch", WM8753_MOUTM1, 8, 1, 0),
391SOC_DAPM_SINGLE("Right Playback Switch", WM8753_MOUTM2, 8, 1, 0),
392SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_MOUTM2, 3, 1, 0),
393SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_MOUTM2, 7, 1, 0),
394SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_MOUTM1, 7, 1, 0),
395};
396
397/* Mono 2 Mux */
398static const struct snd_kcontrol_new wm8753_mono2_controls =
399SOC_DAPM_ENUM("Route", wm8753_enum[17]);
400
401/* Out 3 Mux */
402static const struct snd_kcontrol_new wm8753_out3_controls =
403SOC_DAPM_ENUM("Route", wm8753_enum[18]);
404
405/* Out 4 Mux */
406static const struct snd_kcontrol_new wm8753_out4_controls =
407SOC_DAPM_ENUM("Route", wm8753_enum[19]);
408
409/* ADC Mono Mix */
410static const struct snd_kcontrol_new wm8753_adc_mono_controls =
411SOC_DAPM_ENUM("Route", wm8753_enum[22]);
412
413/* Record mixer */
414static const struct snd_kcontrol_new wm8753_record_mixer_controls[] = {
415SOC_DAPM_SINGLE("Voice Capture Switch", WM8753_RECMIX2, 3, 1, 0),
416SOC_DAPM_SINGLE("Left Capture Switch", WM8753_RECMIX1, 3, 1, 0),
417SOC_DAPM_SINGLE("Right Capture Switch", WM8753_RECMIX1, 7, 1, 0),
418};
419
420/* Left ADC mux */
421static const struct snd_kcontrol_new wm8753_adc_left_controls =
422SOC_DAPM_ENUM("Route", wm8753_enum[21]);
423
424/* Right ADC mux */
425static const struct snd_kcontrol_new wm8753_adc_right_controls =
426SOC_DAPM_ENUM("Route", wm8753_enum[20]);
427
428/* MIC mux */
429static const struct snd_kcontrol_new wm8753_mic_mux_controls =
430SOC_DAPM_ENUM("Route", wm8753_enum[16]);
431
432/* ALC mixer */
433static const struct snd_kcontrol_new wm8753_alc_mixer_controls[] = {
434SOC_DAPM_SINGLE("Line Capture Switch", WM8753_INCTL2, 3, 1, 0),
435SOC_DAPM_SINGLE("Mic2 Capture Switch", WM8753_INCTL2, 2, 1, 0),
436SOC_DAPM_SINGLE("Mic1 Capture Switch", WM8753_INCTL2, 1, 1, 0),
437SOC_DAPM_SINGLE("Rx Capture Switch", WM8753_INCTL2, 0, 1, 0),
438};
439
440/* Left Line mux */
441static const struct snd_kcontrol_new wm8753_line_left_controls =
442SOC_DAPM_ENUM("Route", wm8753_enum[14]);
443
444/* Right Line mux */
445static const struct snd_kcontrol_new wm8753_line_right_controls =
446SOC_DAPM_ENUM("Route", wm8753_enum[13]);
447
448/* Mono Line mux */
449static const struct snd_kcontrol_new wm8753_line_mono_controls =
450SOC_DAPM_ENUM("Route", wm8753_enum[12]);
451
452/* Line mux and mixer */
453static const struct snd_kcontrol_new wm8753_line_mux_mix_controls =
454SOC_DAPM_ENUM("Route", wm8753_enum[11]);
455
456/* Rx mux and mixer */
457static const struct snd_kcontrol_new wm8753_rx_mux_mix_controls =
458SOC_DAPM_ENUM("Route", wm8753_enum[15]);
459
460/* Mic Selector Mux */
461static const struct snd_kcontrol_new wm8753_mic_sel_mux_controls =
462SOC_DAPM_ENUM("Route", wm8753_enum[25]);
463
464static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = {
465SND_SOC_DAPM_MICBIAS("Mic Bias", WM8753_PWR1, 5, 0),
466SND_SOC_DAPM_MIXER("Left Mixer", WM8753_PWR4, 0, 0,
467 &wm8753_left_mixer_controls[0], ARRAY_SIZE(wm8753_left_mixer_controls)),
468SND_SOC_DAPM_PGA("Left Out 1", WM8753_PWR3, 8, 0, NULL, 0),
469SND_SOC_DAPM_PGA("Left Out 2", WM8753_PWR3, 6, 0, NULL, 0),
470SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", WM8753_PWR1, 3, 0),
471SND_SOC_DAPM_OUTPUT("LOUT1"),
472SND_SOC_DAPM_OUTPUT("LOUT2"),
473SND_SOC_DAPM_MIXER("Right Mixer", WM8753_PWR4, 1, 0,
474 &wm8753_right_mixer_controls[0], ARRAY_SIZE(wm8753_right_mixer_controls)),
475SND_SOC_DAPM_PGA("Right Out 1", WM8753_PWR3, 7, 0, NULL, 0),
476SND_SOC_DAPM_PGA("Right Out 2", WM8753_PWR3, 5, 0, NULL, 0),
477SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", WM8753_PWR1, 2, 0),
478SND_SOC_DAPM_OUTPUT("ROUT1"),
479SND_SOC_DAPM_OUTPUT("ROUT2"),
480SND_SOC_DAPM_MIXER("Mono Mixer", WM8753_PWR4, 2, 0,
481 &wm8753_mono_mixer_controls[0], ARRAY_SIZE(wm8753_mono_mixer_controls)),
482SND_SOC_DAPM_PGA("Mono Out 1", WM8753_PWR3, 2, 0, NULL, 0),
483SND_SOC_DAPM_PGA("Mono Out 2", WM8753_PWR3, 1, 0, NULL, 0),
484SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback", WM8753_PWR1, 4, 0),
485SND_SOC_DAPM_OUTPUT("MONO1"),
486SND_SOC_DAPM_MUX("Mono 2 Mux", SND_SOC_NOPM, 0, 0, &wm8753_mono2_controls),
487SND_SOC_DAPM_OUTPUT("MONO2"),
eb87f9e2 488SND_SOC_DAPM_MIXER("Out3 Left + Right", SND_SOC_NOPM, 0, 0, NULL, 0),
1f53aee0
LG		 489SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out3_controls),
490SND_SOC_DAPM_PGA("Out 3", WM8753_PWR3, 4, 0, NULL, 0),
491SND_SOC_DAPM_OUTPUT("OUT3"),
492SND_SOC_DAPM_MUX("Out4 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out4_controls),
493SND_SOC_DAPM_PGA("Out 4", WM8753_PWR3, 3, 0, NULL, 0),
494SND_SOC_DAPM_OUTPUT("OUT4"),
495SND_SOC_DAPM_MIXER("Playback Mixer", WM8753_PWR4, 3, 0,
496 &wm8753_record_mixer_controls[0],
497 ARRAY_SIZE(wm8753_record_mixer_controls)),
498SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8753_PWR2, 3, 0),
499SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8753_PWR2, 2, 0),
500SND_SOC_DAPM_MUX("Capture Left Mixer", SND_SOC_NOPM, 0, 0,
501 &wm8753_adc_mono_controls),
502SND_SOC_DAPM_MUX("Capture Right Mixer", SND_SOC_NOPM, 0, 0,
503 &wm8753_adc_mono_controls),
504SND_SOC_DAPM_MUX("Capture Left Mux", SND_SOC_NOPM, 0, 0,
505 &wm8753_adc_left_controls),
506SND_SOC_DAPM_MUX("Capture Right Mux", SND_SOC_NOPM, 0, 0,
507 &wm8753_adc_right_controls),
508SND_SOC_DAPM_MUX("Mic Sidetone Mux", SND_SOC_NOPM, 0, 0,
509 &wm8753_mic_mux_controls),
510SND_SOC_DAPM_PGA("Left Capture Volume", WM8753_PWR2, 5, 0, NULL, 0),
511SND_SOC_DAPM_PGA("Right Capture Volume", WM8753_PWR2, 4, 0, NULL, 0),
512SND_SOC_DAPM_MIXER("ALC Mixer", WM8753_PWR2, 6, 0,
513 &wm8753_alc_mixer_controls[0], ARRAY_SIZE(wm8753_alc_mixer_controls)),
514SND_SOC_DAPM_MUX("Line Left Mux", SND_SOC_NOPM, 0, 0,
515 &wm8753_line_left_controls),
516SND_SOC_DAPM_MUX("Line Right Mux", SND_SOC_NOPM, 0, 0,
517 &wm8753_line_right_controls),
518SND_SOC_DAPM_MUX("Line Mono Mux", SND_SOC_NOPM, 0, 0,
519 &wm8753_line_mono_controls),
520SND_SOC_DAPM_MUX("Line Mixer", WM8753_PWR2, 0, 0,
521 &wm8753_line_mux_mix_controls),
522SND_SOC_DAPM_MUX("Rx Mixer", WM8753_PWR2, 1, 0,
523 &wm8753_rx_mux_mix_controls),
524SND_SOC_DAPM_PGA("Mic 1 Volume", WM8753_PWR2, 8, 0, NULL, 0),
525SND_SOC_DAPM_PGA("Mic 2 Volume", WM8753_PWR2, 7, 0, NULL, 0),
526SND_SOC_DAPM_MUX("Mic Selection Mux", SND_SOC_NOPM, 0, 0,
527 &wm8753_mic_sel_mux_controls),
528SND_SOC_DAPM_INPUT("LINE1"),
529SND_SOC_DAPM_INPUT("LINE2"),
530SND_SOC_DAPM_INPUT("RXP"),
531SND_SOC_DAPM_INPUT("RXN"),
532SND_SOC_DAPM_INPUT("ACIN"),
533SND_SOC_DAPM_OUTPUT("ACOP"),
534SND_SOC_DAPM_INPUT("MIC1N"),
535SND_SOC_DAPM_INPUT("MIC1"),
536SND_SOC_DAPM_INPUT("MIC2N"),
537SND_SOC_DAPM_INPUT("MIC2"),
538SND_SOC_DAPM_VMID("VREF"),
539};
540
56a926dd 541static const struct snd_soc_dapm_route wm8753_dapm_routes[] = {
1f53aee0
LG		 542 /* left mixer */
543 {"Left Mixer", "Left Playback Switch", "Left DAC"},
544 {"Left Mixer", "Voice Playback Switch", "Voice DAC"},
545 {"Left Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
546 {"Left Mixer", "Bypass Playback Switch", "Line Left Mux"},
547
548 /* right mixer */
549 {"Right Mixer", "Right Playback Switch", "Right DAC"},
550 {"Right Mixer", "Voice Playback Switch", "Voice DAC"},
551 {"Right Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
552 {"Right Mixer", "Bypass Playback Switch", "Line Right Mux"},
553
554 /* mono mixer */
555 {"Mono Mixer", "Voice Playback Switch", "Voice DAC"},
556 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
557 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
558 {"Mono Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
559 {"Mono Mixer", "Bypass Playback Switch", "Line Mono Mux"},
560
561 /* left out */
562 {"Left Out 1", NULL, "Left Mixer"},
563 {"Left Out 2", NULL, "Left Mixer"},
564 {"LOUT1", NULL, "Left Out 1"},
565 {"LOUT2", NULL, "Left Out 2"},
566
567 /* right out */
568 {"Right Out 1", NULL, "Right Mixer"},
569 {"Right Out 2", NULL, "Right Mixer"},
570 {"ROUT1", NULL, "Right Out 1"},
571 {"ROUT2", NULL, "Right Out 2"},
572
573 /* mono 1 out */
574 {"Mono Out 1", NULL, "Mono Mixer"},
575 {"MONO1", NULL, "Mono Out 1"},
576
577 /* mono 2 out */
578 {"Mono 2 Mux", "Left + Right", "Out3 Left + Right"},
579 {"Mono 2 Mux", "Inverted Mono 1", "MONO1"},
580 {"Mono 2 Mux", "Left", "Left Mixer"},
581 {"Mono 2 Mux", "Right", "Right Mixer"},
582 {"Mono Out 2", NULL, "Mono 2 Mux"},
583 {"MONO2", NULL, "Mono Out 2"},
584
585 /* out 3 */
586 {"Out3 Left + Right", NULL, "Left Mixer"},
587 {"Out3 Left + Right", NULL, "Right Mixer"},
588 {"Out3 Mux", "VREF", "VREF"},
589 {"Out3 Mux", "Left + Right", "Out3 Left + Right"},
590 {"Out3 Mux", "ROUT2", "ROUT2"},
591 {"Out 3", NULL, "Out3 Mux"},
592 {"OUT3", NULL, "Out 3"},
593
594 /* out 4 */
595 {"Out4 Mux", "VREF", "VREF"},
4037314a 596 {"Out4 Mux", "Capture ST", "Playback Mixer"},
1f53aee0
LG		 597 {"Out4 Mux", "LOUT2", "LOUT2"},
598 {"Out 4", NULL, "Out4 Mux"},
599 {"OUT4", NULL, "Out 4"},
600
601 /* record mixer */
602 {"Playback Mixer", "Left Capture Switch", "Left Mixer"},
603 {"Playback Mixer", "Voice Capture Switch", "Mono Mixer"},
604 {"Playback Mixer", "Right Capture Switch", "Right Mixer"},
605
606 /* Mic/SideTone Mux */
607 {"Mic Sidetone Mux", "Left PGA", "Left Capture Volume"},
608 {"Mic Sidetone Mux", "Right PGA", "Right Capture Volume"},
609 {"Mic Sidetone Mux", "Mic 1", "Mic 1 Volume"},
610 {"Mic Sidetone Mux", "Mic 2", "Mic 2 Volume"},
611
612 /* Capture Left Mux */
613 {"Capture Left Mux", "PGA", "Left Capture Volume"},
614 {"Capture Left Mux", "Line or RXP-RXN", "Line Left Mux"},
615 {"Capture Left Mux", "Line", "LINE1"},
616
617 /* Capture Right Mux */
618 {"Capture Right Mux", "PGA", "Right Capture Volume"},
619 {"Capture Right Mux", "Line or RXP-RXN", "Line Right Mux"},
4037314a 620 {"Capture Right Mux", "Sidetone", "Playback Mixer"},
1f53aee0
LG		 621
622 /* Mono Capture mixer-mux */
623 {"Capture Right Mixer", "Stereo", "Capture Right Mux"},
877ae707 624 {"Capture Left Mixer", "Stereo", "Capture Left Mux"},
1f53aee0
LG		 625 {"Capture Left Mixer", "Analogue Mix Left", "Capture Left Mux"},
626 {"Capture Left Mixer", "Analogue Mix Left", "Capture Right Mux"},
627 {"Capture Right Mixer", "Analogue Mix Right", "Capture Left Mux"},
628 {"Capture Right Mixer", "Analogue Mix Right", "Capture Right Mux"},
629 {"Capture Left Mixer", "Digital Mono Mix", "Capture Left Mux"},
630 {"Capture Left Mixer", "Digital Mono Mix", "Capture Right Mux"},
631 {"Capture Right Mixer", "Digital Mono Mix", "Capture Left Mux"},
632 {"Capture Right Mixer", "Digital Mono Mix", "Capture Right Mux"},
633
634 /* ADC */
635 {"Left ADC", NULL, "Capture Left Mixer"},
636 {"Right ADC", NULL, "Capture Right Mixer"},
637
638 /* Left Capture Volume */
639 {"Left Capture Volume", NULL, "ACIN"},
640
641 /* Right Capture Volume */
642 {"Right Capture Volume", NULL, "Mic 2 Volume"},
643
644 /* ALC Mixer */
645 {"ALC Mixer", "Line Capture Switch", "Line Mixer"},
646 {"ALC Mixer", "Mic2 Capture Switch", "Mic 2 Volume"},
647 {"ALC Mixer", "Mic1 Capture Switch", "Mic 1 Volume"},
648 {"ALC Mixer", "Rx Capture Switch", "Rx Mixer"},
649
650 /* Line Left Mux */
651 {"Line Left Mux", "Line 1", "LINE1"},
652 {"Line Left Mux", "Rx Mix", "Rx Mixer"},
653
654 /* Line Right Mux */
655 {"Line Right Mux", "Line 2", "LINE2"},
656 {"Line Right Mux", "Rx Mix", "Rx Mixer"},
657
658 /* Line Mono Mux */
659 {"Line Mono Mux", "Line Mix", "Line Mixer"},
660 {"Line Mono Mux", "Rx Mix", "Rx Mixer"},
661
662 /* Line Mixer/Mux */
663 {"Line Mixer", "Line 1 + 2", "LINE1"},
664 {"Line Mixer", "Line 1 - 2", "LINE1"},
665 {"Line Mixer", "Line 1 + 2", "LINE2"},
666 {"Line Mixer", "Line 1 - 2", "LINE2"},
667 {"Line Mixer", "Line 1", "LINE1"},
668 {"Line Mixer", "Line 2", "LINE2"},
669
670 /* Rx Mixer/Mux */
671 {"Rx Mixer", "RXP - RXN", "RXP"},
672 {"Rx Mixer", "RXP + RXN", "RXP"},
673 {"Rx Mixer", "RXP - RXN", "RXN"},
674 {"Rx Mixer", "RXP + RXN", "RXN"},
675 {"Rx Mixer", "RXP", "RXP"},
676 {"Rx Mixer", "RXN", "RXN"},
677
678 /* Mic 1 Volume */
679 {"Mic 1 Volume", NULL, "MIC1N"},
680 {"Mic 1 Volume", NULL, "Mic Selection Mux"},
681
682 /* Mic 2 Volume */
683 {"Mic 2 Volume", NULL, "MIC2N"},
684 {"Mic 2 Volume", NULL, "MIC2"},
685
686 /* Mic Selector Mux */
687 {"Mic Selection Mux", "Mic 1", "MIC1"},
688 {"Mic Selection Mux", "Mic 2", "MIC2N"},
689 {"Mic Selection Mux", "Mic 3", "MIC2"},
690
691 /* ACOP */
692 {"ACOP", NULL, "ALC Mixer"},
1f53aee0
LG		 693};
694
1f53aee0
LG		 695/* PLL divisors */
696struct _pll_div {
697 u32 div2:1;
698 u32 n:4;
699 u32 k:24;
700};
701
702/* The size in bits of the pll divide multiplied by 10
703 * to allow rounding later */
704#define FIXED_PLL_SIZE ((1 << 22) * 10)
705
706static void pll_factors(struct _pll_div *pll_div, unsigned int target,
707 unsigned int source)
708{
709 u64 Kpart;
710 unsigned int K, Ndiv, Nmod;
711
712 Ndiv = target / source;
713 if (Ndiv < 6) {
714 source >>= 1;
715 pll_div->div2 = 1;
716 Ndiv = target / source;
717 } else
718 pll_div->div2 = 0;
719
720 if ((Ndiv < 6) || (Ndiv > 12))
721 printk(KERN_WARNING
449bd54d 722 "wm8753: unsupported N = %u\n", Ndiv);
1f53aee0
LG		 723
724 pll_div->n = Ndiv;
725 Nmod = target % source;
726 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
727
728 do_div(Kpart, source);
729
730 K = Kpart & 0xFFFFFFFF;
731
732 /* Check if we need to round */
733 if ((K % 10) >= 5)
734 K += 5;
735
736 /* Move down to proper range now rounding is done */
737 K /= 10;
738
739 pll_div->k = K;
740}
741
85488037
MB		 742static int wm8753_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
743 int source, unsigned int freq_in, unsigned int freq_out)
1f53aee0
LG		 744{
745 u16 reg, enable;
746 int offset;
747 struct snd_soc_codec *codec = codec_dai->codec;
748
749 if (pll_id < WM8753_PLL1 || pll_id > WM8753_PLL2)
750 return -ENODEV;
751
752 if (pll_id == WM8753_PLL1) {
753 offset = 0;
754 enable = 0x10;
776065e3 755 reg = snd_soc_read(codec, WM8753_CLOCK) & 0xffef;
1f53aee0
LG		 756 } else {
757 offset = 4;
758 enable = 0x8;
776065e3 759 reg = snd_soc_read(codec, WM8753_CLOCK) & 0xfff7;
1f53aee0
LG		 760 }
761
762 if (!freq_in || !freq_out) {
763 /* disable PLL */
776065e3
LPC		 764 snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0026);
765 snd_soc_write(codec, WM8753_CLOCK, reg);
1f53aee0
LG		 766 return 0;
767 } else {
768 u16 value = 0;
769 struct _pll_div pll_div;
770
771 pll_factors(&pll_div, freq_out * 8, freq_in);
772
773 /* set up N and K PLL divisor ratios */
774 /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */
775 value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18);
776065e3 776 snd_soc_write(codec, WM8753_PLL1CTL2 + offset, value);
1f53aee0
LG		 777
778 /* bits 8:0 = PLL_K[17:9] */
779 value = (pll_div.k & 0x03fe00) >> 9;
776065e3 780 snd_soc_write(codec, WM8753_PLL1CTL3 + offset, value);
1f53aee0
LG		 781
782 /* bits 8:0 = PLL_K[8:0] */
783 value = pll_div.k & 0x0001ff;
776065e3 784 snd_soc_write(codec, WM8753_PLL1CTL4 + offset, value);
1f53aee0
LG		 785
786 /* set PLL as input and enable */
776065e3 787 snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0027 |
1f53aee0 788 (pll_div.div2 << 3));
776065e3 789 snd_soc_write(codec, WM8753_CLOCK, reg | enable);
1f53aee0
LG		 790 }
791 return 0;
792}
793
794struct _coeff_div {
795 u32 mclk;
796 u32 rate;
797 u8 sr:5;
798 u8 usb:1;
799};
800
801/* codec hifi mclk (after PLL) clock divider coefficients */
802static const struct _coeff_div coeff_div[] = {
803 /* 8k */
804 {12288000, 8000, 0x6, 0x0},
805 {11289600, 8000, 0x16, 0x0},
806 {18432000, 8000, 0x7, 0x0},
807 {16934400, 8000, 0x17, 0x0},
808 {12000000, 8000, 0x6, 0x1},
809
810 /* 11.025k */
811 {11289600, 11025, 0x18, 0x0},
812 {16934400, 11025, 0x19, 0x0},
813 {12000000, 11025, 0x19, 0x1},
814
815 /* 16k */
816 {12288000, 16000, 0xa, 0x0},
817 {18432000, 16000, 0xb, 0x0},
818 {12000000, 16000, 0xa, 0x1},
819
820 /* 22.05k */
821 {11289600, 22050, 0x1a, 0x0},
822 {16934400, 22050, 0x1b, 0x0},
823 {12000000, 22050, 0x1b, 0x1},
824
825 /* 32k */
826 {12288000, 32000, 0xc, 0x0},
827 {18432000, 32000, 0xd, 0x0},
828 {12000000, 32000, 0xa, 0x1},
829
830 /* 44.1k */
831 {11289600, 44100, 0x10, 0x0},
832 {16934400, 44100, 0x11, 0x0},
833 {12000000, 44100, 0x11, 0x1},
834
835 /* 48k */
836 {12288000, 48000, 0x0, 0x0},
837 {18432000, 48000, 0x1, 0x0},
838 {12000000, 48000, 0x0, 0x1},
839
840 /* 88.2k */
841 {11289600, 88200, 0x1e, 0x0},
842 {16934400, 88200, 0x1f, 0x0},
843 {12000000, 88200, 0x1f, 0x1},
844
845 /* 96k */
846 {12288000, 96000, 0xe, 0x0},
847 {18432000, 96000, 0xf, 0x0},
848 {12000000, 96000, 0xe, 0x1},
849};
850
851static int get_coeff(int mclk, int rate)
852{
853 int i;
854
855 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
856 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
857 return i;
858 }
859 return -EINVAL;
860}
861
862/*
863 * Clock after PLL and dividers
864 */
e550e17f 865static int wm8753_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 866 int clk_id, unsigned int freq, int dir)
867{
868 struct snd_soc_codec *codec = codec_dai->codec;
b2c812e2 869 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1f53aee0
LG		 870
871 switch (freq) {
872 case 11289600:
873 case 12000000:
874 case 12288000:
875 case 16934400:
876 case 18432000:
877 if (clk_id == WM8753_MCLK) {
878 wm8753->sysclk = freq;
879 return 0;
880 } else if (clk_id == WM8753_PCMCLK) {
881 wm8753->pcmclk = freq;
882 return 0;
883 }
884 break;
885 }
886 return -EINVAL;
887}
888
889/*
890 * Set's ADC and Voice DAC format.
891 */
338ee253 892static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 893 unsigned int fmt)
894{
776065e3 895 u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01ec;
1f53aee0
LG		 896
897 /* interface format */
898 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
899 case SND_SOC_DAIFMT_I2S:
900 voice |= 0x0002;
901 break;
902 case SND_SOC_DAIFMT_RIGHT_J:
903 break;
904 case SND_SOC_DAIFMT_LEFT_J:
905 voice |= 0x0001;
906 break;
907 case SND_SOC_DAIFMT_DSP_A:
908 voice |= 0x0003;
909 break;
910 case SND_SOC_DAIFMT_DSP_B:
911 voice |= 0x0013;
912 break;
913 default:
914 return -EINVAL;
915 }
916
776065e3 917 snd_soc_write(codec, WM8753_PCM, voice);
1f53aee0
LG		 918 return 0;
919}
920
921/*
922 * Set PCM DAI bit size and sample rate.
923 */
924static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 925 struct snd_pcm_hw_params *params,
926 struct snd_soc_dai *dai)
1f53aee0 927{
e6968a17 928 struct snd_soc_codec *codec = dai->codec;
b2c812e2 929 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
776065e3
LPC		 930 u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01f3;
931 u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x017f;
1f53aee0
LG		 932
933 /* bit size */
f21b6604
MB		 934 switch (params_width(params)) {
935 case 16:
1f53aee0 936 break;
f21b6604 937 case 20:
1f53aee0
LG		 938 voice |= 0x0004;
939 break;
f21b6604 940 case 24:
1f53aee0
LG		 941 voice |= 0x0008;
942 break;
f21b6604 943 case 32:
1f53aee0
LG		 944 voice |= 0x000c;
945 break;
946 }
947
948 /* sample rate */
949 if (params_rate(params) * 384 == wm8753->pcmclk)
950 srate |= 0x80;
776065e3 951 snd_soc_write(codec, WM8753_SRATE1, srate);
1f53aee0 952
776065e3 953 snd_soc_write(codec, WM8753_PCM, voice);
1f53aee0
LG		 954 return 0;
955}
956
957/*
958 * Set's PCM dai fmt and BCLK.
959 */
338ee253 960static int wm8753_pcm_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 961 unsigned int fmt)
962{
1f53aee0
LG		 963 u16 voice, ioctl;
964
776065e3
LPC		 965 voice = snd_soc_read(codec, WM8753_PCM) & 0x011f;
966 ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x015d;
1f53aee0
LG		 967
968 /* set master/slave audio interface */
969 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
970 case SND_SOC_DAIFMT_CBS_CFS:
971 break;
972 case SND_SOC_DAIFMT_CBM_CFM:
973 ioctl |= 0x2;
974 case SND_SOC_DAIFMT_CBM_CFS:
975 voice |= 0x0040;
976 break;
977 default:
978 return -EINVAL;
979 }
980
981 /* clock inversion */
982 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
983 case SND_SOC_DAIFMT_DSP_A:
984 case SND_SOC_DAIFMT_DSP_B:
985 /* frame inversion not valid for DSP modes */
986 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
987 case SND_SOC_DAIFMT_NB_NF:
988 break;
989 case SND_SOC_DAIFMT_IB_NF:
990 voice |= 0x0080;
991 break;
992 default:
993 return -EINVAL;
994 }
995 break;
996 case SND_SOC_DAIFMT_I2S:
997 case SND_SOC_DAIFMT_RIGHT_J:
998 case SND_SOC_DAIFMT_LEFT_J:
999 voice &= ~0x0010;
1000 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1001 case SND_SOC_DAIFMT_NB_NF:
1002 break;
1003 case SND_SOC_DAIFMT_IB_IF:
1004 voice |= 0x0090;
1005 break;
1006 case SND_SOC_DAIFMT_IB_NF:
1007 voice |= 0x0080;
1008 break;
1009 case SND_SOC_DAIFMT_NB_IF:
1010 voice |= 0x0010;
1011 break;
1012 default:
1013 return -EINVAL;
1014 }
1015 break;
1016 default:
1017 return -EINVAL;
1018 }
1019
776065e3
LPC		 1020 snd_soc_write(codec, WM8753_PCM, voice);
1021 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1f53aee0
LG		 1022 return 0;
1023}
1024
e550e17f 1025static int wm8753_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1026 int div_id, int div)
1027{
1028 struct snd_soc_codec *codec = codec_dai->codec;
1029 u16 reg;
1030
1031 switch (div_id) {
1032 case WM8753_PCMDIV:
776065e3
LPC		 1033 reg = snd_soc_read(codec, WM8753_CLOCK) & 0x003f;
1034 snd_soc_write(codec, WM8753_CLOCK, reg | div);
1f53aee0
LG		 1035 break;
1036 case WM8753_BCLKDIV:
776065e3
LPC		 1037 reg = snd_soc_read(codec, WM8753_SRATE2) & 0x01c7;
1038 snd_soc_write(codec, WM8753_SRATE2, reg | div);
1f53aee0
LG		 1039 break;
1040 case WM8753_VXCLKDIV:
776065e3
LPC		 1041 reg = snd_soc_read(codec, WM8753_SRATE2) & 0x003f;
1042 snd_soc_write(codec, WM8753_SRATE2, reg | div);
1f53aee0
LG		 1043 break;
1044 default:
1045 return -EINVAL;
1046 }
1047 return 0;
1048}
1049
1050/*
1051 * Set's HiFi DAC format.
1052 */
338ee253 1053static int wm8753_hdac_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1054 unsigned int fmt)
1055{
776065e3 1056 u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01e0;
1f53aee0
LG		 1057
1058 /* interface format */
1059 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1060 case SND_SOC_DAIFMT_I2S:
1061 hifi |= 0x0002;
1062 break;
1063 case SND_SOC_DAIFMT_RIGHT_J:
1064 break;
1065 case SND_SOC_DAIFMT_LEFT_J:
1066 hifi |= 0x0001;
1067 break;
1068 case SND_SOC_DAIFMT_DSP_A:
1069 hifi |= 0x0003;
1070 break;
1071 case SND_SOC_DAIFMT_DSP_B:
1072 hifi |= 0x0013;
1073 break;
1074 default:
1075 return -EINVAL;
1076 }
1077
776065e3 1078 snd_soc_write(codec, WM8753_HIFI, hifi);
1f53aee0
LG		 1079 return 0;
1080}
1081
1082/*
1083 * Set's I2S DAI format.
1084 */
338ee253 1085static int wm8753_i2s_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1086 unsigned int fmt)
1087{
1f53aee0
LG		 1088 u16 ioctl, hifi;
1089
776065e3
LPC		 1090 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x011f;
1091 ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x00ae;
1f53aee0
LG		 1092
1093 /* set master/slave audio interface */
1094 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1095 case SND_SOC_DAIFMT_CBS_CFS:
1096 break;
1097 case SND_SOC_DAIFMT_CBM_CFM:
1098 ioctl |= 0x1;
1099 case SND_SOC_DAIFMT_CBM_CFS:
1100 hifi |= 0x0040;
1101 break;
1102 default:
1103 return -EINVAL;
1104 }
1105
1106 /* clock inversion */
1107 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1108 case SND_SOC_DAIFMT_DSP_A:
1109 case SND_SOC_DAIFMT_DSP_B:
1110 /* frame inversion not valid for DSP modes */
1111 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1112 case SND_SOC_DAIFMT_NB_NF:
1113 break;
1114 case SND_SOC_DAIFMT_IB_NF:
1115 hifi |= 0x0080;
1116 break;
1117 default:
1118 return -EINVAL;
1119 }
1120 break;
1121 case SND_SOC_DAIFMT_I2S:
1122 case SND_SOC_DAIFMT_RIGHT_J:
1123 case SND_SOC_DAIFMT_LEFT_J:
1124 hifi &= ~0x0010;
1125 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1126 case SND_SOC_DAIFMT_NB_NF:
1127 break;
1128 case SND_SOC_DAIFMT_IB_IF:
1129 hifi |= 0x0090;
1130 break;
1131 case SND_SOC_DAIFMT_IB_NF:
1132 hifi |= 0x0080;
1133 break;
1134 case SND_SOC_DAIFMT_NB_IF:
1135 hifi |= 0x0010;
1136 break;
1137 default:
1138 return -EINVAL;
1139 }
1140 break;
1141 default:
1142 return -EINVAL;
1143 }
1144
776065e3
LPC		 1145 snd_soc_write(codec, WM8753_HIFI, hifi);
1146 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1f53aee0
LG		 1147 return 0;
1148}
1149
1150/*
1151 * Set PCM DAI bit size and sample rate.
1152 */
1153static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 1154 struct snd_pcm_hw_params *params,
1155 struct snd_soc_dai *dai)
1f53aee0 1156{
e6968a17 1157 struct snd_soc_codec *codec = dai->codec;
b2c812e2 1158 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
776065e3
LPC		 1159 u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x01c0;
1160 u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01f3;
1f53aee0
LG		 1161 int coeff;
1162
1163 /* is digital filter coefficient valid ? */
1164 coeff = get_coeff(wm8753->sysclk, params_rate(params));
1165 if (coeff < 0) {
1166 printk(KERN_ERR "wm8753 invalid MCLK or rate\n");
1167 return coeff;
1168 }
776065e3 1169 snd_soc_write(codec, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) |
1f53aee0
LG		 1170 coeff_div[coeff].usb);
1171
1172 /* bit size */
f21b6604
MB		 1173 switch (params_width(params)) {
1174 case 16:
1f53aee0 1175 break;
f21b6604 1176 case 20:
1f53aee0
LG		 1177 hifi |= 0x0004;
1178 break;
f21b6604 1179 case 24:
1f53aee0
LG		 1180 hifi |= 0x0008;
1181 break;
f21b6604 1182 case 32:
1f53aee0
LG		 1183 hifi |= 0x000c;
1184 break;
1185 }
1186
776065e3 1187 snd_soc_write(codec, WM8753_HIFI, hifi);
1f53aee0
LG		 1188 return 0;
1189}
1190
338ee253 1191static int wm8753_mode1v_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1192 unsigned int fmt)
1193{
1f53aee0
LG		 1194 u16 clock;
1195
1196 /* set clk source as pcmclk */
776065e3
LPC		 1197 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1198 snd_soc_write(codec, WM8753_CLOCK, clock);
1f53aee0 1199
338ee253 1200 return wm8753_vdac_adc_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1201}
1202
338ee253 1203static int wm8753_mode1h_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1204 unsigned int fmt)
1205{
338ee253 1206 return wm8753_hdac_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1207}
1208
338ee253 1209static int wm8753_mode2_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1210 unsigned int fmt)
1211{
1f53aee0
LG		 1212 u16 clock;
1213
1214 /* set clk source as pcmclk */
776065e3
LPC		 1215 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1216 snd_soc_write(codec, WM8753_CLOCK, clock);
1f53aee0 1217
338ee253 1218 return wm8753_vdac_adc_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1219}
1220
338ee253 1221static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1222 unsigned int fmt)
1223{
1f53aee0
LG		 1224 u16 clock;
1225
1226 /* set clk source as mclk */
776065e3
LPC		 1227 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1228 snd_soc_write(codec, WM8753_CLOCK, clock | 0x4);
1f53aee0 1229
338ee253 1230 if (wm8753_hdac_set_dai_fmt(codec, fmt) < 0)
1f53aee0 1231 return -EINVAL;
338ee253 1232 return wm8753_vdac_adc_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1233}
1234
338ee253
LPC		 1235static int wm8753_hifi_write_dai_fmt(struct snd_soc_codec *codec,
1236 unsigned int fmt)
1237{
1238 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1239 int ret = 0;
1240
1241 switch (wm8753->dai_func) {
1242 case 0:
1243 ret = wm8753_mode1h_set_dai_fmt(codec, fmt);
1244 break;
1245 case 1:
1246 ret = wm8753_mode2_set_dai_fmt(codec, fmt);
1247 break;
1248 case 2:
1249 case 3:
1250 ret = wm8753_mode3_4_set_dai_fmt(codec, fmt);
1251 break;
1252 default:
1253 break;
1254 }
1255 if (ret)
1256 return ret;
1257
1258 return wm8753_i2s_set_dai_fmt(codec, fmt);
1259}
1260
1261static int wm8753_hifi_set_dai_fmt(struct snd_soc_dai *codec_dai,
1262 unsigned int fmt)
1263{
1264 struct snd_soc_codec *codec = codec_dai->codec;
1265 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1266
1267 wm8753->hifi_fmt = fmt;
1268
1269 return wm8753_hifi_write_dai_fmt(codec, fmt);
1270};
1271
1272static int wm8753_voice_write_dai_fmt(struct snd_soc_codec *codec,
1273 unsigned int fmt)
1274{
1275 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1276 int ret = 0;
1277
1278 if (wm8753->dai_func != 0)
1279 return 0;
1280
1281 ret = wm8753_mode1v_set_dai_fmt(codec, fmt);
1282 if (ret)
1283 return ret;
1284 ret = wm8753_pcm_set_dai_fmt(codec, fmt);
1285 if (ret)
1286 return ret;
1287
1288 return 0;
1289};
1290
1291static int wm8753_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
1292 unsigned int fmt)
1293{
1294 struct snd_soc_codec *codec = codec_dai->codec;
1295 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1296
1297 wm8753->voice_fmt = fmt;
1298
1299 return wm8753_voice_write_dai_fmt(codec, fmt);
1300};
1301
e550e17f 1302static int wm8753_mute(struct snd_soc_dai *dai, int mute)
1f53aee0
LG		 1303{
1304 struct snd_soc_codec *codec = dai->codec;
776065e3 1305 u16 mute_reg = snd_soc_read(codec, WM8753_DAC) & 0xfff7;
f0fba2ad 1306 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1f53aee0
LG		 1307
1308 /* the digital mute covers the HiFi and Voice DAC's on the WM8753.
1309 * make sure we check if they are not both active when we mute */
f0fba2ad 1310 if (mute && wm8753->dai_func == 1) {
5c898e74 1311 if (!snd_soc_codec_is_active(codec))
776065e3 1312 snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8);
1f53aee0
LG		 1313 } else {
1314 if (mute)
776065e3 1315 snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8);
1f53aee0 1316 else
776065e3 1317 snd_soc_write(codec, WM8753_DAC, mute_reg);
1f53aee0
LG		 1318 }
1319
1320 return 0;
1321}
1322
35afd922
LPC		 1323static void wm8753_charge_work(struct work_struct *work)
1324{
1325 struct wm8753_priv *wm8753 =
1326 container_of(work, struct wm8753_priv, charge_work.work);
1327
1328 /* Set to 500k */
1329 regmap_update_bits(wm8753->regmap, WM8753_PWR1, 0x0180, 0x0100);
1330}
1331
0be9898a
MB		 1332static int wm8753_set_bias_level(struct snd_soc_codec *codec,
1333 enum snd_soc_bias_level level)
1f53aee0 1334{
35afd922 1335 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
776065e3 1336 u16 pwr_reg = snd_soc_read(codec, WM8753_PWR1) & 0xfe3e;
1f53aee0 1337
0be9898a
MB		 1338 switch (level) {
1339 case SND_SOC_BIAS_ON:
1f53aee0 1340 /* set vmid to 50k and unmute dac */
776065e3 1341 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x00c0);
1f53aee0 1342 break;
0be9898a 1343 case SND_SOC_BIAS_PREPARE:
35afd922
LPC		 1344 /* Wait until fully charged */
1345 flush_delayed_work(&wm8753->charge_work);
1f53aee0 1346 break;
0be9898a 1347 case SND_SOC_BIAS_STANDBY:
6093e926 1348 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
35afd922
LPC		 1349 /* set vmid to 5k for quick power up */
1350 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x01c1);
1351 schedule_delayed_work(&wm8753->charge_work,
1352 msecs_to_jiffies(caps_charge));
1353 } else {
1354 /* mute dac and set vmid to 500k, enable VREF */
1355 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x0141);
1356 }
1f53aee0 1357 break;
0be9898a 1358 case SND_SOC_BIAS_OFF:
35afd922 1359 cancel_delayed_work_sync(&wm8753->charge_work);
776065e3 1360 snd_soc_write(codec, WM8753_PWR1, 0x0001);
1f53aee0
LG		 1361 break;
1362 }
1f53aee0
LG		 1363 return 0;
1364}
1365
1366#define WM8753_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
60fc684a
MB		 1367 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
1368 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1369 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
1f53aee0
LG		 1370
1371#define WM8753_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1372 SNDRV_PCM_FMTBIT_S24_LE)
1373
1374/*
25985edc 1375 * The WM8753 supports up to 4 different and mutually exclusive DAI
1f53aee0
LG		 1376 * configurations. This gives 2 PCM's available for use, hifi and voice.
1377 * NOTE: The Voice PCM cannot play or capture audio to the CPU as it's DAI
1378 * is connected between the wm8753 and a BT codec or GSM modem.
1379 *
1380 * 1. Voice over PCM DAI - HIFI DAC over HIFI DAI
1381 * 2. Voice over HIFI DAI - HIFI disabled
1382 * 3. Voice disabled - HIFI over HIFI
1383 * 4. Voice disabled - HIFI over HIFI, uses voice DAI LRC for capture
1384 */
85e7652d 1385static const struct snd_soc_dai_ops wm8753_dai_ops_hifi_mode = {
6335d055
EM		 1386 .hw_params = wm8753_i2s_hw_params,
1387 .digital_mute = wm8753_mute,
338ee253 1388 .set_fmt = wm8753_hifi_set_dai_fmt,
6335d055
EM		 1389 .set_clkdiv = wm8753_set_dai_clkdiv,
1390 .set_pll = wm8753_set_dai_pll,
1391 .set_sysclk = wm8753_set_dai_sysclk,
1392};
1393
85e7652d 1394static const struct snd_soc_dai_ops wm8753_dai_ops_voice_mode = {
6335d055
EM		 1395 .hw_params = wm8753_pcm_hw_params,
1396 .digital_mute = wm8753_mute,
338ee253 1397 .set_fmt = wm8753_voice_set_dai_fmt,
6335d055
EM		 1398 .set_clkdiv = wm8753_set_dai_clkdiv,
1399 .set_pll = wm8753_set_dai_pll,
1400 .set_sysclk = wm8753_set_dai_sysclk,
1401};
1402
338ee253 1403static struct snd_soc_dai_driver wm8753_dai[] = {
1f53aee0 1404/* DAI HiFi mode 1 */
f0fba2ad 1405{ .name = "wm8753-hifi",
1f53aee0
LG		 1406 .playback = {
1407 .stream_name = "HiFi Playback",
1408 .channels_min = 1,
1409 .channels_max = 2,
1410 .rates = WM8753_RATES,
338ee253
LPC		 1411 .formats = WM8753_FORMATS
1412 },
1f53aee0
LG		 1413 .capture = { /* dummy for fast DAI switching */
1414 .stream_name = "Capture",
1415 .channels_min = 1,
1416 .channels_max = 2,
1417 .rates = WM8753_RATES,
338ee253
LPC		 1418 .formats = WM8753_FORMATS
1419 },
1420 .ops = &wm8753_dai_ops_hifi_mode,
1f53aee0
LG		 1421},
1422/* DAI Voice mode 1 */
f0fba2ad 1423{ .name = "wm8753-voice",
1f53aee0
LG		 1424 .playback = {
1425 .stream_name = "Voice Playback",
1426 .channels_min = 1,
1427 .channels_max = 1,
1428 .rates = WM8753_RATES,
338ee253
LPC		 1429 .formats = WM8753_FORMATS,
1430 },
1f53aee0
LG		 1431 .capture = {
1432 .stream_name = "Capture",
1433 .channels_min = 1,
1434 .channels_max = 2,
1435 .rates = WM8753_RATES,
338ee253 1436 .formats = WM8753_FORMATS,
9e70c1f0 1437 },
338ee253
LPC		 1438 .ops = &wm8753_dai_ops_voice_mode,
1439},
9e70c1f0 1440};
1f53aee0 1441
f0fba2ad 1442static int wm8753_resume(struct snd_soc_codec *codec)
1f53aee0 1443{
d3398ff0 1444 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
e611bd82 1445
d3398ff0 1446 regcache_sync(wm8753->regmap);
1f53aee0 1447
1f53aee0
LG		 1448 return 0;
1449}
1450
f0fba2ad 1451static int wm8753_probe(struct snd_soc_codec *codec)
1f53aee0 1452{
f0fba2ad 1453 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
776065e3 1454 int ret;
1f53aee0 1455
35afd922 1456 INIT_DELAYED_WORK(&wm8753->charge_work, wm8753_charge_work);
c2bac160 1457
c2bac160
MB		 1458 ret = wm8753_reset(codec);
1459 if (ret < 0) {
f0fba2ad
LG		 1460 dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
1461 return ret;
c2bac160
MB		 1462 }
1463
f0fba2ad
LG		 1464 wm8753->dai_func = 0;
1465
c2bac160 1466 /* set the update bits */
776065e3
LPC		 1467 snd_soc_update_bits(codec, WM8753_LDAC, 0x0100, 0x0100);
1468 snd_soc_update_bits(codec, WM8753_RDAC, 0x0100, 0x0100);
21d17dd2
AL		 1469 snd_soc_update_bits(codec, WM8753_LADC, 0x0100, 0x0100);
1470 snd_soc_update_bits(codec, WM8753_RADC, 0x0100, 0x0100);
776065e3
LPC		 1471 snd_soc_update_bits(codec, WM8753_LOUT1V, 0x0100, 0x0100);
1472 snd_soc_update_bits(codec, WM8753_ROUT1V, 0x0100, 0x0100);
1473 snd_soc_update_bits(codec, WM8753_LOUT2V, 0x0100, 0x0100);
1474 snd_soc_update_bits(codec, WM8753_ROUT2V, 0x0100, 0x0100);
1475 snd_soc_update_bits(codec, WM8753_LINVOL, 0x0100, 0x0100);
1476 snd_soc_update_bits(codec, WM8753_RINVOL, 0x0100, 0x0100);
c2bac160 1477
c2bac160 1478 return 0;
c2bac160
MB		 1479}
1480
f802d6c0 1481static const struct snd_soc_codec_driver soc_codec_dev_wm8753 = {
f0fba2ad 1482 .probe = wm8753_probe,
f0fba2ad
LG		 1483 .resume = wm8753_resume,
1484 .set_bias_level = wm8753_set_bias_level,
a1f0b967 1485 .suspend_bias_off = true,
56a926dd 1486
73238401
KM		 1487 .component_driver = {
1488 .controls = wm8753_snd_controls,
1489 .num_controls = ARRAY_SIZE(wm8753_snd_controls),
1490 .dapm_widgets = wm8753_dapm_widgets,
1491 .num_dapm_widgets = ARRAY_SIZE(wm8753_dapm_widgets),
1492 .dapm_routes = wm8753_dapm_routes,
1493 .num_dapm_routes = ARRAY_SIZE(wm8753_dapm_routes),
1494 },
f0fba2ad 1495};
69e169da 1496
70e14122
MB		 1497static const struct of_device_id wm8753_of_match[] = {
1498 { .compatible = "wlf,wm8753", },
1499 { }
1500};
1501MODULE_DEVICE_TABLE(of, wm8753_of_match);
1502
d3398ff0
MB		 1503static const struct regmap_config wm8753_regmap = {
1504 .reg_bits = 7,
1505 .val_bits = 9,
1506
1507 .max_register = WM8753_ADCTL2,
d3398ff0
MB		 1508 .volatile_reg = wm8753_volatile,
1509
1510 .cache_type = REGCACHE_RBTREE,
1511 .reg_defaults = wm8753_reg_defaults,
1512 .num_reg_defaults = ARRAY_SIZE(wm8753_reg_defaults),
1513};
1514
f0fba2ad 1515#if defined(CONFIG_SPI_MASTER)
7a79e94e 1516static int wm8753_spi_probe(struct spi_device *spi)
69e169da 1517{
c2bac160 1518 struct wm8753_priv *wm8753;
f0fba2ad 1519 int ret;
69e169da 1520
2c823d14
MB		 1521 wm8753 = devm_kzalloc(&spi->dev, sizeof(struct wm8753_priv),
1522 GFP_KERNEL);
c2bac160
MB		 1523 if (wm8753 == NULL)
1524 return -ENOMEM;
69e169da 1525
f0fba2ad 1526 spi_set_drvdata(spi, wm8753);
c2bac160 1527
eb781f78 1528 wm8753->regmap = devm_regmap_init_spi(spi, &wm8753_regmap);
d3398ff0
MB		 1529 if (IS_ERR(wm8753->regmap)) {
1530 ret = PTR_ERR(wm8753->regmap);
1531 dev_err(&spi->dev, "Failed to allocate register map: %d\n",
1532 ret);
eb781f78 1533 return ret;
d3398ff0
MB		 1534 }
1535
1536 ret = snd_soc_register_codec(&spi->dev, &soc_codec_dev_wm8753,
1537 wm8753_dai, ARRAY_SIZE(wm8753_dai));
eb781f78 1538 if (ret != 0)
d3398ff0 1539 dev_err(&spi->dev, "Failed to register CODEC: %d\n", ret);
ad20ff92 1540
f0fba2ad 1541 return ret;
69e169da
MB		 1542}
1543
7a79e94e 1544static int wm8753_spi_remove(struct spi_device *spi)
69e169da 1545{
f0fba2ad 1546 snd_soc_unregister_codec(&spi->dev);
f0fba2ad 1547 return 0;
69e169da
MB		 1548}
1549
f0fba2ad 1550static struct spi_driver wm8753_spi_driver = {
69e169da 1551 .driver = {
63010634 1552 .name = "wm8753",
70e14122 1553 .of_match_table = wm8753_of_match,
69e169da 1554 },
f0fba2ad 1555 .probe = wm8753_spi_probe,
7a79e94e 1556 .remove = wm8753_spi_remove,
69e169da 1557};
f0fba2ad 1558#endif /* CONFIG_SPI_MASTER */
69e169da 1559
2c486433 1560#if IS_ENABLED(CONFIG_I2C)
7a79e94e
BP		 1561static int wm8753_i2c_probe(struct i2c_client *i2c,
1562 const struct i2c_device_id *id)
69e169da 1563{
c2bac160 1564 struct wm8753_priv *wm8753;
f0fba2ad 1565 int ret;
c2bac160 1566
2c823d14
MB		 1567 wm8753 = devm_kzalloc(&i2c->dev, sizeof(struct wm8753_priv),
1568 GFP_KERNEL);
c2bac160
MB		 1569 if (wm8753 == NULL)
1570 return -ENOMEM;
69e169da 1571
f0fba2ad 1572 i2c_set_clientdata(i2c, wm8753);
69e169da 1573
eb781f78 1574 wm8753->regmap = devm_regmap_init_i2c(i2c, &wm8753_regmap);
d3398ff0
MB		 1575 if (IS_ERR(wm8753->regmap)) {
1576 ret = PTR_ERR(wm8753->regmap);
1577 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1578 ret);
eb781f78 1579 return ret;
d3398ff0
MB		 1580 }
1581
1582 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_wm8753,
1583 wm8753_dai, ARRAY_SIZE(wm8753_dai));
eb781f78 1584 if (ret != 0)
d3398ff0 1585 dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret);
2c823d14 1586
f0fba2ad 1587 return ret;
69e169da
MB		 1588}
1589
7a79e94e 1590static int wm8753_i2c_remove(struct i2c_client *client)
69e169da 1591{
f0fba2ad 1592 snd_soc_unregister_codec(&client->dev);
69e169da
MB		 1593 return 0;
1594}
1595
f0fba2ad
LG		 1596static const struct i2c_device_id wm8753_i2c_id[] = {
1597 { "wm8753", 0 },
1598 { }
1599};
1600MODULE_DEVICE_TABLE(i2c, wm8753_i2c_id);
1601
1602static struct i2c_driver wm8753_i2c_driver = {
69e169da 1603 .driver = {
63010634 1604 .name = "wm8753",
70e14122 1605 .of_match_table = wm8753_of_match,
69e169da 1606 },
f0fba2ad 1607 .probe = wm8753_i2c_probe,
7a79e94e 1608 .remove = wm8753_i2c_remove,
f0fba2ad 1609 .id_table = wm8753_i2c_id,
69e169da
MB		 1610};
1611#endif
1612
c9b3a40f 1613static int __init wm8753_modinit(void)
64089b84 1614{
f0fba2ad 1615 int ret = 0;
2c486433 1616#if IS_ENABLED(CONFIG_I2C)
c2bac160 1617 ret = i2c_add_driver(&wm8753_i2c_driver);
f0fba2ad
LG		 1618 if (ret != 0) {
1619 printk(KERN_ERR "Failed to register wm8753 I2C driver: %d\n",
1620 ret);
1621 }
c2bac160
MB		 1622#endif
1623#if defined(CONFIG_SPI_MASTER)
1624 ret = spi_register_driver(&wm8753_spi_driver);
f0fba2ad
LG		 1625 if (ret != 0) {
1626 printk(KERN_ERR "Failed to register wm8753 SPI driver: %d\n",
1627 ret);
1628 }
c2bac160 1629#endif
f0fba2ad 1630 return ret;
64089b84
MB		 1631}
1632module_init(wm8753_modinit);
1633
1634static void __exit wm8753_exit(void)
1635{
2c486433 1636#if IS_ENABLED(CONFIG_I2C)
c2bac160
MB		 1637 i2c_del_driver(&wm8753_i2c_driver);
1638#endif
1639#if defined(CONFIG_SPI_MASTER)
1640 spi_unregister_driver(&wm8753_spi_driver);
1641#endif
64089b84
MB		 1642}
1643module_exit(wm8753_exit);
1644
1f53aee0
LG		 1645MODULE_DESCRIPTION("ASoC WM8753 driver");
1646MODULE_AUTHOR("Liam Girdwood");
1647MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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