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Merge remote-tracking branch 'ftrace/for-next'
[deliverable/linux.git] / sound / soc / codecs / wm8974.c
CommitLineData
0a1bf553
MB		 1/*
2 * wm8974.c -- WM8974 ALSA Soc Audio driver
3 *
8b83a193 4 * Copyright 2006-2009 Wolfson Microelectronics PLC.
0a1bf553 5 *
9a185b9a 6 * Author: Liam Girdwood <Liam.Girdwood@wolfsonmicro.com>
0a1bf553
MB		 7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
0a1bf553
MB		 15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pm.h>
19#include <linux/i2c.h>
e40e0b5d 20#include <linux/regmap.h>
5a0e3ad6 21#include <linux/slab.h>
0a1bf553
MB		 22#include <sound/core.h>
23#include <sound/pcm.h>
24#include <sound/pcm_params.h>
25#include <sound/soc.h>
0a1bf553 26#include <sound/initval.h>
a5f8d2f1 27#include <sound/tlv.h>
0a1bf553
MB		 28
29#include "wm8974.h"
30
51b2bb3f
MR		 31struct wm8974_priv {
32 unsigned int mclk;
33 unsigned int fs;
34};
35
e40e0b5d
MB		 36static const struct reg_default wm8974_reg_defaults[] = {
37 { 0, 0x0000 }, { 1, 0x0000 }, { 2, 0x0000 }, { 3, 0x0000 },
38 { 4, 0x0050 }, { 5, 0x0000 }, { 6, 0x0140 }, { 7, 0x0000 },
39 { 8, 0x0000 }, { 9, 0x0000 }, { 10, 0x0000 }, { 11, 0x00ff },
40 { 12, 0x0000 }, { 13, 0x0000 }, { 14, 0x0100 }, { 15, 0x00ff },
41 { 16, 0x0000 }, { 17, 0x0000 }, { 18, 0x012c }, { 19, 0x002c },
42 { 20, 0x002c }, { 21, 0x002c }, { 22, 0x002c }, { 23, 0x0000 },
43 { 24, 0x0032 }, { 25, 0x0000 }, { 26, 0x0000 }, { 27, 0x0000 },
44 { 28, 0x0000 }, { 29, 0x0000 }, { 30, 0x0000 }, { 31, 0x0000 },
45 { 32, 0x0038 }, { 33, 0x000b }, { 34, 0x0032 }, { 35, 0x0000 },
46 { 36, 0x0008 }, { 37, 0x000c }, { 38, 0x0093 }, { 39, 0x00e9 },
47 { 40, 0x0000 }, { 41, 0x0000 }, { 42, 0x0000 }, { 43, 0x0000 },
48 { 44, 0x0003 }, { 45, 0x0010 }, { 46, 0x0000 }, { 47, 0x0000 },
49 { 48, 0x0000 }, { 49, 0x0002 }, { 50, 0x0000 }, { 51, 0x0000 },
50 { 52, 0x0000 }, { 53, 0x0000 }, { 54, 0x0039 }, { 55, 0x0000 },
51 { 56, 0x0000 },
0a1bf553
MB		 52};
53
df1ef7a3 54#define WM8974_POWER1_BIASEN 0x08
48c03ce7 55#define WM8974_POWER1_BUFIOEN 0x04
df1ef7a3 56
1e97f50b 57#define wm8974_reset(c) snd_soc_write(c, WM8974_RESET, 0)
0a1bf553
MB		 58
59static const char *wm8974_companding[] = {"Off", "NC", "u-law", "A-law" };
60static const char *wm8974_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz" };
61static const char *wm8974_eqmode[] = {"Capture", "Playback" };
62static const char *wm8974_bw[] = {"Narrow", "Wide" };
63static const char *wm8974_eq1[] = {"80Hz", "105Hz", "135Hz", "175Hz" };
64static const char *wm8974_eq2[] = {"230Hz", "300Hz", "385Hz", "500Hz" };
65static const char *wm8974_eq3[] = {"650Hz", "850Hz", "1.1kHz", "1.4kHz" };
66static const char *wm8974_eq4[] = {"1.8kHz", "2.4kHz", "3.2kHz", "4.1kHz" };
67static const char *wm8974_eq5[] = {"5.3kHz", "6.9kHz", "9kHz", "11.7kHz" };
68static const char *wm8974_alc[] = {"ALC", "Limiter" };
69
70static const struct soc_enum wm8974_enum[] = {
71 SOC_ENUM_SINGLE(WM8974_COMP, 1, 4, wm8974_companding), /* adc */
72 SOC_ENUM_SINGLE(WM8974_COMP, 3, 4, wm8974_companding), /* dac */
73 SOC_ENUM_SINGLE(WM8974_DAC, 4, 4, wm8974_deemp),
74 SOC_ENUM_SINGLE(WM8974_EQ1, 8, 2, wm8974_eqmode),
75
76 SOC_ENUM_SINGLE(WM8974_EQ1, 5, 4, wm8974_eq1),
77 SOC_ENUM_SINGLE(WM8974_EQ2, 8, 2, wm8974_bw),
78 SOC_ENUM_SINGLE(WM8974_EQ2, 5, 4, wm8974_eq2),
79 SOC_ENUM_SINGLE(WM8974_EQ3, 8, 2, wm8974_bw),
80
81 SOC_ENUM_SINGLE(WM8974_EQ3, 5, 4, wm8974_eq3),
82 SOC_ENUM_SINGLE(WM8974_EQ4, 8, 2, wm8974_bw),
83 SOC_ENUM_SINGLE(WM8974_EQ4, 5, 4, wm8974_eq4),
84 SOC_ENUM_SINGLE(WM8974_EQ5, 8, 2, wm8974_bw),
85
86 SOC_ENUM_SINGLE(WM8974_EQ5, 5, 4, wm8974_eq5),
87 SOC_ENUM_SINGLE(WM8974_ALC3, 8, 2, wm8974_alc),
88};
89
8a123ee2
MB		 90static const char *wm8974_auxmode_text[] = { "Buffer", "Mixer" };
91
de461bd2
TI		 92static SOC_ENUM_SINGLE_DECL(wm8974_auxmode,
93 WM8974_INPUT, 3, wm8974_auxmode_text);
8a123ee2 94
a5f8d2f1
MB		 95static const DECLARE_TLV_DB_SCALE(digital_tlv, -12750, 50, 1);
96static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0);
97static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1200, 75, 0);
98static const DECLARE_TLV_DB_SCALE(spk_tlv, -5700, 100, 0);
99
0a1bf553
MB		 100static const struct snd_kcontrol_new wm8974_snd_controls[] = {
101
102SOC_SINGLE("Digital Loopback Switch", WM8974_COMP, 0, 1, 0),
103
104SOC_ENUM("DAC Companding", wm8974_enum[1]),
105SOC_ENUM("ADC Companding", wm8974_enum[0]),
106
107SOC_ENUM("Playback De-emphasis", wm8974_enum[2]),
108SOC_SINGLE("DAC Inversion Switch", WM8974_DAC, 0, 1, 0),
109
a5f8d2f1 110SOC_SINGLE_TLV("PCM Volume", WM8974_DACVOL, 0, 255, 0, digital_tlv),
0a1bf553
MB		 111
112SOC_SINGLE("High Pass Filter Switch", WM8974_ADC, 8, 1, 0),
113SOC_SINGLE("High Pass Cut Off", WM8974_ADC, 4, 7, 0),
25cbf465 114SOC_SINGLE("ADC Inversion Switch", WM8974_ADC, 0, 1, 0),
0a1bf553 115
a5f8d2f1 116SOC_SINGLE_TLV("Capture Volume", WM8974_ADCVOL, 0, 255, 0, digital_tlv),
0a1bf553
MB		 117
118SOC_ENUM("Equaliser Function", wm8974_enum[3]),
119SOC_ENUM("EQ1 Cut Off", wm8974_enum[4]),
a5f8d2f1 120SOC_SINGLE_TLV("EQ1 Volume", WM8974_EQ1, 0, 24, 1, eq_tlv),
0a1bf553 121
c46d5c04 122SOC_ENUM("Equaliser EQ2 Bandwidth", wm8974_enum[5]),
0a1bf553 123SOC_ENUM("EQ2 Cut Off", wm8974_enum[6]),
a5f8d2f1 124SOC_SINGLE_TLV("EQ2 Volume", WM8974_EQ2, 0, 24, 1, eq_tlv),
0a1bf553 125
c46d5c04 126SOC_ENUM("Equaliser EQ3 Bandwidth", wm8974_enum[7]),
0a1bf553 127SOC_ENUM("EQ3 Cut Off", wm8974_enum[8]),
a5f8d2f1 128SOC_SINGLE_TLV("EQ3 Volume", WM8974_EQ3, 0, 24, 1, eq_tlv),
0a1bf553 129
c46d5c04 130SOC_ENUM("Equaliser EQ4 Bandwidth", wm8974_enum[9]),
0a1bf553 131SOC_ENUM("EQ4 Cut Off", wm8974_enum[10]),
a5f8d2f1 132SOC_SINGLE_TLV("EQ4 Volume", WM8974_EQ4, 0, 24, 1, eq_tlv),
0a1bf553 133
a895d57d 134SOC_ENUM("Equaliser EQ5 Bandwidth", wm8974_enum[11]),
0a1bf553 135SOC_ENUM("EQ5 Cut Off", wm8974_enum[12]),
a5f8d2f1 136SOC_SINGLE_TLV("EQ5 Volume", WM8974_EQ5, 0, 24, 1, eq_tlv),
0a1bf553
MB		 137
138SOC_SINGLE("DAC Playback Limiter Switch", WM8974_DACLIM1, 8, 1, 0),
139SOC_SINGLE("DAC Playback Limiter Decay", WM8974_DACLIM1, 4, 15, 0),
140SOC_SINGLE("DAC Playback Limiter Attack", WM8974_DACLIM1, 0, 15, 0),
141
142SOC_SINGLE("DAC Playback Limiter Threshold", WM8974_DACLIM2, 4, 7, 0),
143SOC_SINGLE("DAC Playback Limiter Boost", WM8974_DACLIM2, 0, 15, 0),
144
145SOC_SINGLE("ALC Enable Switch", WM8974_ALC1, 8, 1, 0),
146SOC_SINGLE("ALC Capture Max Gain", WM8974_ALC1, 3, 7, 0),
147SOC_SINGLE("ALC Capture Min Gain", WM8974_ALC1, 0, 7, 0),
148
149SOC_SINGLE("ALC Capture ZC Switch", WM8974_ALC2, 8, 1, 0),
150SOC_SINGLE("ALC Capture Hold", WM8974_ALC2, 4, 7, 0),
151SOC_SINGLE("ALC Capture Target", WM8974_ALC2, 0, 15, 0),
152
153SOC_ENUM("ALC Capture Mode", wm8974_enum[13]),
154SOC_SINGLE("ALC Capture Decay", WM8974_ALC3, 4, 15, 0),
155SOC_SINGLE("ALC Capture Attack", WM8974_ALC3, 0, 15, 0),
156
157SOC_SINGLE("ALC Capture Noise Gate Switch", WM8974_NGATE, 3, 1, 0),
158SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8974_NGATE, 0, 7, 0),
159
160SOC_SINGLE("Capture PGA ZC Switch", WM8974_INPPGA, 7, 1, 0),
a5f8d2f1 161SOC_SINGLE_TLV("Capture PGA Volume", WM8974_INPPGA, 0, 63, 0, inpga_tlv),
0a1bf553
MB		 162
163SOC_SINGLE("Speaker Playback ZC Switch", WM8974_SPKVOL, 7, 1, 0),
164SOC_SINGLE("Speaker Playback Switch", WM8974_SPKVOL, 6, 1, 1),
8a123ee2
MB		 165SOC_SINGLE_TLV("Speaker Playback Volume", WM8974_SPKVOL, 0, 63, 0, spk_tlv),
166
167SOC_ENUM("Aux Mode", wm8974_auxmode),
0a1bf553
MB		 168
169SOC_SINGLE("Capture Boost(+20dB)", WM8974_ADCBOOST, 8, 1, 0),
8a123ee2 170SOC_SINGLE("Mono Playback Switch", WM8974_MONOMIX, 6, 1, 1),
b2c3e923
GL		 171
172/* DAC / ADC oversampling */
173SOC_SINGLE("DAC 128x Oversampling Switch", WM8974_DAC, 8, 1, 0),
174SOC_SINGLE("ADC 128x Oversampling Switch", WM8974_ADC, 8, 1, 0),
0a1bf553
MB		 175};
176
0a1bf553
MB		 177/* Speaker Output Mixer */
178static const struct snd_kcontrol_new wm8974_speaker_mixer_controls[] = {
179SOC_DAPM_SINGLE("Line Bypass Switch", WM8974_SPKMIX, 1, 1, 0),
180SOC_DAPM_SINGLE("Aux Playback Switch", WM8974_SPKMIX, 5, 1, 0),
759512fb 181SOC_DAPM_SINGLE("PCM Playback Switch", WM8974_SPKMIX, 0, 1, 0),
0a1bf553
MB		 182};
183
184/* Mono Output Mixer */
185static const struct snd_kcontrol_new wm8974_mono_mixer_controls[] = {
186SOC_DAPM_SINGLE("Line Bypass Switch", WM8974_MONOMIX, 1, 1, 0),
187SOC_DAPM_SINGLE("Aux Playback Switch", WM8974_MONOMIX, 2, 1, 0),
8a123ee2
MB		 188SOC_DAPM_SINGLE("PCM Playback Switch", WM8974_MONOMIX, 0, 1, 0),
189};
190
191/* Boost mixer */
192static const struct snd_kcontrol_new wm8974_boost_mixer[] = {
193SOC_DAPM_SINGLE("Aux Switch", WM8974_INPPGA, 6, 1, 0),
194};
195
196/* Input PGA */
197static const struct snd_kcontrol_new wm8974_inpga[] = {
198SOC_DAPM_SINGLE("Aux Switch", WM8974_INPUT, 2, 1, 0),
199SOC_DAPM_SINGLE("MicN Switch", WM8974_INPUT, 1, 1, 0),
200SOC_DAPM_SINGLE("MicP Switch", WM8974_INPUT, 0, 1, 0),
0a1bf553
MB		 201};
202
203/* AUX Input boost vol */
204static const struct snd_kcontrol_new wm8974_aux_boost_controls =
205SOC_DAPM_SINGLE("Aux Volume", WM8974_ADCBOOST, 0, 7, 0);
206
207/* Mic Input boost vol */
208static const struct snd_kcontrol_new wm8974_mic_boost_controls =
209SOC_DAPM_SINGLE("Mic Volume", WM8974_ADCBOOST, 4, 7, 0);
210
0a1bf553
MB		 211static const struct snd_soc_dapm_widget wm8974_dapm_widgets[] = {
212SND_SOC_DAPM_MIXER("Speaker Mixer", WM8974_POWER3, 2, 0,
213 &wm8974_speaker_mixer_controls[0],
214 ARRAY_SIZE(wm8974_speaker_mixer_controls)),
215SND_SOC_DAPM_MIXER("Mono Mixer", WM8974_POWER3, 3, 0,
216 &wm8974_mono_mixer_controls[0],
217 ARRAY_SIZE(wm8974_mono_mixer_controls)),
218SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8974_POWER3, 0, 0),
8a123ee2 219SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8974_POWER2, 0, 0),
0a1bf553
MB		 220SND_SOC_DAPM_PGA("Aux Input", WM8974_POWER1, 6, 0, NULL, 0),
221SND_SOC_DAPM_PGA("SpkN Out", WM8974_POWER3, 5, 0, NULL, 0),
222SND_SOC_DAPM_PGA("SpkP Out", WM8974_POWER3, 6, 0, NULL, 0),
223SND_SOC_DAPM_PGA("Mono Out", WM8974_POWER3, 7, 0, NULL, 0),
0a1bf553 224
8a123ee2
MB		 225SND_SOC_DAPM_MIXER("Input PGA", WM8974_POWER2, 2, 0, wm8974_inpga,
226 ARRAY_SIZE(wm8974_inpga)),
227SND_SOC_DAPM_MIXER("Boost Mixer", WM8974_POWER2, 4, 0,
228 wm8974_boost_mixer, ARRAY_SIZE(wm8974_boost_mixer)),
0a1bf553 229
48dd231b 230SND_SOC_DAPM_SUPPLY("Mic Bias", WM8974_POWER1, 4, 0, NULL, 0),
0a1bf553
MB		 231
232SND_SOC_DAPM_INPUT("MICN"),
233SND_SOC_DAPM_INPUT("MICP"),
234SND_SOC_DAPM_INPUT("AUX"),
235SND_SOC_DAPM_OUTPUT("MONOOUT"),
236SND_SOC_DAPM_OUTPUT("SPKOUTP"),
237SND_SOC_DAPM_OUTPUT("SPKOUTN"),
238};
239
a2bd691c 240static const struct snd_soc_dapm_route wm8974_dapm_routes[] = {
0a1bf553
MB		 241 /* Mono output mixer */
242 {"Mono Mixer", "PCM Playback Switch", "DAC"},
243 {"Mono Mixer", "Aux Playback Switch", "Aux Input"},
244 {"Mono Mixer", "Line Bypass Switch", "Boost Mixer"},
245
246 /* Speaker output mixer */
247 {"Speaker Mixer", "PCM Playback Switch", "DAC"},
248 {"Speaker Mixer", "Aux Playback Switch", "Aux Input"},
249 {"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"},
250
251 /* Outputs */
252 {"Mono Out", NULL, "Mono Mixer"},
253 {"MONOOUT", NULL, "Mono Out"},
254 {"SpkN Out", NULL, "Speaker Mixer"},
255 {"SpkP Out", NULL, "Speaker Mixer"},
256 {"SPKOUTN", NULL, "SpkN Out"},
257 {"SPKOUTP", NULL, "SpkP Out"},
258
259 /* Boost Mixer */
8a123ee2
MB		 260 {"ADC", NULL, "Boost Mixer"},
261 {"Boost Mixer", "Aux Switch", "Aux Input"},
262 {"Boost Mixer", NULL, "Input PGA"},
263 {"Boost Mixer", NULL, "MICP"},
264
265 /* Input PGA */
266 {"Input PGA", "Aux Switch", "Aux Input"},
267 {"Input PGA", "MicN Switch", "MICN"},
268 {"Input PGA", "MicP Switch", "MICP"},
0a1bf553
MB		 269
270 /* Inputs */
8a123ee2 271 {"Aux Input", NULL, "AUX"},
0a1bf553
MB		 272};
273
0a1bf553 274struct pll_ {
c36b2fc7 275 unsigned int pre_div:1;
0a1bf553
MB		 276 unsigned int n:4;
277 unsigned int k;
278};
279
91d0c3ec
MB		 280/* The size in bits of the pll divide multiplied by 10
281 * to allow rounding later */
282#define FIXED_PLL_SIZE ((1 << 24) * 10)
283
c36b2fc7
MB		 284static void pll_factors(struct pll_ *pll_div,
285 unsigned int target, unsigned int source)
91d0c3ec
MB		 286{
287 unsigned long long Kpart;
288 unsigned int K, Ndiv, Nmod;
289
c36b2fc7
MB		 290 /* There is a fixed divide by 4 in the output path */
291 target *= 4;
292
91d0c3ec
MB		 293 Ndiv = target / source;
294 if (Ndiv < 6) {
c36b2fc7
MB		 295 source /= 2;
296 pll_div->pre_div = 1;
91d0c3ec
MB		 297 Ndiv = target / source;
298 } else
c36b2fc7 299 pll_div->pre_div = 0;
91d0c3ec
MB		 300
301 if ((Ndiv < 6) || (Ndiv > 12))
302 printk(KERN_WARNING
8b83a193 303 "WM8974 N value %u outwith recommended range!\n",
91d0c3ec
MB		 304 Ndiv);
305
c36b2fc7 306 pll_div->n = Ndiv;
91d0c3ec
MB		 307 Nmod = target % source;
308 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
309
310 do_div(Kpart, source);
311
312 K = Kpart & 0xFFFFFFFF;
313
314 /* Check if we need to round */
315 if ((K % 10) >= 5)
316 K += 5;
317
318 /* Move down to proper range now rounding is done */
319 K /= 10;
320
c36b2fc7 321 pll_div->k = K;
91d0c3ec 322}
0a1bf553 323
85488037
MB		 324static int wm8974_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
325 int source, unsigned int freq_in, unsigned int freq_out)
0a1bf553
MB		 326{
327 struct snd_soc_codec *codec = codec_dai->codec;
c36b2fc7 328 struct pll_ pll_div;
0a1bf553
MB		 329 u16 reg;
330
1a55b3f6 331 if (freq_in == 0 || freq_out == 0) {
91d0c3ec 332 /* Clock CODEC directly from MCLK */
1e97f50b
MB		 333 reg = snd_soc_read(codec, WM8974_CLOCK);
334 snd_soc_write(codec, WM8974_CLOCK, reg & 0x0ff);
91d0c3ec
MB		 335
336 /* Turn off PLL */
1e97f50b
MB		 337 reg = snd_soc_read(codec, WM8974_POWER1);
338 snd_soc_write(codec, WM8974_POWER1, reg & 0x1df);
0a1bf553
MB		 339 return 0;
340 }
341
c36b2fc7 342 pll_factors(&pll_div, freq_out, freq_in);
91d0c3ec 343
1e97f50b
MB		 344 snd_soc_write(codec, WM8974_PLLN, (pll_div.pre_div << 4) | pll_div.n);
345 snd_soc_write(codec, WM8974_PLLK1, pll_div.k >> 18);
346 snd_soc_write(codec, WM8974_PLLK2, (pll_div.k >> 9) & 0x1ff);
347 snd_soc_write(codec, WM8974_PLLK3, pll_div.k & 0x1ff);
348 reg = snd_soc_read(codec, WM8974_POWER1);
349 snd_soc_write(codec, WM8974_POWER1, reg | 0x020);
1a55b3f6 350
91d0c3ec 351 /* Run CODEC from PLL instead of MCLK */
1e97f50b
MB		 352 reg = snd_soc_read(codec, WM8974_CLOCK);
353 snd_soc_write(codec, WM8974_CLOCK, reg | 0x100);
91d0c3ec
MB		 354
355 return 0;
0a1bf553
MB		 356}
357
358/*
359 * Configure WM8974 clock dividers.
360 */
361static int wm8974_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
362 int div_id, int div)
363{
364 struct snd_soc_codec *codec = codec_dai->codec;
365 u16 reg;
366
367 switch (div_id) {
368 case WM8974_OPCLKDIV:
1e97f50b
MB		 369 reg = snd_soc_read(codec, WM8974_GPIO) & 0x1cf;
370 snd_soc_write(codec, WM8974_GPIO, reg | div);
0a1bf553
MB		 371 break;
372 case WM8974_MCLKDIV:
1e97f50b
MB		 373 reg = snd_soc_read(codec, WM8974_CLOCK) & 0x11f;
374 snd_soc_write(codec, WM8974_CLOCK, reg | div);
0a1bf553 375 break;
0a1bf553 376 case WM8974_BCLKDIV:
1e97f50b
MB		 377 reg = snd_soc_read(codec, WM8974_CLOCK) & 0x1e3;
378 snd_soc_write(codec, WM8974_CLOCK, reg | div);
0a1bf553
MB		 379 break;
380 default:
381 return -EINVAL;
382 }
383
384 return 0;
385}
386
51b2bb3f
MR		 387static unsigned int wm8974_get_mclkdiv(unsigned int f_in, unsigned int f_out,
388 int *mclkdiv)
389{
390 unsigned int ratio = 2 * f_in / f_out;
391
392 if (ratio <= 2) {
393 *mclkdiv = WM8974_MCLKDIV_1;
394 ratio = 2;
395 } else if (ratio == 3) {
396 *mclkdiv = WM8974_MCLKDIV_1_5;
397 } else if (ratio == 4) {
398 *mclkdiv = WM8974_MCLKDIV_2;
399 } else if (ratio <= 6) {
400 *mclkdiv = WM8974_MCLKDIV_3;
401 ratio = 6;
402 } else if (ratio <= 8) {
403 *mclkdiv = WM8974_MCLKDIV_4;
404 ratio = 8;
405 } else if (ratio <= 12) {
406 *mclkdiv = WM8974_MCLKDIV_6;
407 ratio = 12;
408 } else if (ratio <= 16) {
409 *mclkdiv = WM8974_MCLKDIV_8;
410 ratio = 16;
411 } else {
412 *mclkdiv = WM8974_MCLKDIV_12;
413 ratio = 24;
414 }
415
416 return f_out * ratio / 2;
417}
418
419static int wm8974_update_clocks(struct snd_soc_dai *dai)
420{
421 struct snd_soc_codec *codec = dai->codec;
422 struct wm8974_priv *priv = snd_soc_codec_get_drvdata(codec);
423 unsigned int fs256;
424 unsigned int fpll = 0;
425 unsigned int f;
426 int mclkdiv;
427
428 if (!priv->mclk || !priv->fs)
429 return 0;
430
431 fs256 = 256 * priv->fs;
432
433 f = wm8974_get_mclkdiv(priv->mclk, fs256, &mclkdiv);
434
435 if (f != priv->mclk) {
436 /* The PLL performs best around 90MHz */
437 fpll = wm8974_get_mclkdiv(22500000, fs256, &mclkdiv);
438 }
439
440 wm8974_set_dai_pll(dai, 0, 0, priv->mclk, fpll);
441 wm8974_set_dai_clkdiv(dai, WM8974_MCLKDIV, mclkdiv);
442
443 return 0;
444}
445
446static int wm8974_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
447 unsigned int freq, int dir)
448{
449 struct snd_soc_codec *codec = dai->codec;
450 struct wm8974_priv *priv = snd_soc_codec_get_drvdata(codec);
451
452 if (dir != SND_SOC_CLOCK_IN)
453 return -EINVAL;
454
455 priv->mclk = freq;
456
457 return wm8974_update_clocks(dai);
458}
459
0a1bf553
MB		 460static int wm8974_set_dai_fmt(struct snd_soc_dai *codec_dai,
461 unsigned int fmt)
462{
463 struct snd_soc_codec *codec = codec_dai->codec;
464 u16 iface = 0;
1e97f50b 465 u16 clk = snd_soc_read(codec, WM8974_CLOCK) & 0x1fe;
0a1bf553
MB		 466
467 /* set master/slave audio interface */
468 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
469 case SND_SOC_DAIFMT_CBM_CFM:
470 clk |= 0x0001;
471 break;
472 case SND_SOC_DAIFMT_CBS_CFS:
473 break;
474 default:
475 return -EINVAL;
476 }
477
478 /* interface format */
479 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
480 case SND_SOC_DAIFMT_I2S:
481 iface |= 0x0010;
482 break;
483 case SND_SOC_DAIFMT_RIGHT_J:
484 break;
485 case SND_SOC_DAIFMT_LEFT_J:
486 iface |= 0x0008;
487 break;
488 case SND_SOC_DAIFMT_DSP_A:
489 iface |= 0x00018;
490 break;
491 default:
492 return -EINVAL;
493 }
494
495 /* clock inversion */
496 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
497 case SND_SOC_DAIFMT_NB_NF:
498 break;
499 case SND_SOC_DAIFMT_IB_IF:
500 iface |= 0x0180;
501 break;
502 case SND_SOC_DAIFMT_IB_NF:
503 iface |= 0x0100;
504 break;
505 case SND_SOC_DAIFMT_NB_IF:
506 iface |= 0x0080;
507 break;
508 default:
509 return -EINVAL;
510 }
511
1e97f50b
MB		 512 snd_soc_write(codec, WM8974_IFACE, iface);
513 snd_soc_write(codec, WM8974_CLOCK, clk);
0a1bf553
MB		 514 return 0;
515}
516
517static int wm8974_pcm_hw_params(struct snd_pcm_substream *substream,
518 struct snd_pcm_hw_params *params,
519 struct snd_soc_dai *dai)
520{
521 struct snd_soc_codec *codec = dai->codec;
51b2bb3f 522 struct wm8974_priv *priv = snd_soc_codec_get_drvdata(codec);
1e97f50b
MB		 523 u16 iface = snd_soc_read(codec, WM8974_IFACE) & 0x19f;
524 u16 adn = snd_soc_read(codec, WM8974_ADD) & 0x1f1;
51b2bb3f
MR		 525 int err;
526
527 priv->fs = params_rate(params);
528 err = wm8974_update_clocks(dai);
529 if (err)
530 return err;
0a1bf553
MB		 531
532 /* bit size */
6afdc9a0
MB		 533 switch (params_width(params)) {
534 case 16:
0a1bf553 535 break;
6afdc9a0 536 case 20:
0a1bf553
MB		 537 iface |= 0x0020;
538 break;
6afdc9a0 539 case 24:
0a1bf553
MB		 540 iface |= 0x0040;
541 break;
6afdc9a0 542 case 32:
0a1bf553
MB		 543 iface |= 0x0060;
544 break;
545 }
546
547 /* filter coefficient */
548 switch (params_rate(params)) {
b3172f22 549 case 8000:
0a1bf553
MB		 550 adn |= 0x5 << 1;
551 break;
b3172f22 552 case 11025:
0a1bf553
MB		 553 adn |= 0x4 << 1;
554 break;
b3172f22 555 case 16000:
0a1bf553
MB		 556 adn |= 0x3 << 1;
557 break;
b3172f22 558 case 22050:
0a1bf553
MB		 559 adn |= 0x2 << 1;
560 break;
b3172f22 561 case 32000:
0a1bf553
MB		 562 adn |= 0x1 << 1;
563 break;
b3172f22
GL		 564 case 44100:
565 case 48000:
0a1bf553
MB		 566 break;
567 }
568
1e97f50b
MB		 569 snd_soc_write(codec, WM8974_IFACE, iface);
570 snd_soc_write(codec, WM8974_ADD, adn);
0a1bf553
MB		 571 return 0;
572}
573
574static int wm8974_mute(struct snd_soc_dai *dai, int mute)
575{
576 struct snd_soc_codec *codec = dai->codec;
1e97f50b 577 u16 mute_reg = snd_soc_read(codec, WM8974_DAC) & 0xffbf;
0a1bf553 578
1a55b3f6 579 if (mute)
1e97f50b 580 snd_soc_write(codec, WM8974_DAC, mute_reg | 0x40);
0a1bf553 581 else
1e97f50b 582 snd_soc_write(codec, WM8974_DAC, mute_reg);
0a1bf553
MB		 583 return 0;
584}
585
586/* liam need to make this lower power with dapm */
587static int wm8974_set_bias_level(struct snd_soc_codec *codec,
588 enum snd_soc_bias_level level)
589{
1e97f50b 590 u16 power1 = snd_soc_read(codec, WM8974_POWER1) & ~0x3;
df1ef7a3 591
0a1bf553
MB		 592 switch (level) {
593 case SND_SOC_BIAS_ON:
0a1bf553 594 case SND_SOC_BIAS_PREPARE:
df1ef7a3 595 power1 |= 0x1; /* VMID 50k */
1e97f50b 596 snd_soc_write(codec, WM8974_POWER1, power1);
0a1bf553 597 break;
df1ef7a3 598
0a1bf553 599 case SND_SOC_BIAS_STANDBY:
df1ef7a3
MB		 600 power1 |= WM8974_POWER1_BIASEN | WM8974_POWER1_BUFIOEN;
601
5c6415d6 602 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
e40e0b5d 603 regcache_sync(dev_get_regmap(codec->dev, NULL));
0bad3d84 604
df1ef7a3 605 /* Initial cap charge at VMID 5k */
1e97f50b 606 snd_soc_write(codec, WM8974_POWER1, power1 | 0x3);
df1ef7a3
MB		 607 mdelay(100);
608 }
609
610 power1 |= 0x2; /* VMID 500k */
1e97f50b 611 snd_soc_write(codec, WM8974_POWER1, power1);
0a1bf553 612 break;
df1ef7a3 613
0a1bf553 614 case SND_SOC_BIAS_OFF:
1e97f50b
MB		 615 snd_soc_write(codec, WM8974_POWER1, 0);
616 snd_soc_write(codec, WM8974_POWER2, 0);
617 snd_soc_write(codec, WM8974_POWER3, 0);
0a1bf553
MB		 618 break;
619 }
df1ef7a3 620
0a1bf553
MB		 621 return 0;
622}
623
1a55b3f6 624#define WM8974_RATES (SNDRV_PCM_RATE_8000_48000)
0a1bf553
MB		 625
626#define WM8974_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
627 SNDRV_PCM_FMTBIT_S24_LE)
628
85e7652d 629static const struct snd_soc_dai_ops wm8974_ops = {
0a1bf553
MB		 630 .hw_params = wm8974_pcm_hw_params,
631 .digital_mute = wm8974_mute,
632 .set_fmt = wm8974_set_dai_fmt,
633 .set_clkdiv = wm8974_set_dai_clkdiv,
634 .set_pll = wm8974_set_dai_pll,
51b2bb3f 635 .set_sysclk = wm8974_set_dai_sysclk,
0a1bf553
MB		 636};
637
f0fba2ad
LG		 638static struct snd_soc_dai_driver wm8974_dai = {
639 .name = "wm8974-hifi",
0a1bf553
MB		 640 .playback = {
641 .stream_name = "Playback",
642 .channels_min = 1,
33d81af4 643 .channels_max = 2, /* Only 1 channel of data */
0a1bf553
MB		 644 .rates = WM8974_RATES,
645 .formats = WM8974_FORMATS,},
646 .capture = {
647 .stream_name = "Capture",
648 .channels_min = 1,
33d81af4 649 .channels_max = 2, /* Only 1 channel of data */
0a1bf553
MB		 650 .rates = WM8974_RATES,
651 .formats = WM8974_FORMATS,},
652 .ops = &wm8974_ops,
cb11d39e 653 .symmetric_rates = 1,
0a1bf553 654};
0a1bf553 655
e40e0b5d
MB		 656static const struct regmap_config wm8974_regmap = {
657 .reg_bits = 7,
658 .val_bits = 9,
659
660 .max_register = WM8974_MONOMIX,
661 .reg_defaults = wm8974_reg_defaults,
662 .num_reg_defaults = ARRAY_SIZE(wm8974_reg_defaults),
1ea5998a 663 .cache_type = REGCACHE_FLAT,
e40e0b5d
MB		 664};
665
f0fba2ad 666static int wm8974_probe(struct snd_soc_codec *codec)
0a1bf553 667{
0a1bf553
MB		 668 int ret = 0;
669
f0fba2ad 670 ret = wm8974_reset(codec);
1a55b3f6 671 if (ret < 0) {
f0fba2ad
LG		 672 dev_err(codec->dev, "Failed to issue reset\n");
673 return ret;
0a1bf553
MB		 674 }
675
4fcbbb67
MB		 676 return 0;
677}
0a1bf553 678
f802d6c0 679static const struct snd_soc_codec_driver soc_codec_dev_wm8974 = {
4fcbbb67 680 .probe = wm8974_probe,
f0fba2ad 681 .set_bias_level = wm8974_set_bias_level,
ed1358f5 682 .suspend_bias_off = true,
a2bd691c 683
48b04238
KM		 684 .component_driver = {
685 .controls = wm8974_snd_controls,
686 .num_controls = ARRAY_SIZE(wm8974_snd_controls),
687 .dapm_widgets = wm8974_dapm_widgets,
688 .num_dapm_widgets = ARRAY_SIZE(wm8974_dapm_widgets),
689 .dapm_routes = wm8974_dapm_routes,
690 .num_dapm_routes = ARRAY_SIZE(wm8974_dapm_routes),
691 },
4fcbbb67 692};
0a1bf553 693
7a79e94e
BP		 694static int wm8974_i2c_probe(struct i2c_client *i2c,
695 const struct i2c_device_id *id)
0a1bf553 696{
51b2bb3f 697 struct wm8974_priv *priv;
e40e0b5d 698 struct regmap *regmap;
f0fba2ad 699 int ret;
0a1bf553 700
51b2bb3f
MR		 701 priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL);
702 if (!priv)
703 return -ENOMEM;
704
705 i2c_set_clientdata(i2c, priv);
706
e40e0b5d
MB		 707 regmap = devm_regmap_init_i2c(i2c, &wm8974_regmap);
708 if (IS_ERR(regmap))
709 return PTR_ERR(regmap);
710
f0fba2ad
LG		 711 ret = snd_soc_register_codec(&i2c->dev,
712 &soc_codec_dev_wm8974, &wm8974_dai, 1);
c2562a8e 713
f0fba2ad 714 return ret;
4fcbbb67 715}
0a1bf553 716
7a79e94e 717static int wm8974_i2c_remove(struct i2c_client *client)
4fcbbb67 718{
f0fba2ad 719 snd_soc_unregister_codec(&client->dev);
c2562a8e 720
0a1bf553
MB		 721 return 0;
722}
723
4fcbbb67
MB		 724static const struct i2c_device_id wm8974_i2c_id[] = {
725 { "wm8974", 0 },
726 { }
727};
728MODULE_DEVICE_TABLE(i2c, wm8974_i2c_id);
729
2005bd88
MR		 730static const struct of_device_id wm8974_of_match[] = {
731 { .compatible = "wlf,wm8974", },
732 { }
733};
734MODULE_DEVICE_TABLE(of, wm8974_of_match);
735
4fcbbb67
MB		 736static struct i2c_driver wm8974_i2c_driver = {
737 .driver = {
091edccf 738 .name = "wm8974",
2005bd88 739 .of_match_table = wm8974_of_match,
4fcbbb67
MB		 740 },
741 .probe = wm8974_i2c_probe,
7a79e94e 742 .remove = wm8974_i2c_remove,
4fcbbb67 743 .id_table = wm8974_i2c_id,
0a1bf553 744};
0a1bf553 745
2be59418 746module_i2c_driver(wm8974_i2c_driver);
0a1bf553
MB		 747
748MODULE_DESCRIPTION("ASoC WM8974 driver");
749MODULE_AUTHOR("Liam Girdwood");
750MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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