[deliverable/linux.git] / sound / soc / samsung / s3c-i2s-v2.h

/* sound/soc/samsung/s3c-i2s-v2.h
 *
 * ALSA Soc Audio Layer - S3C_I2SV2 I2S driver
 *
 * Copyright (c) 2007 Simtec Electronics
 *	http://armlinux.simtec.co.uk/
 *	Ben Dooks <ben@simtec.co.uk>
 *
 *  This program is free software; you can redistribute  it and/or modify it
 *  under  the terms of  the GNU General  Public License as published by the
 *  Free Software Foundation;  either version 2 of the  License, or (at your
 *  option) any later version.
*/

/* This code is the core support for the I2S block found in a number of
 * Samsung SoC devices which is unofficially named I2S-V2. Currently the
 * S3C2412 and the S3C64XX series use this block to provide 1 or 2 I2S
 * channels via configurable GPIO.
 */

#ifndef __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H
#define __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H __FILE__

#define S3C_I2SV2_DIV_BCLK	(1)
#define S3C_I2SV2_DIV_RCLK	(2)
#define S3C_I2SV2_DIV_PRESCALER	(3)

#define S3C_I2SV2_CLKSRC_PCLK		0
#define S3C_I2SV2_CLKSRC_AUDIOBUS	1
#define S3C_I2SV2_CLKSRC_CDCLK		2

/* Set this flag for I2S controllers that have the bit IISMOD[12]
 * bridge/break RCLK signal and external Xi2sCDCLK pin.
 */
#define S3C_FEATURE_CDCLKCON	(1 << 0)

/**
 * struct s3c_i2sv2_info - S3C I2S-V2 information
 * @dev: The parent device passed to use from the probe.
 * @regs: The pointer to the device registe block.
 * @feature: Set of bit-flags indicating features of the controller.
 * @master: True if the I2S core is the I2S bit clock master.
 * @dma_playback: DMA information for playback channel.
 * @dma_capture: DMA information for capture channel.
 * @suspend_iismod: PM save for the IISMOD register.
 * @suspend_iiscon: PM save for the IISCON register.
 * @suspend_iispsr: PM save for the IISPSR register.
 *
 * This is the private codec state for the hardware associated with an
 * I2S channel such as the register mappings and clock sources.
 */
struct s3c_i2sv2_info {
	struct device	*dev;
	void __iomem	*regs;

	u32		feature;

	struct clk	*iis_pclk;
	struct clk	*iis_cclk;

	unsigned char	 master;

	struct snd_dmaengine_dai_dma_data *dma_playback;
	struct snd_dmaengine_dai_dma_data *dma_capture;

	u32		 suspend_iismod;
	u32		 suspend_iiscon;
	u32		 suspend_iispsr;

	unsigned long	base;
};

extern struct clk *s3c_i2sv2_get_clock(struct snd_soc_dai *cpu_dai);

struct s3c_i2sv2_rate_calc {
	unsigned int	clk_div;	/* for prescaler */
	unsigned int	fs_div;		/* for root frame clock */
};

extern int s3c_i2sv2_iis_calc_rate(struct s3c_i2sv2_rate_calc *info,
				   unsigned int *fstab,
				   unsigned int rate, struct clk *clk);

/**
 * s3c_i2sv2_probe - probe for i2s device helper
 * @dai: The ASoC DAI structure supplied to the original probe.
 * @i2s: Our local i2s structure to fill in.
 * @base: The base address for the registers.
 */
extern int s3c_i2sv2_probe(struct snd_soc_dai *dai,
			   struct s3c_i2sv2_info *i2s,
			   unsigned long base);

/**
 * s3c_i2sv2_register_component - register component and dai with soc core
 * @dev: DAI device
 * @id: DAI ID
 * @drv: The driver structure to register
 *
 * Fill in any missing fields and then register the given dai with the
 * soc core.
 */
extern int s3c_i2sv2_register_component(struct device *dev, int id,
					const struct snd_soc_component_driver *cmp_drv,
					struct snd_soc_dai_driver *dai_drv);

#endif /* __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H */
Commit	Line	Data
5033f43c	1	/* sound/soc/samsung/s3c-i2s-v2.h
dc85447b BD	2	*
	3	* ALSA Soc Audio Layer - S3C_I2SV2 I2S driver
	4	*
	5	* Copyright (c) 2007 Simtec Electronics
	6	* http://armlinux.simtec.co.uk/
	7	* Ben Dooks <ben@simtec.co.uk>
	8	*
	9	* This program is free software; you can redistribute it and/or modify it
	10	* under the terms of the GNU General Public License as published by the
	11	* Free Software Foundation; either version 2 of the License, or (at your
	12	* option) any later version.
	13	*/
	14
	15	/* This code is the core support for the I2S block found in a number of
	16	* Samsung SoC devices which is unofficially named I2S-V2. Currently the
	17	* S3C2412 and the S3C64XX series use this block to provide 1 or 2 I2S
	18	* channels via configurable GPIO.
	19	*/
	20
	21	#ifndef __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H
	22	#define __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H __FILE__
	23
	24	#define S3C_I2SV2_DIV_BCLK (1)
	25	#define S3C_I2SV2_DIV_RCLK (2)
	26	#define S3C_I2SV2_DIV_PRESCALER (3)
	27
4793d6af JB	28	#define S3C_I2SV2_CLKSRC_PCLK 0
	29	#define S3C_I2SV2_CLKSRC_AUDIOBUS 1
	30	#define S3C_I2SV2_CLKSRC_CDCLK 2
	31
9e991a4b JB	32	/* Set this flag for I2S controllers that have the bit IISMOD[12]
	33	* bridge/break RCLK signal and external Xi2sCDCLK pin.
	34	*/
	35	#define S3C_FEATURE_CDCLKCON (1 << 0)
	36
dc85447b BD	37	/**
	38	* struct s3c_i2sv2_info - S3C I2S-V2 information
	39	* @dev: The parent device passed to use from the probe.
	40	* @regs: The pointer to the device registe block.
9e991a4b	41	* @feature: Set of bit-flags indicating features of the controller.
dc85447b BD	42	* @master: True if the I2S core is the I2S bit clock master.
	43	* @dma_playback: DMA information for playback channel.
	44	* @dma_capture: DMA information for capture channel.
	45	* @suspend_iismod: PM save for the IISMOD register.
	46	* @suspend_iiscon: PM save for the IISCON register.
	47	* @suspend_iispsr: PM save for the IISPSR register.
	48	*
	49	* This is the private codec state for the hardware associated with an
	50	* I2S channel such as the register mappings and clock sources.
	51	*/
	52	struct s3c_i2sv2_info {
	53	struct device *dev;
	54	void __iomem *regs;
	55
9e991a4b JB	56	u32 feature;
9e991a4b JB	57
dc85447b BD	58	struct clk *iis_pclk;
dc85447b BD	59	struct clk *iis_cclk;
dc85447b BD	60
	61	unsigned char master;
	62
ea37bd4d SN	63	struct snd_dmaengine_dai_dma_data *dma_playback;
ea37bd4d SN	64	struct snd_dmaengine_dai_dma_data *dma_capture;
dc85447b BD	65
	66	u32 suspend_iismod;
	67	u32 suspend_iiscon;
	68	u32 suspend_iispsr;
f0fba2ad LG	69
f0fba2ad LG	70	unsigned long base;
dc85447b BD	71	};
dc85447b BD	72
57282427 JB	73	extern struct clk s3c_i2sv2_get_clock(struct snd_soc_dai cpu_dai);
57282427 JB	74
dc85447b BD	75	struct s3c_i2sv2_rate_calc {
	76	unsigned int clk_div; /* for prescaler */
	77	unsigned int fs_div; /* for root frame clock */
	78	};
	79
	80	extern int s3c_i2sv2_iis_calc_rate(struct s3c_i2sv2_rate_calc *info,
	81	unsigned int *fstab,
	82	unsigned int rate, struct clk *clk);
	83
	84	/**
	85	* s3c_i2sv2_probe - probe for i2s device helper
dc85447b BD	86	* @dai: The ASoC DAI structure supplied to the original probe.
	87	* @i2s: Our local i2s structure to fill in.
	88	* @base: The base address for the registers.
	89	*/
f0fba2ad	90	extern int s3c_i2sv2_probe(struct snd_soc_dai *dai,
dc85447b BD	91	struct s3c_i2sv2_info *i2s,
	92	unsigned long base);
	93
	94	/**
eca3b01d	95	* s3c_i2sv2_register_component - register component and dai with soc core
f0fba2ad LG	96	* @dev: DAI device
	97	* @id: DAI ID
	98	* @drv: The driver structure to register
dc85447b BD	99	*
	100	* Fill in any missing fields and then register the given dai with the
	101	* soc core.
	102	*/
eca3b01d	103	extern int s3c_i2sv2_register_component(struct device *dev, int id,
ba4bc32e	104	const struct snd_soc_component_driver *cmp_drv,
eca3b01d	105	struct snd_soc_dai_driver *dai_drv);
dc85447b BD	106
dc85447b BD	107	#endif /* __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H */