Merge remote-tracking branch 'iommu/next'
[deliverable/linux.git] / sound / soc / samsung / smdk_wm8580pcm.c
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1/*
2 * sound/soc/samsung/smdk_wm8580pcm.c
3 *
4 * Copyright (c) 2011 Samsung Electronics Co. Ltd
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
da155d5b 11#include <linux/module.h>
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12#include <sound/soc.h>
13#include <sound/pcm_params.h>
14#include <sound/pcm.h>
15
16#include <asm/mach-types.h>
17
18#include "../codecs/wm8580.h"
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19#include "pcm.h"
20
21/*
22 * Board Settings:
23 * o '1' means 'ON'
24 * o '0' means 'OFF'
25 * o 'X' means 'Don't care'
26 *
3a549fbf 27 * SMDK6410 Base B/D: CFG1-0000, CFG2-1111
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28 * SMDKC110, SMDKV210: CFGB11-100100, CFGB12-0000
29 */
30
31#define SMDK_WM8580_EXT_OSC 12000000
32#define SMDK_WM8580_EXT_MCLK 4096000
33#define SMDK_WM8580_EXT_VOICE 2048000
34
35static unsigned long mclk_freq;
36static unsigned long xtal_freq;
37
38/*
39 * If MCLK clock directly gets from XTAL, we don't have to use PLL
40 * to make MCLK, but if XTAL clock source connects with other codec
41 * pin (like XTI), we should have to set codec's PLL to make MCLK.
42 * Because Samsung SoC does not support pcmcdclk output like I2S.
43 */
44
45static int smdk_wm8580_pcm_hw_params(struct snd_pcm_substream *substream,
46 struct snd_pcm_hw_params *params)
47{
48 struct snd_soc_pcm_runtime *rtd = substream->private_data;
49 struct snd_soc_dai *codec_dai = rtd->codec_dai;
50 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
51 int rfs, ret;
52
53 switch (params_rate(params)) {
54 case 8000:
55 break;
56 default:
57 printk(KERN_ERR "%s:%d Sampling Rate %u not supported!\n",
58 __func__, __LINE__, params_rate(params));
59 return -EINVAL;
60 }
61
62 rfs = mclk_freq / params_rate(params) / 2;
63
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64 if (mclk_freq == xtal_freq) {
65 ret = snd_soc_dai_set_sysclk(codec_dai, WM8580_CLKSRC_MCLK,
66 mclk_freq, SND_SOC_CLOCK_IN);
67 if (ret < 0)
68 return ret;
69
70 ret = snd_soc_dai_set_clkdiv(codec_dai, WM8580_MCLK,
71 WM8580_CLKSRC_MCLK);
72 if (ret < 0)
73 return ret;
74 } else {
75 ret = snd_soc_dai_set_sysclk(codec_dai, WM8580_CLKSRC_PLLA,
76 mclk_freq, SND_SOC_CLOCK_IN);
77 if (ret < 0)
78 return ret;
79
80 ret = snd_soc_dai_set_clkdiv(codec_dai, WM8580_MCLK,
81 WM8580_CLKSRC_PLLA);
82 if (ret < 0)
83 return ret;
84
85 ret = snd_soc_dai_set_pll(codec_dai, WM8580_PLLA, 0,
86 xtal_freq, mclk_freq);
87 if (ret < 0)
88 return ret;
89 }
90
91 /* Set PCM source clock on CPU */
92 ret = snd_soc_dai_set_sysclk(cpu_dai, S3C_PCM_CLKSRC_MUX,
93 mclk_freq, SND_SOC_CLOCK_IN);
94 if (ret < 0)
95 return ret;
96
97 /* Set SCLK_DIV for making bclk */
98 ret = snd_soc_dai_set_clkdiv(cpu_dai, S3C_PCM_SCLK_PER_FS, rfs);
99 if (ret < 0)
100 return ret;
101
102 return 0;
103}
104
105static struct snd_soc_ops smdk_wm8580_pcm_ops = {
106 .hw_params = smdk_wm8580_pcm_hw_params,
107};
108
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109#define SMDK_DAI_FMT (SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF | \
110 SND_SOC_DAIFMT_CBS_CFS)
111
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112static struct snd_soc_dai_link smdk_dai[] = {
113 {
114 .name = "WM8580 PAIF PCM RX",
115 .stream_name = "Playback",
116 .cpu_dai_name = "samsung-pcm.0",
117 .codec_dai_name = "wm8580-hifi-playback",
118 .platform_name = "samsung-audio",
5d5d09b2 119 .codec_name = "wm8580.0-001b",
6a5794f2 120 .dai_fmt = SMDK_DAI_FMT,
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121 .ops = &smdk_wm8580_pcm_ops,
122 }, {
123 .name = "WM8580 PAIF PCM TX",
124 .stream_name = "Capture",
125 .cpu_dai_name = "samsung-pcm.0",
126 .codec_dai_name = "wm8580-hifi-capture",
a08485d8 127 .platform_name = "samsung-pcm.0",
5d5d09b2 128 .codec_name = "wm8580.0-001b",
6a5794f2 129 .dai_fmt = SMDK_DAI_FMT,
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130 .ops = &smdk_wm8580_pcm_ops,
131 },
132};
133
134static struct snd_soc_card smdk_pcm = {
135 .name = "SMDK-PCM",
095d79dc 136 .owner = THIS_MODULE,
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137 .dai_link = smdk_dai,
138 .num_links = 2,
139};
140
141/*
142 * After SMDKC110 Base Board's Rev is '0.1', 12MHz External OSC(X1)
143 * is absent (or not connected), so we connect EXT_VOICE_CLK(OSC4),
144 * 2.0484Mhz, directly with MCLK both Codec and SoC.
145 */
fdca21ad 146static int snd_smdk_probe(struct platform_device *pdev)
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147{
148 int ret = 0;
149
150 xtal_freq = SMDK_WM8580_EXT_OSC;
151 mclk_freq = SMDK_WM8580_EXT_MCLK;
152
153 if (machine_is_smdkc110() || machine_is_smdkv210())
154 xtal_freq = mclk_freq = SMDK_WM8580_EXT_VOICE;
155
156 smdk_pcm.dev = &pdev->dev;
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157 ret = devm_snd_soc_register_card(&pdev->dev, &smdk_pcm);
158 if (ret)
b8eeee68 159 dev_err(&pdev->dev, "snd_soc_register_card failed %d\n", ret);
b8eeee68 160
c583883e 161 return ret;
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162}
163
164static struct platform_driver snd_smdk_driver = {
165 .driver = {
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166 .name = "samsung-smdk-pcm",
167 },
168 .probe = snd_smdk_probe,
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169};
170
e00c3f55 171module_platform_driver(snd_smdk_driver);
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172
173MODULE_AUTHOR("Sangbeom Kim, <sbkim73@samsung.com>");
174MODULE_DESCRIPTION("ALSA SoC SMDK WM8580 for PCM");
175MODULE_LICENSE("GPL");
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