perf tools: Add snapshot format file parsing
[deliverable/linux.git] / tools / perf / builtin-stat.c
CommitLineData
ddcacfa0 1/*
bf9e1876
IM
2 * builtin-stat.c
3 *
4 * Builtin stat command: Give a precise performance counters summary
5 * overview about any workload, CPU or specific PID.
6 *
7 * Sample output:
ddcacfa0 8
2cba3ffb 9 $ perf stat ./hackbench 10
ddcacfa0 10
2cba3ffb 11 Time: 0.118
ddcacfa0 12
2cba3ffb 13 Performance counter stats for './hackbench 10':
ddcacfa0 14
2cba3ffb
IM
15 1708.761321 task-clock # 11.037 CPUs utilized
16 41,190 context-switches # 0.024 M/sec
17 6,735 CPU-migrations # 0.004 M/sec
18 17,318 page-faults # 0.010 M/sec
19 5,205,202,243 cycles # 3.046 GHz
20 3,856,436,920 stalled-cycles-frontend # 74.09% frontend cycles idle
21 1,600,790,871 stalled-cycles-backend # 30.75% backend cycles idle
22 2,603,501,247 instructions # 0.50 insns per cycle
23 # 1.48 stalled cycles per insn
24 484,357,498 branches # 283.455 M/sec
25 6,388,934 branch-misses # 1.32% of all branches
26
27 0.154822978 seconds time elapsed
ddcacfa0 28
5242519b 29 *
2cba3ffb 30 * Copyright (C) 2008-2011, Red Hat Inc, Ingo Molnar <mingo@redhat.com>
5242519b
IM
31 *
32 * Improvements and fixes by:
33 *
34 * Arjan van de Ven <arjan@linux.intel.com>
35 * Yanmin Zhang <yanmin.zhang@intel.com>
36 * Wu Fengguang <fengguang.wu@intel.com>
37 * Mike Galbraith <efault@gmx.de>
38 * Paul Mackerras <paulus@samba.org>
6e750a8f 39 * Jaswinder Singh Rajput <jaswinder@kernel.org>
5242519b
IM
40 *
41 * Released under the GPL v2. (and only v2, not any later version)
ddcacfa0
IM
42 */
43
1a482f38 44#include "perf.h"
16f762a2 45#include "builtin.h"
f14d5707 46#include "util/cgroup.h"
148be2c1 47#include "util/util.h"
5242519b
IM
48#include "util/parse-options.h"
49#include "util/parse-events.h"
4cabc3d1 50#include "util/pmu.h"
8f28827a 51#include "util/event.h"
361c99a6 52#include "util/evlist.h"
69aad6f1 53#include "util/evsel.h"
8f28827a 54#include "util/debug.h"
a5d243d0 55#include "util/color.h"
0007ecea 56#include "util/stat.h"
60666c63 57#include "util/header.h"
a12b51c4 58#include "util/cpumap.h"
d6d901c2 59#include "util/thread.h"
fd78260b 60#include "util/thread_map.h"
ddcacfa0 61
1f16c575 62#include <stdlib.h>
ddcacfa0 63#include <sys/prctl.h>
5af52b51 64#include <locale.h>
16c8a109 65
d7470b6a 66#define DEFAULT_SEPARATOR " "
2cee77c4
DA
67#define CNTR_NOT_SUPPORTED "<not supported>"
68#define CNTR_NOT_COUNTED "<not counted>"
d7470b6a 69
13370a9b
SE
70static void print_stat(int argc, const char **argv);
71static void print_counter_aggr(struct perf_evsel *counter, char *prefix);
72static void print_counter(struct perf_evsel *counter, char *prefix);
86ee6e18 73static void print_aggr(char *prefix);
13370a9b 74
4cabc3d1
AK
75/* Default events used for perf stat -T */
76static const char * const transaction_attrs[] = {
77 "task-clock",
78 "{"
79 "instructions,"
80 "cycles,"
81 "cpu/cycles-t/,"
82 "cpu/tx-start/,"
83 "cpu/el-start/,"
84 "cpu/cycles-ct/"
85 "}"
86};
87
88/* More limited version when the CPU does not have all events. */
89static const char * const transaction_limited_attrs[] = {
90 "task-clock",
91 "{"
92 "instructions,"
93 "cycles,"
94 "cpu/cycles-t/,"
95 "cpu/tx-start/"
96 "}"
97};
98
99/* must match transaction_attrs and the beginning limited_attrs */
100enum {
101 T_TASK_CLOCK,
102 T_INSTRUCTIONS,
103 T_CYCLES,
104 T_CYCLES_IN_TX,
105 T_TRANSACTION_START,
106 T_ELISION_START,
107 T_CYCLES_IN_TX_CP,
108};
109
666e6d48 110static struct perf_evlist *evsel_list;
361c99a6 111
602ad878 112static struct target target = {
77a6f014
NK
113 .uid = UINT_MAX,
114};
ddcacfa0 115
86ee6e18
SE
116enum aggr_mode {
117 AGGR_NONE,
118 AGGR_GLOBAL,
119 AGGR_SOCKET,
12c08a9f 120 AGGR_CORE,
86ee6e18
SE
121};
122
3d632595 123static int run_count = 1;
2e6cdf99 124static bool no_inherit = false;
c0555642 125static bool scale = true;
86ee6e18 126static enum aggr_mode aggr_mode = AGGR_GLOBAL;
d07f0b12 127static volatile pid_t child_pid = -1;
c0555642 128static bool null_run = false;
2cba3ffb 129static int detailed_run = 0;
4cabc3d1 130static bool transaction_run;
201e0b06 131static bool big_num = true;
d7470b6a 132static int big_num_opt = -1;
d7470b6a
SE
133static const char *csv_sep = NULL;
134static bool csv_output = false;
43bece79 135static bool group = false;
4aa9015f 136static FILE *output = NULL;
1f16c575
PZ
137static const char *pre_cmd = NULL;
138static const char *post_cmd = NULL;
139static bool sync_run = false;
13370a9b 140static unsigned int interval = 0;
41191688 141static unsigned int initial_delay = 0;
410136f5 142static unsigned int unit_width = 4; /* strlen("unit") */
a7e191c3 143static bool forever = false;
13370a9b 144static struct timespec ref_time;
86ee6e18
SE
145static struct cpu_map *aggr_map;
146static int (*aggr_get_id)(struct cpu_map *m, int cpu);
5af52b51 147
60666c63
LW
148static volatile int done = 0;
149
69aad6f1
ACM
150struct perf_stat {
151 struct stats res_stats[3];
69aad6f1
ACM
152};
153
13370a9b
SE
154static inline void diff_timespec(struct timespec *r, struct timespec *a,
155 struct timespec *b)
156{
157 r->tv_sec = a->tv_sec - b->tv_sec;
158 if (a->tv_nsec < b->tv_nsec) {
159 r->tv_nsec = a->tv_nsec + 1000000000L - b->tv_nsec;
160 r->tv_sec--;
161 } else {
162 r->tv_nsec = a->tv_nsec - b->tv_nsec ;
163 }
164}
165
166static inline struct cpu_map *perf_evsel__cpus(struct perf_evsel *evsel)
167{
168 return (evsel->cpus && !target.cpu_list) ? evsel->cpus : evsel_list->cpus;
169}
170
171static inline int perf_evsel__nr_cpus(struct perf_evsel *evsel)
172{
173 return perf_evsel__cpus(evsel)->nr;
174}
175
a7e191c3
FD
176static void perf_evsel__reset_stat_priv(struct perf_evsel *evsel)
177{
90f6bb6c
AK
178 int i;
179 struct perf_stat *ps = evsel->priv;
180
181 for (i = 0; i < 3; i++)
182 init_stats(&ps->res_stats[i]);
a7e191c3
FD
183}
184
c52b12ed 185static int perf_evsel__alloc_stat_priv(struct perf_evsel *evsel)
69aad6f1 186{
c52b12ed 187 evsel->priv = zalloc(sizeof(struct perf_stat));
d180ac14 188 if (evsel->priv == NULL)
90f6bb6c
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189 return -ENOMEM;
190 perf_evsel__reset_stat_priv(evsel);
191 return 0;
69aad6f1
ACM
192}
193
194static void perf_evsel__free_stat_priv(struct perf_evsel *evsel)
195{
04662523 196 zfree(&evsel->priv);
69aad6f1
ACM
197}
198
13370a9b 199static int perf_evsel__alloc_prev_raw_counts(struct perf_evsel *evsel)
7ae92e74 200{
13370a9b
SE
201 void *addr;
202 size_t sz;
203
204 sz = sizeof(*evsel->counts) +
205 (perf_evsel__nr_cpus(evsel) * sizeof(struct perf_counts_values));
206
207 addr = zalloc(sz);
208 if (!addr)
209 return -ENOMEM;
210
211 evsel->prev_raw_counts = addr;
212
213 return 0;
7ae92e74
YZ
214}
215
13370a9b 216static void perf_evsel__free_prev_raw_counts(struct perf_evsel *evsel)
7ae92e74 217{
04662523 218 zfree(&evsel->prev_raw_counts);
7ae92e74
YZ
219}
220
d134ffb9
ACM
221static void perf_evlist__free_stats(struct perf_evlist *evlist)
222{
223 struct perf_evsel *evsel;
224
0050f7aa 225 evlist__for_each(evlist, evsel) {
d134ffb9
ACM
226 perf_evsel__free_stat_priv(evsel);
227 perf_evsel__free_counts(evsel);
228 perf_evsel__free_prev_raw_counts(evsel);
229 }
230}
231
232static int perf_evlist__alloc_stats(struct perf_evlist *evlist, bool alloc_raw)
233{
234 struct perf_evsel *evsel;
235
0050f7aa 236 evlist__for_each(evlist, evsel) {
d134ffb9
ACM
237 if (perf_evsel__alloc_stat_priv(evsel) < 0 ||
238 perf_evsel__alloc_counts(evsel, perf_evsel__nr_cpus(evsel)) < 0 ||
239 (alloc_raw && perf_evsel__alloc_prev_raw_counts(evsel) < 0))
240 goto out_free;
241 }
242
243 return 0;
244
245out_free:
246 perf_evlist__free_stats(evlist);
247 return -1;
248}
249
666e6d48
RR
250static struct stats runtime_nsecs_stats[MAX_NR_CPUS];
251static struct stats runtime_cycles_stats[MAX_NR_CPUS];
252static struct stats runtime_stalled_cycles_front_stats[MAX_NR_CPUS];
253static struct stats runtime_stalled_cycles_back_stats[MAX_NR_CPUS];
254static struct stats runtime_branches_stats[MAX_NR_CPUS];
255static struct stats runtime_cacherefs_stats[MAX_NR_CPUS];
256static struct stats runtime_l1_dcache_stats[MAX_NR_CPUS];
257static struct stats runtime_l1_icache_stats[MAX_NR_CPUS];
258static struct stats runtime_ll_cache_stats[MAX_NR_CPUS];
259static struct stats runtime_itlb_cache_stats[MAX_NR_CPUS];
260static struct stats runtime_dtlb_cache_stats[MAX_NR_CPUS];
4cabc3d1 261static struct stats runtime_cycles_in_tx_stats[MAX_NR_CPUS];
666e6d48 262static struct stats walltime_nsecs_stats;
4cabc3d1
AK
263static struct stats runtime_transaction_stats[MAX_NR_CPUS];
264static struct stats runtime_elision_stats[MAX_NR_CPUS];
be1ac0d8 265
d134ffb9 266static void perf_stat__reset_stats(struct perf_evlist *evlist)
a7e191c3 267{
d134ffb9
ACM
268 struct perf_evsel *evsel;
269
0050f7aa 270 evlist__for_each(evlist, evsel) {
d134ffb9
ACM
271 perf_evsel__reset_stat_priv(evsel);
272 perf_evsel__reset_counts(evsel, perf_evsel__nr_cpus(evsel));
273 }
274
a7e191c3
FD
275 memset(runtime_nsecs_stats, 0, sizeof(runtime_nsecs_stats));
276 memset(runtime_cycles_stats, 0, sizeof(runtime_cycles_stats));
277 memset(runtime_stalled_cycles_front_stats, 0, sizeof(runtime_stalled_cycles_front_stats));
278 memset(runtime_stalled_cycles_back_stats, 0, sizeof(runtime_stalled_cycles_back_stats));
279 memset(runtime_branches_stats, 0, sizeof(runtime_branches_stats));
280 memset(runtime_cacherefs_stats, 0, sizeof(runtime_cacherefs_stats));
281 memset(runtime_l1_dcache_stats, 0, sizeof(runtime_l1_dcache_stats));
282 memset(runtime_l1_icache_stats, 0, sizeof(runtime_l1_icache_stats));
283 memset(runtime_ll_cache_stats, 0, sizeof(runtime_ll_cache_stats));
284 memset(runtime_itlb_cache_stats, 0, sizeof(runtime_itlb_cache_stats));
285 memset(runtime_dtlb_cache_stats, 0, sizeof(runtime_dtlb_cache_stats));
4cabc3d1
AK
286 memset(runtime_cycles_in_tx_stats, 0,
287 sizeof(runtime_cycles_in_tx_stats));
288 memset(runtime_transaction_stats, 0,
289 sizeof(runtime_transaction_stats));
290 memset(runtime_elision_stats, 0, sizeof(runtime_elision_stats));
a7e191c3
FD
291 memset(&walltime_nsecs_stats, 0, sizeof(walltime_nsecs_stats));
292}
293
cac21425 294static int create_perf_stat_counter(struct perf_evsel *evsel)
ddcacfa0 295{
69aad6f1 296 struct perf_event_attr *attr = &evsel->attr;
727ab04e 297
ddcacfa0 298 if (scale)
a21ca2ca
IM
299 attr->read_format = PERF_FORMAT_TOTAL_TIME_ENABLED |
300 PERF_FORMAT_TOTAL_TIME_RUNNING;
ddcacfa0 301
5d2cd909
ACM
302 attr->inherit = !no_inherit;
303
602ad878 304 if (target__has_cpu(&target))
594ac61a 305 return perf_evsel__open_per_cpu(evsel, perf_evsel__cpus(evsel));
5622c07b 306
602ad878 307 if (!target__has_task(&target) && perf_evsel__is_group_leader(evsel)) {
48290609 308 attr->disabled = 1;
41191688
AK
309 if (!initial_delay)
310 attr->enable_on_exec = 1;
ddcacfa0 311 }
084ab9f8 312
594ac61a 313 return perf_evsel__open_per_thread(evsel, evsel_list->threads);
ddcacfa0
IM
314}
315
c04f5e5d
IM
316/*
317 * Does the counter have nsecs as a unit?
318 */
daec78a0 319static inline int nsec_counter(struct perf_evsel *evsel)
c04f5e5d 320{
daec78a0
ACM
321 if (perf_evsel__match(evsel, SOFTWARE, SW_CPU_CLOCK) ||
322 perf_evsel__match(evsel, SOFTWARE, SW_TASK_CLOCK))
c04f5e5d
IM
323 return 1;
324
325 return 0;
326}
327
4cabc3d1
AK
328static struct perf_evsel *nth_evsel(int n)
329{
330 static struct perf_evsel **array;
331 static int array_len;
332 struct perf_evsel *ev;
333 int j;
334
335 /* Assumes this only called when evsel_list does not change anymore. */
336 if (!array) {
0050f7aa 337 evlist__for_each(evsel_list, ev)
4cabc3d1
AK
338 array_len++;
339 array = malloc(array_len * sizeof(void *));
340 if (!array)
341 exit(ENOMEM);
342 j = 0;
0050f7aa 343 evlist__for_each(evsel_list, ev)
4cabc3d1
AK
344 array[j++] = ev;
345 }
346 if (n < array_len)
347 return array[n];
348 return NULL;
349}
350
dcd9936a
IM
351/*
352 * Update various tracking values we maintain to print
353 * more semantic information such as miss/hit ratios,
354 * instruction rates, etc:
355 */
356static void update_shadow_stats(struct perf_evsel *counter, u64 *count)
357{
358 if (perf_evsel__match(counter, SOFTWARE, SW_TASK_CLOCK))
359 update_stats(&runtime_nsecs_stats[0], count[0]);
360 else if (perf_evsel__match(counter, HARDWARE, HW_CPU_CYCLES))
361 update_stats(&runtime_cycles_stats[0], count[0]);
4cabc3d1
AK
362 else if (transaction_run &&
363 perf_evsel__cmp(counter, nth_evsel(T_CYCLES_IN_TX)))
364 update_stats(&runtime_cycles_in_tx_stats[0], count[0]);
365 else if (transaction_run &&
366 perf_evsel__cmp(counter, nth_evsel(T_TRANSACTION_START)))
367 update_stats(&runtime_transaction_stats[0], count[0]);
368 else if (transaction_run &&
369 perf_evsel__cmp(counter, nth_evsel(T_ELISION_START)))
370 update_stats(&runtime_elision_stats[0], count[0]);
d3d1e86d
IM
371 else if (perf_evsel__match(counter, HARDWARE, HW_STALLED_CYCLES_FRONTEND))
372 update_stats(&runtime_stalled_cycles_front_stats[0], count[0]);
129c04cb 373 else if (perf_evsel__match(counter, HARDWARE, HW_STALLED_CYCLES_BACKEND))
d3d1e86d 374 update_stats(&runtime_stalled_cycles_back_stats[0], count[0]);
dcd9936a
IM
375 else if (perf_evsel__match(counter, HARDWARE, HW_BRANCH_INSTRUCTIONS))
376 update_stats(&runtime_branches_stats[0], count[0]);
377 else if (perf_evsel__match(counter, HARDWARE, HW_CACHE_REFERENCES))
378 update_stats(&runtime_cacherefs_stats[0], count[0]);
8bb6c79f
IM
379 else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_L1D))
380 update_stats(&runtime_l1_dcache_stats[0], count[0]);
c3305257
IM
381 else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_L1I))
382 update_stats(&runtime_l1_icache_stats[0], count[0]);
383 else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_LL))
384 update_stats(&runtime_ll_cache_stats[0], count[0]);
385 else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_DTLB))
386 update_stats(&runtime_dtlb_cache_stats[0], count[0]);
387 else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_ITLB))
388 update_stats(&runtime_itlb_cache_stats[0], count[0]);
dcd9936a
IM
389}
390
c04f5e5d 391/*
2996f5dd 392 * Read out the results of a single counter:
f5b4a9c3 393 * aggregate counts across CPUs in system-wide mode
c04f5e5d 394 */
c52b12ed 395static int read_counter_aggr(struct perf_evsel *counter)
c04f5e5d 396{
69aad6f1 397 struct perf_stat *ps = counter->priv;
c52b12ed
ACM
398 u64 *count = counter->counts->aggr.values;
399 int i;
2996f5dd 400
7ae92e74 401 if (__perf_evsel__read(counter, perf_evsel__nr_cpus(counter),
b3a319d5 402 thread_map__nr(evsel_list->threads), scale) < 0)
c52b12ed 403 return -1;
9e9772c4
PZ
404
405 for (i = 0; i < 3; i++)
69aad6f1 406 update_stats(&ps->res_stats[i], count[i]);
9e9772c4
PZ
407
408 if (verbose) {
4aa9015f 409 fprintf(output, "%s: %" PRIu64 " %" PRIu64 " %" PRIu64 "\n",
7289f83c 410 perf_evsel__name(counter), count[0], count[1], count[2]);
9e9772c4
PZ
411 }
412
be1ac0d8
IM
413 /*
414 * Save the full runtime - to allow normalization during printout:
415 */
dcd9936a 416 update_shadow_stats(counter, count);
c52b12ed
ACM
417
418 return 0;
f5b4a9c3
SE
419}
420
421/*
422 * Read out the results of a single counter:
423 * do not aggregate counts across CPUs in system-wide mode
424 */
c52b12ed 425static int read_counter(struct perf_evsel *counter)
f5b4a9c3 426{
c52b12ed 427 u64 *count;
f5b4a9c3 428 int cpu;
f5b4a9c3 429
7ae92e74 430 for (cpu = 0; cpu < perf_evsel__nr_cpus(counter); cpu++) {
c52b12ed
ACM
431 if (__perf_evsel__read_on_cpu(counter, cpu, 0, scale) < 0)
432 return -1;
f5b4a9c3 433
c52b12ed 434 count = counter->counts->cpu[cpu].values;
f5b4a9c3 435
dcd9936a 436 update_shadow_stats(counter, count);
f5b4a9c3 437 }
c52b12ed
ACM
438
439 return 0;
2996f5dd
IM
440}
441
13370a9b
SE
442static void print_interval(void)
443{
444 static int num_print_interval;
445 struct perf_evsel *counter;
446 struct perf_stat *ps;
447 struct timespec ts, rs;
448 char prefix[64];
449
86ee6e18 450 if (aggr_mode == AGGR_GLOBAL) {
0050f7aa 451 evlist__for_each(evsel_list, counter) {
13370a9b
SE
452 ps = counter->priv;
453 memset(ps->res_stats, 0, sizeof(ps->res_stats));
86ee6e18 454 read_counter_aggr(counter);
13370a9b 455 }
86ee6e18 456 } else {
0050f7aa 457 evlist__for_each(evsel_list, counter) {
13370a9b
SE
458 ps = counter->priv;
459 memset(ps->res_stats, 0, sizeof(ps->res_stats));
86ee6e18 460 read_counter(counter);
13370a9b
SE
461 }
462 }
86ee6e18 463
13370a9b
SE
464 clock_gettime(CLOCK_MONOTONIC, &ts);
465 diff_timespec(&rs, &ts, &ref_time);
466 sprintf(prefix, "%6lu.%09lu%s", rs.tv_sec, rs.tv_nsec, csv_sep);
467
468 if (num_print_interval == 0 && !csv_output) {
86ee6e18
SE
469 switch (aggr_mode) {
470 case AGGR_SOCKET:
410136f5 471 fprintf(output, "# time socket cpus counts %*s events\n", unit_width, "unit");
86ee6e18 472 break;
12c08a9f 473 case AGGR_CORE:
410136f5 474 fprintf(output, "# time core cpus counts %*s events\n", unit_width, "unit");
12c08a9f 475 break;
86ee6e18 476 case AGGR_NONE:
410136f5 477 fprintf(output, "# time CPU counts %*s events\n", unit_width, "unit");
86ee6e18
SE
478 break;
479 case AGGR_GLOBAL:
480 default:
410136f5 481 fprintf(output, "# time counts %*s events\n", unit_width, "unit");
86ee6e18 482 }
13370a9b
SE
483 }
484
485 if (++num_print_interval == 25)
486 num_print_interval = 0;
487
86ee6e18 488 switch (aggr_mode) {
12c08a9f 489 case AGGR_CORE:
86ee6e18
SE
490 case AGGR_SOCKET:
491 print_aggr(prefix);
492 break;
493 case AGGR_NONE:
0050f7aa 494 evlist__for_each(evsel_list, counter)
13370a9b 495 print_counter(counter, prefix);
86ee6e18
SE
496 break;
497 case AGGR_GLOBAL:
498 default:
0050f7aa 499 evlist__for_each(evsel_list, counter)
13370a9b
SE
500 print_counter_aggr(counter, prefix);
501 }
2bbf03f1
AK
502
503 fflush(output);
13370a9b
SE
504}
505
41191688
AK
506static void handle_initial_delay(void)
507{
508 struct perf_evsel *counter;
509
510 if (initial_delay) {
511 const int ncpus = cpu_map__nr(evsel_list->cpus),
512 nthreads = thread_map__nr(evsel_list->threads);
513
514 usleep(initial_delay * 1000);
0050f7aa 515 evlist__for_each(evsel_list, counter)
41191688
AK
516 perf_evsel__enable(counter, ncpus, nthreads);
517 }
518}
519
f33cbe72 520static volatile int workload_exec_errno;
6af206fd
ACM
521
522/*
523 * perf_evlist__prepare_workload will send a SIGUSR1
524 * if the fork fails, since we asked by setting its
525 * want_signal to true.
526 */
f33cbe72
ACM
527static void workload_exec_failed_signal(int signo __maybe_unused, siginfo_t *info,
528 void *ucontext __maybe_unused)
6af206fd 529{
f33cbe72 530 workload_exec_errno = info->si_value.sival_int;
6af206fd
ACM
531}
532
acf28922 533static int __run_perf_stat(int argc, const char **argv)
42202dd5 534{
56e52e85 535 char msg[512];
42202dd5 536 unsigned long long t0, t1;
cac21425 537 struct perf_evsel *counter;
13370a9b 538 struct timespec ts;
410136f5 539 size_t l;
42202dd5 540 int status = 0;
6be2850e 541 const bool forks = (argc > 0);
42202dd5 542
13370a9b
SE
543 if (interval) {
544 ts.tv_sec = interval / 1000;
545 ts.tv_nsec = (interval % 1000) * 1000000;
546 } else {
547 ts.tv_sec = 1;
548 ts.tv_nsec = 0;
549 }
550
60666c63 551 if (forks) {
735f7e0b
ACM
552 if (perf_evlist__prepare_workload(evsel_list, &target, argv, false,
553 workload_exec_failed_signal) < 0) {
acf28922
NK
554 perror("failed to prepare workload");
555 return -1;
60666c63 556 }
d20a47e7 557 child_pid = evsel_list->workload.pid;
051ae7f7
PM
558 }
559
6a4bb04c 560 if (group)
63dab225 561 perf_evlist__set_leader(evsel_list);
6a4bb04c 562
0050f7aa 563 evlist__for_each(evsel_list, counter) {
cac21425 564 if (create_perf_stat_counter(counter) < 0) {
979987a5
DA
565 /*
566 * PPC returns ENXIO for HW counters until 2.6.37
567 * (behavior changed with commit b0a873e).
568 */
38f6ae1e 569 if (errno == EINVAL || errno == ENOSYS ||
979987a5
DA
570 errno == ENOENT || errno == EOPNOTSUPP ||
571 errno == ENXIO) {
c63ca0c0
DA
572 if (verbose)
573 ui__warning("%s event is not supported by the kernel.\n",
7289f83c 574 perf_evsel__name(counter));
2cee77c4 575 counter->supported = false;
ede70290 576 continue;
c63ca0c0 577 }
ede70290 578
56e52e85
ACM
579 perf_evsel__open_strerror(counter, &target,
580 errno, msg, sizeof(msg));
581 ui__error("%s\n", msg);
582
48290609
ACM
583 if (child_pid != -1)
584 kill(child_pid, SIGTERM);
fceda7fe 585
48290609
ACM
586 return -1;
587 }
2cee77c4 588 counter->supported = true;
410136f5
SE
589
590 l = strlen(counter->unit);
591 if (l > unit_width)
592 unit_width = l;
084ab9f8 593 }
42202dd5 594
1491a632 595 if (perf_evlist__apply_filters(evsel_list)) {
cfd748ae 596 error("failed to set filter with %d (%s)\n", errno,
759e612b 597 strerror_r(errno, msg, sizeof(msg)));
cfd748ae
FW
598 return -1;
599 }
600
42202dd5
IM
601 /*
602 * Enable counters and exec the command:
603 */
604 t0 = rdclock();
13370a9b 605 clock_gettime(CLOCK_MONOTONIC, &ref_time);
42202dd5 606
60666c63 607 if (forks) {
acf28922 608 perf_evlist__start_workload(evsel_list);
41191688 609 handle_initial_delay();
acf28922 610
13370a9b
SE
611 if (interval) {
612 while (!waitpid(child_pid, &status, WNOHANG)) {
613 nanosleep(&ts, NULL);
614 print_interval();
615 }
616 }
60666c63 617 wait(&status);
6af206fd 618
f33cbe72
ACM
619 if (workload_exec_errno) {
620 const char *emsg = strerror_r(workload_exec_errno, msg, sizeof(msg));
621 pr_err("Workload failed: %s\n", emsg);
6af206fd 622 return -1;
f33cbe72 623 }
6af206fd 624
33e49ea7
AK
625 if (WIFSIGNALED(status))
626 psignal(WTERMSIG(status), argv[0]);
60666c63 627 } else {
41191688 628 handle_initial_delay();
13370a9b
SE
629 while (!done) {
630 nanosleep(&ts, NULL);
631 if (interval)
632 print_interval();
633 }
60666c63 634 }
42202dd5 635
42202dd5
IM
636 t1 = rdclock();
637
9e9772c4 638 update_stats(&walltime_nsecs_stats, t1 - t0);
42202dd5 639
86ee6e18 640 if (aggr_mode == AGGR_GLOBAL) {
0050f7aa 641 evlist__for_each(evsel_list, counter) {
f5b4a9c3 642 read_counter_aggr(counter);
7ae92e74 643 perf_evsel__close_fd(counter, perf_evsel__nr_cpus(counter),
b3a319d5 644 thread_map__nr(evsel_list->threads));
c52b12ed 645 }
86ee6e18 646 } else {
0050f7aa 647 evlist__for_each(evsel_list, counter) {
86ee6e18
SE
648 read_counter(counter);
649 perf_evsel__close_fd(counter, perf_evsel__nr_cpus(counter), 1);
650 }
f5b4a9c3 651 }
c52b12ed 652
42202dd5
IM
653 return WEXITSTATUS(status);
654}
655
41cde476 656static int run_perf_stat(int argc, const char **argv)
1f16c575
PZ
657{
658 int ret;
659
660 if (pre_cmd) {
661 ret = system(pre_cmd);
662 if (ret)
663 return ret;
664 }
665
666 if (sync_run)
667 sync();
668
669 ret = __run_perf_stat(argc, argv);
670 if (ret)
671 return ret;
672
673 if (post_cmd) {
674 ret = system(post_cmd);
675 if (ret)
676 return ret;
677 }
678
679 return ret;
680}
681
f99844cb
IM
682static void print_noise_pct(double total, double avg)
683{
0007ecea 684 double pct = rel_stddev_stats(total, avg);
f99844cb 685
3ae9a34d 686 if (csv_output)
4aa9015f 687 fprintf(output, "%s%.2f%%", csv_sep, pct);
a1bca6cc 688 else if (pct)
4aa9015f 689 fprintf(output, " ( +-%6.2f%% )", pct);
f99844cb
IM
690}
691
69aad6f1 692static void print_noise(struct perf_evsel *evsel, double avg)
42202dd5 693{
69aad6f1
ACM
694 struct perf_stat *ps;
695
849abde9
PZ
696 if (run_count == 1)
697 return;
698
69aad6f1 699 ps = evsel->priv;
f99844cb 700 print_noise_pct(stddev_stats(&ps->res_stats[0]), avg);
42202dd5
IM
701}
702
12c08a9f 703static void aggr_printout(struct perf_evsel *evsel, int id, int nr)
44175b6f 704{
86ee6e18 705 switch (aggr_mode) {
12c08a9f
SE
706 case AGGR_CORE:
707 fprintf(output, "S%d-C%*d%s%*d%s",
708 cpu_map__id_to_socket(id),
709 csv_output ? 0 : -8,
710 cpu_map__id_to_cpu(id),
711 csv_sep,
712 csv_output ? 0 : 4,
713 nr,
714 csv_sep);
715 break;
86ee6e18
SE
716 case AGGR_SOCKET:
717 fprintf(output, "S%*d%s%*d%s",
d7e7a451 718 csv_output ? 0 : -5,
12c08a9f 719 id,
d7e7a451
SE
720 csv_sep,
721 csv_output ? 0 : 4,
722 nr,
723 csv_sep);
86ee6e18
SE
724 break;
725 case AGGR_NONE:
726 fprintf(output, "CPU%*d%s",
d7470b6a 727 csv_output ? 0 : -4,
12c08a9f 728 perf_evsel__cpus(evsel)->map[id], csv_sep);
86ee6e18
SE
729 break;
730 case AGGR_GLOBAL:
731 default:
732 break;
733 }
734}
735
da88c7f7 736static void nsec_printout(int id, int nr, struct perf_evsel *evsel, double avg)
86ee6e18
SE
737{
738 double msecs = avg / 1e6;
410136f5 739 const char *fmt_v, *fmt_n;
4bbe5a61 740 char name[25];
86ee6e18 741
410136f5
SE
742 fmt_v = csv_output ? "%.6f%s" : "%18.6f%s";
743 fmt_n = csv_output ? "%s" : "%-25s";
744
da88c7f7 745 aggr_printout(evsel, id, nr);
d7470b6a 746
4bbe5a61
DA
747 scnprintf(name, sizeof(name), "%s%s",
748 perf_evsel__name(evsel), csv_output ? "" : " (msec)");
410136f5
SE
749
750 fprintf(output, fmt_v, msecs, csv_sep);
751
752 if (csv_output)
753 fprintf(output, "%s%s", evsel->unit, csv_sep);
754 else
755 fprintf(output, "%-*s%s", unit_width, evsel->unit, csv_sep);
756
757 fprintf(output, fmt_n, name);
d7470b6a 758
023695d9 759 if (evsel->cgrp)
4aa9015f 760 fprintf(output, "%s%s", csv_sep, evsel->cgrp->name);
023695d9 761
13370a9b 762 if (csv_output || interval)
d7470b6a 763 return;
44175b6f 764
daec78a0 765 if (perf_evsel__match(evsel, SOFTWARE, SW_TASK_CLOCK))
4aa9015f
SE
766 fprintf(output, " # %8.3f CPUs utilized ",
767 avg / avg_stats(&walltime_nsecs_stats));
9dac6a29
NK
768 else
769 fprintf(output, " ");
44175b6f
IM
770}
771
15e6392f
NK
772/* used for get_ratio_color() */
773enum grc_type {
774 GRC_STALLED_CYCLES_FE,
775 GRC_STALLED_CYCLES_BE,
776 GRC_CACHE_MISSES,
777 GRC_MAX_NR
778};
779
780static const char *get_ratio_color(enum grc_type type, double ratio)
781{
782 static const double grc_table[GRC_MAX_NR][3] = {
783 [GRC_STALLED_CYCLES_FE] = { 50.0, 30.0, 10.0 },
784 [GRC_STALLED_CYCLES_BE] = { 75.0, 50.0, 20.0 },
785 [GRC_CACHE_MISSES] = { 20.0, 10.0, 5.0 },
786 };
787 const char *color = PERF_COLOR_NORMAL;
788
789 if (ratio > grc_table[type][0])
790 color = PERF_COLOR_RED;
791 else if (ratio > grc_table[type][1])
792 color = PERF_COLOR_MAGENTA;
793 else if (ratio > grc_table[type][2])
794 color = PERF_COLOR_YELLOW;
795
796 return color;
797}
798
1d037ca1
IT
799static void print_stalled_cycles_frontend(int cpu,
800 struct perf_evsel *evsel
801 __maybe_unused, double avg)
d3d1e86d
IM
802{
803 double total, ratio = 0.0;
804 const char *color;
805
806 total = avg_stats(&runtime_cycles_stats[cpu]);
807
808 if (total)
809 ratio = avg / total * 100.0;
810
15e6392f 811 color = get_ratio_color(GRC_STALLED_CYCLES_FE, ratio);
d3d1e86d 812
4aa9015f
SE
813 fprintf(output, " # ");
814 color_fprintf(output, color, "%6.2f%%", ratio);
815 fprintf(output, " frontend cycles idle ");
d3d1e86d
IM
816}
817
1d037ca1
IT
818static void print_stalled_cycles_backend(int cpu,
819 struct perf_evsel *evsel
820 __maybe_unused, double avg)
a5d243d0
IM
821{
822 double total, ratio = 0.0;
823 const char *color;
824
825 total = avg_stats(&runtime_cycles_stats[cpu]);
826
827 if (total)
828 ratio = avg / total * 100.0;
829
15e6392f 830 color = get_ratio_color(GRC_STALLED_CYCLES_BE, ratio);
a5d243d0 831
4aa9015f
SE
832 fprintf(output, " # ");
833 color_fprintf(output, color, "%6.2f%%", ratio);
834 fprintf(output, " backend cycles idle ");
a5d243d0
IM
835}
836
1d037ca1
IT
837static void print_branch_misses(int cpu,
838 struct perf_evsel *evsel __maybe_unused,
839 double avg)
c78df6c1
IM
840{
841 double total, ratio = 0.0;
842 const char *color;
843
844 total = avg_stats(&runtime_branches_stats[cpu]);
845
846 if (total)
847 ratio = avg / total * 100.0;
848
15e6392f 849 color = get_ratio_color(GRC_CACHE_MISSES, ratio);
c78df6c1 850
4aa9015f
SE
851 fprintf(output, " # ");
852 color_fprintf(output, color, "%6.2f%%", ratio);
853 fprintf(output, " of all branches ");
c78df6c1
IM
854}
855
1d037ca1
IT
856static void print_l1_dcache_misses(int cpu,
857 struct perf_evsel *evsel __maybe_unused,
858 double avg)
8bb6c79f
IM
859{
860 double total, ratio = 0.0;
861 const char *color;
862
863 total = avg_stats(&runtime_l1_dcache_stats[cpu]);
864
865 if (total)
866 ratio = avg / total * 100.0;
867
15e6392f 868 color = get_ratio_color(GRC_CACHE_MISSES, ratio);
8bb6c79f 869
4aa9015f
SE
870 fprintf(output, " # ");
871 color_fprintf(output, color, "%6.2f%%", ratio);
872 fprintf(output, " of all L1-dcache hits ");
8bb6c79f
IM
873}
874
1d037ca1
IT
875static void print_l1_icache_misses(int cpu,
876 struct perf_evsel *evsel __maybe_unused,
877 double avg)
c3305257
IM
878{
879 double total, ratio = 0.0;
880 const char *color;
881
882 total = avg_stats(&runtime_l1_icache_stats[cpu]);
883
884 if (total)
885 ratio = avg / total * 100.0;
886
15e6392f 887 color = get_ratio_color(GRC_CACHE_MISSES, ratio);
c3305257 888
4aa9015f
SE
889 fprintf(output, " # ");
890 color_fprintf(output, color, "%6.2f%%", ratio);
891 fprintf(output, " of all L1-icache hits ");
c3305257
IM
892}
893
1d037ca1
IT
894static void print_dtlb_cache_misses(int cpu,
895 struct perf_evsel *evsel __maybe_unused,
896 double avg)
c3305257
IM
897{
898 double total, ratio = 0.0;
899 const char *color;
900
901 total = avg_stats(&runtime_dtlb_cache_stats[cpu]);
902
903 if (total)
904 ratio = avg / total * 100.0;
905
15e6392f 906 color = get_ratio_color(GRC_CACHE_MISSES, ratio);
c3305257 907
4aa9015f
SE
908 fprintf(output, " # ");
909 color_fprintf(output, color, "%6.2f%%", ratio);
910 fprintf(output, " of all dTLB cache hits ");
c3305257
IM
911}
912
1d037ca1
IT
913static void print_itlb_cache_misses(int cpu,
914 struct perf_evsel *evsel __maybe_unused,
915 double avg)
c3305257
IM
916{
917 double total, ratio = 0.0;
918 const char *color;
919
920 total = avg_stats(&runtime_itlb_cache_stats[cpu]);
921
922 if (total)
923 ratio = avg / total * 100.0;
924
15e6392f 925 color = get_ratio_color(GRC_CACHE_MISSES, ratio);
c3305257 926
4aa9015f
SE
927 fprintf(output, " # ");
928 color_fprintf(output, color, "%6.2f%%", ratio);
929 fprintf(output, " of all iTLB cache hits ");
c3305257
IM
930}
931
1d037ca1
IT
932static void print_ll_cache_misses(int cpu,
933 struct perf_evsel *evsel __maybe_unused,
934 double avg)
c3305257
IM
935{
936 double total, ratio = 0.0;
937 const char *color;
938
939 total = avg_stats(&runtime_ll_cache_stats[cpu]);
940
941 if (total)
942 ratio = avg / total * 100.0;
943
15e6392f 944 color = get_ratio_color(GRC_CACHE_MISSES, ratio);
c3305257 945
4aa9015f
SE
946 fprintf(output, " # ");
947 color_fprintf(output, color, "%6.2f%%", ratio);
948 fprintf(output, " of all LL-cache hits ");
c3305257
IM
949}
950
da88c7f7 951static void abs_printout(int id, int nr, struct perf_evsel *evsel, double avg)
44175b6f 952{
4cabc3d1 953 double total, ratio = 0.0, total2;
410136f5 954 double sc = evsel->scale;
d7470b6a 955 const char *fmt;
da88c7f7 956 int cpu = cpu_map__id_to_cpu(id);
d7470b6a 957
410136f5
SE
958 if (csv_output) {
959 fmt = sc != 1.0 ? "%.2f%s" : "%.0f%s";
960 } else {
961 if (big_num)
962 fmt = sc != 1.0 ? "%'18.2f%s" : "%'18.0f%s";
963 else
964 fmt = sc != 1.0 ? "%18.2f%s" : "%18.0f%s";
965 }
f5b4a9c3 966
da88c7f7 967 aggr_printout(evsel, id, nr);
86ee6e18
SE
968
969 if (aggr_mode == AGGR_GLOBAL)
f5b4a9c3 970 cpu = 0;
c7f7fea3 971
410136f5
SE
972 fprintf(output, fmt, avg, csv_sep);
973
974 if (evsel->unit)
975 fprintf(output, "%-*s%s",
976 csv_output ? 0 : unit_width,
977 evsel->unit, csv_sep);
978
979 fprintf(output, "%-*s", csv_output ? 0 : 25, perf_evsel__name(evsel));
d7470b6a 980
023695d9 981 if (evsel->cgrp)
4aa9015f 982 fprintf(output, "%s%s", csv_sep, evsel->cgrp->name);
023695d9 983
13370a9b 984 if (csv_output || interval)
d7470b6a 985 return;
44175b6f 986
daec78a0 987 if (perf_evsel__match(evsel, HARDWARE, HW_INSTRUCTIONS)) {
f5b4a9c3 988 total = avg_stats(&runtime_cycles_stats[cpu]);
3e7a0817 989 if (total) {
c7f7fea3 990 ratio = avg / total;
3e7a0817
RR
991 fprintf(output, " # %5.2f insns per cycle ", ratio);
992 }
d3d1e86d
IM
993 total = avg_stats(&runtime_stalled_cycles_front_stats[cpu]);
994 total = max(total, avg_stats(&runtime_stalled_cycles_back_stats[cpu]));
481f988a
IM
995
996 if (total && avg) {
997 ratio = total / avg;
410136f5
SE
998 fprintf(output, "\n");
999 if (aggr_mode == AGGR_NONE)
1000 fprintf(output, " ");
1001 fprintf(output, " # %5.2f stalled cycles per insn", ratio);
481f988a
IM
1002 }
1003
daec78a0 1004 } else if (perf_evsel__match(evsel, HARDWARE, HW_BRANCH_MISSES) &&
f5b4a9c3 1005 runtime_branches_stats[cpu].n != 0) {
c78df6c1 1006 print_branch_misses(cpu, evsel, avg);
8bb6c79f
IM
1007 } else if (
1008 evsel->attr.type == PERF_TYPE_HW_CACHE &&
1009 evsel->attr.config == ( PERF_COUNT_HW_CACHE_L1D |
1010 ((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
1011 ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16)) &&
c6264def 1012 runtime_l1_dcache_stats[cpu].n != 0) {
8bb6c79f 1013 print_l1_dcache_misses(cpu, evsel, avg);
c3305257
IM
1014 } else if (
1015 evsel->attr.type == PERF_TYPE_HW_CACHE &&
1016 evsel->attr.config == ( PERF_COUNT_HW_CACHE_L1I |
1017 ((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
1018 ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16)) &&
1019 runtime_l1_icache_stats[cpu].n != 0) {
1020 print_l1_icache_misses(cpu, evsel, avg);
1021 } else if (
1022 evsel->attr.type == PERF_TYPE_HW_CACHE &&
1023 evsel->attr.config == ( PERF_COUNT_HW_CACHE_DTLB |
1024 ((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
1025 ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16)) &&
1026 runtime_dtlb_cache_stats[cpu].n != 0) {
1027 print_dtlb_cache_misses(cpu, evsel, avg);
1028 } else if (
1029 evsel->attr.type == PERF_TYPE_HW_CACHE &&
1030 evsel->attr.config == ( PERF_COUNT_HW_CACHE_ITLB |
1031 ((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
1032 ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16)) &&
1033 runtime_itlb_cache_stats[cpu].n != 0) {
1034 print_itlb_cache_misses(cpu, evsel, avg);
1035 } else if (
1036 evsel->attr.type == PERF_TYPE_HW_CACHE &&
1037 evsel->attr.config == ( PERF_COUNT_HW_CACHE_LL |
1038 ((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
1039 ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16)) &&
1040 runtime_ll_cache_stats[cpu].n != 0) {
1041 print_ll_cache_misses(cpu, evsel, avg);
d58f4c82
IM
1042 } else if (perf_evsel__match(evsel, HARDWARE, HW_CACHE_MISSES) &&
1043 runtime_cacherefs_stats[cpu].n != 0) {
1044 total = avg_stats(&runtime_cacherefs_stats[cpu]);
1045
1046 if (total)
1047 ratio = avg * 100 / total;
1048
4aa9015f 1049 fprintf(output, " # %8.3f %% of all cache refs ", ratio);
d58f4c82 1050
d3d1e86d
IM
1051 } else if (perf_evsel__match(evsel, HARDWARE, HW_STALLED_CYCLES_FRONTEND)) {
1052 print_stalled_cycles_frontend(cpu, evsel, avg);
129c04cb 1053 } else if (perf_evsel__match(evsel, HARDWARE, HW_STALLED_CYCLES_BACKEND)) {
d3d1e86d 1054 print_stalled_cycles_backend(cpu, evsel, avg);
481f988a 1055 } else if (perf_evsel__match(evsel, HARDWARE, HW_CPU_CYCLES)) {
f5b4a9c3 1056 total = avg_stats(&runtime_nsecs_stats[cpu]);
c7f7fea3 1057
c458fe62
RR
1058 if (total) {
1059 ratio = avg / total;
1060 fprintf(output, " # %8.3f GHz ", ratio);
1061 }
4cabc3d1
AK
1062 } else if (transaction_run &&
1063 perf_evsel__cmp(evsel, nth_evsel(T_CYCLES_IN_TX))) {
1064 total = avg_stats(&runtime_cycles_stats[cpu]);
1065 if (total)
1066 fprintf(output,
1067 " # %5.2f%% transactional cycles ",
1068 100.0 * (avg / total));
1069 } else if (transaction_run &&
1070 perf_evsel__cmp(evsel, nth_evsel(T_CYCLES_IN_TX_CP))) {
1071 total = avg_stats(&runtime_cycles_stats[cpu]);
1072 total2 = avg_stats(&runtime_cycles_in_tx_stats[cpu]);
1073 if (total2 < avg)
1074 total2 = avg;
1075 if (total)
1076 fprintf(output,
1077 " # %5.2f%% aborted cycles ",
1078 100.0 * ((total2-avg) / total));
1079 } else if (transaction_run &&
1080 perf_evsel__cmp(evsel, nth_evsel(T_TRANSACTION_START)) &&
1081 avg > 0 &&
1082 runtime_cycles_in_tx_stats[cpu].n != 0) {
1083 total = avg_stats(&runtime_cycles_in_tx_stats[cpu]);
1084
1085 if (total)
1086 ratio = total / avg;
1087
1088 fprintf(output, " # %8.0f cycles / transaction ", ratio);
1089 } else if (transaction_run &&
1090 perf_evsel__cmp(evsel, nth_evsel(T_ELISION_START)) &&
1091 avg > 0 &&
1092 runtime_cycles_in_tx_stats[cpu].n != 0) {
1093 total = avg_stats(&runtime_cycles_in_tx_stats[cpu]);
1094
1095 if (total)
1096 ratio = total / avg;
1097
1098 fprintf(output, " # %8.0f cycles / elision ", ratio);
481f988a 1099 } else if (runtime_nsecs_stats[cpu].n != 0) {
5fde2523
NK
1100 char unit = 'M';
1101
481f988a 1102 total = avg_stats(&runtime_nsecs_stats[cpu]);
11ba2b85
IM
1103
1104 if (total)
481f988a 1105 ratio = 1000.0 * avg / total;
5fde2523
NK
1106 if (ratio < 0.001) {
1107 ratio *= 1000;
1108 unit = 'K';
1109 }
11ba2b85 1110
5fde2523 1111 fprintf(output, " # %8.3f %c/sec ", ratio, unit);
a5d243d0 1112 } else {
4aa9015f 1113 fprintf(output, " ");
44175b6f 1114 }
44175b6f
IM
1115}
1116
86ee6e18 1117static void print_aggr(char *prefix)
d7e7a451
SE
1118{
1119 struct perf_evsel *counter;
582ec082 1120 int cpu, cpu2, s, s2, id, nr;
410136f5 1121 double uval;
d7e7a451 1122 u64 ena, run, val;
d7e7a451 1123
86ee6e18 1124 if (!(aggr_map || aggr_get_id))
d7e7a451
SE
1125 return;
1126
86ee6e18
SE
1127 for (s = 0; s < aggr_map->nr; s++) {
1128 id = aggr_map->map[s];
0050f7aa 1129 evlist__for_each(evsel_list, counter) {
d7e7a451
SE
1130 val = ena = run = 0;
1131 nr = 0;
1132 for (cpu = 0; cpu < perf_evsel__nr_cpus(counter); cpu++) {
582ec082
SE
1133 cpu2 = perf_evsel__cpus(counter)->map[cpu];
1134 s2 = aggr_get_id(evsel_list->cpus, cpu2);
86ee6e18 1135 if (s2 != id)
d7e7a451
SE
1136 continue;
1137 val += counter->counts->cpu[cpu].val;
1138 ena += counter->counts->cpu[cpu].ena;
1139 run += counter->counts->cpu[cpu].run;
1140 nr++;
1141 }
1142 if (prefix)
1143 fprintf(output, "%s", prefix);
1144
1145 if (run == 0 || ena == 0) {
582ec082 1146 aggr_printout(counter, id, nr);
86ee6e18 1147
410136f5 1148 fprintf(output, "%*s%s",
d7e7a451
SE
1149 csv_output ? 0 : 18,
1150 counter->supported ? CNTR_NOT_COUNTED : CNTR_NOT_SUPPORTED,
410136f5
SE
1151 csv_sep);
1152
1153 fprintf(output, "%-*s%s",
1154 csv_output ? 0 : unit_width,
1155 counter->unit, csv_sep);
1156
1157 fprintf(output, "%*s",
1158 csv_output ? 0 : -25,
d7e7a451 1159 perf_evsel__name(counter));
86ee6e18 1160
d7e7a451
SE
1161 if (counter->cgrp)
1162 fprintf(output, "%s%s",
1163 csv_sep, counter->cgrp->name);
1164
1165 fputc('\n', output);
1166 continue;
1167 }
410136f5 1168 uval = val * counter->scale;
d7e7a451
SE
1169
1170 if (nsec_counter(counter))
410136f5 1171 nsec_printout(id, nr, counter, uval);
d7e7a451 1172 else
410136f5 1173 abs_printout(id, nr, counter, uval);
d7e7a451
SE
1174
1175 if (!csv_output) {
1176 print_noise(counter, 1.0);
1177
1178 if (run != ena)
1179 fprintf(output, " (%.2f%%)",
1180 100.0 * run / ena);
1181 }
1182 fputc('\n', output);
1183 }
1184 }
1185}
1186
2996f5dd
IM
1187/*
1188 * Print out the results of a single counter:
f5b4a9c3 1189 * aggregated counts in system-wide mode
2996f5dd 1190 */
13370a9b 1191static void print_counter_aggr(struct perf_evsel *counter, char *prefix)
2996f5dd 1192{
69aad6f1
ACM
1193 struct perf_stat *ps = counter->priv;
1194 double avg = avg_stats(&ps->res_stats[0]);
c52b12ed 1195 int scaled = counter->counts->scaled;
410136f5 1196 double uval;
2996f5dd 1197
13370a9b
SE
1198 if (prefix)
1199 fprintf(output, "%s", prefix);
1200
2996f5dd 1201 if (scaled == -1) {
410136f5 1202 fprintf(output, "%*s%s",
d7470b6a 1203 csv_output ? 0 : 18,
2cee77c4 1204 counter->supported ? CNTR_NOT_COUNTED : CNTR_NOT_SUPPORTED,
410136f5
SE
1205 csv_sep);
1206 fprintf(output, "%-*s%s",
1207 csv_output ? 0 : unit_width,
1208 counter->unit, csv_sep);
1209 fprintf(output, "%*s",
1210 csv_output ? 0 : -25,
7289f83c 1211 perf_evsel__name(counter));
023695d9
SE
1212
1213 if (counter->cgrp)
4aa9015f 1214 fprintf(output, "%s%s", csv_sep, counter->cgrp->name);
023695d9 1215
4aa9015f 1216 fputc('\n', output);
2996f5dd
IM
1217 return;
1218 }
c04f5e5d 1219
410136f5
SE
1220 uval = avg * counter->scale;
1221
44175b6f 1222 if (nsec_counter(counter))
410136f5 1223 nsec_printout(-1, 0, counter, uval);
44175b6f 1224 else
410136f5 1225 abs_printout(-1, 0, counter, uval);
849abde9 1226
3ae9a34d
ZH
1227 print_noise(counter, avg);
1228
d7470b6a 1229 if (csv_output) {
4aa9015f 1230 fputc('\n', output);
d7470b6a
SE
1231 return;
1232 }
1233
506d4bc8
PZ
1234 if (scaled) {
1235 double avg_enabled, avg_running;
1236
69aad6f1
ACM
1237 avg_enabled = avg_stats(&ps->res_stats[1]);
1238 avg_running = avg_stats(&ps->res_stats[2]);
d7c29318 1239
4aa9015f 1240 fprintf(output, " [%5.2f%%]", 100 * avg_running / avg_enabled);
506d4bc8 1241 }
4aa9015f 1242 fprintf(output, "\n");
c04f5e5d
IM
1243}
1244
f5b4a9c3
SE
1245/*
1246 * Print out the results of a single counter:
1247 * does not use aggregated count in system-wide
1248 */
13370a9b 1249static void print_counter(struct perf_evsel *counter, char *prefix)
f5b4a9c3
SE
1250{
1251 u64 ena, run, val;
410136f5 1252 double uval;
f5b4a9c3
SE
1253 int cpu;
1254
7ae92e74 1255 for (cpu = 0; cpu < perf_evsel__nr_cpus(counter); cpu++) {
c52b12ed
ACM
1256 val = counter->counts->cpu[cpu].val;
1257 ena = counter->counts->cpu[cpu].ena;
1258 run = counter->counts->cpu[cpu].run;
13370a9b
SE
1259
1260 if (prefix)
1261 fprintf(output, "%s", prefix);
1262
f5b4a9c3 1263 if (run == 0 || ena == 0) {
410136f5 1264 fprintf(output, "CPU%*d%s%*s%s",
d7470b6a 1265 csv_output ? 0 : -4,
7ae92e74 1266 perf_evsel__cpus(counter)->map[cpu], csv_sep,
d7470b6a 1267 csv_output ? 0 : 18,
2cee77c4 1268 counter->supported ? CNTR_NOT_COUNTED : CNTR_NOT_SUPPORTED,
410136f5
SE
1269 csv_sep);
1270
1271 fprintf(output, "%-*s%s",
1272 csv_output ? 0 : unit_width,
1273 counter->unit, csv_sep);
1274
1275 fprintf(output, "%*s",
1276 csv_output ? 0 : -25,
1277 perf_evsel__name(counter));
f5b4a9c3 1278
023695d9 1279 if (counter->cgrp)
4aa9015f
SE
1280 fprintf(output, "%s%s",
1281 csv_sep, counter->cgrp->name);
023695d9 1282
4aa9015f 1283 fputc('\n', output);
f5b4a9c3
SE
1284 continue;
1285 }
1286
410136f5
SE
1287 uval = val * counter->scale;
1288
f5b4a9c3 1289 if (nsec_counter(counter))
410136f5 1290 nsec_printout(cpu, 0, counter, uval);
f5b4a9c3 1291 else
410136f5 1292 abs_printout(cpu, 0, counter, uval);
f5b4a9c3 1293
d7470b6a
SE
1294 if (!csv_output) {
1295 print_noise(counter, 1.0);
f5b4a9c3 1296
c6264def 1297 if (run != ena)
4aa9015f
SE
1298 fprintf(output, " (%.2f%%)",
1299 100.0 * run / ena);
f5b4a9c3 1300 }
4aa9015f 1301 fputc('\n', output);
f5b4a9c3
SE
1302 }
1303}
1304
42202dd5
IM
1305static void print_stat(int argc, const char **argv)
1306{
69aad6f1
ACM
1307 struct perf_evsel *counter;
1308 int i;
42202dd5 1309
ddcacfa0
IM
1310 fflush(stdout);
1311
d7470b6a 1312 if (!csv_output) {
4aa9015f
SE
1313 fprintf(output, "\n");
1314 fprintf(output, " Performance counter stats for ");
62d3b617
DA
1315 if (target.system_wide)
1316 fprintf(output, "\'system wide");
1317 else if (target.cpu_list)
1318 fprintf(output, "\'CPU(s) %s", target.cpu_list);
602ad878 1319 else if (!target__has_task(&target)) {
4aa9015f 1320 fprintf(output, "\'%s", argv[0]);
d7470b6a 1321 for (i = 1; i < argc; i++)
4aa9015f 1322 fprintf(output, " %s", argv[i]);
20f946b4
NK
1323 } else if (target.pid)
1324 fprintf(output, "process id \'%s", target.pid);
d7470b6a 1325 else
20f946b4 1326 fprintf(output, "thread id \'%s", target.tid);
44db76c8 1327
4aa9015f 1328 fprintf(output, "\'");
d7470b6a 1329 if (run_count > 1)
4aa9015f
SE
1330 fprintf(output, " (%d runs)", run_count);
1331 fprintf(output, ":\n\n");
d7470b6a 1332 }
2996f5dd 1333
86ee6e18 1334 switch (aggr_mode) {
12c08a9f 1335 case AGGR_CORE:
86ee6e18
SE
1336 case AGGR_SOCKET:
1337 print_aggr(NULL);
1338 break;
1339 case AGGR_GLOBAL:
0050f7aa 1340 evlist__for_each(evsel_list, counter)
13370a9b 1341 print_counter_aggr(counter, NULL);
86ee6e18
SE
1342 break;
1343 case AGGR_NONE:
0050f7aa 1344 evlist__for_each(evsel_list, counter)
86ee6e18
SE
1345 print_counter(counter, NULL);
1346 break;
1347 default:
1348 break;
f5b4a9c3 1349 }
ddcacfa0 1350
d7470b6a 1351 if (!csv_output) {
c3305257 1352 if (!null_run)
4aa9015f
SE
1353 fprintf(output, "\n");
1354 fprintf(output, " %17.9f seconds time elapsed",
d7470b6a
SE
1355 avg_stats(&walltime_nsecs_stats)/1e9);
1356 if (run_count > 1) {
4aa9015f 1357 fprintf(output, " ");
f99844cb
IM
1358 print_noise_pct(stddev_stats(&walltime_nsecs_stats),
1359 avg_stats(&walltime_nsecs_stats));
d7470b6a 1360 }
4aa9015f 1361 fprintf(output, "\n\n");
566747e6 1362 }
ddcacfa0
IM
1363}
1364
f7b7c26e
PZ
1365static volatile int signr = -1;
1366
5242519b 1367static void skip_signal(int signo)
ddcacfa0 1368{
13370a9b 1369 if ((child_pid == -1) || interval)
60666c63
LW
1370 done = 1;
1371
f7b7c26e 1372 signr = signo;
d07f0b12
SE
1373 /*
1374 * render child_pid harmless
1375 * won't send SIGTERM to a random
1376 * process in case of race condition
1377 * and fast PID recycling
1378 */
1379 child_pid = -1;
f7b7c26e
PZ
1380}
1381
1382static void sig_atexit(void)
1383{
d07f0b12
SE
1384 sigset_t set, oset;
1385
1386 /*
1387 * avoid race condition with SIGCHLD handler
1388 * in skip_signal() which is modifying child_pid
1389 * goal is to avoid send SIGTERM to a random
1390 * process
1391 */
1392 sigemptyset(&set);
1393 sigaddset(&set, SIGCHLD);
1394 sigprocmask(SIG_BLOCK, &set, &oset);
1395
933da83a
CW
1396 if (child_pid != -1)
1397 kill(child_pid, SIGTERM);
1398
d07f0b12
SE
1399 sigprocmask(SIG_SETMASK, &oset, NULL);
1400
f7b7c26e
PZ
1401 if (signr == -1)
1402 return;
1403
1404 signal(signr, SIG_DFL);
1405 kill(getpid(), signr);
5242519b
IM
1406}
1407
1d037ca1
IT
1408static int stat__set_big_num(const struct option *opt __maybe_unused,
1409 const char *s __maybe_unused, int unset)
d7470b6a
SE
1410{
1411 big_num_opt = unset ? 0 : 1;
1412 return 0;
1413}
1414
86ee6e18
SE
1415static int perf_stat_init_aggr_mode(void)
1416{
1417 switch (aggr_mode) {
1418 case AGGR_SOCKET:
1419 if (cpu_map__build_socket_map(evsel_list->cpus, &aggr_map)) {
1420 perror("cannot build socket map");
1421 return -1;
1422 }
1423 aggr_get_id = cpu_map__get_socket;
1424 break;
12c08a9f
SE
1425 case AGGR_CORE:
1426 if (cpu_map__build_core_map(evsel_list->cpus, &aggr_map)) {
1427 perror("cannot build core map");
1428 return -1;
1429 }
1430 aggr_get_id = cpu_map__get_core;
1431 break;
86ee6e18
SE
1432 case AGGR_NONE:
1433 case AGGR_GLOBAL:
1434 default:
1435 break;
1436 }
1437 return 0;
1438}
1439
4cabc3d1
AK
1440static int setup_events(const char * const *attrs, unsigned len)
1441{
1442 unsigned i;
1443
1444 for (i = 0; i < len; i++) {
1445 if (parse_events(evsel_list, attrs[i]))
1446 return -1;
1447 }
1448 return 0;
1449}
86ee6e18 1450
2cba3ffb
IM
1451/*
1452 * Add default attributes, if there were no attributes specified or
1453 * if -d/--detailed, -d -d or -d -d -d is used:
1454 */
1455static int add_default_attributes(void)
1456{
b070a547
ACM
1457 struct perf_event_attr default_attrs[] = {
1458
1459 { .type = PERF_TYPE_SOFTWARE, .config = PERF_COUNT_SW_TASK_CLOCK },
1460 { .type = PERF_TYPE_SOFTWARE, .config = PERF_COUNT_SW_CONTEXT_SWITCHES },
1461 { .type = PERF_TYPE_SOFTWARE, .config = PERF_COUNT_SW_CPU_MIGRATIONS },
1462 { .type = PERF_TYPE_SOFTWARE, .config = PERF_COUNT_SW_PAGE_FAULTS },
1463
1464 { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_CPU_CYCLES },
1465 { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_STALLED_CYCLES_FRONTEND },
1466 { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_STALLED_CYCLES_BACKEND },
1467 { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_INSTRUCTIONS },
1468 { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS },
1469 { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_BRANCH_MISSES },
1470
1471};
1472
1473/*
1474 * Detailed stats (-d), covering the L1 and last level data caches:
1475 */
1476 struct perf_event_attr detailed_attrs[] = {
1477
1478 { .type = PERF_TYPE_HW_CACHE,
1479 .config =
1480 PERF_COUNT_HW_CACHE_L1D << 0 |
1481 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1482 (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) },
1483
1484 { .type = PERF_TYPE_HW_CACHE,
1485 .config =
1486 PERF_COUNT_HW_CACHE_L1D << 0 |
1487 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1488 (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) },
1489
1490 { .type = PERF_TYPE_HW_CACHE,
1491 .config =
1492 PERF_COUNT_HW_CACHE_LL << 0 |
1493 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1494 (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) },
1495
1496 { .type = PERF_TYPE_HW_CACHE,
1497 .config =
1498 PERF_COUNT_HW_CACHE_LL << 0 |
1499 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1500 (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) },
1501};
1502
1503/*
1504 * Very detailed stats (-d -d), covering the instruction cache and the TLB caches:
1505 */
1506 struct perf_event_attr very_detailed_attrs[] = {
1507
1508 { .type = PERF_TYPE_HW_CACHE,
1509 .config =
1510 PERF_COUNT_HW_CACHE_L1I << 0 |
1511 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1512 (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) },
1513
1514 { .type = PERF_TYPE_HW_CACHE,
1515 .config =
1516 PERF_COUNT_HW_CACHE_L1I << 0 |
1517 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1518 (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) },
1519
1520 { .type = PERF_TYPE_HW_CACHE,
1521 .config =
1522 PERF_COUNT_HW_CACHE_DTLB << 0 |
1523 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1524 (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) },
1525
1526 { .type = PERF_TYPE_HW_CACHE,
1527 .config =
1528 PERF_COUNT_HW_CACHE_DTLB << 0 |
1529 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1530 (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) },
1531
1532 { .type = PERF_TYPE_HW_CACHE,
1533 .config =
1534 PERF_COUNT_HW_CACHE_ITLB << 0 |
1535 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1536 (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) },
1537
1538 { .type = PERF_TYPE_HW_CACHE,
1539 .config =
1540 PERF_COUNT_HW_CACHE_ITLB << 0 |
1541 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1542 (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) },
1543
1544};
1545
1546/*
1547 * Very, very detailed stats (-d -d -d), adding prefetch events:
1548 */
1549 struct perf_event_attr very_very_detailed_attrs[] = {
1550
1551 { .type = PERF_TYPE_HW_CACHE,
1552 .config =
1553 PERF_COUNT_HW_CACHE_L1D << 0 |
1554 (PERF_COUNT_HW_CACHE_OP_PREFETCH << 8) |
1555 (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) },
1556
1557 { .type = PERF_TYPE_HW_CACHE,
1558 .config =
1559 PERF_COUNT_HW_CACHE_L1D << 0 |
1560 (PERF_COUNT_HW_CACHE_OP_PREFETCH << 8) |
1561 (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) },
1562};
1563
2cba3ffb
IM
1564 /* Set attrs if no event is selected and !null_run: */
1565 if (null_run)
1566 return 0;
1567
4cabc3d1
AK
1568 if (transaction_run) {
1569 int err;
1570 if (pmu_have_event("cpu", "cycles-ct") &&
1571 pmu_have_event("cpu", "el-start"))
1572 err = setup_events(transaction_attrs,
1573 ARRAY_SIZE(transaction_attrs));
1574 else
1575 err = setup_events(transaction_limited_attrs,
1576 ARRAY_SIZE(transaction_limited_attrs));
1577 if (err < 0) {
1578 fprintf(stderr, "Cannot set up transaction events\n");
1579 return -1;
1580 }
1581 return 0;
1582 }
1583
2cba3ffb 1584 if (!evsel_list->nr_entries) {
79695e1b 1585 if (perf_evlist__add_default_attrs(evsel_list, default_attrs) < 0)
50d08e47 1586 return -1;
2cba3ffb
IM
1587 }
1588
1589 /* Detailed events get appended to the event list: */
1590
1591 if (detailed_run < 1)
1592 return 0;
1593
1594 /* Append detailed run extra attributes: */
79695e1b 1595 if (perf_evlist__add_default_attrs(evsel_list, detailed_attrs) < 0)
50d08e47 1596 return -1;
2cba3ffb
IM
1597
1598 if (detailed_run < 2)
1599 return 0;
1600
1601 /* Append very detailed run extra attributes: */
79695e1b 1602 if (perf_evlist__add_default_attrs(evsel_list, very_detailed_attrs) < 0)
50d08e47 1603 return -1;
2cba3ffb
IM
1604
1605 if (detailed_run < 3)
1606 return 0;
1607
1608 /* Append very, very detailed run extra attributes: */
79695e1b 1609 return perf_evlist__add_default_attrs(evsel_list, very_very_detailed_attrs);
2cba3ffb
IM
1610}
1611
1d037ca1 1612int cmd_stat(int argc, const char **argv, const char *prefix __maybe_unused)
5242519b 1613{
1f16c575 1614 bool append_file = false;
b070a547
ACM
1615 int output_fd = 0;
1616 const char *output_name = NULL;
1617 const struct option options[] = {
4cabc3d1
AK
1618 OPT_BOOLEAN('T', "transaction", &transaction_run,
1619 "hardware transaction statistics"),
b070a547
ACM
1620 OPT_CALLBACK('e', "event", &evsel_list, "event",
1621 "event selector. use 'perf list' to list available events",
1622 parse_events_option),
1623 OPT_CALLBACK(0, "filter", &evsel_list, "filter",
1624 "event filter", parse_filter),
1625 OPT_BOOLEAN('i', "no-inherit", &no_inherit,
1626 "child tasks do not inherit counters"),
1627 OPT_STRING('p', "pid", &target.pid, "pid",
1628 "stat events on existing process id"),
1629 OPT_STRING('t', "tid", &target.tid, "tid",
1630 "stat events on existing thread id"),
1631 OPT_BOOLEAN('a', "all-cpus", &target.system_wide,
1632 "system-wide collection from all CPUs"),
1633 OPT_BOOLEAN('g', "group", &group,
1634 "put the counters into a counter group"),
1635 OPT_BOOLEAN('c', "scale", &scale, "scale/normalize counters"),
1636 OPT_INCR('v', "verbose", &verbose,
1637 "be more verbose (show counter open errors, etc)"),
1638 OPT_INTEGER('r', "repeat", &run_count,
a7e191c3 1639 "repeat command and print average + stddev (max: 100, forever: 0)"),
b070a547
ACM
1640 OPT_BOOLEAN('n', "null", &null_run,
1641 "null run - dont start any counters"),
1642 OPT_INCR('d', "detailed", &detailed_run,
1643 "detailed run - start a lot of events"),
1644 OPT_BOOLEAN('S', "sync", &sync_run,
1645 "call sync() before starting a run"),
1646 OPT_CALLBACK_NOOPT('B', "big-num", NULL, NULL,
1647 "print large numbers with thousands\' separators",
1648 stat__set_big_num),
1649 OPT_STRING('C', "cpu", &target.cpu_list, "cpu",
1650 "list of cpus to monitor in system-wide"),
86ee6e18
SE
1651 OPT_SET_UINT('A', "no-aggr", &aggr_mode,
1652 "disable CPU count aggregation", AGGR_NONE),
b070a547
ACM
1653 OPT_STRING('x', "field-separator", &csv_sep, "separator",
1654 "print counts with custom separator"),
1655 OPT_CALLBACK('G', "cgroup", &evsel_list, "name",
1656 "monitor event in cgroup name only", parse_cgroups),
1657 OPT_STRING('o', "output", &output_name, "file", "output file name"),
1658 OPT_BOOLEAN(0, "append", &append_file, "append to the output file"),
1659 OPT_INTEGER(0, "log-fd", &output_fd,
1660 "log output to fd, instead of stderr"),
1f16c575
PZ
1661 OPT_STRING(0, "pre", &pre_cmd, "command",
1662 "command to run prior to the measured command"),
1663 OPT_STRING(0, "post", &post_cmd, "command",
1664 "command to run after to the measured command"),
13370a9b
SE
1665 OPT_UINTEGER('I', "interval-print", &interval,
1666 "print counts at regular interval in ms (>= 100)"),
d4304958 1667 OPT_SET_UINT(0, "per-socket", &aggr_mode,
86ee6e18 1668 "aggregate counts per processor socket", AGGR_SOCKET),
12c08a9f
SE
1669 OPT_SET_UINT(0, "per-core", &aggr_mode,
1670 "aggregate counts per physical processor core", AGGR_CORE),
41191688
AK
1671 OPT_UINTEGER('D', "delay", &initial_delay,
1672 "ms to wait before starting measurement after program start"),
b070a547
ACM
1673 OPT_END()
1674 };
1675 const char * const stat_usage[] = {
1676 "perf stat [<options>] [<command>]",
1677 NULL
1678 };
cc03c542 1679 int status = -EINVAL, run_idx;
4aa9015f 1680 const char *mode;
42202dd5 1681
5af52b51
SE
1682 setlocale(LC_ALL, "");
1683
334fe7a3 1684 evsel_list = perf_evlist__new();
361c99a6
ACM
1685 if (evsel_list == NULL)
1686 return -ENOMEM;
1687
a0541234
AB
1688 argc = parse_options(argc, argv, options, stat_usage,
1689 PARSE_OPT_STOP_AT_NON_OPTION);
d7470b6a 1690
4aa9015f
SE
1691 output = stderr;
1692 if (output_name && strcmp(output_name, "-"))
1693 output = NULL;
1694
56f3bae7
JC
1695 if (output_name && output_fd) {
1696 fprintf(stderr, "cannot use both --output and --log-fd\n");
cc03c542
NK
1697 parse_options_usage(stat_usage, options, "o", 1);
1698 parse_options_usage(NULL, options, "log-fd", 0);
1699 goto out;
56f3bae7 1700 }
fc3e4d07
SE
1701
1702 if (output_fd < 0) {
1703 fprintf(stderr, "argument to --log-fd must be a > 0\n");
cc03c542
NK
1704 parse_options_usage(stat_usage, options, "log-fd", 0);
1705 goto out;
fc3e4d07
SE
1706 }
1707
4aa9015f
SE
1708 if (!output) {
1709 struct timespec tm;
1710 mode = append_file ? "a" : "w";
1711
1712 output = fopen(output_name, mode);
1713 if (!output) {
1714 perror("failed to create output file");
fceda7fe 1715 return -1;
4aa9015f
SE
1716 }
1717 clock_gettime(CLOCK_REALTIME, &tm);
1718 fprintf(output, "# started on %s\n", ctime(&tm.tv_sec));
fc3e4d07 1719 } else if (output_fd > 0) {
56f3bae7
JC
1720 mode = append_file ? "a" : "w";
1721 output = fdopen(output_fd, mode);
1722 if (!output) {
1723 perror("Failed opening logfd");
1724 return -errno;
1725 }
4aa9015f
SE
1726 }
1727
d4ffd04d 1728 if (csv_sep) {
d7470b6a 1729 csv_output = true;
d4ffd04d
JC
1730 if (!strcmp(csv_sep, "\\t"))
1731 csv_sep = "\t";
1732 } else
d7470b6a
SE
1733 csv_sep = DEFAULT_SEPARATOR;
1734
1735 /*
1736 * let the spreadsheet do the pretty-printing
1737 */
1738 if (csv_output) {
61a9f324 1739 /* User explicitly passed -B? */
d7470b6a
SE
1740 if (big_num_opt == 1) {
1741 fprintf(stderr, "-B option not supported with -x\n");
cc03c542
NK
1742 parse_options_usage(stat_usage, options, "B", 1);
1743 parse_options_usage(NULL, options, "x", 1);
1744 goto out;
d7470b6a
SE
1745 } else /* Nope, so disable big number formatting */
1746 big_num = false;
1747 } else if (big_num_opt == 0) /* User passed --no-big-num */
1748 big_num = false;
1749
602ad878 1750 if (!argc && target__none(&target))
5242519b 1751 usage_with_options(stat_usage, options);
ac3063bd 1752
a7e191c3 1753 if (run_count < 0) {
cc03c542
NK
1754 pr_err("Run count must be a positive number\n");
1755 parse_options_usage(stat_usage, options, "r", 1);
1756 goto out;
a7e191c3
FD
1757 } else if (run_count == 0) {
1758 forever = true;
1759 run_count = 1;
1760 }
ddcacfa0 1761
023695d9 1762 /* no_aggr, cgroup are for system-wide only */
602ad878
ACM
1763 if ((aggr_mode != AGGR_GLOBAL || nr_cgroups) &&
1764 !target__has_cpu(&target)) {
023695d9
SE
1765 fprintf(stderr, "both cgroup and no-aggregation "
1766 "modes only available in system-wide mode\n");
1767
cc03c542
NK
1768 parse_options_usage(stat_usage, options, "G", 1);
1769 parse_options_usage(NULL, options, "A", 1);
1770 parse_options_usage(NULL, options, "a", 1);
1771 goto out;
d7e7a451
SE
1772 }
1773
2cba3ffb
IM
1774 if (add_default_attributes())
1775 goto out;
ddcacfa0 1776
602ad878 1777 target__validate(&target);
5c98d466 1778
77a6f014 1779 if (perf_evlist__create_maps(evsel_list, &target) < 0) {
602ad878 1780 if (target__has_task(&target)) {
77a6f014 1781 pr_err("Problems finding threads of monitor\n");
cc03c542
NK
1782 parse_options_usage(stat_usage, options, "p", 1);
1783 parse_options_usage(NULL, options, "t", 1);
602ad878 1784 } else if (target__has_cpu(&target)) {
77a6f014 1785 perror("failed to parse CPUs map");
cc03c542
NK
1786 parse_options_usage(stat_usage, options, "C", 1);
1787 parse_options_usage(NULL, options, "a", 1);
1788 }
1789 goto out;
60d567e2 1790 }
13370a9b
SE
1791 if (interval && interval < 100) {
1792 pr_err("print interval must be >= 100ms\n");
cc03c542 1793 parse_options_usage(stat_usage, options, "I", 1);
03ad9747 1794 goto out;
13370a9b 1795 }
c45c6ea2 1796
d134ffb9 1797 if (perf_evlist__alloc_stats(evsel_list, interval))
03ad9747 1798 goto out;
d6d901c2 1799
86ee6e18 1800 if (perf_stat_init_aggr_mode())
03ad9747 1801 goto out;
86ee6e18 1802
58d7e993
IM
1803 /*
1804 * We dont want to block the signals - that would cause
1805 * child tasks to inherit that and Ctrl-C would not work.
1806 * What we want is for Ctrl-C to work in the exec()-ed
1807 * task, but being ignored by perf stat itself:
1808 */
f7b7c26e 1809 atexit(sig_atexit);
a7e191c3
FD
1810 if (!forever)
1811 signal(SIGINT, skip_signal);
13370a9b 1812 signal(SIGCHLD, skip_signal);
58d7e993
IM
1813 signal(SIGALRM, skip_signal);
1814 signal(SIGABRT, skip_signal);
1815
42202dd5 1816 status = 0;
a7e191c3 1817 for (run_idx = 0; forever || run_idx < run_count; run_idx++) {
42202dd5 1818 if (run_count != 1 && verbose)
4aa9015f
SE
1819 fprintf(output, "[ perf stat: executing run #%d ... ]\n",
1820 run_idx + 1);
f9cef0a9 1821
42202dd5 1822 status = run_perf_stat(argc, argv);
a7e191c3
FD
1823 if (forever && status != -1) {
1824 print_stat(argc, argv);
d134ffb9 1825 perf_stat__reset_stats(evsel_list);
a7e191c3 1826 }
42202dd5
IM
1827 }
1828
a7e191c3 1829 if (!forever && status != -1 && !interval)
084ab9f8 1830 print_stat(argc, argv);
d134ffb9
ACM
1831
1832 perf_evlist__free_stats(evsel_list);
0015e2e1
ACM
1833out:
1834 perf_evlist__delete(evsel_list);
42202dd5 1835 return status;
ddcacfa0 1836}
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