perf stat: Output running time and run/enabled ratio in CSV mode
[deliverable/linux.git] / tools / perf / builtin-stat.c
CommitLineData
ddcacfa0 1/*
bf9e1876
IM
2 * builtin-stat.c
3 *
4 * Builtin stat command: Give a precise performance counters summary
5 * overview about any workload, CPU or specific PID.
6 *
7 * Sample output:
ddcacfa0 8
2cba3ffb 9 $ perf stat ./hackbench 10
ddcacfa0 10
2cba3ffb 11 Time: 0.118
ddcacfa0 12
2cba3ffb 13 Performance counter stats for './hackbench 10':
ddcacfa0 14
2cba3ffb
IM
15 1708.761321 task-clock # 11.037 CPUs utilized
16 41,190 context-switches # 0.024 M/sec
17 6,735 CPU-migrations # 0.004 M/sec
18 17,318 page-faults # 0.010 M/sec
19 5,205,202,243 cycles # 3.046 GHz
20 3,856,436,920 stalled-cycles-frontend # 74.09% frontend cycles idle
21 1,600,790,871 stalled-cycles-backend # 30.75% backend cycles idle
22 2,603,501,247 instructions # 0.50 insns per cycle
23 # 1.48 stalled cycles per insn
24 484,357,498 branches # 283.455 M/sec
25 6,388,934 branch-misses # 1.32% of all branches
26
27 0.154822978 seconds time elapsed
ddcacfa0 28
5242519b 29 *
2cba3ffb 30 * Copyright (C) 2008-2011, Red Hat Inc, Ingo Molnar <mingo@redhat.com>
5242519b
IM
31 *
32 * Improvements and fixes by:
33 *
34 * Arjan van de Ven <arjan@linux.intel.com>
35 * Yanmin Zhang <yanmin.zhang@intel.com>
36 * Wu Fengguang <fengguang.wu@intel.com>
37 * Mike Galbraith <efault@gmx.de>
38 * Paul Mackerras <paulus@samba.org>
6e750a8f 39 * Jaswinder Singh Rajput <jaswinder@kernel.org>
5242519b
IM
40 *
41 * Released under the GPL v2. (and only v2, not any later version)
ddcacfa0
IM
42 */
43
1a482f38 44#include "perf.h"
16f762a2 45#include "builtin.h"
f14d5707 46#include "util/cgroup.h"
148be2c1 47#include "util/util.h"
5242519b
IM
48#include "util/parse-options.h"
49#include "util/parse-events.h"
4cabc3d1 50#include "util/pmu.h"
8f28827a 51#include "util/event.h"
361c99a6 52#include "util/evlist.h"
69aad6f1 53#include "util/evsel.h"
8f28827a 54#include "util/debug.h"
a5d243d0 55#include "util/color.h"
0007ecea 56#include "util/stat.h"
60666c63 57#include "util/header.h"
a12b51c4 58#include "util/cpumap.h"
d6d901c2 59#include "util/thread.h"
fd78260b 60#include "util/thread_map.h"
ddcacfa0 61
1f16c575 62#include <stdlib.h>
ddcacfa0 63#include <sys/prctl.h>
5af52b51 64#include <locale.h>
16c8a109 65
d7470b6a 66#define DEFAULT_SEPARATOR " "
2cee77c4
DA
67#define CNTR_NOT_SUPPORTED "<not supported>"
68#define CNTR_NOT_COUNTED "<not counted>"
d7470b6a 69
13370a9b
SE
70static void print_stat(int argc, const char **argv);
71static void print_counter_aggr(struct perf_evsel *counter, char *prefix);
72static void print_counter(struct perf_evsel *counter, char *prefix);
86ee6e18 73static void print_aggr(char *prefix);
13370a9b 74
4cabc3d1
AK
75/* Default events used for perf stat -T */
76static const char * const transaction_attrs[] = {
77 "task-clock",
78 "{"
79 "instructions,"
80 "cycles,"
81 "cpu/cycles-t/,"
82 "cpu/tx-start/,"
83 "cpu/el-start/,"
84 "cpu/cycles-ct/"
85 "}"
86};
87
88/* More limited version when the CPU does not have all events. */
89static const char * const transaction_limited_attrs[] = {
90 "task-clock",
91 "{"
92 "instructions,"
93 "cycles,"
94 "cpu/cycles-t/,"
95 "cpu/tx-start/"
96 "}"
97};
98
99/* must match transaction_attrs and the beginning limited_attrs */
100enum {
101 T_TASK_CLOCK,
102 T_INSTRUCTIONS,
103 T_CYCLES,
104 T_CYCLES_IN_TX,
105 T_TRANSACTION_START,
106 T_ELISION_START,
107 T_CYCLES_IN_TX_CP,
108};
109
666e6d48 110static struct perf_evlist *evsel_list;
361c99a6 111
602ad878 112static struct target target = {
77a6f014
NK
113 .uid = UINT_MAX,
114};
ddcacfa0 115
86ee6e18
SE
116enum aggr_mode {
117 AGGR_NONE,
118 AGGR_GLOBAL,
119 AGGR_SOCKET,
12c08a9f 120 AGGR_CORE,
86ee6e18
SE
121};
122
3d632595 123static int run_count = 1;
2e6cdf99 124static bool no_inherit = false;
c0555642 125static bool scale = true;
86ee6e18 126static enum aggr_mode aggr_mode = AGGR_GLOBAL;
d07f0b12 127static volatile pid_t child_pid = -1;
c0555642 128static bool null_run = false;
2cba3ffb 129static int detailed_run = 0;
4cabc3d1 130static bool transaction_run;
201e0b06 131static bool big_num = true;
d7470b6a 132static int big_num_opt = -1;
d7470b6a
SE
133static const char *csv_sep = NULL;
134static bool csv_output = false;
43bece79 135static bool group = false;
4aa9015f 136static FILE *output = NULL;
1f16c575
PZ
137static const char *pre_cmd = NULL;
138static const char *post_cmd = NULL;
139static bool sync_run = false;
13370a9b 140static unsigned int interval = 0;
41191688 141static unsigned int initial_delay = 0;
410136f5 142static unsigned int unit_width = 4; /* strlen("unit") */
a7e191c3 143static bool forever = false;
13370a9b 144static struct timespec ref_time;
86ee6e18
SE
145static struct cpu_map *aggr_map;
146static int (*aggr_get_id)(struct cpu_map *m, int cpu);
5af52b51 147
60666c63
LW
148static volatile int done = 0;
149
69aad6f1
ACM
150struct perf_stat {
151 struct stats res_stats[3];
69aad6f1
ACM
152};
153
13370a9b
SE
154static inline void diff_timespec(struct timespec *r, struct timespec *a,
155 struct timespec *b)
156{
157 r->tv_sec = a->tv_sec - b->tv_sec;
158 if (a->tv_nsec < b->tv_nsec) {
159 r->tv_nsec = a->tv_nsec + 1000000000L - b->tv_nsec;
160 r->tv_sec--;
161 } else {
162 r->tv_nsec = a->tv_nsec - b->tv_nsec ;
163 }
164}
165
166static inline struct cpu_map *perf_evsel__cpus(struct perf_evsel *evsel)
167{
168 return (evsel->cpus && !target.cpu_list) ? evsel->cpus : evsel_list->cpus;
169}
170
171static inline int perf_evsel__nr_cpus(struct perf_evsel *evsel)
172{
173 return perf_evsel__cpus(evsel)->nr;
174}
175
a7e191c3
FD
176static void perf_evsel__reset_stat_priv(struct perf_evsel *evsel)
177{
90f6bb6c
AK
178 int i;
179 struct perf_stat *ps = evsel->priv;
180
181 for (i = 0; i < 3; i++)
182 init_stats(&ps->res_stats[i]);
a7e191c3
FD
183}
184
c52b12ed 185static int perf_evsel__alloc_stat_priv(struct perf_evsel *evsel)
69aad6f1 186{
c52b12ed 187 evsel->priv = zalloc(sizeof(struct perf_stat));
d180ac14 188 if (evsel->priv == NULL)
90f6bb6c
AK
189 return -ENOMEM;
190 perf_evsel__reset_stat_priv(evsel);
191 return 0;
69aad6f1
ACM
192}
193
194static void perf_evsel__free_stat_priv(struct perf_evsel *evsel)
195{
04662523 196 zfree(&evsel->priv);
69aad6f1
ACM
197}
198
13370a9b 199static int perf_evsel__alloc_prev_raw_counts(struct perf_evsel *evsel)
7ae92e74 200{
13370a9b
SE
201 void *addr;
202 size_t sz;
203
204 sz = sizeof(*evsel->counts) +
205 (perf_evsel__nr_cpus(evsel) * sizeof(struct perf_counts_values));
206
207 addr = zalloc(sz);
208 if (!addr)
209 return -ENOMEM;
210
211 evsel->prev_raw_counts = addr;
212
213 return 0;
7ae92e74
YZ
214}
215
13370a9b 216static void perf_evsel__free_prev_raw_counts(struct perf_evsel *evsel)
7ae92e74 217{
04662523 218 zfree(&evsel->prev_raw_counts);
7ae92e74
YZ
219}
220
d134ffb9
ACM
221static void perf_evlist__free_stats(struct perf_evlist *evlist)
222{
223 struct perf_evsel *evsel;
224
0050f7aa 225 evlist__for_each(evlist, evsel) {
d134ffb9
ACM
226 perf_evsel__free_stat_priv(evsel);
227 perf_evsel__free_counts(evsel);
228 perf_evsel__free_prev_raw_counts(evsel);
229 }
230}
231
232static int perf_evlist__alloc_stats(struct perf_evlist *evlist, bool alloc_raw)
233{
234 struct perf_evsel *evsel;
235
0050f7aa 236 evlist__for_each(evlist, evsel) {
d134ffb9
ACM
237 if (perf_evsel__alloc_stat_priv(evsel) < 0 ||
238 perf_evsel__alloc_counts(evsel, perf_evsel__nr_cpus(evsel)) < 0 ||
239 (alloc_raw && perf_evsel__alloc_prev_raw_counts(evsel) < 0))
240 goto out_free;
241 }
242
243 return 0;
244
245out_free:
246 perf_evlist__free_stats(evlist);
247 return -1;
248}
249
666e6d48
RR
250static struct stats runtime_nsecs_stats[MAX_NR_CPUS];
251static struct stats runtime_cycles_stats[MAX_NR_CPUS];
252static struct stats runtime_stalled_cycles_front_stats[MAX_NR_CPUS];
253static struct stats runtime_stalled_cycles_back_stats[MAX_NR_CPUS];
254static struct stats runtime_branches_stats[MAX_NR_CPUS];
255static struct stats runtime_cacherefs_stats[MAX_NR_CPUS];
256static struct stats runtime_l1_dcache_stats[MAX_NR_CPUS];
257static struct stats runtime_l1_icache_stats[MAX_NR_CPUS];
258static struct stats runtime_ll_cache_stats[MAX_NR_CPUS];
259static struct stats runtime_itlb_cache_stats[MAX_NR_CPUS];
260static struct stats runtime_dtlb_cache_stats[MAX_NR_CPUS];
4cabc3d1 261static struct stats runtime_cycles_in_tx_stats[MAX_NR_CPUS];
666e6d48 262static struct stats walltime_nsecs_stats;
4cabc3d1
AK
263static struct stats runtime_transaction_stats[MAX_NR_CPUS];
264static struct stats runtime_elision_stats[MAX_NR_CPUS];
be1ac0d8 265
d134ffb9 266static void perf_stat__reset_stats(struct perf_evlist *evlist)
a7e191c3 267{
d134ffb9
ACM
268 struct perf_evsel *evsel;
269
0050f7aa 270 evlist__for_each(evlist, evsel) {
d134ffb9
ACM
271 perf_evsel__reset_stat_priv(evsel);
272 perf_evsel__reset_counts(evsel, perf_evsel__nr_cpus(evsel));
273 }
274
a7e191c3
FD
275 memset(runtime_nsecs_stats, 0, sizeof(runtime_nsecs_stats));
276 memset(runtime_cycles_stats, 0, sizeof(runtime_cycles_stats));
277 memset(runtime_stalled_cycles_front_stats, 0, sizeof(runtime_stalled_cycles_front_stats));
278 memset(runtime_stalled_cycles_back_stats, 0, sizeof(runtime_stalled_cycles_back_stats));
279 memset(runtime_branches_stats, 0, sizeof(runtime_branches_stats));
280 memset(runtime_cacherefs_stats, 0, sizeof(runtime_cacherefs_stats));
281 memset(runtime_l1_dcache_stats, 0, sizeof(runtime_l1_dcache_stats));
282 memset(runtime_l1_icache_stats, 0, sizeof(runtime_l1_icache_stats));
283 memset(runtime_ll_cache_stats, 0, sizeof(runtime_ll_cache_stats));
284 memset(runtime_itlb_cache_stats, 0, sizeof(runtime_itlb_cache_stats));
285 memset(runtime_dtlb_cache_stats, 0, sizeof(runtime_dtlb_cache_stats));
4cabc3d1
AK
286 memset(runtime_cycles_in_tx_stats, 0,
287 sizeof(runtime_cycles_in_tx_stats));
288 memset(runtime_transaction_stats, 0,
289 sizeof(runtime_transaction_stats));
290 memset(runtime_elision_stats, 0, sizeof(runtime_elision_stats));
a7e191c3
FD
291 memset(&walltime_nsecs_stats, 0, sizeof(walltime_nsecs_stats));
292}
293
cac21425 294static int create_perf_stat_counter(struct perf_evsel *evsel)
ddcacfa0 295{
69aad6f1 296 struct perf_event_attr *attr = &evsel->attr;
727ab04e 297
ddcacfa0 298 if (scale)
a21ca2ca
IM
299 attr->read_format = PERF_FORMAT_TOTAL_TIME_ENABLED |
300 PERF_FORMAT_TOTAL_TIME_RUNNING;
ddcacfa0 301
5d2cd909
ACM
302 attr->inherit = !no_inherit;
303
602ad878 304 if (target__has_cpu(&target))
594ac61a 305 return perf_evsel__open_per_cpu(evsel, perf_evsel__cpus(evsel));
5622c07b 306
602ad878 307 if (!target__has_task(&target) && perf_evsel__is_group_leader(evsel)) {
48290609 308 attr->disabled = 1;
41191688
AK
309 if (!initial_delay)
310 attr->enable_on_exec = 1;
ddcacfa0 311 }
084ab9f8 312
594ac61a 313 return perf_evsel__open_per_thread(evsel, evsel_list->threads);
ddcacfa0
IM
314}
315
c04f5e5d
IM
316/*
317 * Does the counter have nsecs as a unit?
318 */
daec78a0 319static inline int nsec_counter(struct perf_evsel *evsel)
c04f5e5d 320{
daec78a0
ACM
321 if (perf_evsel__match(evsel, SOFTWARE, SW_CPU_CLOCK) ||
322 perf_evsel__match(evsel, SOFTWARE, SW_TASK_CLOCK))
c04f5e5d
IM
323 return 1;
324
325 return 0;
326}
327
4cabc3d1
AK
328static struct perf_evsel *nth_evsel(int n)
329{
330 static struct perf_evsel **array;
331 static int array_len;
332 struct perf_evsel *ev;
333 int j;
334
335 /* Assumes this only called when evsel_list does not change anymore. */
336 if (!array) {
0050f7aa 337 evlist__for_each(evsel_list, ev)
4cabc3d1
AK
338 array_len++;
339 array = malloc(array_len * sizeof(void *));
340 if (!array)
341 exit(ENOMEM);
342 j = 0;
0050f7aa 343 evlist__for_each(evsel_list, ev)
4cabc3d1
AK
344 array[j++] = ev;
345 }
346 if (n < array_len)
347 return array[n];
348 return NULL;
349}
350
dcd9936a
IM
351/*
352 * Update various tracking values we maintain to print
353 * more semantic information such as miss/hit ratios,
354 * instruction rates, etc:
355 */
356static void update_shadow_stats(struct perf_evsel *counter, u64 *count)
357{
358 if (perf_evsel__match(counter, SOFTWARE, SW_TASK_CLOCK))
359 update_stats(&runtime_nsecs_stats[0], count[0]);
360 else if (perf_evsel__match(counter, HARDWARE, HW_CPU_CYCLES))
361 update_stats(&runtime_cycles_stats[0], count[0]);
4cabc3d1
AK
362 else if (transaction_run &&
363 perf_evsel__cmp(counter, nth_evsel(T_CYCLES_IN_TX)))
364 update_stats(&runtime_cycles_in_tx_stats[0], count[0]);
365 else if (transaction_run &&
366 perf_evsel__cmp(counter, nth_evsel(T_TRANSACTION_START)))
367 update_stats(&runtime_transaction_stats[0], count[0]);
368 else if (transaction_run &&
369 perf_evsel__cmp(counter, nth_evsel(T_ELISION_START)))
370 update_stats(&runtime_elision_stats[0], count[0]);
d3d1e86d
IM
371 else if (perf_evsel__match(counter, HARDWARE, HW_STALLED_CYCLES_FRONTEND))
372 update_stats(&runtime_stalled_cycles_front_stats[0], count[0]);
129c04cb 373 else if (perf_evsel__match(counter, HARDWARE, HW_STALLED_CYCLES_BACKEND))
d3d1e86d 374 update_stats(&runtime_stalled_cycles_back_stats[0], count[0]);
dcd9936a
IM
375 else if (perf_evsel__match(counter, HARDWARE, HW_BRANCH_INSTRUCTIONS))
376 update_stats(&runtime_branches_stats[0], count[0]);
377 else if (perf_evsel__match(counter, HARDWARE, HW_CACHE_REFERENCES))
378 update_stats(&runtime_cacherefs_stats[0], count[0]);
8bb6c79f
IM
379 else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_L1D))
380 update_stats(&runtime_l1_dcache_stats[0], count[0]);
c3305257
IM
381 else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_L1I))
382 update_stats(&runtime_l1_icache_stats[0], count[0]);
383 else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_LL))
384 update_stats(&runtime_ll_cache_stats[0], count[0]);
385 else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_DTLB))
386 update_stats(&runtime_dtlb_cache_stats[0], count[0]);
387 else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_ITLB))
388 update_stats(&runtime_itlb_cache_stats[0], count[0]);
dcd9936a
IM
389}
390
779d0b99
JO
391static void zero_per_pkg(struct perf_evsel *counter)
392{
393 if (counter->per_pkg_mask)
394 memset(counter->per_pkg_mask, 0, MAX_NR_CPUS);
395}
396
397static int check_per_pkg(struct perf_evsel *counter, int cpu, bool *skip)
398{
399 unsigned long *mask = counter->per_pkg_mask;
400 struct cpu_map *cpus = perf_evsel__cpus(counter);
401 int s;
402
403 *skip = false;
404
405 if (!counter->per_pkg)
406 return 0;
407
408 if (cpu_map__empty(cpus))
409 return 0;
410
411 if (!mask) {
412 mask = zalloc(MAX_NR_CPUS);
413 if (!mask)
414 return -ENOMEM;
415
416 counter->per_pkg_mask = mask;
417 }
418
419 s = cpu_map__get_socket(cpus, cpu);
420 if (s < 0)
421 return -1;
422
423 *skip = test_and_set_bit(s, mask) == 1;
424 return 0;
425}
426
060c4f9c
JO
427static int read_cb(struct perf_evsel *evsel, int cpu, int thread __maybe_unused,
428 struct perf_counts_values *count)
429{
1971f59f 430 struct perf_counts_values *aggr = &evsel->counts->aggr;
779d0b99
JO
431 static struct perf_counts_values zero;
432 bool skip = false;
433
434 if (check_per_pkg(evsel, cpu, &skip)) {
435 pr_err("failed to read per-pkg counter\n");
436 return -1;
437 }
438
439 if (skip)
440 count = &zero;
1971f59f 441
060c4f9c
JO
442 switch (aggr_mode) {
443 case AGGR_CORE:
444 case AGGR_SOCKET:
445 case AGGR_NONE:
6c0345b7
JO
446 if (!evsel->snapshot)
447 perf_evsel__compute_deltas(evsel, cpu, count);
060c4f9c
JO
448 perf_counts_values__scale(count, scale, NULL);
449 evsel->counts->cpu[cpu] = *count;
450 update_shadow_stats(evsel, count->values);
451 break;
452 case AGGR_GLOBAL:
1971f59f
JO
453 aggr->val += count->val;
454 if (scale) {
455 aggr->ena += count->ena;
456 aggr->run += count->run;
457 }
060c4f9c
JO
458 default:
459 break;
460 }
461
462 return 0;
463}
464
1971f59f
JO
465static int read_counter(struct perf_evsel *counter);
466
c04f5e5d 467/*
2996f5dd 468 * Read out the results of a single counter:
f5b4a9c3 469 * aggregate counts across CPUs in system-wide mode
c04f5e5d 470 */
c52b12ed 471static int read_counter_aggr(struct perf_evsel *counter)
c04f5e5d 472{
1971f59f 473 struct perf_counts_values *aggr = &counter->counts->aggr;
69aad6f1 474 struct perf_stat *ps = counter->priv;
c52b12ed
ACM
475 u64 *count = counter->counts->aggr.values;
476 int i;
2996f5dd 477
1971f59f
JO
478 aggr->val = aggr->ena = aggr->run = 0;
479
480 if (read_counter(counter))
c52b12ed 481 return -1;
9e9772c4 482
6c0345b7
JO
483 if (!counter->snapshot)
484 perf_evsel__compute_deltas(counter, -1, aggr);
1971f59f
JO
485 perf_counts_values__scale(aggr, scale, &counter->counts->scaled);
486
9e9772c4 487 for (i = 0; i < 3; i++)
69aad6f1 488 update_stats(&ps->res_stats[i], count[i]);
9e9772c4
PZ
489
490 if (verbose) {
4aa9015f 491 fprintf(output, "%s: %" PRIu64 " %" PRIu64 " %" PRIu64 "\n",
7289f83c 492 perf_evsel__name(counter), count[0], count[1], count[2]);
9e9772c4
PZ
493 }
494
be1ac0d8
IM
495 /*
496 * Save the full runtime - to allow normalization during printout:
497 */
dcd9936a 498 update_shadow_stats(counter, count);
c52b12ed
ACM
499
500 return 0;
f5b4a9c3
SE
501}
502
503/*
504 * Read out the results of a single counter:
505 * do not aggregate counts across CPUs in system-wide mode
506 */
c52b12ed 507static int read_counter(struct perf_evsel *counter)
f5b4a9c3 508{
9bf1a529
JO
509 int nthreads = thread_map__nr(evsel_list->threads);
510 int ncpus = perf_evsel__nr_cpus(counter);
511 int cpu, thread;
f5b4a9c3 512
3b4331d9
SP
513 if (!counter->supported)
514 return -ENOENT;
515
9bf1a529
JO
516 if (counter->system_wide)
517 nthreads = 1;
518
779d0b99
JO
519 if (counter->per_pkg)
520 zero_per_pkg(counter);
521
9bf1a529
JO
522 for (thread = 0; thread < nthreads; thread++) {
523 for (cpu = 0; cpu < ncpus; cpu++) {
524 if (perf_evsel__read_cb(counter, cpu, thread, read_cb))
525 return -1;
526 }
f5b4a9c3 527 }
c52b12ed
ACM
528
529 return 0;
2996f5dd
IM
530}
531
13370a9b
SE
532static void print_interval(void)
533{
534 static int num_print_interval;
535 struct perf_evsel *counter;
536 struct perf_stat *ps;
537 struct timespec ts, rs;
538 char prefix[64];
539
86ee6e18 540 if (aggr_mode == AGGR_GLOBAL) {
0050f7aa 541 evlist__for_each(evsel_list, counter) {
13370a9b
SE
542 ps = counter->priv;
543 memset(ps->res_stats, 0, sizeof(ps->res_stats));
86ee6e18 544 read_counter_aggr(counter);
13370a9b 545 }
86ee6e18 546 } else {
0050f7aa 547 evlist__for_each(evsel_list, counter) {
13370a9b
SE
548 ps = counter->priv;
549 memset(ps->res_stats, 0, sizeof(ps->res_stats));
86ee6e18 550 read_counter(counter);
13370a9b
SE
551 }
552 }
86ee6e18 553
13370a9b
SE
554 clock_gettime(CLOCK_MONOTONIC, &ts);
555 diff_timespec(&rs, &ts, &ref_time);
556 sprintf(prefix, "%6lu.%09lu%s", rs.tv_sec, rs.tv_nsec, csv_sep);
557
558 if (num_print_interval == 0 && !csv_output) {
86ee6e18
SE
559 switch (aggr_mode) {
560 case AGGR_SOCKET:
410136f5 561 fprintf(output, "# time socket cpus counts %*s events\n", unit_width, "unit");
86ee6e18 562 break;
12c08a9f 563 case AGGR_CORE:
410136f5 564 fprintf(output, "# time core cpus counts %*s events\n", unit_width, "unit");
12c08a9f 565 break;
86ee6e18 566 case AGGR_NONE:
410136f5 567 fprintf(output, "# time CPU counts %*s events\n", unit_width, "unit");
86ee6e18
SE
568 break;
569 case AGGR_GLOBAL:
570 default:
410136f5 571 fprintf(output, "# time counts %*s events\n", unit_width, "unit");
86ee6e18 572 }
13370a9b
SE
573 }
574
575 if (++num_print_interval == 25)
576 num_print_interval = 0;
577
86ee6e18 578 switch (aggr_mode) {
12c08a9f 579 case AGGR_CORE:
86ee6e18
SE
580 case AGGR_SOCKET:
581 print_aggr(prefix);
582 break;
583 case AGGR_NONE:
0050f7aa 584 evlist__for_each(evsel_list, counter)
13370a9b 585 print_counter(counter, prefix);
86ee6e18
SE
586 break;
587 case AGGR_GLOBAL:
588 default:
0050f7aa 589 evlist__for_each(evsel_list, counter)
13370a9b
SE
590 print_counter_aggr(counter, prefix);
591 }
2bbf03f1
AK
592
593 fflush(output);
13370a9b
SE
594}
595
41191688
AK
596static void handle_initial_delay(void)
597{
598 struct perf_evsel *counter;
599
600 if (initial_delay) {
601 const int ncpus = cpu_map__nr(evsel_list->cpus),
602 nthreads = thread_map__nr(evsel_list->threads);
603
604 usleep(initial_delay * 1000);
0050f7aa 605 evlist__for_each(evsel_list, counter)
41191688
AK
606 perf_evsel__enable(counter, ncpus, nthreads);
607 }
608}
609
f33cbe72 610static volatile int workload_exec_errno;
6af206fd
ACM
611
612/*
613 * perf_evlist__prepare_workload will send a SIGUSR1
614 * if the fork fails, since we asked by setting its
615 * want_signal to true.
616 */
f33cbe72
ACM
617static void workload_exec_failed_signal(int signo __maybe_unused, siginfo_t *info,
618 void *ucontext __maybe_unused)
6af206fd 619{
f33cbe72 620 workload_exec_errno = info->si_value.sival_int;
6af206fd
ACM
621}
622
acf28922 623static int __run_perf_stat(int argc, const char **argv)
42202dd5 624{
56e52e85 625 char msg[512];
42202dd5 626 unsigned long long t0, t1;
cac21425 627 struct perf_evsel *counter;
13370a9b 628 struct timespec ts;
410136f5 629 size_t l;
42202dd5 630 int status = 0;
6be2850e 631 const bool forks = (argc > 0);
42202dd5 632
13370a9b
SE
633 if (interval) {
634 ts.tv_sec = interval / 1000;
635 ts.tv_nsec = (interval % 1000) * 1000000;
636 } else {
637 ts.tv_sec = 1;
638 ts.tv_nsec = 0;
639 }
640
60666c63 641 if (forks) {
735f7e0b
ACM
642 if (perf_evlist__prepare_workload(evsel_list, &target, argv, false,
643 workload_exec_failed_signal) < 0) {
acf28922
NK
644 perror("failed to prepare workload");
645 return -1;
60666c63 646 }
d20a47e7 647 child_pid = evsel_list->workload.pid;
051ae7f7
PM
648 }
649
6a4bb04c 650 if (group)
63dab225 651 perf_evlist__set_leader(evsel_list);
6a4bb04c 652
0050f7aa 653 evlist__for_each(evsel_list, counter) {
cac21425 654 if (create_perf_stat_counter(counter) < 0) {
979987a5
DA
655 /*
656 * PPC returns ENXIO for HW counters until 2.6.37
657 * (behavior changed with commit b0a873e).
658 */
38f6ae1e 659 if (errno == EINVAL || errno == ENOSYS ||
979987a5
DA
660 errno == ENOENT || errno == EOPNOTSUPP ||
661 errno == ENXIO) {
c63ca0c0
DA
662 if (verbose)
663 ui__warning("%s event is not supported by the kernel.\n",
7289f83c 664 perf_evsel__name(counter));
2cee77c4 665 counter->supported = false;
ede70290 666 continue;
c63ca0c0 667 }
ede70290 668
56e52e85
ACM
669 perf_evsel__open_strerror(counter, &target,
670 errno, msg, sizeof(msg));
671 ui__error("%s\n", msg);
672
48290609
ACM
673 if (child_pid != -1)
674 kill(child_pid, SIGTERM);
fceda7fe 675
48290609
ACM
676 return -1;
677 }
2cee77c4 678 counter->supported = true;
410136f5
SE
679
680 l = strlen(counter->unit);
681 if (l > unit_width)
682 unit_width = l;
084ab9f8 683 }
42202dd5 684
1491a632 685 if (perf_evlist__apply_filters(evsel_list)) {
cfd748ae 686 error("failed to set filter with %d (%s)\n", errno,
759e612b 687 strerror_r(errno, msg, sizeof(msg)));
cfd748ae
FW
688 return -1;
689 }
690
42202dd5
IM
691 /*
692 * Enable counters and exec the command:
693 */
694 t0 = rdclock();
13370a9b 695 clock_gettime(CLOCK_MONOTONIC, &ref_time);
42202dd5 696
60666c63 697 if (forks) {
acf28922 698 perf_evlist__start_workload(evsel_list);
41191688 699 handle_initial_delay();
acf28922 700
13370a9b
SE
701 if (interval) {
702 while (!waitpid(child_pid, &status, WNOHANG)) {
703 nanosleep(&ts, NULL);
704 print_interval();
705 }
706 }
60666c63 707 wait(&status);
6af206fd 708
f33cbe72
ACM
709 if (workload_exec_errno) {
710 const char *emsg = strerror_r(workload_exec_errno, msg, sizeof(msg));
711 pr_err("Workload failed: %s\n", emsg);
6af206fd 712 return -1;
f33cbe72 713 }
6af206fd 714
33e49ea7
AK
715 if (WIFSIGNALED(status))
716 psignal(WTERMSIG(status), argv[0]);
60666c63 717 } else {
41191688 718 handle_initial_delay();
13370a9b
SE
719 while (!done) {
720 nanosleep(&ts, NULL);
721 if (interval)
722 print_interval();
723 }
60666c63 724 }
42202dd5 725
42202dd5
IM
726 t1 = rdclock();
727
9e9772c4 728 update_stats(&walltime_nsecs_stats, t1 - t0);
42202dd5 729
86ee6e18 730 if (aggr_mode == AGGR_GLOBAL) {
0050f7aa 731 evlist__for_each(evsel_list, counter) {
f5b4a9c3 732 read_counter_aggr(counter);
7ae92e74 733 perf_evsel__close_fd(counter, perf_evsel__nr_cpus(counter),
b3a319d5 734 thread_map__nr(evsel_list->threads));
c52b12ed 735 }
86ee6e18 736 } else {
0050f7aa 737 evlist__for_each(evsel_list, counter) {
86ee6e18
SE
738 read_counter(counter);
739 perf_evsel__close_fd(counter, perf_evsel__nr_cpus(counter), 1);
740 }
f5b4a9c3 741 }
c52b12ed 742
42202dd5
IM
743 return WEXITSTATUS(status);
744}
745
41cde476 746static int run_perf_stat(int argc, const char **argv)
1f16c575
PZ
747{
748 int ret;
749
750 if (pre_cmd) {
751 ret = system(pre_cmd);
752 if (ret)
753 return ret;
754 }
755
756 if (sync_run)
757 sync();
758
759 ret = __run_perf_stat(argc, argv);
760 if (ret)
761 return ret;
762
763 if (post_cmd) {
764 ret = system(post_cmd);
765 if (ret)
766 return ret;
767 }
768
769 return ret;
770}
771
d73515c0
AK
772static void print_running(u64 run, u64 ena)
773{
774 if (csv_output) {
775 fprintf(output, "%s%" PRIu64 "%s%.2f",
776 csv_sep,
777 run,
778 csv_sep,
779 ena ? 100.0 * run / ena : 100.0);
780 } else if (run != ena) {
781 fprintf(output, " (%.2f%%)", 100.0 * run / ena);
782 }
783}
784
f99844cb
IM
785static void print_noise_pct(double total, double avg)
786{
0007ecea 787 double pct = rel_stddev_stats(total, avg);
f99844cb 788
3ae9a34d 789 if (csv_output)
4aa9015f 790 fprintf(output, "%s%.2f%%", csv_sep, pct);
a1bca6cc 791 else if (pct)
4aa9015f 792 fprintf(output, " ( +-%6.2f%% )", pct);
f99844cb
IM
793}
794
69aad6f1 795static void print_noise(struct perf_evsel *evsel, double avg)
42202dd5 796{
69aad6f1
ACM
797 struct perf_stat *ps;
798
849abde9
PZ
799 if (run_count == 1)
800 return;
801
69aad6f1 802 ps = evsel->priv;
f99844cb 803 print_noise_pct(stddev_stats(&ps->res_stats[0]), avg);
42202dd5
IM
804}
805
12c08a9f 806static void aggr_printout(struct perf_evsel *evsel, int id, int nr)
44175b6f 807{
86ee6e18 808 switch (aggr_mode) {
12c08a9f
SE
809 case AGGR_CORE:
810 fprintf(output, "S%d-C%*d%s%*d%s",
811 cpu_map__id_to_socket(id),
812 csv_output ? 0 : -8,
813 cpu_map__id_to_cpu(id),
814 csv_sep,
815 csv_output ? 0 : 4,
816 nr,
817 csv_sep);
818 break;
86ee6e18
SE
819 case AGGR_SOCKET:
820 fprintf(output, "S%*d%s%*d%s",
d7e7a451 821 csv_output ? 0 : -5,
12c08a9f 822 id,
d7e7a451
SE
823 csv_sep,
824 csv_output ? 0 : 4,
825 nr,
826 csv_sep);
86ee6e18
SE
827 break;
828 case AGGR_NONE:
829 fprintf(output, "CPU%*d%s",
d7470b6a 830 csv_output ? 0 : -4,
12c08a9f 831 perf_evsel__cpus(evsel)->map[id], csv_sep);
86ee6e18
SE
832 break;
833 case AGGR_GLOBAL:
834 default:
835 break;
836 }
837}
838
da88c7f7 839static void nsec_printout(int id, int nr, struct perf_evsel *evsel, double avg)
86ee6e18
SE
840{
841 double msecs = avg / 1e6;
410136f5 842 const char *fmt_v, *fmt_n;
4bbe5a61 843 char name[25];
86ee6e18 844
410136f5
SE
845 fmt_v = csv_output ? "%.6f%s" : "%18.6f%s";
846 fmt_n = csv_output ? "%s" : "%-25s";
847
da88c7f7 848 aggr_printout(evsel, id, nr);
d7470b6a 849
4bbe5a61
DA
850 scnprintf(name, sizeof(name), "%s%s",
851 perf_evsel__name(evsel), csv_output ? "" : " (msec)");
410136f5
SE
852
853 fprintf(output, fmt_v, msecs, csv_sep);
854
855 if (csv_output)
856 fprintf(output, "%s%s", evsel->unit, csv_sep);
857 else
858 fprintf(output, "%-*s%s", unit_width, evsel->unit, csv_sep);
859
860 fprintf(output, fmt_n, name);
d7470b6a 861
023695d9 862 if (evsel->cgrp)
4aa9015f 863 fprintf(output, "%s%s", csv_sep, evsel->cgrp->name);
023695d9 864
13370a9b 865 if (csv_output || interval)
d7470b6a 866 return;
44175b6f 867
daec78a0 868 if (perf_evsel__match(evsel, SOFTWARE, SW_TASK_CLOCK))
4aa9015f
SE
869 fprintf(output, " # %8.3f CPUs utilized ",
870 avg / avg_stats(&walltime_nsecs_stats));
9dac6a29
NK
871 else
872 fprintf(output, " ");
44175b6f
IM
873}
874
15e6392f
NK
875/* used for get_ratio_color() */
876enum grc_type {
877 GRC_STALLED_CYCLES_FE,
878 GRC_STALLED_CYCLES_BE,
879 GRC_CACHE_MISSES,
880 GRC_MAX_NR
881};
882
883static const char *get_ratio_color(enum grc_type type, double ratio)
884{
885 static const double grc_table[GRC_MAX_NR][3] = {
886 [GRC_STALLED_CYCLES_FE] = { 50.0, 30.0, 10.0 },
887 [GRC_STALLED_CYCLES_BE] = { 75.0, 50.0, 20.0 },
888 [GRC_CACHE_MISSES] = { 20.0, 10.0, 5.0 },
889 };
890 const char *color = PERF_COLOR_NORMAL;
891
892 if (ratio > grc_table[type][0])
893 color = PERF_COLOR_RED;
894 else if (ratio > grc_table[type][1])
895 color = PERF_COLOR_MAGENTA;
896 else if (ratio > grc_table[type][2])
897 color = PERF_COLOR_YELLOW;
898
899 return color;
900}
901
1d037ca1
IT
902static void print_stalled_cycles_frontend(int cpu,
903 struct perf_evsel *evsel
904 __maybe_unused, double avg)
d3d1e86d
IM
905{
906 double total, ratio = 0.0;
907 const char *color;
908
909 total = avg_stats(&runtime_cycles_stats[cpu]);
910
911 if (total)
912 ratio = avg / total * 100.0;
913
15e6392f 914 color = get_ratio_color(GRC_STALLED_CYCLES_FE, ratio);
d3d1e86d 915
4aa9015f
SE
916 fprintf(output, " # ");
917 color_fprintf(output, color, "%6.2f%%", ratio);
918 fprintf(output, " frontend cycles idle ");
d3d1e86d
IM
919}
920
1d037ca1
IT
921static void print_stalled_cycles_backend(int cpu,
922 struct perf_evsel *evsel
923 __maybe_unused, double avg)
a5d243d0
IM
924{
925 double total, ratio = 0.0;
926 const char *color;
927
928 total = avg_stats(&runtime_cycles_stats[cpu]);
929
930 if (total)
931 ratio = avg / total * 100.0;
932
15e6392f 933 color = get_ratio_color(GRC_STALLED_CYCLES_BE, ratio);
a5d243d0 934
4aa9015f
SE
935 fprintf(output, " # ");
936 color_fprintf(output, color, "%6.2f%%", ratio);
937 fprintf(output, " backend cycles idle ");
a5d243d0
IM
938}
939
1d037ca1
IT
940static void print_branch_misses(int cpu,
941 struct perf_evsel *evsel __maybe_unused,
942 double avg)
c78df6c1
IM
943{
944 double total, ratio = 0.0;
945 const char *color;
946
947 total = avg_stats(&runtime_branches_stats[cpu]);
948
949 if (total)
950 ratio = avg / total * 100.0;
951
15e6392f 952 color = get_ratio_color(GRC_CACHE_MISSES, ratio);
c78df6c1 953
4aa9015f
SE
954 fprintf(output, " # ");
955 color_fprintf(output, color, "%6.2f%%", ratio);
956 fprintf(output, " of all branches ");
c78df6c1
IM
957}
958
1d037ca1
IT
959static void print_l1_dcache_misses(int cpu,
960 struct perf_evsel *evsel __maybe_unused,
961 double avg)
8bb6c79f
IM
962{
963 double total, ratio = 0.0;
964 const char *color;
965
966 total = avg_stats(&runtime_l1_dcache_stats[cpu]);
967
968 if (total)
969 ratio = avg / total * 100.0;
970
15e6392f 971 color = get_ratio_color(GRC_CACHE_MISSES, ratio);
8bb6c79f 972
4aa9015f
SE
973 fprintf(output, " # ");
974 color_fprintf(output, color, "%6.2f%%", ratio);
975 fprintf(output, " of all L1-dcache hits ");
8bb6c79f
IM
976}
977
1d037ca1
IT
978static void print_l1_icache_misses(int cpu,
979 struct perf_evsel *evsel __maybe_unused,
980 double avg)
c3305257
IM
981{
982 double total, ratio = 0.0;
983 const char *color;
984
985 total = avg_stats(&runtime_l1_icache_stats[cpu]);
986
987 if (total)
988 ratio = avg / total * 100.0;
989
15e6392f 990 color = get_ratio_color(GRC_CACHE_MISSES, ratio);
c3305257 991
4aa9015f
SE
992 fprintf(output, " # ");
993 color_fprintf(output, color, "%6.2f%%", ratio);
994 fprintf(output, " of all L1-icache hits ");
c3305257
IM
995}
996
1d037ca1
IT
997static void print_dtlb_cache_misses(int cpu,
998 struct perf_evsel *evsel __maybe_unused,
999 double avg)
c3305257
IM
1000{
1001 double total, ratio = 0.0;
1002 const char *color;
1003
1004 total = avg_stats(&runtime_dtlb_cache_stats[cpu]);
1005
1006 if (total)
1007 ratio = avg / total * 100.0;
1008
15e6392f 1009 color = get_ratio_color(GRC_CACHE_MISSES, ratio);
c3305257 1010
4aa9015f
SE
1011 fprintf(output, " # ");
1012 color_fprintf(output, color, "%6.2f%%", ratio);
1013 fprintf(output, " of all dTLB cache hits ");
c3305257
IM
1014}
1015
1d037ca1
IT
1016static void print_itlb_cache_misses(int cpu,
1017 struct perf_evsel *evsel __maybe_unused,
1018 double avg)
c3305257
IM
1019{
1020 double total, ratio = 0.0;
1021 const char *color;
1022
1023 total = avg_stats(&runtime_itlb_cache_stats[cpu]);
1024
1025 if (total)
1026 ratio = avg / total * 100.0;
1027
15e6392f 1028 color = get_ratio_color(GRC_CACHE_MISSES, ratio);
c3305257 1029
4aa9015f
SE
1030 fprintf(output, " # ");
1031 color_fprintf(output, color, "%6.2f%%", ratio);
1032 fprintf(output, " of all iTLB cache hits ");
c3305257
IM
1033}
1034
1d037ca1
IT
1035static void print_ll_cache_misses(int cpu,
1036 struct perf_evsel *evsel __maybe_unused,
1037 double avg)
c3305257
IM
1038{
1039 double total, ratio = 0.0;
1040 const char *color;
1041
1042 total = avg_stats(&runtime_ll_cache_stats[cpu]);
1043
1044 if (total)
1045 ratio = avg / total * 100.0;
1046
15e6392f 1047 color = get_ratio_color(GRC_CACHE_MISSES, ratio);
c3305257 1048
4aa9015f
SE
1049 fprintf(output, " # ");
1050 color_fprintf(output, color, "%6.2f%%", ratio);
1051 fprintf(output, " of all LL-cache hits ");
c3305257
IM
1052}
1053
da88c7f7 1054static void abs_printout(int id, int nr, struct perf_evsel *evsel, double avg)
44175b6f 1055{
4cabc3d1 1056 double total, ratio = 0.0, total2;
410136f5 1057 double sc = evsel->scale;
d7470b6a 1058 const char *fmt;
da88c7f7 1059 int cpu = cpu_map__id_to_cpu(id);
d7470b6a 1060
410136f5
SE
1061 if (csv_output) {
1062 fmt = sc != 1.0 ? "%.2f%s" : "%.0f%s";
1063 } else {
1064 if (big_num)
1065 fmt = sc != 1.0 ? "%'18.2f%s" : "%'18.0f%s";
1066 else
1067 fmt = sc != 1.0 ? "%18.2f%s" : "%18.0f%s";
1068 }
f5b4a9c3 1069
da88c7f7 1070 aggr_printout(evsel, id, nr);
86ee6e18
SE
1071
1072 if (aggr_mode == AGGR_GLOBAL)
f5b4a9c3 1073 cpu = 0;
c7f7fea3 1074
410136f5
SE
1075 fprintf(output, fmt, avg, csv_sep);
1076
1077 if (evsel->unit)
1078 fprintf(output, "%-*s%s",
1079 csv_output ? 0 : unit_width,
1080 evsel->unit, csv_sep);
1081
1082 fprintf(output, "%-*s", csv_output ? 0 : 25, perf_evsel__name(evsel));
d7470b6a 1083
023695d9 1084 if (evsel->cgrp)
4aa9015f 1085 fprintf(output, "%s%s", csv_sep, evsel->cgrp->name);
023695d9 1086
13370a9b 1087 if (csv_output || interval)
d7470b6a 1088 return;
44175b6f 1089
daec78a0 1090 if (perf_evsel__match(evsel, HARDWARE, HW_INSTRUCTIONS)) {
f5b4a9c3 1091 total = avg_stats(&runtime_cycles_stats[cpu]);
3e7a0817 1092 if (total) {
c7f7fea3 1093 ratio = avg / total;
3e7a0817
RR
1094 fprintf(output, " # %5.2f insns per cycle ", ratio);
1095 }
d3d1e86d
IM
1096 total = avg_stats(&runtime_stalled_cycles_front_stats[cpu]);
1097 total = max(total, avg_stats(&runtime_stalled_cycles_back_stats[cpu]));
481f988a
IM
1098
1099 if (total && avg) {
1100 ratio = total / avg;
410136f5
SE
1101 fprintf(output, "\n");
1102 if (aggr_mode == AGGR_NONE)
1103 fprintf(output, " ");
1104 fprintf(output, " # %5.2f stalled cycles per insn", ratio);
481f988a
IM
1105 }
1106
daec78a0 1107 } else if (perf_evsel__match(evsel, HARDWARE, HW_BRANCH_MISSES) &&
f5b4a9c3 1108 runtime_branches_stats[cpu].n != 0) {
c78df6c1 1109 print_branch_misses(cpu, evsel, avg);
8bb6c79f
IM
1110 } else if (
1111 evsel->attr.type == PERF_TYPE_HW_CACHE &&
1112 evsel->attr.config == ( PERF_COUNT_HW_CACHE_L1D |
1113 ((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
1114 ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16)) &&
c6264def 1115 runtime_l1_dcache_stats[cpu].n != 0) {
8bb6c79f 1116 print_l1_dcache_misses(cpu, evsel, avg);
c3305257
IM
1117 } else if (
1118 evsel->attr.type == PERF_TYPE_HW_CACHE &&
1119 evsel->attr.config == ( PERF_COUNT_HW_CACHE_L1I |
1120 ((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
1121 ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16)) &&
1122 runtime_l1_icache_stats[cpu].n != 0) {
1123 print_l1_icache_misses(cpu, evsel, avg);
1124 } else if (
1125 evsel->attr.type == PERF_TYPE_HW_CACHE &&
1126 evsel->attr.config == ( PERF_COUNT_HW_CACHE_DTLB |
1127 ((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
1128 ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16)) &&
1129 runtime_dtlb_cache_stats[cpu].n != 0) {
1130 print_dtlb_cache_misses(cpu, evsel, avg);
1131 } else if (
1132 evsel->attr.type == PERF_TYPE_HW_CACHE &&
1133 evsel->attr.config == ( PERF_COUNT_HW_CACHE_ITLB |
1134 ((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
1135 ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16)) &&
1136 runtime_itlb_cache_stats[cpu].n != 0) {
1137 print_itlb_cache_misses(cpu, evsel, avg);
1138 } else if (
1139 evsel->attr.type == PERF_TYPE_HW_CACHE &&
1140 evsel->attr.config == ( PERF_COUNT_HW_CACHE_LL |
1141 ((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
1142 ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16)) &&
1143 runtime_ll_cache_stats[cpu].n != 0) {
1144 print_ll_cache_misses(cpu, evsel, avg);
d58f4c82
IM
1145 } else if (perf_evsel__match(evsel, HARDWARE, HW_CACHE_MISSES) &&
1146 runtime_cacherefs_stats[cpu].n != 0) {
1147 total = avg_stats(&runtime_cacherefs_stats[cpu]);
1148
1149 if (total)
1150 ratio = avg * 100 / total;
1151
4aa9015f 1152 fprintf(output, " # %8.3f %% of all cache refs ", ratio);
d58f4c82 1153
d3d1e86d
IM
1154 } else if (perf_evsel__match(evsel, HARDWARE, HW_STALLED_CYCLES_FRONTEND)) {
1155 print_stalled_cycles_frontend(cpu, evsel, avg);
129c04cb 1156 } else if (perf_evsel__match(evsel, HARDWARE, HW_STALLED_CYCLES_BACKEND)) {
d3d1e86d 1157 print_stalled_cycles_backend(cpu, evsel, avg);
481f988a 1158 } else if (perf_evsel__match(evsel, HARDWARE, HW_CPU_CYCLES)) {
f5b4a9c3 1159 total = avg_stats(&runtime_nsecs_stats[cpu]);
c7f7fea3 1160
c458fe62
RR
1161 if (total) {
1162 ratio = avg / total;
1163 fprintf(output, " # %8.3f GHz ", ratio);
1164 }
4cabc3d1
AK
1165 } else if (transaction_run &&
1166 perf_evsel__cmp(evsel, nth_evsel(T_CYCLES_IN_TX))) {
1167 total = avg_stats(&runtime_cycles_stats[cpu]);
1168 if (total)
1169 fprintf(output,
1170 " # %5.2f%% transactional cycles ",
1171 100.0 * (avg / total));
1172 } else if (transaction_run &&
1173 perf_evsel__cmp(evsel, nth_evsel(T_CYCLES_IN_TX_CP))) {
1174 total = avg_stats(&runtime_cycles_stats[cpu]);
1175 total2 = avg_stats(&runtime_cycles_in_tx_stats[cpu]);
1176 if (total2 < avg)
1177 total2 = avg;
1178 if (total)
1179 fprintf(output,
1180 " # %5.2f%% aborted cycles ",
1181 100.0 * ((total2-avg) / total));
1182 } else if (transaction_run &&
1183 perf_evsel__cmp(evsel, nth_evsel(T_TRANSACTION_START)) &&
1184 avg > 0 &&
1185 runtime_cycles_in_tx_stats[cpu].n != 0) {
1186 total = avg_stats(&runtime_cycles_in_tx_stats[cpu]);
1187
1188 if (total)
1189 ratio = total / avg;
1190
1191 fprintf(output, " # %8.0f cycles / transaction ", ratio);
1192 } else if (transaction_run &&
1193 perf_evsel__cmp(evsel, nth_evsel(T_ELISION_START)) &&
1194 avg > 0 &&
1195 runtime_cycles_in_tx_stats[cpu].n != 0) {
1196 total = avg_stats(&runtime_cycles_in_tx_stats[cpu]);
1197
1198 if (total)
1199 ratio = total / avg;
1200
1201 fprintf(output, " # %8.0f cycles / elision ", ratio);
481f988a 1202 } else if (runtime_nsecs_stats[cpu].n != 0) {
5fde2523
NK
1203 char unit = 'M';
1204
481f988a 1205 total = avg_stats(&runtime_nsecs_stats[cpu]);
11ba2b85
IM
1206
1207 if (total)
481f988a 1208 ratio = 1000.0 * avg / total;
5fde2523
NK
1209 if (ratio < 0.001) {
1210 ratio *= 1000;
1211 unit = 'K';
1212 }
11ba2b85 1213
5fde2523 1214 fprintf(output, " # %8.3f %c/sec ", ratio, unit);
a5d243d0 1215 } else {
4aa9015f 1216 fprintf(output, " ");
44175b6f 1217 }
44175b6f
IM
1218}
1219
86ee6e18 1220static void print_aggr(char *prefix)
d7e7a451
SE
1221{
1222 struct perf_evsel *counter;
582ec082 1223 int cpu, cpu2, s, s2, id, nr;
410136f5 1224 double uval;
d7e7a451 1225 u64 ena, run, val;
d7e7a451 1226
86ee6e18 1227 if (!(aggr_map || aggr_get_id))
d7e7a451
SE
1228 return;
1229
86ee6e18
SE
1230 for (s = 0; s < aggr_map->nr; s++) {
1231 id = aggr_map->map[s];
0050f7aa 1232 evlist__for_each(evsel_list, counter) {
d7e7a451
SE
1233 val = ena = run = 0;
1234 nr = 0;
1235 for (cpu = 0; cpu < perf_evsel__nr_cpus(counter); cpu++) {
582ec082
SE
1236 cpu2 = perf_evsel__cpus(counter)->map[cpu];
1237 s2 = aggr_get_id(evsel_list->cpus, cpu2);
86ee6e18 1238 if (s2 != id)
d7e7a451
SE
1239 continue;
1240 val += counter->counts->cpu[cpu].val;
1241 ena += counter->counts->cpu[cpu].ena;
1242 run += counter->counts->cpu[cpu].run;
1243 nr++;
1244 }
1245 if (prefix)
1246 fprintf(output, "%s", prefix);
1247
1248 if (run == 0 || ena == 0) {
582ec082 1249 aggr_printout(counter, id, nr);
86ee6e18 1250
410136f5 1251 fprintf(output, "%*s%s",
d7e7a451
SE
1252 csv_output ? 0 : 18,
1253 counter->supported ? CNTR_NOT_COUNTED : CNTR_NOT_SUPPORTED,
410136f5
SE
1254 csv_sep);
1255
1256 fprintf(output, "%-*s%s",
1257 csv_output ? 0 : unit_width,
1258 counter->unit, csv_sep);
1259
1260 fprintf(output, "%*s",
1261 csv_output ? 0 : -25,
d7e7a451 1262 perf_evsel__name(counter));
86ee6e18 1263
d7e7a451
SE
1264 if (counter->cgrp)
1265 fprintf(output, "%s%s",
1266 csv_sep, counter->cgrp->name);
1267
d73515c0 1268 print_running(run, ena);
d7e7a451
SE
1269 fputc('\n', output);
1270 continue;
1271 }
410136f5 1272 uval = val * counter->scale;
d7e7a451
SE
1273
1274 if (nsec_counter(counter))
410136f5 1275 nsec_printout(id, nr, counter, uval);
d7e7a451 1276 else
410136f5 1277 abs_printout(id, nr, counter, uval);
d7e7a451 1278
d73515c0 1279 if (!csv_output)
d7e7a451
SE
1280 print_noise(counter, 1.0);
1281
d73515c0 1282 print_running(run, ena);
d7e7a451
SE
1283 fputc('\n', output);
1284 }
1285 }
1286}
1287
2996f5dd
IM
1288/*
1289 * Print out the results of a single counter:
f5b4a9c3 1290 * aggregated counts in system-wide mode
2996f5dd 1291 */
13370a9b 1292static void print_counter_aggr(struct perf_evsel *counter, char *prefix)
2996f5dd 1293{
69aad6f1
ACM
1294 struct perf_stat *ps = counter->priv;
1295 double avg = avg_stats(&ps->res_stats[0]);
c52b12ed 1296 int scaled = counter->counts->scaled;
410136f5 1297 double uval;
d73515c0
AK
1298 double avg_enabled, avg_running;
1299
1300 avg_enabled = avg_stats(&ps->res_stats[1]);
1301 avg_running = avg_stats(&ps->res_stats[2]);
2996f5dd 1302
13370a9b
SE
1303 if (prefix)
1304 fprintf(output, "%s", prefix);
1305
3b4331d9 1306 if (scaled == -1 || !counter->supported) {
410136f5 1307 fprintf(output, "%*s%s",
d7470b6a 1308 csv_output ? 0 : 18,
2cee77c4 1309 counter->supported ? CNTR_NOT_COUNTED : CNTR_NOT_SUPPORTED,
410136f5
SE
1310 csv_sep);
1311 fprintf(output, "%-*s%s",
1312 csv_output ? 0 : unit_width,
1313 counter->unit, csv_sep);
1314 fprintf(output, "%*s",
1315 csv_output ? 0 : -25,
7289f83c 1316 perf_evsel__name(counter));
023695d9
SE
1317
1318 if (counter->cgrp)
4aa9015f 1319 fprintf(output, "%s%s", csv_sep, counter->cgrp->name);
023695d9 1320
d73515c0 1321 print_running(avg_running, avg_enabled);
4aa9015f 1322 fputc('\n', output);
2996f5dd
IM
1323 return;
1324 }
c04f5e5d 1325
410136f5
SE
1326 uval = avg * counter->scale;
1327
44175b6f 1328 if (nsec_counter(counter))
410136f5 1329 nsec_printout(-1, 0, counter, uval);
44175b6f 1330 else
410136f5 1331 abs_printout(-1, 0, counter, uval);
849abde9 1332
3ae9a34d
ZH
1333 print_noise(counter, avg);
1334
d73515c0 1335 print_running(avg_running, avg_enabled);
4aa9015f 1336 fprintf(output, "\n");
c04f5e5d
IM
1337}
1338
f5b4a9c3
SE
1339/*
1340 * Print out the results of a single counter:
1341 * does not use aggregated count in system-wide
1342 */
13370a9b 1343static void print_counter(struct perf_evsel *counter, char *prefix)
f5b4a9c3
SE
1344{
1345 u64 ena, run, val;
410136f5 1346 double uval;
f5b4a9c3
SE
1347 int cpu;
1348
7ae92e74 1349 for (cpu = 0; cpu < perf_evsel__nr_cpus(counter); cpu++) {
c52b12ed
ACM
1350 val = counter->counts->cpu[cpu].val;
1351 ena = counter->counts->cpu[cpu].ena;
1352 run = counter->counts->cpu[cpu].run;
13370a9b
SE
1353
1354 if (prefix)
1355 fprintf(output, "%s", prefix);
1356
f5b4a9c3 1357 if (run == 0 || ena == 0) {
410136f5 1358 fprintf(output, "CPU%*d%s%*s%s",
d7470b6a 1359 csv_output ? 0 : -4,
7ae92e74 1360 perf_evsel__cpus(counter)->map[cpu], csv_sep,
d7470b6a 1361 csv_output ? 0 : 18,
2cee77c4 1362 counter->supported ? CNTR_NOT_COUNTED : CNTR_NOT_SUPPORTED,
410136f5
SE
1363 csv_sep);
1364
1365 fprintf(output, "%-*s%s",
1366 csv_output ? 0 : unit_width,
1367 counter->unit, csv_sep);
1368
1369 fprintf(output, "%*s",
1370 csv_output ? 0 : -25,
1371 perf_evsel__name(counter));
f5b4a9c3 1372
023695d9 1373 if (counter->cgrp)
4aa9015f
SE
1374 fprintf(output, "%s%s",
1375 csv_sep, counter->cgrp->name);
023695d9 1376
d73515c0 1377 print_running(run, ena);
4aa9015f 1378 fputc('\n', output);
f5b4a9c3
SE
1379 continue;
1380 }
1381
410136f5
SE
1382 uval = val * counter->scale;
1383
f5b4a9c3 1384 if (nsec_counter(counter))
410136f5 1385 nsec_printout(cpu, 0, counter, uval);
f5b4a9c3 1386 else
410136f5 1387 abs_printout(cpu, 0, counter, uval);
f5b4a9c3 1388
d73515c0 1389 if (!csv_output)
d7470b6a 1390 print_noise(counter, 1.0);
d73515c0 1391 print_running(run, ena);
f5b4a9c3 1392
4aa9015f 1393 fputc('\n', output);
f5b4a9c3
SE
1394 }
1395}
1396
42202dd5
IM
1397static void print_stat(int argc, const char **argv)
1398{
69aad6f1
ACM
1399 struct perf_evsel *counter;
1400 int i;
42202dd5 1401
ddcacfa0
IM
1402 fflush(stdout);
1403
d7470b6a 1404 if (!csv_output) {
4aa9015f
SE
1405 fprintf(output, "\n");
1406 fprintf(output, " Performance counter stats for ");
62d3b617
DA
1407 if (target.system_wide)
1408 fprintf(output, "\'system wide");
1409 else if (target.cpu_list)
1410 fprintf(output, "\'CPU(s) %s", target.cpu_list);
602ad878 1411 else if (!target__has_task(&target)) {
4aa9015f 1412 fprintf(output, "\'%s", argv[0]);
d7470b6a 1413 for (i = 1; i < argc; i++)
4aa9015f 1414 fprintf(output, " %s", argv[i]);
20f946b4
NK
1415 } else if (target.pid)
1416 fprintf(output, "process id \'%s", target.pid);
d7470b6a 1417 else
20f946b4 1418 fprintf(output, "thread id \'%s", target.tid);
44db76c8 1419
4aa9015f 1420 fprintf(output, "\'");
d7470b6a 1421 if (run_count > 1)
4aa9015f
SE
1422 fprintf(output, " (%d runs)", run_count);
1423 fprintf(output, ":\n\n");
d7470b6a 1424 }
2996f5dd 1425
86ee6e18 1426 switch (aggr_mode) {
12c08a9f 1427 case AGGR_CORE:
86ee6e18
SE
1428 case AGGR_SOCKET:
1429 print_aggr(NULL);
1430 break;
1431 case AGGR_GLOBAL:
0050f7aa 1432 evlist__for_each(evsel_list, counter)
13370a9b 1433 print_counter_aggr(counter, NULL);
86ee6e18
SE
1434 break;
1435 case AGGR_NONE:
0050f7aa 1436 evlist__for_each(evsel_list, counter)
86ee6e18
SE
1437 print_counter(counter, NULL);
1438 break;
1439 default:
1440 break;
f5b4a9c3 1441 }
ddcacfa0 1442
d7470b6a 1443 if (!csv_output) {
c3305257 1444 if (!null_run)
4aa9015f
SE
1445 fprintf(output, "\n");
1446 fprintf(output, " %17.9f seconds time elapsed",
d7470b6a
SE
1447 avg_stats(&walltime_nsecs_stats)/1e9);
1448 if (run_count > 1) {
4aa9015f 1449 fprintf(output, " ");
f99844cb
IM
1450 print_noise_pct(stddev_stats(&walltime_nsecs_stats),
1451 avg_stats(&walltime_nsecs_stats));
d7470b6a 1452 }
4aa9015f 1453 fprintf(output, "\n\n");
566747e6 1454 }
ddcacfa0
IM
1455}
1456
f7b7c26e
PZ
1457static volatile int signr = -1;
1458
5242519b 1459static void skip_signal(int signo)
ddcacfa0 1460{
13370a9b 1461 if ((child_pid == -1) || interval)
60666c63
LW
1462 done = 1;
1463
f7b7c26e 1464 signr = signo;
d07f0b12
SE
1465 /*
1466 * render child_pid harmless
1467 * won't send SIGTERM to a random
1468 * process in case of race condition
1469 * and fast PID recycling
1470 */
1471 child_pid = -1;
f7b7c26e
PZ
1472}
1473
1474static void sig_atexit(void)
1475{
d07f0b12
SE
1476 sigset_t set, oset;
1477
1478 /*
1479 * avoid race condition with SIGCHLD handler
1480 * in skip_signal() which is modifying child_pid
1481 * goal is to avoid send SIGTERM to a random
1482 * process
1483 */
1484 sigemptyset(&set);
1485 sigaddset(&set, SIGCHLD);
1486 sigprocmask(SIG_BLOCK, &set, &oset);
1487
933da83a
CW
1488 if (child_pid != -1)
1489 kill(child_pid, SIGTERM);
1490
d07f0b12
SE
1491 sigprocmask(SIG_SETMASK, &oset, NULL);
1492
f7b7c26e
PZ
1493 if (signr == -1)
1494 return;
1495
1496 signal(signr, SIG_DFL);
1497 kill(getpid(), signr);
5242519b
IM
1498}
1499
1d037ca1
IT
1500static int stat__set_big_num(const struct option *opt __maybe_unused,
1501 const char *s __maybe_unused, int unset)
d7470b6a
SE
1502{
1503 big_num_opt = unset ? 0 : 1;
1504 return 0;
1505}
1506
86ee6e18
SE
1507static int perf_stat_init_aggr_mode(void)
1508{
1509 switch (aggr_mode) {
1510 case AGGR_SOCKET:
1511 if (cpu_map__build_socket_map(evsel_list->cpus, &aggr_map)) {
1512 perror("cannot build socket map");
1513 return -1;
1514 }
1515 aggr_get_id = cpu_map__get_socket;
1516 break;
12c08a9f
SE
1517 case AGGR_CORE:
1518 if (cpu_map__build_core_map(evsel_list->cpus, &aggr_map)) {
1519 perror("cannot build core map");
1520 return -1;
1521 }
1522 aggr_get_id = cpu_map__get_core;
1523 break;
86ee6e18
SE
1524 case AGGR_NONE:
1525 case AGGR_GLOBAL:
1526 default:
1527 break;
1528 }
1529 return 0;
1530}
1531
4cabc3d1
AK
1532static int setup_events(const char * const *attrs, unsigned len)
1533{
1534 unsigned i;
1535
1536 for (i = 0; i < len; i++) {
1537 if (parse_events(evsel_list, attrs[i]))
1538 return -1;
1539 }
1540 return 0;
1541}
86ee6e18 1542
2cba3ffb
IM
1543/*
1544 * Add default attributes, if there were no attributes specified or
1545 * if -d/--detailed, -d -d or -d -d -d is used:
1546 */
1547static int add_default_attributes(void)
1548{
b070a547
ACM
1549 struct perf_event_attr default_attrs[] = {
1550
1551 { .type = PERF_TYPE_SOFTWARE, .config = PERF_COUNT_SW_TASK_CLOCK },
1552 { .type = PERF_TYPE_SOFTWARE, .config = PERF_COUNT_SW_CONTEXT_SWITCHES },
1553 { .type = PERF_TYPE_SOFTWARE, .config = PERF_COUNT_SW_CPU_MIGRATIONS },
1554 { .type = PERF_TYPE_SOFTWARE, .config = PERF_COUNT_SW_PAGE_FAULTS },
1555
1556 { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_CPU_CYCLES },
1557 { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_STALLED_CYCLES_FRONTEND },
1558 { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_STALLED_CYCLES_BACKEND },
1559 { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_INSTRUCTIONS },
1560 { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS },
1561 { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_BRANCH_MISSES },
1562
1563};
1564
1565/*
1566 * Detailed stats (-d), covering the L1 and last level data caches:
1567 */
1568 struct perf_event_attr detailed_attrs[] = {
1569
1570 { .type = PERF_TYPE_HW_CACHE,
1571 .config =
1572 PERF_COUNT_HW_CACHE_L1D << 0 |
1573 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1574 (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) },
1575
1576 { .type = PERF_TYPE_HW_CACHE,
1577 .config =
1578 PERF_COUNT_HW_CACHE_L1D << 0 |
1579 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1580 (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) },
1581
1582 { .type = PERF_TYPE_HW_CACHE,
1583 .config =
1584 PERF_COUNT_HW_CACHE_LL << 0 |
1585 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1586 (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) },
1587
1588 { .type = PERF_TYPE_HW_CACHE,
1589 .config =
1590 PERF_COUNT_HW_CACHE_LL << 0 |
1591 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1592 (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) },
1593};
1594
1595/*
1596 * Very detailed stats (-d -d), covering the instruction cache and the TLB caches:
1597 */
1598 struct perf_event_attr very_detailed_attrs[] = {
1599
1600 { .type = PERF_TYPE_HW_CACHE,
1601 .config =
1602 PERF_COUNT_HW_CACHE_L1I << 0 |
1603 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1604 (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) },
1605
1606 { .type = PERF_TYPE_HW_CACHE,
1607 .config =
1608 PERF_COUNT_HW_CACHE_L1I << 0 |
1609 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1610 (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) },
1611
1612 { .type = PERF_TYPE_HW_CACHE,
1613 .config =
1614 PERF_COUNT_HW_CACHE_DTLB << 0 |
1615 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1616 (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) },
1617
1618 { .type = PERF_TYPE_HW_CACHE,
1619 .config =
1620 PERF_COUNT_HW_CACHE_DTLB << 0 |
1621 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1622 (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) },
1623
1624 { .type = PERF_TYPE_HW_CACHE,
1625 .config =
1626 PERF_COUNT_HW_CACHE_ITLB << 0 |
1627 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1628 (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) },
1629
1630 { .type = PERF_TYPE_HW_CACHE,
1631 .config =
1632 PERF_COUNT_HW_CACHE_ITLB << 0 |
1633 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1634 (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) },
1635
1636};
1637
1638/*
1639 * Very, very detailed stats (-d -d -d), adding prefetch events:
1640 */
1641 struct perf_event_attr very_very_detailed_attrs[] = {
1642
1643 { .type = PERF_TYPE_HW_CACHE,
1644 .config =
1645 PERF_COUNT_HW_CACHE_L1D << 0 |
1646 (PERF_COUNT_HW_CACHE_OP_PREFETCH << 8) |
1647 (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) },
1648
1649 { .type = PERF_TYPE_HW_CACHE,
1650 .config =
1651 PERF_COUNT_HW_CACHE_L1D << 0 |
1652 (PERF_COUNT_HW_CACHE_OP_PREFETCH << 8) |
1653 (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) },
1654};
1655
2cba3ffb
IM
1656 /* Set attrs if no event is selected and !null_run: */
1657 if (null_run)
1658 return 0;
1659
4cabc3d1
AK
1660 if (transaction_run) {
1661 int err;
1662 if (pmu_have_event("cpu", "cycles-ct") &&
1663 pmu_have_event("cpu", "el-start"))
1664 err = setup_events(transaction_attrs,
1665 ARRAY_SIZE(transaction_attrs));
1666 else
1667 err = setup_events(transaction_limited_attrs,
1668 ARRAY_SIZE(transaction_limited_attrs));
1669 if (err < 0) {
1670 fprintf(stderr, "Cannot set up transaction events\n");
1671 return -1;
1672 }
1673 return 0;
1674 }
1675
2cba3ffb 1676 if (!evsel_list->nr_entries) {
79695e1b 1677 if (perf_evlist__add_default_attrs(evsel_list, default_attrs) < 0)
50d08e47 1678 return -1;
2cba3ffb
IM
1679 }
1680
1681 /* Detailed events get appended to the event list: */
1682
1683 if (detailed_run < 1)
1684 return 0;
1685
1686 /* Append detailed run extra attributes: */
79695e1b 1687 if (perf_evlist__add_default_attrs(evsel_list, detailed_attrs) < 0)
50d08e47 1688 return -1;
2cba3ffb
IM
1689
1690 if (detailed_run < 2)
1691 return 0;
1692
1693 /* Append very detailed run extra attributes: */
79695e1b 1694 if (perf_evlist__add_default_attrs(evsel_list, very_detailed_attrs) < 0)
50d08e47 1695 return -1;
2cba3ffb
IM
1696
1697 if (detailed_run < 3)
1698 return 0;
1699
1700 /* Append very, very detailed run extra attributes: */
79695e1b 1701 return perf_evlist__add_default_attrs(evsel_list, very_very_detailed_attrs);
2cba3ffb
IM
1702}
1703
1d037ca1 1704int cmd_stat(int argc, const char **argv, const char *prefix __maybe_unused)
5242519b 1705{
1f16c575 1706 bool append_file = false;
b070a547
ACM
1707 int output_fd = 0;
1708 const char *output_name = NULL;
1709 const struct option options[] = {
4cabc3d1
AK
1710 OPT_BOOLEAN('T', "transaction", &transaction_run,
1711 "hardware transaction statistics"),
b070a547
ACM
1712 OPT_CALLBACK('e', "event", &evsel_list, "event",
1713 "event selector. use 'perf list' to list available events",
1714 parse_events_option),
1715 OPT_CALLBACK(0, "filter", &evsel_list, "filter",
1716 "event filter", parse_filter),
1717 OPT_BOOLEAN('i', "no-inherit", &no_inherit,
1718 "child tasks do not inherit counters"),
1719 OPT_STRING('p', "pid", &target.pid, "pid",
1720 "stat events on existing process id"),
1721 OPT_STRING('t', "tid", &target.tid, "tid",
1722 "stat events on existing thread id"),
1723 OPT_BOOLEAN('a', "all-cpus", &target.system_wide,
1724 "system-wide collection from all CPUs"),
1725 OPT_BOOLEAN('g', "group", &group,
1726 "put the counters into a counter group"),
1727 OPT_BOOLEAN('c', "scale", &scale, "scale/normalize counters"),
1728 OPT_INCR('v', "verbose", &verbose,
1729 "be more verbose (show counter open errors, etc)"),
1730 OPT_INTEGER('r', "repeat", &run_count,
a7e191c3 1731 "repeat command and print average + stddev (max: 100, forever: 0)"),
b070a547
ACM
1732 OPT_BOOLEAN('n', "null", &null_run,
1733 "null run - dont start any counters"),
1734 OPT_INCR('d', "detailed", &detailed_run,
1735 "detailed run - start a lot of events"),
1736 OPT_BOOLEAN('S', "sync", &sync_run,
1737 "call sync() before starting a run"),
48000a1a 1738 OPT_CALLBACK_NOOPT('B', "big-num", NULL, NULL,
b070a547
ACM
1739 "print large numbers with thousands\' separators",
1740 stat__set_big_num),
1741 OPT_STRING('C', "cpu", &target.cpu_list, "cpu",
1742 "list of cpus to monitor in system-wide"),
86ee6e18
SE
1743 OPT_SET_UINT('A', "no-aggr", &aggr_mode,
1744 "disable CPU count aggregation", AGGR_NONE),
b070a547
ACM
1745 OPT_STRING('x', "field-separator", &csv_sep, "separator",
1746 "print counts with custom separator"),
1747 OPT_CALLBACK('G', "cgroup", &evsel_list, "name",
1748 "monitor event in cgroup name only", parse_cgroups),
1749 OPT_STRING('o', "output", &output_name, "file", "output file name"),
1750 OPT_BOOLEAN(0, "append", &append_file, "append to the output file"),
1751 OPT_INTEGER(0, "log-fd", &output_fd,
1752 "log output to fd, instead of stderr"),
1f16c575
PZ
1753 OPT_STRING(0, "pre", &pre_cmd, "command",
1754 "command to run prior to the measured command"),
1755 OPT_STRING(0, "post", &post_cmd, "command",
1756 "command to run after to the measured command"),
13370a9b
SE
1757 OPT_UINTEGER('I', "interval-print", &interval,
1758 "print counts at regular interval in ms (>= 100)"),
d4304958 1759 OPT_SET_UINT(0, "per-socket", &aggr_mode,
86ee6e18 1760 "aggregate counts per processor socket", AGGR_SOCKET),
12c08a9f
SE
1761 OPT_SET_UINT(0, "per-core", &aggr_mode,
1762 "aggregate counts per physical processor core", AGGR_CORE),
41191688
AK
1763 OPT_UINTEGER('D', "delay", &initial_delay,
1764 "ms to wait before starting measurement after program start"),
b070a547
ACM
1765 OPT_END()
1766 };
1767 const char * const stat_usage[] = {
1768 "perf stat [<options>] [<command>]",
1769 NULL
1770 };
cc03c542 1771 int status = -EINVAL, run_idx;
4aa9015f 1772 const char *mode;
42202dd5 1773
5af52b51
SE
1774 setlocale(LC_ALL, "");
1775
334fe7a3 1776 evsel_list = perf_evlist__new();
361c99a6
ACM
1777 if (evsel_list == NULL)
1778 return -ENOMEM;
1779
a0541234
AB
1780 argc = parse_options(argc, argv, options, stat_usage,
1781 PARSE_OPT_STOP_AT_NON_OPTION);
d7470b6a 1782
4aa9015f
SE
1783 output = stderr;
1784 if (output_name && strcmp(output_name, "-"))
1785 output = NULL;
1786
56f3bae7
JC
1787 if (output_name && output_fd) {
1788 fprintf(stderr, "cannot use both --output and --log-fd\n");
cc03c542
NK
1789 parse_options_usage(stat_usage, options, "o", 1);
1790 parse_options_usage(NULL, options, "log-fd", 0);
1791 goto out;
56f3bae7 1792 }
fc3e4d07
SE
1793
1794 if (output_fd < 0) {
1795 fprintf(stderr, "argument to --log-fd must be a > 0\n");
cc03c542
NK
1796 parse_options_usage(stat_usage, options, "log-fd", 0);
1797 goto out;
fc3e4d07
SE
1798 }
1799
4aa9015f
SE
1800 if (!output) {
1801 struct timespec tm;
1802 mode = append_file ? "a" : "w";
1803
1804 output = fopen(output_name, mode);
1805 if (!output) {
1806 perror("failed to create output file");
fceda7fe 1807 return -1;
4aa9015f
SE
1808 }
1809 clock_gettime(CLOCK_REALTIME, &tm);
1810 fprintf(output, "# started on %s\n", ctime(&tm.tv_sec));
fc3e4d07 1811 } else if (output_fd > 0) {
56f3bae7
JC
1812 mode = append_file ? "a" : "w";
1813 output = fdopen(output_fd, mode);
1814 if (!output) {
1815 perror("Failed opening logfd");
1816 return -errno;
1817 }
4aa9015f
SE
1818 }
1819
d4ffd04d 1820 if (csv_sep) {
d7470b6a 1821 csv_output = true;
d4ffd04d
JC
1822 if (!strcmp(csv_sep, "\\t"))
1823 csv_sep = "\t";
1824 } else
d7470b6a
SE
1825 csv_sep = DEFAULT_SEPARATOR;
1826
1827 /*
1828 * let the spreadsheet do the pretty-printing
1829 */
1830 if (csv_output) {
61a9f324 1831 /* User explicitly passed -B? */
d7470b6a
SE
1832 if (big_num_opt == 1) {
1833 fprintf(stderr, "-B option not supported with -x\n");
cc03c542
NK
1834 parse_options_usage(stat_usage, options, "B", 1);
1835 parse_options_usage(NULL, options, "x", 1);
1836 goto out;
d7470b6a
SE
1837 } else /* Nope, so disable big number formatting */
1838 big_num = false;
1839 } else if (big_num_opt == 0) /* User passed --no-big-num */
1840 big_num = false;
1841
602ad878 1842 if (!argc && target__none(&target))
5242519b 1843 usage_with_options(stat_usage, options);
ac3063bd 1844
a7e191c3 1845 if (run_count < 0) {
cc03c542
NK
1846 pr_err("Run count must be a positive number\n");
1847 parse_options_usage(stat_usage, options, "r", 1);
1848 goto out;
a7e191c3
FD
1849 } else if (run_count == 0) {
1850 forever = true;
1851 run_count = 1;
1852 }
ddcacfa0 1853
023695d9 1854 /* no_aggr, cgroup are for system-wide only */
602ad878
ACM
1855 if ((aggr_mode != AGGR_GLOBAL || nr_cgroups) &&
1856 !target__has_cpu(&target)) {
023695d9
SE
1857 fprintf(stderr, "both cgroup and no-aggregation "
1858 "modes only available in system-wide mode\n");
1859
cc03c542
NK
1860 parse_options_usage(stat_usage, options, "G", 1);
1861 parse_options_usage(NULL, options, "A", 1);
1862 parse_options_usage(NULL, options, "a", 1);
1863 goto out;
d7e7a451
SE
1864 }
1865
2cba3ffb
IM
1866 if (add_default_attributes())
1867 goto out;
ddcacfa0 1868
602ad878 1869 target__validate(&target);
5c98d466 1870
77a6f014 1871 if (perf_evlist__create_maps(evsel_list, &target) < 0) {
602ad878 1872 if (target__has_task(&target)) {
77a6f014 1873 pr_err("Problems finding threads of monitor\n");
cc03c542
NK
1874 parse_options_usage(stat_usage, options, "p", 1);
1875 parse_options_usage(NULL, options, "t", 1);
602ad878 1876 } else if (target__has_cpu(&target)) {
77a6f014 1877 perror("failed to parse CPUs map");
cc03c542
NK
1878 parse_options_usage(stat_usage, options, "C", 1);
1879 parse_options_usage(NULL, options, "a", 1);
1880 }
1881 goto out;
60d567e2 1882 }
13370a9b
SE
1883 if (interval && interval < 100) {
1884 pr_err("print interval must be >= 100ms\n");
cc03c542 1885 parse_options_usage(stat_usage, options, "I", 1);
03ad9747 1886 goto out;
13370a9b 1887 }
c45c6ea2 1888
d134ffb9 1889 if (perf_evlist__alloc_stats(evsel_list, interval))
03ad9747 1890 goto out;
d6d901c2 1891
86ee6e18 1892 if (perf_stat_init_aggr_mode())
03ad9747 1893 goto out;
86ee6e18 1894
58d7e993
IM
1895 /*
1896 * We dont want to block the signals - that would cause
1897 * child tasks to inherit that and Ctrl-C would not work.
1898 * What we want is for Ctrl-C to work in the exec()-ed
1899 * task, but being ignored by perf stat itself:
1900 */
f7b7c26e 1901 atexit(sig_atexit);
a7e191c3
FD
1902 if (!forever)
1903 signal(SIGINT, skip_signal);
13370a9b 1904 signal(SIGCHLD, skip_signal);
58d7e993
IM
1905 signal(SIGALRM, skip_signal);
1906 signal(SIGABRT, skip_signal);
1907
42202dd5 1908 status = 0;
a7e191c3 1909 for (run_idx = 0; forever || run_idx < run_count; run_idx++) {
42202dd5 1910 if (run_count != 1 && verbose)
4aa9015f
SE
1911 fprintf(output, "[ perf stat: executing run #%d ... ]\n",
1912 run_idx + 1);
f9cef0a9 1913
42202dd5 1914 status = run_perf_stat(argc, argv);
a7e191c3
FD
1915 if (forever && status != -1) {
1916 print_stat(argc, argv);
d134ffb9 1917 perf_stat__reset_stats(evsel_list);
a7e191c3 1918 }
42202dd5
IM
1919 }
1920
a7e191c3 1921 if (!forever && status != -1 && !interval)
084ab9f8 1922 print_stat(argc, argv);
d134ffb9
ACM
1923
1924 perf_evlist__free_stats(evsel_list);
0015e2e1
ACM
1925out:
1926 perf_evlist__delete(evsel_list);
42202dd5 1927 return status;
ddcacfa0 1928}
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