KVM: arm64: vgic-its: Handle errors from vgic_add_lpi
[deliverable/linux.git] / virt / kvm / arm / vgic / vgic.c
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1/*
2 * Copyright (C) 2015, 2016 ARM Ltd.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#include <linux/kvm.h>
18#include <linux/kvm_host.h>
8e444745 19#include <linux/list_sort.h>
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20
21#include "vgic.h"
22
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23#define CREATE_TRACE_POINTS
24#include "../trace.h"
25
26#ifdef CONFIG_DEBUG_SPINLOCK
27#define DEBUG_SPINLOCK_BUG_ON(p) BUG_ON(p)
28#else
29#define DEBUG_SPINLOCK_BUG_ON(p)
30#endif
31
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32struct vgic_global __section(.hyp.text) kvm_vgic_global_state;
33
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34/*
35 * Locking order is always:
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36 * its->cmd_lock (mutex)
37 * its->its_lock (mutex)
38 * vgic_cpu->ap_list_lock
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39 * kvm->lpi_list_lock
40 * vgic_irq->irq_lock
81eeb95d 41 *
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42 * If you need to take multiple locks, always take the upper lock first,
43 * then the lower ones, e.g. first take the its_lock, then the irq_lock.
44 * If you are already holding a lock and need to take a higher one, you
45 * have to drop the lower ranking lock first and re-aquire it after having
46 * taken the upper one.
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47 *
48 * When taking more than one ap_list_lock at the same time, always take the
49 * lowest numbered VCPU's ap_list_lock first, so:
50 * vcpuX->vcpu_id < vcpuY->vcpu_id:
51 * spin_lock(vcpuX->arch.vgic_cpu.ap_list_lock);
52 * spin_lock(vcpuY->arch.vgic_cpu.ap_list_lock);
53 */
54
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55/*
56 * Iterate over the VM's list of mapped LPIs to find the one with a
57 * matching interrupt ID and return a reference to the IRQ structure.
58 */
59static struct vgic_irq *vgic_get_lpi(struct kvm *kvm, u32 intid)
60{
61 struct vgic_dist *dist = &kvm->arch.vgic;
62 struct vgic_irq *irq = NULL;
63
64 spin_lock(&dist->lpi_list_lock);
65
66 list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) {
67 if (irq->intid != intid)
68 continue;
69
70 /*
71 * This increases the refcount, the caller is expected to
72 * call vgic_put_irq() later once it's finished with the IRQ.
73 */
d97594e6 74 vgic_get_irq_kref(irq);
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75 goto out_unlock;
76 }
77 irq = NULL;
78
79out_unlock:
80 spin_unlock(&dist->lpi_list_lock);
81
82 return irq;
83}
84
85/*
86 * This looks up the virtual interrupt ID to get the corresponding
87 * struct vgic_irq. It also increases the refcount, so any caller is expected
88 * to call vgic_put_irq() once it's finished with this IRQ.
89 */
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90struct vgic_irq *vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu,
91 u32 intid)
92{
93 /* SGIs and PPIs */
94 if (intid <= VGIC_MAX_PRIVATE)
95 return &vcpu->arch.vgic_cpu.private_irqs[intid];
96
97 /* SPIs */
98 if (intid <= VGIC_MAX_SPI)
99 return &kvm->arch.vgic.spis[intid - VGIC_NR_PRIVATE_IRQS];
100
3802411d 101 /* LPIs */
64a959d6 102 if (intid >= VGIC_MIN_LPI)
3802411d 103 return vgic_get_lpi(kvm, intid);
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104
105 WARN(1, "Looking up struct vgic_irq for reserved INTID");
106 return NULL;
107}
81eeb95d 108
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109/*
110 * We can't do anything in here, because we lack the kvm pointer to
111 * lock and remove the item from the lpi_list. So we keep this function
112 * empty and use the return value of kref_put() to trigger the freeing.
113 */
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114static void vgic_irq_release(struct kref *ref)
115{
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116}
117
118void vgic_put_irq(struct kvm *kvm, struct vgic_irq *irq)
119{
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120 struct vgic_dist *dist;
121
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122 if (irq->intid < VGIC_MIN_LPI)
123 return;
124
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125 if (!kref_put(&irq->refcount, vgic_irq_release))
126 return;
127
128 dist = &kvm->arch.vgic;
129
130 spin_lock(&dist->lpi_list_lock);
131 list_del(&irq->lpi_list);
132 dist->lpi_list_count--;
133 spin_unlock(&dist->lpi_list_lock);
134
135 kfree(irq);
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136}
137
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138/**
139 * kvm_vgic_target_oracle - compute the target vcpu for an irq
140 *
141 * @irq: The irq to route. Must be already locked.
142 *
143 * Based on the current state of the interrupt (enabled, pending,
144 * active, vcpu and target_vcpu), compute the next vcpu this should be
145 * given to. Return NULL if this shouldn't be injected at all.
146 *
147 * Requires the IRQ lock to be held.
148 */
149static struct kvm_vcpu *vgic_target_oracle(struct vgic_irq *irq)
150{
151 DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&irq->irq_lock));
152
153 /* If the interrupt is active, it must stay on the current vcpu */
154 if (irq->active)
155 return irq->vcpu ? : irq->target_vcpu;
156
157 /*
158 * If the IRQ is not active but enabled and pending, we should direct
159 * it to its configured target VCPU.
160 * If the distributor is disabled, pending interrupts shouldn't be
161 * forwarded.
162 */
163 if (irq->enabled && irq->pending) {
164 if (unlikely(irq->target_vcpu &&
165 !irq->target_vcpu->kvm->arch.vgic.enabled))
166 return NULL;
167
168 return irq->target_vcpu;
169 }
170
171 /* If neither active nor pending and enabled, then this IRQ should not
172 * be queued to any VCPU.
173 */
174 return NULL;
175}
176
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177/*
178 * The order of items in the ap_lists defines how we'll pack things in LRs as
179 * well, the first items in the list being the first things populated in the
180 * LRs.
181 *
182 * A hard rule is that active interrupts can never be pushed out of the LRs
183 * (and therefore take priority) since we cannot reliably trap on deactivation
184 * of IRQs and therefore they have to be present in the LRs.
185 *
186 * Otherwise things should be sorted by the priority field and the GIC
187 * hardware support will take care of preemption of priority groups etc.
188 *
189 * Return negative if "a" sorts before "b", 0 to preserve order, and positive
190 * to sort "b" before "a".
191 */
192static int vgic_irq_cmp(void *priv, struct list_head *a, struct list_head *b)
193{
194 struct vgic_irq *irqa = container_of(a, struct vgic_irq, ap_list);
195 struct vgic_irq *irqb = container_of(b, struct vgic_irq, ap_list);
196 bool penda, pendb;
197 int ret;
198
199 spin_lock(&irqa->irq_lock);
200 spin_lock_nested(&irqb->irq_lock, SINGLE_DEPTH_NESTING);
201
202 if (irqa->active || irqb->active) {
203 ret = (int)irqb->active - (int)irqa->active;
204 goto out;
205 }
206
207 penda = irqa->enabled && irqa->pending;
208 pendb = irqb->enabled && irqb->pending;
209
210 if (!penda || !pendb) {
211 ret = (int)pendb - (int)penda;
212 goto out;
213 }
214
215 /* Both pending and enabled, sort by priority */
216 ret = irqa->priority - irqb->priority;
217out:
218 spin_unlock(&irqb->irq_lock);
219 spin_unlock(&irqa->irq_lock);
220 return ret;
221}
222
223/* Must be called with the ap_list_lock held */
224static void vgic_sort_ap_list(struct kvm_vcpu *vcpu)
225{
226 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
227
228 DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock));
229
230 list_sort(NULL, &vgic_cpu->ap_list_head, vgic_irq_cmp);
231}
232
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233/*
234 * Only valid injection if changing level for level-triggered IRQs or for a
235 * rising edge.
236 */
237static bool vgic_validate_injection(struct vgic_irq *irq, bool level)
238{
239 switch (irq->config) {
240 case VGIC_CONFIG_LEVEL:
241 return irq->line_level != level;
242 case VGIC_CONFIG_EDGE:
243 return level;
244 }
245
246 return false;
247}
248
249/*
250 * Check whether an IRQ needs to (and can) be queued to a VCPU's ap list.
251 * Do the queuing if necessary, taking the right locks in the right order.
252 * Returns true when the IRQ was queued, false otherwise.
253 *
254 * Needs to be entered with the IRQ lock already held, but will return
255 * with all locks dropped.
256 */
257bool vgic_queue_irq_unlock(struct kvm *kvm, struct vgic_irq *irq)
258{
259 struct kvm_vcpu *vcpu;
260
261 DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&irq->irq_lock));
262
263retry:
264 vcpu = vgic_target_oracle(irq);
265 if (irq->vcpu || !vcpu) {
266 /*
267 * If this IRQ is already on a VCPU's ap_list, then it
268 * cannot be moved or modified and there is no more work for
269 * us to do.
270 *
271 * Otherwise, if the irq is not pending and enabled, it does
272 * not need to be inserted into an ap_list and there is also
273 * no more work for us to do.
274 */
275 spin_unlock(&irq->irq_lock);
276 return false;
277 }
278
279 /*
280 * We must unlock the irq lock to take the ap_list_lock where
281 * we are going to insert this new pending interrupt.
282 */
283 spin_unlock(&irq->irq_lock);
284
285 /* someone can do stuff here, which we re-check below */
286
287 spin_lock(&vcpu->arch.vgic_cpu.ap_list_lock);
288 spin_lock(&irq->irq_lock);
289
290 /*
291 * Did something change behind our backs?
292 *
293 * There are two cases:
294 * 1) The irq lost its pending state or was disabled behind our
295 * backs and/or it was queued to another VCPU's ap_list.
296 * 2) Someone changed the affinity on this irq behind our
297 * backs and we are now holding the wrong ap_list_lock.
298 *
299 * In both cases, drop the locks and retry.
300 */
301
302 if (unlikely(irq->vcpu || vcpu != vgic_target_oracle(irq))) {
303 spin_unlock(&irq->irq_lock);
304 spin_unlock(&vcpu->arch.vgic_cpu.ap_list_lock);
305
306 spin_lock(&irq->irq_lock);
307 goto retry;
308 }
309
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310 /*
311 * Grab a reference to the irq to reflect the fact that it is
312 * now in the ap_list.
313 */
314 vgic_get_irq_kref(irq);
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315 list_add_tail(&irq->ap_list, &vcpu->arch.vgic_cpu.ap_list_head);
316 irq->vcpu = vcpu;
317
318 spin_unlock(&irq->irq_lock);
319 spin_unlock(&vcpu->arch.vgic_cpu.ap_list_lock);
320
321 kvm_vcpu_kick(vcpu);
322
323 return true;
324}
325
326static int vgic_update_irq_pending(struct kvm *kvm, int cpuid,
327 unsigned int intid, bool level,
328 bool mapped_irq)
329{
330 struct kvm_vcpu *vcpu;
331 struct vgic_irq *irq;
332 int ret;
333
334 trace_vgic_update_irq_pending(cpuid, intid, level);
335
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336 ret = vgic_lazy_init(kvm);
337 if (ret)
338 return ret;
339
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340 vcpu = kvm_get_vcpu(kvm, cpuid);
341 if (!vcpu && intid < VGIC_NR_PRIVATE_IRQS)
342 return -EINVAL;
343
344 irq = vgic_get_irq(kvm, vcpu, intid);
345 if (!irq)
346 return -EINVAL;
347
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348 if (irq->hw != mapped_irq) {
349 vgic_put_irq(kvm, irq);
81eeb95d 350 return -EINVAL;
5dd4b924 351 }
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352
353 spin_lock(&irq->irq_lock);
354
355 if (!vgic_validate_injection(irq, level)) {
356 /* Nothing to see here, move along... */
357 spin_unlock(&irq->irq_lock);
5dd4b924 358 vgic_put_irq(kvm, irq);
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359 return 0;
360 }
361
362 if (irq->config == VGIC_CONFIG_LEVEL) {
363 irq->line_level = level;
364 irq->pending = level || irq->soft_pending;
365 } else {
366 irq->pending = true;
367 }
368
369 vgic_queue_irq_unlock(kvm, irq);
5dd4b924 370 vgic_put_irq(kvm, irq);
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371
372 return 0;
373}
374
375/**
376 * kvm_vgic_inject_irq - Inject an IRQ from a device to the vgic
377 * @kvm: The VM structure pointer
378 * @cpuid: The CPU for PPIs
379 * @intid: The INTID to inject a new state to.
380 * @level: Edge-triggered: true: to trigger the interrupt
381 * false: to ignore the call
382 * Level-sensitive true: raise the input signal
383 * false: lower the input signal
384 *
385 * The VGIC is not concerned with devices being active-LOW or active-HIGH for
386 * level-sensitive interrupts. You can think of the level parameter as 1
387 * being HIGH and 0 being LOW and all devices being active-HIGH.
388 */
389int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid,
390 bool level)
391{
392 return vgic_update_irq_pending(kvm, cpuid, intid, level, false);
393}
0919e84c 394
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395int kvm_vgic_inject_mapped_irq(struct kvm *kvm, int cpuid, unsigned int intid,
396 bool level)
397{
398 return vgic_update_irq_pending(kvm, cpuid, intid, level, true);
399}
400
401int kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu, u32 virt_irq, u32 phys_irq)
402{
403 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, virt_irq);
404
405 BUG_ON(!irq);
406
407 spin_lock(&irq->irq_lock);
408
409 irq->hw = true;
410 irq->hwintid = phys_irq;
411
412 spin_unlock(&irq->irq_lock);
5dd4b924 413 vgic_put_irq(vcpu->kvm, irq);
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414
415 return 0;
416}
417
418int kvm_vgic_unmap_phys_irq(struct kvm_vcpu *vcpu, unsigned int virt_irq)
419{
5dd4b924 420 struct vgic_irq *irq;
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421
422 if (!vgic_initialized(vcpu->kvm))
423 return -EAGAIN;
424
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425 irq = vgic_get_irq(vcpu->kvm, vcpu, virt_irq);
426 BUG_ON(!irq);
427
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AP
428 spin_lock(&irq->irq_lock);
429
430 irq->hw = false;
431 irq->hwintid = 0;
432
433 spin_unlock(&irq->irq_lock);
5dd4b924 434 vgic_put_irq(vcpu->kvm, irq);
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435
436 return 0;
437}
438
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439/**
440 * vgic_prune_ap_list - Remove non-relevant interrupts from the list
441 *
442 * @vcpu: The VCPU pointer
443 *
444 * Go over the list of "interesting" interrupts, and prune those that we
445 * won't have to consider in the near future.
446 */
447static void vgic_prune_ap_list(struct kvm_vcpu *vcpu)
448{
449 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
450 struct vgic_irq *irq, *tmp;
451
452retry:
453 spin_lock(&vgic_cpu->ap_list_lock);
454
455 list_for_each_entry_safe(irq, tmp, &vgic_cpu->ap_list_head, ap_list) {
456 struct kvm_vcpu *target_vcpu, *vcpuA, *vcpuB;
457
458 spin_lock(&irq->irq_lock);
459
460 BUG_ON(vcpu != irq->vcpu);
461
462 target_vcpu = vgic_target_oracle(irq);
463
464 if (!target_vcpu) {
465 /*
466 * We don't need to process this interrupt any
467 * further, move it off the list.
468 */
469 list_del(&irq->ap_list);
470 irq->vcpu = NULL;
471 spin_unlock(&irq->irq_lock);
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472
473 /*
474 * This vgic_put_irq call matches the
475 * vgic_get_irq_kref in vgic_queue_irq_unlock,
476 * where we added the LPI to the ap_list. As
477 * we remove the irq from the list, we drop
478 * also drop the refcount.
479 */
480 vgic_put_irq(vcpu->kvm, irq);
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481 continue;
482 }
483
484 if (target_vcpu == vcpu) {
485 /* We're on the right CPU */
486 spin_unlock(&irq->irq_lock);
487 continue;
488 }
489
490 /* This interrupt looks like it has to be migrated. */
491
492 spin_unlock(&irq->irq_lock);
493 spin_unlock(&vgic_cpu->ap_list_lock);
494
495 /*
496 * Ensure locking order by always locking the smallest
497 * ID first.
498 */
499 if (vcpu->vcpu_id < target_vcpu->vcpu_id) {
500 vcpuA = vcpu;
501 vcpuB = target_vcpu;
502 } else {
503 vcpuA = target_vcpu;
504 vcpuB = vcpu;
505 }
506
507 spin_lock(&vcpuA->arch.vgic_cpu.ap_list_lock);
508 spin_lock_nested(&vcpuB->arch.vgic_cpu.ap_list_lock,
509 SINGLE_DEPTH_NESTING);
510 spin_lock(&irq->irq_lock);
511
512 /*
513 * If the affinity has been preserved, move the
514 * interrupt around. Otherwise, it means things have
515 * changed while the interrupt was unlocked, and we
516 * need to replay this.
517 *
518 * In all cases, we cannot trust the list not to have
519 * changed, so we restart from the beginning.
520 */
521 if (target_vcpu == vgic_target_oracle(irq)) {
522 struct vgic_cpu *new_cpu = &target_vcpu->arch.vgic_cpu;
523
524 list_del(&irq->ap_list);
525 irq->vcpu = target_vcpu;
526 list_add_tail(&irq->ap_list, &new_cpu->ap_list_head);
527 }
528
529 spin_unlock(&irq->irq_lock);
530 spin_unlock(&vcpuB->arch.vgic_cpu.ap_list_lock);
531 spin_unlock(&vcpuA->arch.vgic_cpu.ap_list_lock);
532 goto retry;
533 }
534
535 spin_unlock(&vgic_cpu->ap_list_lock);
536}
537
538static inline void vgic_process_maintenance_interrupt(struct kvm_vcpu *vcpu)
539{
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540 if (kvm_vgic_global_state.type == VGIC_V2)
541 vgic_v2_process_maintenance(vcpu);
542 else
543 vgic_v3_process_maintenance(vcpu);
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544}
545
546static inline void vgic_fold_lr_state(struct kvm_vcpu *vcpu)
547{
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548 if (kvm_vgic_global_state.type == VGIC_V2)
549 vgic_v2_fold_lr_state(vcpu);
550 else
551 vgic_v3_fold_lr_state(vcpu);
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552}
553
554/* Requires the irq_lock to be held. */
555static inline void vgic_populate_lr(struct kvm_vcpu *vcpu,
556 struct vgic_irq *irq, int lr)
557{
558 DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&irq->irq_lock));
140b086d 559
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560 if (kvm_vgic_global_state.type == VGIC_V2)
561 vgic_v2_populate_lr(vcpu, irq, lr);
562 else
563 vgic_v3_populate_lr(vcpu, irq, lr);
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564}
565
566static inline void vgic_clear_lr(struct kvm_vcpu *vcpu, int lr)
567{
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568 if (kvm_vgic_global_state.type == VGIC_V2)
569 vgic_v2_clear_lr(vcpu, lr);
570 else
571 vgic_v3_clear_lr(vcpu, lr);
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572}
573
574static inline void vgic_set_underflow(struct kvm_vcpu *vcpu)
575{
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576 if (kvm_vgic_global_state.type == VGIC_V2)
577 vgic_v2_set_underflow(vcpu);
578 else
579 vgic_v3_set_underflow(vcpu);
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580}
581
582/* Requires the ap_list_lock to be held. */
583static int compute_ap_list_depth(struct kvm_vcpu *vcpu)
584{
585 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
586 struct vgic_irq *irq;
587 int count = 0;
588
589 DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock));
590
591 list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
592 spin_lock(&irq->irq_lock);
593 /* GICv2 SGIs can count for more than one... */
594 if (vgic_irq_is_sgi(irq->intid) && irq->source)
595 count += hweight8(irq->source);
596 else
597 count++;
598 spin_unlock(&irq->irq_lock);
599 }
600 return count;
601}
602
603/* Requires the VCPU's ap_list_lock to be held. */
604static void vgic_flush_lr_state(struct kvm_vcpu *vcpu)
605{
606 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
607 struct vgic_irq *irq;
608 int count = 0;
609
610 DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock));
611
612 if (compute_ap_list_depth(vcpu) > kvm_vgic_global_state.nr_lr) {
613 vgic_set_underflow(vcpu);
614 vgic_sort_ap_list(vcpu);
615 }
616
617 list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
618 spin_lock(&irq->irq_lock);
619
620 if (unlikely(vgic_target_oracle(irq) != vcpu))
621 goto next;
622
623 /*
624 * If we get an SGI with multiple sources, try to get
625 * them in all at once.
626 */
627 do {
628 vgic_populate_lr(vcpu, irq, count++);
629 } while (irq->source && count < kvm_vgic_global_state.nr_lr);
630
631next:
632 spin_unlock(&irq->irq_lock);
633
634 if (count == kvm_vgic_global_state.nr_lr)
635 break;
636 }
637
638 vcpu->arch.vgic_cpu.used_lrs = count;
639
640 /* Nuke remaining LRs */
641 for ( ; count < kvm_vgic_global_state.nr_lr; count++)
642 vgic_clear_lr(vcpu, count);
643}
644
645/* Sync back the hardware VGIC state into our emulation after a guest's run. */
646void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu)
647{
648 vgic_process_maintenance_interrupt(vcpu);
649 vgic_fold_lr_state(vcpu);
650 vgic_prune_ap_list(vcpu);
651}
652
653/* Flush our emulation state into the GIC hardware before entering the guest. */
654void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu)
655{
656 spin_lock(&vcpu->arch.vgic_cpu.ap_list_lock);
657 vgic_flush_lr_state(vcpu);
658 spin_unlock(&vcpu->arch.vgic_cpu.ap_list_lock);
659}
90eee56c
EA
660
661int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu)
662{
663 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
664 struct vgic_irq *irq;
665 bool pending = false;
666
667 if (!vcpu->kvm->arch.vgic.enabled)
668 return false;
669
670 spin_lock(&vgic_cpu->ap_list_lock);
671
672 list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
673 spin_lock(&irq->irq_lock);
674 pending = irq->pending && irq->enabled;
675 spin_unlock(&irq->irq_lock);
676
677 if (pending)
678 break;
679 }
680
681 spin_unlock(&vgic_cpu->ap_list_lock);
682
683 return pending;
684}
2b0cda87
MZ
685
686void vgic_kick_vcpus(struct kvm *kvm)
687{
688 struct kvm_vcpu *vcpu;
689 int c;
690
691 /*
692 * We've injected an interrupt, time to find out who deserves
693 * a good kick...
694 */
695 kvm_for_each_vcpu(c, vcpu, kvm) {
696 if (kvm_vgic_vcpu_pending_irq(vcpu))
697 kvm_vcpu_kick(vcpu);
698 }
699}
568e8c90
AP
700
701bool kvm_vgic_map_is_active(struct kvm_vcpu *vcpu, unsigned int virt_irq)
702{
703 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, virt_irq);
704 bool map_is_active;
705
706 spin_lock(&irq->irq_lock);
707 map_is_active = irq->hw && irq->active;
708 spin_unlock(&irq->irq_lock);
5dd4b924 709 vgic_put_irq(vcpu->kvm, irq);
568e8c90
AP
710
711 return map_is_active;
712}
0e4e82f1 713
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