| 1 | /* EVEX_W_0F10_P_1 */ |
| 2 | { |
| 3 | { "vmovss", { XMVexScalar, VexScalar, EXxmm_md }, 0 }, |
| 4 | }, |
| 5 | /* EVEX_W_0F10_P_3 */ |
| 6 | { |
| 7 | { Bad_Opcode }, |
| 8 | { "vmovsd", { XMVexScalar, VexScalar, EXxmm_mq }, 0 }, |
| 9 | }, |
| 10 | /* EVEX_W_0F11_P_1 */ |
| 11 | { |
| 12 | { "vmovss", { EXdVexScalarS, VexScalar, XMScalar }, 0 }, |
| 13 | }, |
| 14 | /* EVEX_W_0F11_P_3 */ |
| 15 | { |
| 16 | { Bad_Opcode }, |
| 17 | { "vmovsd", { EXqVexScalarS, VexScalar, XMScalar }, 0 }, |
| 18 | }, |
| 19 | /* EVEX_W_0F12_P_0_M_1 */ |
| 20 | { |
| 21 | { "vmovhlps", { XMM, Vex, EXxmm_mq }, 0 }, |
| 22 | }, |
| 23 | /* EVEX_W_0F12_P_1 */ |
| 24 | { |
| 25 | { "vmovsldup", { XM, EXEvexXNoBcst }, 0 }, |
| 26 | }, |
| 27 | /* EVEX_W_0F12_P_3 */ |
| 28 | { |
| 29 | { Bad_Opcode }, |
| 30 | { "vmovddup", { XM, EXymmq }, 0 }, |
| 31 | }, |
| 32 | /* EVEX_W_0F16_P_0_M_1 */ |
| 33 | { |
| 34 | { "vmovlhps", { XMM, Vex, EXx }, 0 }, |
| 35 | }, |
| 36 | /* EVEX_W_0F16_P_1 */ |
| 37 | { |
| 38 | { "vmovshdup", { XM, EXx }, 0 }, |
| 39 | }, |
| 40 | /* EVEX_W_0F2A_P_3 */ |
| 41 | { |
| 42 | { "vcvtsi2sd%LQ", { XMScalar, VexScalar, Ed }, 0 }, |
| 43 | { "vcvtsi2sd%LQ", { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 }, |
| 44 | }, |
| 45 | /* EVEX_W_0F51_P_1 */ |
| 46 | { |
| 47 | { "vsqrtss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 }, |
| 48 | }, |
| 49 | /* EVEX_W_0F51_P_3 */ |
| 50 | { |
| 51 | { Bad_Opcode }, |
| 52 | { "vsqrtsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 }, |
| 53 | }, |
| 54 | /* EVEX_W_0F58_P_1 */ |
| 55 | { |
| 56 | { "vaddss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 }, |
| 57 | }, |
| 58 | /* EVEX_W_0F58_P_3 */ |
| 59 | { |
| 60 | { Bad_Opcode }, |
| 61 | { "vaddsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 }, |
| 62 | }, |
| 63 | /* EVEX_W_0F59_P_1 */ |
| 64 | { |
| 65 | { "vmulss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 }, |
| 66 | }, |
| 67 | /* EVEX_W_0F59_P_3 */ |
| 68 | { |
| 69 | { Bad_Opcode }, |
| 70 | { "vmulsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 }, |
| 71 | }, |
| 72 | /* EVEX_W_0F5A_P_0 */ |
| 73 | { |
| 74 | { "vcvtps2pd", { XM, EXEvexHalfBcstXmmq, EXxEVexS }, 0 }, |
| 75 | }, |
| 76 | /* EVEX_W_0F5A_P_1 */ |
| 77 | { |
| 78 | { "vcvtss2sd", { XMScalar, VexScalar, EXxmm_md, EXxEVexS }, 0 }, |
| 79 | }, |
| 80 | /* EVEX_W_0F5A_P_2 */ |
| 81 | { |
| 82 | { Bad_Opcode }, |
| 83 | { "vcvtpd2ps%XY", { XMxmmq, EXx, EXxEVexR }, 0 }, |
| 84 | }, |
| 85 | /* EVEX_W_0F5A_P_3 */ |
| 86 | { |
| 87 | { Bad_Opcode }, |
| 88 | { "vcvtsd2ss", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 }, |
| 89 | }, |
| 90 | /* EVEX_W_0F5B_P_0 */ |
| 91 | { |
| 92 | { "vcvtdq2ps", { XM, EXx, EXxEVexR }, 0 }, |
| 93 | { "vcvtqq2ps%XY", { XMxmmq, EXx, EXxEVexR }, 0 }, |
| 94 | }, |
| 95 | /* EVEX_W_0F5B_P_1 */ |
| 96 | { |
| 97 | { "vcvttps2dq", { XM, EXx, EXxEVexS }, 0 }, |
| 98 | }, |
| 99 | /* EVEX_W_0F5B_P_2 */ |
| 100 | { |
| 101 | { "vcvtps2dq", { XM, EXx, EXxEVexR }, 0 }, |
| 102 | }, |
| 103 | /* EVEX_W_0F5C_P_1 */ |
| 104 | { |
| 105 | { "vsubss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 }, |
| 106 | }, |
| 107 | /* EVEX_W_0F5C_P_3 */ |
| 108 | { |
| 109 | { Bad_Opcode }, |
| 110 | { "vsubsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 }, |
| 111 | }, |
| 112 | /* EVEX_W_0F5D_P_1 */ |
| 113 | { |
| 114 | { "vminss", { XMScalar, VexScalar, EXxmm_md, EXxEVexS }, 0 }, |
| 115 | }, |
| 116 | /* EVEX_W_0F5D_P_3 */ |
| 117 | { |
| 118 | { Bad_Opcode }, |
| 119 | { "vminsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS }, 0 }, |
| 120 | }, |
| 121 | /* EVEX_W_0F5E_P_1 */ |
| 122 | { |
| 123 | { "vdivss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 }, |
| 124 | }, |
| 125 | /* EVEX_W_0F5E_P_3 */ |
| 126 | { |
| 127 | { Bad_Opcode }, |
| 128 | { "vdivsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 }, |
| 129 | }, |
| 130 | /* EVEX_W_0F5F_P_1 */ |
| 131 | { |
| 132 | { "vmaxss", { XMScalar, VexScalar, EXxmm_md, EXxEVexS }, 0 }, |
| 133 | }, |
| 134 | /* EVEX_W_0F5F_P_3 */ |
| 135 | { |
| 136 | { Bad_Opcode }, |
| 137 | { "vmaxsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS }, 0 }, |
| 138 | }, |
| 139 | /* EVEX_W_0F62 */ |
| 140 | { |
| 141 | { PREFIX_TABLE (PREFIX_VEX_0F62) }, |
| 142 | }, |
| 143 | /* EVEX_W_0F66_P_2 */ |
| 144 | { |
| 145 | { "vpcmpgtd", { XMask, Vex, EXx }, 0 }, |
| 146 | }, |
| 147 | /* EVEX_W_0F6A */ |
| 148 | { |
| 149 | { PREFIX_TABLE (PREFIX_VEX_0F6A) }, |
| 150 | }, |
| 151 | /* EVEX_W_0F6B */ |
| 152 | { |
| 153 | { PREFIX_TABLE (PREFIX_VEX_0F6B) }, |
| 154 | }, |
| 155 | /* EVEX_W_0F6C */ |
| 156 | { |
| 157 | { Bad_Opcode }, |
| 158 | { PREFIX_TABLE (PREFIX_VEX_0F6C) }, |
| 159 | }, |
| 160 | /* EVEX_W_0F6D */ |
| 161 | { |
| 162 | { Bad_Opcode }, |
| 163 | { PREFIX_TABLE (PREFIX_VEX_0F6D) }, |
| 164 | }, |
| 165 | /* EVEX_W_0F6F_P_1 */ |
| 166 | { |
| 167 | { "vmovdqu32", { XM, EXEvexXNoBcst }, 0 }, |
| 168 | { "vmovdqu64", { XM, EXEvexXNoBcst }, 0 }, |
| 169 | }, |
| 170 | /* EVEX_W_0F6F_P_2 */ |
| 171 | { |
| 172 | { "vmovdqa32", { XM, EXEvexXNoBcst }, 0 }, |
| 173 | { "vmovdqa64", { XM, EXEvexXNoBcst }, 0 }, |
| 174 | }, |
| 175 | /* EVEX_W_0F6F_P_3 */ |
| 176 | { |
| 177 | { "vmovdqu8", { XM, EXx }, 0 }, |
| 178 | { "vmovdqu16", { XM, EXx }, 0 }, |
| 179 | }, |
| 180 | /* EVEX_W_0F70_P_2 */ |
| 181 | { |
| 182 | { "vpshufd", { XM, EXx, Ib }, 0 }, |
| 183 | }, |
| 184 | /* EVEX_W_0F72_R_2_P_2 */ |
| 185 | { |
| 186 | { "vpsrld", { Vex, EXx, Ib }, 0 }, |
| 187 | }, |
| 188 | /* EVEX_W_0F72_R_6_P_2 */ |
| 189 | { |
| 190 | { "vpslld", { Vex, EXx, Ib }, 0 }, |
| 191 | }, |
| 192 | /* EVEX_W_0F73_R_2_P_2 */ |
| 193 | { |
| 194 | { Bad_Opcode }, |
| 195 | { "vpsrlq", { Vex, EXx, Ib }, 0 }, |
| 196 | }, |
| 197 | /* EVEX_W_0F73_R_6_P_2 */ |
| 198 | { |
| 199 | { Bad_Opcode }, |
| 200 | { "vpsllq", { Vex, EXx, Ib }, 0 }, |
| 201 | }, |
| 202 | /* EVEX_W_0F76_P_2 */ |
| 203 | { |
| 204 | { "vpcmpeqd", { XMask, Vex, EXx }, 0 }, |
| 205 | }, |
| 206 | /* EVEX_W_0F78_P_0 */ |
| 207 | { |
| 208 | { "vcvttps2udq", { XM, EXx, EXxEVexS }, 0 }, |
| 209 | { "vcvttpd2udq%XY", { XMxmmq, EXx, EXxEVexS }, 0 }, |
| 210 | }, |
| 211 | /* EVEX_W_0F78_P_2 */ |
| 212 | { |
| 213 | { "vcvttps2uqq", { XM, EXEvexHalfBcstXmmq, EXxEVexS }, 0 }, |
| 214 | { "vcvttpd2uqq", { XM, EXx, EXxEVexS }, 0 }, |
| 215 | }, |
| 216 | /* EVEX_W_0F79_P_0 */ |
| 217 | { |
| 218 | { "vcvtps2udq", { XM, EXx, EXxEVexR }, 0 }, |
| 219 | { "vcvtpd2udq%XY", { XMxmmq, EXx, EXxEVexR }, 0 }, |
| 220 | }, |
| 221 | /* EVEX_W_0F79_P_2 */ |
| 222 | { |
| 223 | { "vcvtps2uqq", { XM, EXEvexHalfBcstXmmq, EXxEVexR }, 0 }, |
| 224 | { "vcvtpd2uqq", { XM, EXx, EXxEVexR }, 0 }, |
| 225 | }, |
| 226 | /* EVEX_W_0F7A_P_1 */ |
| 227 | { |
| 228 | { "vcvtudq2pd", { XM, EXEvexHalfBcstXmmq }, 0 }, |
| 229 | { "vcvtuqq2pd", { XM, EXx, EXxEVexR }, 0 }, |
| 230 | }, |
| 231 | /* EVEX_W_0F7A_P_2 */ |
| 232 | { |
| 233 | { "vcvttps2qq", { XM, EXEvexHalfBcstXmmq, EXxEVexS }, 0 }, |
| 234 | { "vcvttpd2qq", { XM, EXx, EXxEVexS }, 0 }, |
| 235 | }, |
| 236 | /* EVEX_W_0F7A_P_3 */ |
| 237 | { |
| 238 | { "vcvtudq2ps", { XM, EXx, EXxEVexR }, 0 }, |
| 239 | { "vcvtuqq2ps%XY", { XMxmmq, EXx, EXxEVexR }, 0 }, |
| 240 | }, |
| 241 | /* EVEX_W_0F7B_P_2 */ |
| 242 | { |
| 243 | { "vcvtps2qq", { XM, EXEvexHalfBcstXmmq, EXxEVexR }, 0 }, |
| 244 | { "vcvtpd2qq", { XM, EXx, EXxEVexR }, 0 }, |
| 245 | }, |
| 246 | /* EVEX_W_0F7B_P_3 */ |
| 247 | { |
| 248 | { "vcvtusi2sd%LQ", { XMScalar, VexScalar, Ed }, 0 }, |
| 249 | { "vcvtusi2sd%LQ", { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 }, |
| 250 | }, |
| 251 | /* EVEX_W_0F7E_P_1 */ |
| 252 | { |
| 253 | { Bad_Opcode }, |
| 254 | { "vmovq", { XMScalar, EXxmm_mq }, 0 }, |
| 255 | }, |
| 256 | /* EVEX_W_0F7F_P_1 */ |
| 257 | { |
| 258 | { "vmovdqu32", { EXxS, XM }, 0 }, |
| 259 | { "vmovdqu64", { EXxS, XM }, 0 }, |
| 260 | }, |
| 261 | /* EVEX_W_0F7F_P_2 */ |
| 262 | { |
| 263 | { "vmovdqa32", { EXxS, XM }, 0 }, |
| 264 | { "vmovdqa64", { EXxS, XM }, 0 }, |
| 265 | }, |
| 266 | /* EVEX_W_0F7F_P_3 */ |
| 267 | { |
| 268 | { "vmovdqu8", { EXxS, XM }, 0 }, |
| 269 | { "vmovdqu16", { EXxS, XM }, 0 }, |
| 270 | }, |
| 271 | /* EVEX_W_0FC2_P_1 */ |
| 272 | { |
| 273 | { "vcmpss", { XMask, VexScalar, EXxmm_md, EXxEVexS, VCMP }, 0 }, |
| 274 | }, |
| 275 | /* EVEX_W_0FC2_P_3 */ |
| 276 | { |
| 277 | { Bad_Opcode }, |
| 278 | { "vcmpsd", { XMask, VexScalar, EXxmm_mq, EXxEVexS, VCMP }, 0 }, |
| 279 | }, |
| 280 | /* EVEX_W_0FD2 */ |
| 281 | { |
| 282 | { PREFIX_TABLE (PREFIX_VEX_0FD2) }, |
| 283 | }, |
| 284 | /* EVEX_W_0FD3 */ |
| 285 | { |
| 286 | { Bad_Opcode }, |
| 287 | { PREFIX_TABLE (PREFIX_VEX_0FD3) }, |
| 288 | }, |
| 289 | /* EVEX_W_0FD4 */ |
| 290 | { |
| 291 | { Bad_Opcode }, |
| 292 | { PREFIX_TABLE (PREFIX_VEX_0FD4) }, |
| 293 | }, |
| 294 | /* EVEX_W_0FD6_P_2 */ |
| 295 | { |
| 296 | { Bad_Opcode }, |
| 297 | { "vmovq", { EXqVexScalarS, XMScalar }, 0 }, |
| 298 | }, |
| 299 | /* EVEX_W_0FE6_P_1 */ |
| 300 | { |
| 301 | { "vcvtdq2pd", { XM, EXEvexHalfBcstXmmq }, 0 }, |
| 302 | { "vcvtqq2pd", { XM, EXx, EXxEVexR }, 0 }, |
| 303 | }, |
| 304 | /* EVEX_W_0FE6_P_2 */ |
| 305 | { |
| 306 | { Bad_Opcode }, |
| 307 | { "vcvttpd2dq%XY", { XMxmmq, EXx, EXxEVexS }, 0 }, |
| 308 | }, |
| 309 | /* EVEX_W_0FE6_P_3 */ |
| 310 | { |
| 311 | { Bad_Opcode }, |
| 312 | { "vcvtpd2dq%XY", { XMxmmq, EXx, EXxEVexR }, 0 }, |
| 313 | }, |
| 314 | /* EVEX_W_0FE7_P_2 */ |
| 315 | { |
| 316 | { "vmovntdq", { EXEvexXNoBcst, XM }, 0 }, |
| 317 | }, |
| 318 | /* EVEX_W_0FF2 */ |
| 319 | { |
| 320 | { PREFIX_TABLE (PREFIX_VEX_0FF2) }, |
| 321 | }, |
| 322 | /* EVEX_W_0FF3 */ |
| 323 | { |
| 324 | { Bad_Opcode }, |
| 325 | { PREFIX_TABLE (PREFIX_VEX_0FF3) }, |
| 326 | }, |
| 327 | /* EVEX_W_0FF4 */ |
| 328 | { |
| 329 | { Bad_Opcode }, |
| 330 | { PREFIX_TABLE (PREFIX_VEX_0FF4) }, |
| 331 | }, |
| 332 | /* EVEX_W_0FFA */ |
| 333 | { |
| 334 | { PREFIX_TABLE (PREFIX_VEX_0FFA) }, |
| 335 | }, |
| 336 | /* EVEX_W_0FFB */ |
| 337 | { |
| 338 | { Bad_Opcode }, |
| 339 | { PREFIX_TABLE (PREFIX_VEX_0FFB) }, |
| 340 | }, |
| 341 | /* EVEX_W_0FFE */ |
| 342 | { |
| 343 | { PREFIX_TABLE (PREFIX_VEX_0FFE) }, |
| 344 | }, |
| 345 | /* EVEX_W_0F380D_P_2 */ |
| 346 | { |
| 347 | { Bad_Opcode }, |
| 348 | { "vpermilpd", { XM, Vex, EXx }, 0 }, |
| 349 | }, |
| 350 | /* EVEX_W_0F3810_P_1 */ |
| 351 | { |
| 352 | { "vpmovuswb", { EXxmmq, XM }, 0 }, |
| 353 | }, |
| 354 | /* EVEX_W_0F3810_P_2 */ |
| 355 | { |
| 356 | { Bad_Opcode }, |
| 357 | { "vpsrlvw", { XM, Vex, EXx }, 0 }, |
| 358 | }, |
| 359 | /* EVEX_W_0F3811_P_1 */ |
| 360 | { |
| 361 | { "vpmovusdb", { EXxmmqd, XM }, 0 }, |
| 362 | }, |
| 363 | /* EVEX_W_0F3811_P_2 */ |
| 364 | { |
| 365 | { Bad_Opcode }, |
| 366 | { "vpsravw", { XM, Vex, EXx }, 0 }, |
| 367 | }, |
| 368 | /* EVEX_W_0F3812_P_1 */ |
| 369 | { |
| 370 | { "vpmovusqb", { EXxmmdw, XM }, 0 }, |
| 371 | }, |
| 372 | /* EVEX_W_0F3812_P_2 */ |
| 373 | { |
| 374 | { Bad_Opcode }, |
| 375 | { "vpsllvw", { XM, Vex, EXx }, 0 }, |
| 376 | }, |
| 377 | /* EVEX_W_0F3813_P_1 */ |
| 378 | { |
| 379 | { "vpmovusdw", { EXxmmq, XM }, 0 }, |
| 380 | }, |
| 381 | /* EVEX_W_0F3813_P_2 */ |
| 382 | { |
| 383 | { "vcvtph2ps", { XM, EXxmmq, EXxEVexS }, 0 }, |
| 384 | }, |
| 385 | /* EVEX_W_0F3814_P_1 */ |
| 386 | { |
| 387 | { "vpmovusqw", { EXxmmqd, XM }, 0 }, |
| 388 | }, |
| 389 | /* EVEX_W_0F3815_P_1 */ |
| 390 | { |
| 391 | { "vpmovusqd", { EXxmmq, XM }, 0 }, |
| 392 | }, |
| 393 | /* EVEX_W_0F3819_P_2 */ |
| 394 | { |
| 395 | { EVEX_LEN_TABLE (EVEX_LEN_0F3819_P_2_W_0) }, |
| 396 | { EVEX_LEN_TABLE (EVEX_LEN_0F3819_P_2_W_1) }, |
| 397 | }, |
| 398 | /* EVEX_W_0F381A_P_2 */ |
| 399 | { |
| 400 | { MOD_TABLE (MOD_EVEX_0F381A_P_2_W_0) }, |
| 401 | { MOD_TABLE (MOD_EVEX_0F381A_P_2_W_1) }, |
| 402 | }, |
| 403 | /* EVEX_W_0F381B_P_2 */ |
| 404 | { |
| 405 | { MOD_TABLE (MOD_EVEX_0F381B_P_2_W_0) }, |
| 406 | { MOD_TABLE (MOD_EVEX_0F381B_P_2_W_1) }, |
| 407 | }, |
| 408 | /* EVEX_W_0F381E_P_2 */ |
| 409 | { |
| 410 | { "vpabsd", { XM, EXx }, 0 }, |
| 411 | }, |
| 412 | /* EVEX_W_0F381F_P_2 */ |
| 413 | { |
| 414 | { Bad_Opcode }, |
| 415 | { "vpabsq", { XM, EXx }, 0 }, |
| 416 | }, |
| 417 | /* EVEX_W_0F3820_P_1 */ |
| 418 | { |
| 419 | { "vpmovswb", { EXxmmq, XM }, 0 }, |
| 420 | }, |
| 421 | /* EVEX_W_0F3821_P_1 */ |
| 422 | { |
| 423 | { "vpmovsdb", { EXxmmqd, XM }, 0 }, |
| 424 | }, |
| 425 | /* EVEX_W_0F3822_P_1 */ |
| 426 | { |
| 427 | { "vpmovsqb", { EXxmmdw, XM }, 0 }, |
| 428 | }, |
| 429 | /* EVEX_W_0F3823_P_1 */ |
| 430 | { |
| 431 | { "vpmovsdw", { EXxmmq, XM }, 0 }, |
| 432 | }, |
| 433 | /* EVEX_W_0F3824_P_1 */ |
| 434 | { |
| 435 | { "vpmovsqw", { EXxmmqd, XM }, 0 }, |
| 436 | }, |
| 437 | /* EVEX_W_0F3825_P_1 */ |
| 438 | { |
| 439 | { "vpmovsqd", { EXxmmq, XM }, 0 }, |
| 440 | }, |
| 441 | /* EVEX_W_0F3825_P_2 */ |
| 442 | { |
| 443 | { "vpmovsxdq", { XM, EXxmmq }, 0 }, |
| 444 | }, |
| 445 | /* EVEX_W_0F3828_P_2 */ |
| 446 | { |
| 447 | { Bad_Opcode }, |
| 448 | { "vpmuldq", { XM, Vex, EXx }, 0 }, |
| 449 | }, |
| 450 | /* EVEX_W_0F3829_P_2 */ |
| 451 | { |
| 452 | { Bad_Opcode }, |
| 453 | { "vpcmpeqq", { XMask, Vex, EXx }, 0 }, |
| 454 | }, |
| 455 | /* EVEX_W_0F382A_P_1 */ |
| 456 | { |
| 457 | { Bad_Opcode }, |
| 458 | { "vpbroadcastmb2q", { XM, MaskR }, 0 }, |
| 459 | }, |
| 460 | /* EVEX_W_0F382A_P_2 */ |
| 461 | { |
| 462 | { "vmovntdqa", { XM, EXEvexXNoBcst }, 0 }, |
| 463 | }, |
| 464 | /* EVEX_W_0F382B */ |
| 465 | { |
| 466 | { PREFIX_TABLE (PREFIX_VEX_0F382B) }, |
| 467 | }, |
| 468 | /* EVEX_W_0F3830_P_1 */ |
| 469 | { |
| 470 | { "vpmovwb", { EXxmmq, XM }, 0 }, |
| 471 | }, |
| 472 | /* EVEX_W_0F3831_P_1 */ |
| 473 | { |
| 474 | { "vpmovdb", { EXxmmqd, XM }, 0 }, |
| 475 | }, |
| 476 | /* EVEX_W_0F3832_P_1 */ |
| 477 | { |
| 478 | { "vpmovqb", { EXxmmdw, XM }, 0 }, |
| 479 | }, |
| 480 | /* EVEX_W_0F3833_P_1 */ |
| 481 | { |
| 482 | { "vpmovdw", { EXxmmq, XM }, 0 }, |
| 483 | }, |
| 484 | /* EVEX_W_0F3834_P_1 */ |
| 485 | { |
| 486 | { "vpmovqw", { EXxmmqd, XM }, 0 }, |
| 487 | }, |
| 488 | /* EVEX_W_0F3835_P_1 */ |
| 489 | { |
| 490 | { "vpmovqd", { EXxmmq, XM }, 0 }, |
| 491 | }, |
| 492 | /* EVEX_W_0F3835_P_2 */ |
| 493 | { |
| 494 | { "vpmovzxdq", { XM, EXxmmq }, 0 }, |
| 495 | }, |
| 496 | /* EVEX_W_0F3837_P_2 */ |
| 497 | { |
| 498 | { Bad_Opcode }, |
| 499 | { "vpcmpgtq", { XMask, Vex, EXx }, 0 }, |
| 500 | }, |
| 501 | /* EVEX_W_0F383A_P_1 */ |
| 502 | { |
| 503 | { "vpbroadcastmw2d", { XM, MaskR }, 0 }, |
| 504 | }, |
| 505 | /* EVEX_W_0F3852_P_1 */ |
| 506 | { |
| 507 | { "vdpbf16ps", { XM, Vex, EXx }, 0 }, |
| 508 | { Bad_Opcode }, |
| 509 | }, |
| 510 | /* EVEX_W_0F3859_P_2 */ |
| 511 | { |
| 512 | { "vbroadcasti32x2", { XM, EXxmm_mq }, 0 }, |
| 513 | { "vpbroadcastq", { XM, EXxmm_mq }, 0 }, |
| 514 | }, |
| 515 | /* EVEX_W_0F385A_P_2 */ |
| 516 | { |
| 517 | { MOD_TABLE (MOD_EVEX_0F385A_P_2_W_0) }, |
| 518 | { MOD_TABLE (MOD_EVEX_0F385A_P_2_W_1) }, |
| 519 | }, |
| 520 | /* EVEX_W_0F385B_P_2 */ |
| 521 | { |
| 522 | { MOD_TABLE (MOD_EVEX_0F385B_P_2_W_0) }, |
| 523 | { MOD_TABLE (MOD_EVEX_0F385B_P_2_W_1) }, |
| 524 | }, |
| 525 | /* EVEX_W_0F3862_P_2 */ |
| 526 | { |
| 527 | { "vpexpandb", { XM, EXbScalar }, 0 }, |
| 528 | { "vpexpandw", { XM, EXwScalar }, 0 }, |
| 529 | }, |
| 530 | /* EVEX_W_0F3863_P_2 */ |
| 531 | { |
| 532 | { "vpcompressb", { EXbScalar, XM }, 0 }, |
| 533 | { "vpcompressw", { EXwScalar, XM }, 0 }, |
| 534 | }, |
| 535 | /* EVEX_W_0F3870_P_2 */ |
| 536 | { |
| 537 | { Bad_Opcode }, |
| 538 | { "vpshldvw", { XM, Vex, EXx }, 0 }, |
| 539 | }, |
| 540 | /* EVEX_W_0F3872_P_1 */ |
| 541 | { |
| 542 | { "vcvtneps2bf16%XY", { XMxmmq, EXx }, 0 }, |
| 543 | { Bad_Opcode }, |
| 544 | }, |
| 545 | /* EVEX_W_0F3872_P_2 */ |
| 546 | { |
| 547 | { Bad_Opcode }, |
| 548 | { "vpshrdvw", { XM, Vex, EXx }, 0 }, |
| 549 | }, |
| 550 | /* EVEX_W_0F3872_P_3 */ |
| 551 | { |
| 552 | { "vcvtne2ps2bf16", { XM, Vex, EXx}, 0 }, |
| 553 | { Bad_Opcode }, |
| 554 | }, |
| 555 | /* EVEX_W_0F387A_P_2 */ |
| 556 | { |
| 557 | { "vpbroadcastb", { XM, Rd }, 0 }, |
| 558 | }, |
| 559 | /* EVEX_W_0F387B_P_2 */ |
| 560 | { |
| 561 | { "vpbroadcastw", { XM, Rd }, 0 }, |
| 562 | }, |
| 563 | /* EVEX_W_0F3883_P_2 */ |
| 564 | { |
| 565 | { Bad_Opcode }, |
| 566 | { "vpmultishiftqb", { XM, Vex, EXx }, 0 }, |
| 567 | }, |
| 568 | /* EVEX_W_0F3891_P_2 */ |
| 569 | { |
| 570 | { "vpgatherqd", { XMxmmq, MVexVSIBQDWpX }, 0 }, |
| 571 | { "vpgatherqq", { XM, MVexVSIBQWpX }, 0 }, |
| 572 | }, |
| 573 | /* EVEX_W_0F3893_P_2 */ |
| 574 | { |
| 575 | { "vgatherqps", { XMxmmq, MVexVSIBQDWpX }, 0 }, |
| 576 | { "vgatherqpd", { XM, MVexVSIBQWpX }, 0 }, |
| 577 | }, |
| 578 | /* EVEX_W_0F38A1_P_2 */ |
| 579 | { |
| 580 | { "vpscatterqd", { MVexVSIBQDWpX, XMxmmq }, 0 }, |
| 581 | { "vpscatterqq", { MVexVSIBQWpX, XM }, 0 }, |
| 582 | }, |
| 583 | /* EVEX_W_0F38A3_P_2 */ |
| 584 | { |
| 585 | { "vscatterqps", { MVexVSIBQDWpX, XMxmmq }, 0 }, |
| 586 | { "vscatterqpd", { MVexVSIBQWpX, XM }, 0 }, |
| 587 | }, |
| 588 | /* EVEX_W_0F38C7_R_1_P_2 */ |
| 589 | { |
| 590 | { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_1_P_2_W_0) }, |
| 591 | { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_1_P_2_W_1) }, |
| 592 | }, |
| 593 | /* EVEX_W_0F38C7_R_2_P_2 */ |
| 594 | { |
| 595 | { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_2_P_2_W_0) }, |
| 596 | { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_2_P_2_W_1) }, |
| 597 | }, |
| 598 | /* EVEX_W_0F38C7_R_5_P_2 */ |
| 599 | { |
| 600 | { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_5_P_2_W_0) }, |
| 601 | { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_5_P_2_W_1) }, |
| 602 | }, |
| 603 | /* EVEX_W_0F38C7_R_6_P_2 */ |
| 604 | { |
| 605 | { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_6_P_2_W_0) }, |
| 606 | { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_6_P_2_W_1) }, |
| 607 | }, |
| 608 | /* EVEX_W_0F3A00_P_2 */ |
| 609 | { |
| 610 | { Bad_Opcode }, |
| 611 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A00_P_2_W_1) }, |
| 612 | }, |
| 613 | /* EVEX_W_0F3A01_P_2 */ |
| 614 | { |
| 615 | { Bad_Opcode }, |
| 616 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A01_P_2_W_1) }, |
| 617 | }, |
| 618 | /* EVEX_W_0F3A05_P_2 */ |
| 619 | { |
| 620 | { Bad_Opcode }, |
| 621 | { "vpermilpd", { XM, EXx, Ib }, 0 }, |
| 622 | }, |
| 623 | /* EVEX_W_0F3A08_P_2 */ |
| 624 | { |
| 625 | { "vrndscaleps", { XM, EXx, EXxEVexS, Ib }, 0 }, |
| 626 | }, |
| 627 | /* EVEX_W_0F3A09_P_2 */ |
| 628 | { |
| 629 | { Bad_Opcode }, |
| 630 | { "vrndscalepd", { XM, EXx, EXxEVexS, Ib }, 0 }, |
| 631 | }, |
| 632 | /* EVEX_W_0F3A0A_P_2 */ |
| 633 | { |
| 634 | { "vrndscaless", { XMScalar, VexScalar, EXxmm_md, EXxEVexS, Ib }, 0 }, |
| 635 | }, |
| 636 | /* EVEX_W_0F3A0B_P_2 */ |
| 637 | { |
| 638 | { Bad_Opcode }, |
| 639 | { "vrndscalesd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS, Ib }, 0 }, |
| 640 | }, |
| 641 | /* EVEX_W_0F3A18_P_2 */ |
| 642 | { |
| 643 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A18_P_2_W_0) }, |
| 644 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A18_P_2_W_1) }, |
| 645 | }, |
| 646 | /* EVEX_W_0F3A19_P_2 */ |
| 647 | { |
| 648 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A19_P_2_W_0) }, |
| 649 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A19_P_2_W_1) }, |
| 650 | }, |
| 651 | /* EVEX_W_0F3A1A_P_2 */ |
| 652 | { |
| 653 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A1A_P_2_W_0) }, |
| 654 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A1A_P_2_W_1) }, |
| 655 | }, |
| 656 | /* EVEX_W_0F3A1B_P_2 */ |
| 657 | { |
| 658 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A1B_P_2_W_0) }, |
| 659 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A1B_P_2_W_1) }, |
| 660 | }, |
| 661 | /* EVEX_W_0F3A21_P_2 */ |
| 662 | { |
| 663 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A21_P_2_W_0) }, |
| 664 | }, |
| 665 | /* EVEX_W_0F3A23_P_2 */ |
| 666 | { |
| 667 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A23_P_2_W_0) }, |
| 668 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A23_P_2_W_1) }, |
| 669 | }, |
| 670 | /* EVEX_W_0F3A38_P_2 */ |
| 671 | { |
| 672 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A38_P_2_W_0) }, |
| 673 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A38_P_2_W_1) }, |
| 674 | }, |
| 675 | /* EVEX_W_0F3A39_P_2 */ |
| 676 | { |
| 677 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A39_P_2_W_0) }, |
| 678 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A39_P_2_W_1) }, |
| 679 | }, |
| 680 | /* EVEX_W_0F3A3A_P_2 */ |
| 681 | { |
| 682 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A3A_P_2_W_0) }, |
| 683 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A3A_P_2_W_1) }, |
| 684 | }, |
| 685 | /* EVEX_W_0F3A3B_P_2 */ |
| 686 | { |
| 687 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A3B_P_2_W_0) }, |
| 688 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A3B_P_2_W_1) }, |
| 689 | }, |
| 690 | /* EVEX_W_0F3A42_P_2 */ |
| 691 | { |
| 692 | { "vdbpsadbw", { XM, Vex, EXx, Ib }, 0 }, |
| 693 | }, |
| 694 | /* EVEX_W_0F3A43_P_2 */ |
| 695 | { |
| 696 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A43_P_2_W_0) }, |
| 697 | { EVEX_LEN_TABLE (EVEX_LEN_0F3A43_P_2_W_1) }, |
| 698 | }, |
| 699 | /* EVEX_W_0F3A70_P_2 */ |
| 700 | { |
| 701 | { Bad_Opcode }, |
| 702 | { "vpshldw", { XM, Vex, EXx, Ib }, 0 }, |
| 703 | }, |
| 704 | /* EVEX_W_0F3A72_P_2 */ |
| 705 | { |
| 706 | { Bad_Opcode }, |
| 707 | { "vpshrdw", { XM, Vex, EXx, Ib }, 0 }, |
| 708 | }, |