| 1 | // i386 register table. |
| 2 | // Copyright 2007 |
| 3 | // Free Software Foundation, Inc. |
| 4 | // |
| 5 | // This file is part of the GNU opcodes library. |
| 6 | // |
| 7 | // This library is free software; you can redistribute it and/or modify |
| 8 | // it under the terms of the GNU General Public License as published by |
| 9 | // the Free Software Foundation; either version 3, or (at your option) |
| 10 | // any later version. |
| 11 | // |
| 12 | // It is distributed in the hope that it will be useful, but WITHOUT |
| 13 | // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| 14 | // or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
| 15 | // License for more details. |
| 16 | // |
| 17 | // You should have received a copy of the GNU General Public License |
| 18 | // along with GAS; see the file COPYING. If not, write to the Free |
| 19 | // Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA |
| 20 | // 02110-1301, USA. |
| 21 | |
| 22 | // Make %st first as we test for it. |
| 23 | st, FloatReg|FloatAcc, 0, 0 |
| 24 | // 8 bit regs |
| 25 | al, Reg8|Acc, 0, 0 |
| 26 | cl, Reg8|ShiftCount, 0, 1 |
| 27 | dl, Reg8, 0, 2 |
| 28 | bl, Reg8, 0, 3 |
| 29 | ah, Reg8, 0, 4 |
| 30 | ch, Reg8, 0, 5 |
| 31 | dh, Reg8, 0, 6 |
| 32 | bh, Reg8, 0, 7 |
| 33 | axl, Reg8|Acc, RegRex64, 0 |
| 34 | cxl, Reg8, RegRex64, 1 |
| 35 | dxl, Reg8, RegRex64, 2 |
| 36 | bxl, Reg8, RegRex64, 3 |
| 37 | spl, Reg8, RegRex64, 4 |
| 38 | bpl, Reg8, RegRex64, 5 |
| 39 | sil, Reg8, RegRex64, 6 |
| 40 | dil, Reg8, RegRex64, 7 |
| 41 | r8b, Reg8, RegRex|RegRex64, 0 |
| 42 | r9b, Reg8, RegRex|RegRex64, 1 |
| 43 | r10b, Reg8, RegRex|RegRex64, 2 |
| 44 | r11b, Reg8, RegRex|RegRex64, 3 |
| 45 | r12b, Reg8, RegRex|RegRex64, 4 |
| 46 | r13b, Reg8, RegRex|RegRex64, 5 |
| 47 | r14b, Reg8, RegRex|RegRex64, 6 |
| 48 | r15b, Reg8, RegRex|RegRex64, 7 |
| 49 | // 16 bit regs |
| 50 | ax, Reg16|Acc, 0, 0 |
| 51 | cx, Reg16, 0, 1 |
| 52 | dx, Reg16|InOutPortReg, 0, 2 |
| 53 | bx, Reg16|BaseIndex, 0, 3 |
| 54 | sp, Reg16, 0, 4 |
| 55 | bp, Reg16|BaseIndex, 0, 5 |
| 56 | si, Reg16|BaseIndex, 0, 6 |
| 57 | di, Reg16|BaseIndex, 0, 7 |
| 58 | r8w, Reg16, RegRex, 0 |
| 59 | r9w, Reg16, RegRex, 1 |
| 60 | r10w, Reg16, RegRex, 2 |
| 61 | r11w, Reg16, RegRex, 3 |
| 62 | r12w, Reg16, RegRex, 4 |
| 63 | r13w, Reg16, RegRex, 5 |
| 64 | r14w, Reg16, RegRex, 6 |
| 65 | r15w, Reg16, RegRex, 7 |
| 66 | // 32 bit regs |
| 67 | eax, Reg32|BaseIndex|Acc, 0, 0 |
| 68 | ecx, Reg32|BaseIndex, 0, 1 |
| 69 | edx, Reg32|BaseIndex, 0, 2 |
| 70 | ebx, Reg32|BaseIndex, 0, 3 |
| 71 | esp, Reg32, 0, 4 |
| 72 | ebp, Reg32|BaseIndex, 0, 5 |
| 73 | esi, Reg32|BaseIndex, 0, 6 |
| 74 | edi, Reg32|BaseIndex, 0, 7 |
| 75 | r8d, Reg32|BaseIndex, RegRex, 0 |
| 76 | r9d, Reg32|BaseIndex, RegRex, 1 |
| 77 | r10d, Reg32|BaseIndex, RegRex, 2 |
| 78 | r11d, Reg32|BaseIndex, RegRex, 3 |
| 79 | r12d, Reg32|BaseIndex, RegRex, 4 |
| 80 | r13d, Reg32|BaseIndex, RegRex, 5 |
| 81 | r14d, Reg32|BaseIndex, RegRex, 6 |
| 82 | r15d, Reg32|BaseIndex, RegRex, 7 |
| 83 | rax, Reg64|BaseIndex|Acc, 0, 0 |
| 84 | rcx, Reg64|BaseIndex, 0, 1 |
| 85 | rdx, Reg64|BaseIndex, 0, 2 |
| 86 | rbx, Reg64|BaseIndex, 0, 3 |
| 87 | rsp, Reg64, 0, 4 |
| 88 | rbp, Reg64|BaseIndex, 0, 5 |
| 89 | rsi, Reg64|BaseIndex, 0, 6 |
| 90 | rdi, Reg64|BaseIndex, 0, 7 |
| 91 | r8, Reg64|BaseIndex, RegRex, 0 |
| 92 | r9, Reg64|BaseIndex, RegRex, 1 |
| 93 | r10, Reg64|BaseIndex, RegRex, 2 |
| 94 | r11, Reg64|BaseIndex, RegRex, 3 |
| 95 | r12, Reg64|BaseIndex, RegRex, 4 |
| 96 | r13, Reg64|BaseIndex, RegRex, 5 |
| 97 | r14, Reg64|BaseIndex, RegRex, 6 |
| 98 | r15, Reg64|BaseIndex, RegRex, 7 |
| 99 | // Segment registers. |
| 100 | es, SReg2, 0, 0 |
| 101 | cs, SReg2, 0, 1 |
| 102 | ss, SReg2, 0, 2 |
| 103 | ds, SReg2, 0, 3 |
| 104 | fs, SReg3, 0, 4 |
| 105 | gs, SReg3, 0, 5 |
| 106 | // Control registers. |
| 107 | cr0, Control, 0, 0 |
| 108 | cr1, Control, 0, 1 |
| 109 | cr2, Control, 0, 2 |
| 110 | cr3, Control, 0, 3 |
| 111 | cr4, Control, 0, 4 |
| 112 | cr5, Control, 0, 5 |
| 113 | cr6, Control, 0, 6 |
| 114 | cr7, Control, 0, 7 |
| 115 | cr8, Control, RegRex, 0 |
| 116 | cr9, Control, RegRex, 1 |
| 117 | cr10, Control, RegRex, 2 |
| 118 | cr11, Control, RegRex, 3 |
| 119 | cr12, Control, RegRex, 4 |
| 120 | cr13, Control, RegRex, 5 |
| 121 | cr14, Control, RegRex, 6 |
| 122 | cr15, Control, RegRex, 7 |
| 123 | // Debug registers. |
| 124 | db0, Debug, 0, 0 |
| 125 | db1, Debug, 0, 1 |
| 126 | db2, Debug, 0, 2 |
| 127 | db3, Debug, 0, 3 |
| 128 | db4, Debug, 0, 4 |
| 129 | db5, Debug, 0, 5 |
| 130 | db6, Debug, 0, 6 |
| 131 | db7, Debug, 0, 7 |
| 132 | db8, Debug, RegRex, 0 |
| 133 | db9, Debug, RegRex, 1 |
| 134 | db10, Debug, RegRex, 2 |
| 135 | db11, Debug, RegRex, 3 |
| 136 | db12, Debug, RegRex, 4 |
| 137 | db13, Debug, RegRex, 5 |
| 138 | db14, Debug, RegRex, 6 |
| 139 | db15, Debug, RegRex, 7 |
| 140 | dr0, Debug, 0, 0 |
| 141 | dr1, Debug, 0, 1 |
| 142 | dr2, Debug, 0, 2 |
| 143 | dr3, Debug, 0, 3 |
| 144 | dr4, Debug, 0, 4 |
| 145 | dr5, Debug, 0, 5 |
| 146 | dr6, Debug, 0, 6 |
| 147 | dr7, Debug, 0, 7 |
| 148 | dr8, Debug, RegRex, 0 |
| 149 | dr9, Debug, RegRex, 1 |
| 150 | dr10, Debug, RegRex, 2 |
| 151 | dr11, Debug, RegRex, 3 |
| 152 | dr12, Debug, RegRex, 4 |
| 153 | dr13, Debug, RegRex, 5 |
| 154 | dr14, Debug, RegRex, 6 |
| 155 | dr15, Debug, RegRex, 7 |
| 156 | // Test registers. |
| 157 | tr0, Test, 0, 0 |
| 158 | tr1, Test, 0, 1 |
| 159 | tr2, Test, 0, 2 |
| 160 | tr3, Test, 0, 3 |
| 161 | tr4, Test, 0, 4 |
| 162 | tr5, Test, 0, 5 |
| 163 | tr6, Test, 0, 6 |
| 164 | tr7, Test, 0, 7 |
| 165 | // MMX and simd registers. |
| 166 | mm0, RegMMX, 0, 0 |
| 167 | mm1, RegMMX, 0, 1 |
| 168 | mm2, RegMMX, 0, 2 |
| 169 | mm3, RegMMX, 0, 3 |
| 170 | mm4, RegMMX, 0, 4 |
| 171 | mm5, RegMMX, 0, 5 |
| 172 | mm6, RegMMX, 0, 6 |
| 173 | mm7, RegMMX, 0, 7 |
| 174 | xmm0, RegXMM, 0, 0 |
| 175 | xmm1, RegXMM, 0, 1 |
| 176 | xmm2, RegXMM, 0, 2 |
| 177 | xmm3, RegXMM, 0, 3 |
| 178 | xmm4, RegXMM, 0, 4 |
| 179 | xmm5, RegXMM, 0, 5 |
| 180 | xmm6, RegXMM, 0, 6 |
| 181 | xmm7, RegXMM, 0, 7 |
| 182 | xmm8, RegXMM, RegRex, 0 |
| 183 | xmm9, RegXMM, RegRex, 1 |
| 184 | xmm10, RegXMM, RegRex, 2 |
| 185 | xmm11, RegXMM, RegRex, 3 |
| 186 | xmm12, RegXMM, RegRex, 4 |
| 187 | xmm13, RegXMM, RegRex, 5 |
| 188 | xmm14, RegXMM, RegRex, 6 |
| 189 | xmm15, RegXMM, RegRex, 7 |
| 190 | // No type will make this register rejected for all purposes except |
| 191 | // for addressing. This saves creating one extra type for RIP. |
| 192 | rip, BaseIndex, 0, RegRip |
| 193 | // No type will make these registers rejected for all purposes except |
| 194 | // for addressing. |
| 195 | eiz, BaseIndex, 0, RegEiz |
| 196 | riz, BaseIndex, 0, RegRiz |
| 197 | // fp regs. |
| 198 | st(0), FloatReg|FloatAcc, 0, 0 |
| 199 | st(1), FloatReg, 0, 1 |
| 200 | st(2), FloatReg, 0, 2 |
| 201 | st(3), FloatReg, 0, 3 |
| 202 | st(4), FloatReg, 0, 4 |
| 203 | st(5), FloatReg, 0, 5 |
| 204 | st(6), FloatReg, 0, 6 |
| 205 | st(7), FloatReg, 0, 7 |