| 1 | /* Instruction building/extraction support for m32c. -*- C -*- |
| 2 | |
| 3 | THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. |
| 4 | - the resultant file is machine generated, cgen-ibld.in isn't |
| 5 | |
| 6 | Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005 |
| 7 | Free Software Foundation, Inc. |
| 8 | |
| 9 | This file is part of the GNU Binutils and GDB, the GNU debugger. |
| 10 | |
| 11 | This program is free software; you can redistribute it and/or modify |
| 12 | it under the terms of the GNU General Public License as published by |
| 13 | the Free Software Foundation; either version 2, or (at your option) |
| 14 | any later version. |
| 15 | |
| 16 | This program is distributed in the hope that it will be useful, |
| 17 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | GNU General Public License for more details. |
| 20 | |
| 21 | You should have received a copy of the GNU General Public License |
| 22 | along with this program; if not, write to the Free Software Foundation, Inc., |
| 23 | 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ |
| 24 | |
| 25 | /* ??? Eventually more and more of this stuff can go to cpu-independent files. |
| 26 | Keep that in mind. */ |
| 27 | |
| 28 | #include "sysdep.h" |
| 29 | #include <stdio.h> |
| 30 | #include "ansidecl.h" |
| 31 | #include "dis-asm.h" |
| 32 | #include "bfd.h" |
| 33 | #include "symcat.h" |
| 34 | #include "m32c-desc.h" |
| 35 | #include "m32c-opc.h" |
| 36 | #include "opintl.h" |
| 37 | #include "safe-ctype.h" |
| 38 | |
| 39 | #undef min |
| 40 | #define min(a,b) ((a) < (b) ? (a) : (b)) |
| 41 | #undef max |
| 42 | #define max(a,b) ((a) > (b) ? (a) : (b)) |
| 43 | |
| 44 | /* Used by the ifield rtx function. */ |
| 45 | #define FLD(f) (fields->f) |
| 46 | |
| 47 | static const char * insert_normal |
| 48 | (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int, |
| 49 | unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR); |
| 50 | static const char * insert_insn_normal |
| 51 | (CGEN_CPU_DESC, const CGEN_INSN *, |
| 52 | CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); |
| 53 | static int extract_normal |
| 54 | (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, |
| 55 | unsigned int, unsigned int, unsigned int, unsigned int, |
| 56 | unsigned int, unsigned int, bfd_vma, long *); |
| 57 | static int extract_insn_normal |
| 58 | (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *, |
| 59 | CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); |
| 60 | #if CGEN_INT_INSN_P |
| 61 | static void put_insn_int_value |
| 62 | (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT); |
| 63 | #endif |
| 64 | #if ! CGEN_INT_INSN_P |
| 65 | static CGEN_INLINE void insert_1 |
| 66 | (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *); |
| 67 | static CGEN_INLINE int fill_cache |
| 68 | (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma); |
| 69 | static CGEN_INLINE long extract_1 |
| 70 | (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma); |
| 71 | #endif |
| 72 | \f |
| 73 | /* Operand insertion. */ |
| 74 | |
| 75 | #if ! CGEN_INT_INSN_P |
| 76 | |
| 77 | /* Subroutine of insert_normal. */ |
| 78 | |
| 79 | static CGEN_INLINE void |
| 80 | insert_1 (CGEN_CPU_DESC cd, |
| 81 | unsigned long value, |
| 82 | int start, |
| 83 | int length, |
| 84 | int word_length, |
| 85 | unsigned char *bufp) |
| 86 | { |
| 87 | unsigned long x,mask; |
| 88 | int shift; |
| 89 | |
| 90 | x = cgen_get_insn_value (cd, bufp, word_length); |
| 91 | |
| 92 | /* Written this way to avoid undefined behaviour. */ |
| 93 | mask = (((1L << (length - 1)) - 1) << 1) | 1; |
| 94 | if (CGEN_INSN_LSB0_P) |
| 95 | shift = (start + 1) - length; |
| 96 | else |
| 97 | shift = (word_length - (start + length)); |
| 98 | x = (x & ~(mask << shift)) | ((value & mask) << shift); |
| 99 | |
| 100 | cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x); |
| 101 | } |
| 102 | |
| 103 | #endif /* ! CGEN_INT_INSN_P */ |
| 104 | |
| 105 | /* Default insertion routine. |
| 106 | |
| 107 | ATTRS is a mask of the boolean attributes. |
| 108 | WORD_OFFSET is the offset in bits from the start of the insn of the value. |
| 109 | WORD_LENGTH is the length of the word in bits in which the value resides. |
| 110 | START is the starting bit number in the word, architecture origin. |
| 111 | LENGTH is the length of VALUE in bits. |
| 112 | TOTAL_LENGTH is the total length of the insn in bits. |
| 113 | |
| 114 | The result is an error message or NULL if success. */ |
| 115 | |
| 116 | /* ??? This duplicates functionality with bfd's howto table and |
| 117 | bfd_install_relocation. */ |
| 118 | /* ??? This doesn't handle bfd_vma's. Create another function when |
| 119 | necessary. */ |
| 120 | |
| 121 | static const char * |
| 122 | insert_normal (CGEN_CPU_DESC cd, |
| 123 | long value, |
| 124 | unsigned int attrs, |
| 125 | unsigned int word_offset, |
| 126 | unsigned int start, |
| 127 | unsigned int length, |
| 128 | unsigned int word_length, |
| 129 | unsigned int total_length, |
| 130 | CGEN_INSN_BYTES_PTR buffer) |
| 131 | { |
| 132 | static char errbuf[100]; |
| 133 | /* Written this way to avoid undefined behaviour. */ |
| 134 | unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1; |
| 135 | |
| 136 | /* If LENGTH is zero, this operand doesn't contribute to the value. */ |
| 137 | if (length == 0) |
| 138 | return NULL; |
| 139 | |
| 140 | if (word_length > 32) |
| 141 | abort (); |
| 142 | |
| 143 | /* For architectures with insns smaller than the base-insn-bitsize, |
| 144 | word_length may be too big. */ |
| 145 | if (cd->min_insn_bitsize < cd->base_insn_bitsize) |
| 146 | { |
| 147 | if (word_offset == 0 |
| 148 | && word_length > total_length) |
| 149 | word_length = total_length; |
| 150 | } |
| 151 | |
| 152 | /* Ensure VALUE will fit. */ |
| 153 | if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) |
| 154 | { |
| 155 | long minval = - (1L << (length - 1)); |
| 156 | unsigned long maxval = mask; |
| 157 | |
| 158 | if ((value > 0 && (unsigned long) value > maxval) |
| 159 | || value < minval) |
| 160 | { |
| 161 | /* xgettext:c-format */ |
| 162 | sprintf (errbuf, |
| 163 | _("operand out of range (%ld not between %ld and %lu)"), |
| 164 | value, minval, maxval); |
| 165 | return errbuf; |
| 166 | } |
| 167 | } |
| 168 | else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) |
| 169 | { |
| 170 | unsigned long maxval = mask; |
| 171 | |
| 172 | if ((unsigned long) value > maxval) |
| 173 | { |
| 174 | /* xgettext:c-format */ |
| 175 | sprintf (errbuf, |
| 176 | _("operand out of range (%lu not between 0 and %lu)"), |
| 177 | value, maxval); |
| 178 | return errbuf; |
| 179 | } |
| 180 | } |
| 181 | else |
| 182 | { |
| 183 | if (! cgen_signed_overflow_ok_p (cd)) |
| 184 | { |
| 185 | long minval = - (1L << (length - 1)); |
| 186 | long maxval = (1L << (length - 1)) - 1; |
| 187 | |
| 188 | if (value < minval || value > maxval) |
| 189 | { |
| 190 | sprintf |
| 191 | /* xgettext:c-format */ |
| 192 | (errbuf, _("operand out of range (%ld not between %ld and %ld)"), |
| 193 | value, minval, maxval); |
| 194 | return errbuf; |
| 195 | } |
| 196 | } |
| 197 | } |
| 198 | |
| 199 | #if CGEN_INT_INSN_P |
| 200 | |
| 201 | { |
| 202 | int shift; |
| 203 | |
| 204 | if (CGEN_INSN_LSB0_P) |
| 205 | shift = (word_offset + start + 1) - length; |
| 206 | else |
| 207 | shift = total_length - (word_offset + start + length); |
| 208 | *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); |
| 209 | } |
| 210 | |
| 211 | #else /* ! CGEN_INT_INSN_P */ |
| 212 | |
| 213 | { |
| 214 | unsigned char *bufp = (unsigned char *) buffer + word_offset / 8; |
| 215 | |
| 216 | insert_1 (cd, value, start, length, word_length, bufp); |
| 217 | } |
| 218 | |
| 219 | #endif /* ! CGEN_INT_INSN_P */ |
| 220 | |
| 221 | return NULL; |
| 222 | } |
| 223 | |
| 224 | /* Default insn builder (insert handler). |
| 225 | The instruction is recorded in CGEN_INT_INSN_P byte order (meaning |
| 226 | that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is |
| 227 | recorded in host byte order, otherwise BUFFER is an array of bytes |
| 228 | and the value is recorded in target byte order). |
| 229 | The result is an error message or NULL if success. */ |
| 230 | |
| 231 | static const char * |
| 232 | insert_insn_normal (CGEN_CPU_DESC cd, |
| 233 | const CGEN_INSN * insn, |
| 234 | CGEN_FIELDS * fields, |
| 235 | CGEN_INSN_BYTES_PTR buffer, |
| 236 | bfd_vma pc) |
| 237 | { |
| 238 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); |
| 239 | unsigned long value; |
| 240 | const CGEN_SYNTAX_CHAR_TYPE * syn; |
| 241 | |
| 242 | CGEN_INIT_INSERT (cd); |
| 243 | value = CGEN_INSN_BASE_VALUE (insn); |
| 244 | |
| 245 | /* If we're recording insns as numbers (rather than a string of bytes), |
| 246 | target byte order handling is deferred until later. */ |
| 247 | |
| 248 | #if CGEN_INT_INSN_P |
| 249 | |
| 250 | put_insn_int_value (cd, buffer, cd->base_insn_bitsize, |
| 251 | CGEN_FIELDS_BITSIZE (fields), value); |
| 252 | |
| 253 | #else |
| 254 | |
| 255 | cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize, |
| 256 | (unsigned) CGEN_FIELDS_BITSIZE (fields)), |
| 257 | value); |
| 258 | |
| 259 | #endif /* ! CGEN_INT_INSN_P */ |
| 260 | |
| 261 | /* ??? It would be better to scan the format's fields. |
| 262 | Still need to be able to insert a value based on the operand though; |
| 263 | e.g. storing a branch displacement that got resolved later. |
| 264 | Needs more thought first. */ |
| 265 | |
| 266 | for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn) |
| 267 | { |
| 268 | const char *errmsg; |
| 269 | |
| 270 | if (CGEN_SYNTAX_CHAR_P (* syn)) |
| 271 | continue; |
| 272 | |
| 273 | errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn), |
| 274 | fields, buffer, pc); |
| 275 | if (errmsg) |
| 276 | return errmsg; |
| 277 | } |
| 278 | |
| 279 | return NULL; |
| 280 | } |
| 281 | |
| 282 | #if CGEN_INT_INSN_P |
| 283 | /* Cover function to store an insn value into an integral insn. Must go here |
| 284 | because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */ |
| 285 | |
| 286 | static void |
| 287 | put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 288 | CGEN_INSN_BYTES_PTR buf, |
| 289 | int length, |
| 290 | int insn_length, |
| 291 | CGEN_INSN_INT value) |
| 292 | { |
| 293 | /* For architectures with insns smaller than the base-insn-bitsize, |
| 294 | length may be too big. */ |
| 295 | if (length > insn_length) |
| 296 | *buf = value; |
| 297 | else |
| 298 | { |
| 299 | int shift = insn_length - length; |
| 300 | /* Written this way to avoid undefined behaviour. */ |
| 301 | CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1; |
| 302 | |
| 303 | *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); |
| 304 | } |
| 305 | } |
| 306 | #endif |
| 307 | \f |
| 308 | /* Operand extraction. */ |
| 309 | |
| 310 | #if ! CGEN_INT_INSN_P |
| 311 | |
| 312 | /* Subroutine of extract_normal. |
| 313 | Ensure sufficient bytes are cached in EX_INFO. |
| 314 | OFFSET is the offset in bytes from the start of the insn of the value. |
| 315 | BYTES is the length of the needed value. |
| 316 | Returns 1 for success, 0 for failure. */ |
| 317 | |
| 318 | static CGEN_INLINE int |
| 319 | fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 320 | CGEN_EXTRACT_INFO *ex_info, |
| 321 | int offset, |
| 322 | int bytes, |
| 323 | bfd_vma pc) |
| 324 | { |
| 325 | /* It's doubtful that the middle part has already been fetched so |
| 326 | we don't optimize that case. kiss. */ |
| 327 | unsigned int mask; |
| 328 | disassemble_info *info = (disassemble_info *) ex_info->dis_info; |
| 329 | |
| 330 | /* First do a quick check. */ |
| 331 | mask = (1 << bytes) - 1; |
| 332 | if (((ex_info->valid >> offset) & mask) == mask) |
| 333 | return 1; |
| 334 | |
| 335 | /* Search for the first byte we need to read. */ |
| 336 | for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1) |
| 337 | if (! (mask & ex_info->valid)) |
| 338 | break; |
| 339 | |
| 340 | if (bytes) |
| 341 | { |
| 342 | int status; |
| 343 | |
| 344 | pc += offset; |
| 345 | status = (*info->read_memory_func) |
| 346 | (pc, ex_info->insn_bytes + offset, bytes, info); |
| 347 | |
| 348 | if (status != 0) |
| 349 | { |
| 350 | (*info->memory_error_func) (status, pc, info); |
| 351 | return 0; |
| 352 | } |
| 353 | |
| 354 | ex_info->valid |= ((1 << bytes) - 1) << offset; |
| 355 | } |
| 356 | |
| 357 | return 1; |
| 358 | } |
| 359 | |
| 360 | /* Subroutine of extract_normal. */ |
| 361 | |
| 362 | static CGEN_INLINE long |
| 363 | extract_1 (CGEN_CPU_DESC cd, |
| 364 | CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, |
| 365 | int start, |
| 366 | int length, |
| 367 | int word_length, |
| 368 | unsigned char *bufp, |
| 369 | bfd_vma pc ATTRIBUTE_UNUSED) |
| 370 | { |
| 371 | unsigned long x; |
| 372 | int shift; |
| 373 | |
| 374 | x = cgen_get_insn_value (cd, bufp, word_length); |
| 375 | |
| 376 | if (CGEN_INSN_LSB0_P) |
| 377 | shift = (start + 1) - length; |
| 378 | else |
| 379 | shift = (word_length - (start + length)); |
| 380 | return x >> shift; |
| 381 | } |
| 382 | |
| 383 | #endif /* ! CGEN_INT_INSN_P */ |
| 384 | |
| 385 | /* Default extraction routine. |
| 386 | |
| 387 | INSN_VALUE is the first base_insn_bitsize bits of the insn in host order, |
| 388 | or sometimes less for cases like the m32r where the base insn size is 32 |
| 389 | but some insns are 16 bits. |
| 390 | ATTRS is a mask of the boolean attributes. We only need `SIGNED', |
| 391 | but for generality we take a bitmask of all of them. |
| 392 | WORD_OFFSET is the offset in bits from the start of the insn of the value. |
| 393 | WORD_LENGTH is the length of the word in bits in which the value resides. |
| 394 | START is the starting bit number in the word, architecture origin. |
| 395 | LENGTH is the length of VALUE in bits. |
| 396 | TOTAL_LENGTH is the total length of the insn in bits. |
| 397 | |
| 398 | Returns 1 for success, 0 for failure. */ |
| 399 | |
| 400 | /* ??? The return code isn't properly used. wip. */ |
| 401 | |
| 402 | /* ??? This doesn't handle bfd_vma's. Create another function when |
| 403 | necessary. */ |
| 404 | |
| 405 | static int |
| 406 | extract_normal (CGEN_CPU_DESC cd, |
| 407 | #if ! CGEN_INT_INSN_P |
| 408 | CGEN_EXTRACT_INFO *ex_info, |
| 409 | #else |
| 410 | CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, |
| 411 | #endif |
| 412 | CGEN_INSN_INT insn_value, |
| 413 | unsigned int attrs, |
| 414 | unsigned int word_offset, |
| 415 | unsigned int start, |
| 416 | unsigned int length, |
| 417 | unsigned int word_length, |
| 418 | unsigned int total_length, |
| 419 | #if ! CGEN_INT_INSN_P |
| 420 | bfd_vma pc, |
| 421 | #else |
| 422 | bfd_vma pc ATTRIBUTE_UNUSED, |
| 423 | #endif |
| 424 | long *valuep) |
| 425 | { |
| 426 | long value, mask; |
| 427 | |
| 428 | /* If LENGTH is zero, this operand doesn't contribute to the value |
| 429 | so give it a standard value of zero. */ |
| 430 | if (length == 0) |
| 431 | { |
| 432 | *valuep = 0; |
| 433 | return 1; |
| 434 | } |
| 435 | |
| 436 | if (word_length > 32) |
| 437 | abort (); |
| 438 | |
| 439 | /* For architectures with insns smaller than the insn-base-bitsize, |
| 440 | word_length may be too big. */ |
| 441 | if (cd->min_insn_bitsize < cd->base_insn_bitsize) |
| 442 | { |
| 443 | if (word_offset == 0 |
| 444 | && word_length > total_length) |
| 445 | word_length = total_length; |
| 446 | } |
| 447 | |
| 448 | /* Does the value reside in INSN_VALUE, and at the right alignment? */ |
| 449 | |
| 450 | if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length)) |
| 451 | { |
| 452 | if (CGEN_INSN_LSB0_P) |
| 453 | value = insn_value >> ((word_offset + start + 1) - length); |
| 454 | else |
| 455 | value = insn_value >> (total_length - ( word_offset + start + length)); |
| 456 | } |
| 457 | |
| 458 | #if ! CGEN_INT_INSN_P |
| 459 | |
| 460 | else |
| 461 | { |
| 462 | unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; |
| 463 | |
| 464 | if (word_length > 32) |
| 465 | abort (); |
| 466 | |
| 467 | if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) |
| 468 | return 0; |
| 469 | |
| 470 | value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc); |
| 471 | } |
| 472 | |
| 473 | #endif /* ! CGEN_INT_INSN_P */ |
| 474 | |
| 475 | /* Written this way to avoid undefined behaviour. */ |
| 476 | mask = (((1L << (length - 1)) - 1) << 1) | 1; |
| 477 | |
| 478 | value &= mask; |
| 479 | /* sign extend? */ |
| 480 | if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) |
| 481 | && (value & (1L << (length - 1)))) |
| 482 | value |= ~mask; |
| 483 | |
| 484 | *valuep = value; |
| 485 | |
| 486 | return 1; |
| 487 | } |
| 488 | |
| 489 | /* Default insn extractor. |
| 490 | |
| 491 | INSN_VALUE is the first base_insn_bitsize bits, translated to host order. |
| 492 | The extracted fields are stored in FIELDS. |
| 493 | EX_INFO is used to handle reading variable length insns. |
| 494 | Return the length of the insn in bits, or 0 if no match, |
| 495 | or -1 if an error occurs fetching data (memory_error_func will have |
| 496 | been called). */ |
| 497 | |
| 498 | static int |
| 499 | extract_insn_normal (CGEN_CPU_DESC cd, |
| 500 | const CGEN_INSN *insn, |
| 501 | CGEN_EXTRACT_INFO *ex_info, |
| 502 | CGEN_INSN_INT insn_value, |
| 503 | CGEN_FIELDS *fields, |
| 504 | bfd_vma pc) |
| 505 | { |
| 506 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); |
| 507 | const CGEN_SYNTAX_CHAR_TYPE *syn; |
| 508 | |
| 509 | CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); |
| 510 | |
| 511 | CGEN_INIT_EXTRACT (cd); |
| 512 | |
| 513 | for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) |
| 514 | { |
| 515 | int length; |
| 516 | |
| 517 | if (CGEN_SYNTAX_CHAR_P (*syn)) |
| 518 | continue; |
| 519 | |
| 520 | length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn), |
| 521 | ex_info, insn_value, fields, pc); |
| 522 | if (length <= 0) |
| 523 | return length; |
| 524 | } |
| 525 | |
| 526 | /* We recognized and successfully extracted this insn. */ |
| 527 | return CGEN_INSN_BITSIZE (insn); |
| 528 | } |
| 529 | \f |
| 530 | /* Machine generated code added here. */ |
| 531 | |
| 532 | const char * m32c_cgen_insert_operand |
| 533 | (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); |
| 534 | |
| 535 | /* Main entry point for operand insertion. |
| 536 | |
| 537 | This function is basically just a big switch statement. Earlier versions |
| 538 | used tables to look up the function to use, but |
| 539 | - if the table contains both assembler and disassembler functions then |
| 540 | the disassembler contains much of the assembler and vice-versa, |
| 541 | - there's a lot of inlining possibilities as things grow, |
| 542 | - using a switch statement avoids the function call overhead. |
| 543 | |
| 544 | This function could be moved into `parse_insn_normal', but keeping it |
| 545 | separate makes clear the interface between `parse_insn_normal' and each of |
| 546 | the handlers. It's also needed by GAS to insert operands that couldn't be |
| 547 | resolved during parsing. */ |
| 548 | |
| 549 | const char * |
| 550 | m32c_cgen_insert_operand (CGEN_CPU_DESC cd, |
| 551 | int opindex, |
| 552 | CGEN_FIELDS * fields, |
| 553 | CGEN_INSN_BYTES_PTR buffer, |
| 554 | bfd_vma pc ATTRIBUTE_UNUSED) |
| 555 | { |
| 556 | const char * errmsg = NULL; |
| 557 | unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); |
| 558 | |
| 559 | switch (opindex) |
| 560 | { |
| 561 | case M32C_OPERAND_A0 : |
| 562 | break; |
| 563 | case M32C_OPERAND_A1 : |
| 564 | break; |
| 565 | case M32C_OPERAND_AN16_PUSH_S : |
| 566 | errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer); |
| 567 | break; |
| 568 | case M32C_OPERAND_BIT16AN : |
| 569 | errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); |
| 570 | break; |
| 571 | case M32C_OPERAND_BIT16RN : |
| 572 | errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer); |
| 573 | break; |
| 574 | case M32C_OPERAND_BIT32ANPREFIXED : |
| 575 | errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); |
| 576 | break; |
| 577 | case M32C_OPERAND_BIT32ANUNPREFIXED : |
| 578 | errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); |
| 579 | break; |
| 580 | case M32C_OPERAND_BIT32RNPREFIXED : |
| 581 | { |
| 582 | long value = fields->f_dst32_rn_prefixed_QI; |
| 583 | value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1)))); |
| 584 | errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); |
| 585 | } |
| 586 | break; |
| 587 | case M32C_OPERAND_BIT32RNUNPREFIXED : |
| 588 | { |
| 589 | long value = fields->f_dst32_rn_unprefixed_QI; |
| 590 | value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1)))); |
| 591 | errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); |
| 592 | } |
| 593 | break; |
| 594 | case M32C_OPERAND_BITBASE16_16_S8 : |
| 595 | errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer); |
| 596 | break; |
| 597 | case M32C_OPERAND_BITBASE16_16_U16 : |
| 598 | { |
| 599 | long value = fields->f_dsp_16_u16; |
| 600 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 601 | errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); |
| 602 | } |
| 603 | break; |
| 604 | case M32C_OPERAND_BITBASE16_16_U8 : |
| 605 | errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); |
| 606 | break; |
| 607 | case M32C_OPERAND_BITBASE16_8_U11_S : |
| 608 | { |
| 609 | { |
| 610 | FLD (f_bitno16_S) = ((FLD (f_bitbase16_u11_S)) & (7)); |
| 611 | FLD (f_dsp_8_u8) = ((((unsigned int) (FLD (f_bitbase16_u11_S)) >> (3))) & (255)); |
| 612 | } |
| 613 | errmsg = insert_normal (cd, fields->f_bitno16_S, 0, 0, 5, 3, 32, total_length, buffer); |
| 614 | if (errmsg) |
| 615 | break; |
| 616 | errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer); |
| 617 | if (errmsg) |
| 618 | break; |
| 619 | } |
| 620 | break; |
| 621 | case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : |
| 622 | { |
| 623 | { |
| 624 | FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s11_unprefixed)) & (7)); |
| 625 | FLD (f_dsp_16_s8) = ((int) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3)); |
| 626 | } |
| 627 | errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); |
| 628 | if (errmsg) |
| 629 | break; |
| 630 | errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer); |
| 631 | if (errmsg) |
| 632 | break; |
| 633 | } |
| 634 | break; |
| 635 | case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : |
| 636 | { |
| 637 | { |
| 638 | FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s19_unprefixed)) & (7)); |
| 639 | FLD (f_dsp_16_s16) = ((int) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3)); |
| 640 | } |
| 641 | errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); |
| 642 | if (errmsg) |
| 643 | break; |
| 644 | { |
| 645 | long value = fields->f_dsp_16_s16; |
| 646 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 647 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer); |
| 648 | } |
| 649 | if (errmsg) |
| 650 | break; |
| 651 | } |
| 652 | break; |
| 653 | case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : |
| 654 | { |
| 655 | { |
| 656 | FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u11_unprefixed)) & (7)); |
| 657 | FLD (f_dsp_16_u8) = ((((unsigned int) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255)); |
| 658 | } |
| 659 | errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); |
| 660 | if (errmsg) |
| 661 | break; |
| 662 | errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); |
| 663 | if (errmsg) |
| 664 | break; |
| 665 | } |
| 666 | break; |
| 667 | case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : |
| 668 | { |
| 669 | { |
| 670 | FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u19_unprefixed)) & (7)); |
| 671 | FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535)); |
| 672 | } |
| 673 | errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); |
| 674 | if (errmsg) |
| 675 | break; |
| 676 | { |
| 677 | long value = fields->f_dsp_16_u16; |
| 678 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 679 | errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); |
| 680 | } |
| 681 | if (errmsg) |
| 682 | break; |
| 683 | } |
| 684 | break; |
| 685 | case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : |
| 686 | { |
| 687 | { |
| 688 | FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u27_unprefixed)) & (7)); |
| 689 | FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535)); |
| 690 | FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255)); |
| 691 | } |
| 692 | errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); |
| 693 | if (errmsg) |
| 694 | break; |
| 695 | { |
| 696 | long value = fields->f_dsp_16_u16; |
| 697 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 698 | errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); |
| 699 | } |
| 700 | if (errmsg) |
| 701 | break; |
| 702 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); |
| 703 | if (errmsg) |
| 704 | break; |
| 705 | } |
| 706 | break; |
| 707 | case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : |
| 708 | { |
| 709 | { |
| 710 | FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s11_prefixed)) & (7)); |
| 711 | FLD (f_dsp_24_s8) = ((int) (FLD (f_bitbase32_24_s11_prefixed)) >> (3)); |
| 712 | } |
| 713 | errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); |
| 714 | if (errmsg) |
| 715 | break; |
| 716 | errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer); |
| 717 | if (errmsg) |
| 718 | break; |
| 719 | } |
| 720 | break; |
| 721 | case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : |
| 722 | { |
| 723 | { |
| 724 | FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s19_prefixed)) & (7)); |
| 725 | FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255)); |
| 726 | FLD (f_dsp_32_s8) = ((int) (FLD (f_bitbase32_24_s19_prefixed)) >> (11)); |
| 727 | } |
| 728 | errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); |
| 729 | if (errmsg) |
| 730 | break; |
| 731 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); |
| 732 | if (errmsg) |
| 733 | break; |
| 734 | errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer); |
| 735 | if (errmsg) |
| 736 | break; |
| 737 | } |
| 738 | break; |
| 739 | case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : |
| 740 | { |
| 741 | { |
| 742 | FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u11_prefixed)) & (7)); |
| 743 | FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255)); |
| 744 | } |
| 745 | errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); |
| 746 | if (errmsg) |
| 747 | break; |
| 748 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); |
| 749 | if (errmsg) |
| 750 | break; |
| 751 | } |
| 752 | break; |
| 753 | case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : |
| 754 | { |
| 755 | { |
| 756 | FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u19_prefixed)) & (7)); |
| 757 | FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255)); |
| 758 | FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255)); |
| 759 | } |
| 760 | errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); |
| 761 | if (errmsg) |
| 762 | break; |
| 763 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); |
| 764 | if (errmsg) |
| 765 | break; |
| 766 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); |
| 767 | if (errmsg) |
| 768 | break; |
| 769 | } |
| 770 | break; |
| 771 | case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : |
| 772 | { |
| 773 | { |
| 774 | FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u27_prefixed)) & (7)); |
| 775 | FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255)); |
| 776 | FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535)); |
| 777 | } |
| 778 | errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); |
| 779 | if (errmsg) |
| 780 | break; |
| 781 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); |
| 782 | if (errmsg) |
| 783 | break; |
| 784 | { |
| 785 | long value = fields->f_dsp_32_u16; |
| 786 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 787 | errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); |
| 788 | } |
| 789 | if (errmsg) |
| 790 | break; |
| 791 | } |
| 792 | break; |
| 793 | case M32C_OPERAND_BITNO16R : |
| 794 | errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); |
| 795 | break; |
| 796 | case M32C_OPERAND_BITNO32PREFIXED : |
| 797 | errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); |
| 798 | break; |
| 799 | case M32C_OPERAND_BITNO32UNPREFIXED : |
| 800 | errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); |
| 801 | break; |
| 802 | case M32C_OPERAND_DSP_10_U6 : |
| 803 | errmsg = insert_normal (cd, fields->f_dsp_10_u6, 0, 0, 10, 6, 32, total_length, buffer); |
| 804 | break; |
| 805 | case M32C_OPERAND_DSP_16_S16 : |
| 806 | { |
| 807 | long value = fields->f_dsp_16_s16; |
| 808 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 809 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer); |
| 810 | } |
| 811 | break; |
| 812 | case M32C_OPERAND_DSP_16_S8 : |
| 813 | errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer); |
| 814 | break; |
| 815 | case M32C_OPERAND_DSP_16_U16 : |
| 816 | { |
| 817 | long value = fields->f_dsp_16_u16; |
| 818 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 819 | errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); |
| 820 | } |
| 821 | break; |
| 822 | case M32C_OPERAND_DSP_16_U20 : |
| 823 | { |
| 824 | { |
| 825 | FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535)); |
| 826 | FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255)); |
| 827 | } |
| 828 | { |
| 829 | long value = fields->f_dsp_16_u16; |
| 830 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 831 | errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); |
| 832 | } |
| 833 | if (errmsg) |
| 834 | break; |
| 835 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); |
| 836 | if (errmsg) |
| 837 | break; |
| 838 | } |
| 839 | break; |
| 840 | case M32C_OPERAND_DSP_16_U24 : |
| 841 | { |
| 842 | { |
| 843 | FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535)); |
| 844 | FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255)); |
| 845 | } |
| 846 | { |
| 847 | long value = fields->f_dsp_16_u16; |
| 848 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 849 | errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); |
| 850 | } |
| 851 | if (errmsg) |
| 852 | break; |
| 853 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); |
| 854 | if (errmsg) |
| 855 | break; |
| 856 | } |
| 857 | break; |
| 858 | case M32C_OPERAND_DSP_16_U8 : |
| 859 | errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); |
| 860 | break; |
| 861 | case M32C_OPERAND_DSP_24_S16 : |
| 862 | { |
| 863 | { |
| 864 | FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255)); |
| 865 | FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255)); |
| 866 | } |
| 867 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); |
| 868 | if (errmsg) |
| 869 | break; |
| 870 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); |
| 871 | if (errmsg) |
| 872 | break; |
| 873 | } |
| 874 | break; |
| 875 | case M32C_OPERAND_DSP_24_S8 : |
| 876 | errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer); |
| 877 | break; |
| 878 | case M32C_OPERAND_DSP_24_U16 : |
| 879 | { |
| 880 | { |
| 881 | FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u16)) & (255)); |
| 882 | FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_u16)) >> (8))) & (255)); |
| 883 | } |
| 884 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); |
| 885 | if (errmsg) |
| 886 | break; |
| 887 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); |
| 888 | if (errmsg) |
| 889 | break; |
| 890 | } |
| 891 | break; |
| 892 | case M32C_OPERAND_DSP_24_U20 : |
| 893 | { |
| 894 | { |
| 895 | FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255)); |
| 896 | FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535)); |
| 897 | } |
| 898 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); |
| 899 | if (errmsg) |
| 900 | break; |
| 901 | { |
| 902 | long value = fields->f_dsp_32_u16; |
| 903 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 904 | errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); |
| 905 | } |
| 906 | if (errmsg) |
| 907 | break; |
| 908 | } |
| 909 | break; |
| 910 | case M32C_OPERAND_DSP_24_U24 : |
| 911 | { |
| 912 | { |
| 913 | FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255)); |
| 914 | FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535)); |
| 915 | } |
| 916 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); |
| 917 | if (errmsg) |
| 918 | break; |
| 919 | { |
| 920 | long value = fields->f_dsp_32_u16; |
| 921 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 922 | errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); |
| 923 | } |
| 924 | if (errmsg) |
| 925 | break; |
| 926 | } |
| 927 | break; |
| 928 | case M32C_OPERAND_DSP_24_U8 : |
| 929 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); |
| 930 | break; |
| 931 | case M32C_OPERAND_DSP_32_S16 : |
| 932 | { |
| 933 | long value = fields->f_dsp_32_s16; |
| 934 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 935 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer); |
| 936 | } |
| 937 | break; |
| 938 | case M32C_OPERAND_DSP_32_S8 : |
| 939 | errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer); |
| 940 | break; |
| 941 | case M32C_OPERAND_DSP_32_U16 : |
| 942 | { |
| 943 | long value = fields->f_dsp_32_u16; |
| 944 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 945 | errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); |
| 946 | } |
| 947 | break; |
| 948 | case M32C_OPERAND_DSP_32_U20 : |
| 949 | { |
| 950 | long value = fields->f_dsp_32_u24; |
| 951 | value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); |
| 952 | errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer); |
| 953 | } |
| 954 | break; |
| 955 | case M32C_OPERAND_DSP_32_U24 : |
| 956 | { |
| 957 | long value = fields->f_dsp_32_u24; |
| 958 | value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); |
| 959 | errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer); |
| 960 | } |
| 961 | break; |
| 962 | case M32C_OPERAND_DSP_32_U8 : |
| 963 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); |
| 964 | break; |
| 965 | case M32C_OPERAND_DSP_40_S16 : |
| 966 | { |
| 967 | long value = fields->f_dsp_40_s16; |
| 968 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 969 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer); |
| 970 | } |
| 971 | break; |
| 972 | case M32C_OPERAND_DSP_40_S8 : |
| 973 | errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer); |
| 974 | break; |
| 975 | case M32C_OPERAND_DSP_40_U16 : |
| 976 | { |
| 977 | long value = fields->f_dsp_40_u16; |
| 978 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 979 | errmsg = insert_normal (cd, value, 0, 32, 8, 16, 32, total_length, buffer); |
| 980 | } |
| 981 | break; |
| 982 | case M32C_OPERAND_DSP_40_U24 : |
| 983 | { |
| 984 | long value = fields->f_dsp_40_u24; |
| 985 | value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); |
| 986 | errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer); |
| 987 | } |
| 988 | break; |
| 989 | case M32C_OPERAND_DSP_40_U8 : |
| 990 | errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer); |
| 991 | break; |
| 992 | case M32C_OPERAND_DSP_48_S16 : |
| 993 | { |
| 994 | long value = fields->f_dsp_48_s16; |
| 995 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 996 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer); |
| 997 | } |
| 998 | break; |
| 999 | case M32C_OPERAND_DSP_48_S8 : |
| 1000 | errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer); |
| 1001 | break; |
| 1002 | case M32C_OPERAND_DSP_48_U16 : |
| 1003 | { |
| 1004 | long value = fields->f_dsp_48_u16; |
| 1005 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 1006 | errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); |
| 1007 | } |
| 1008 | break; |
| 1009 | case M32C_OPERAND_DSP_48_U24 : |
| 1010 | { |
| 1011 | { |
| 1012 | FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_48_u24)) >> (16))) & (255)); |
| 1013 | FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u24)) & (65535)); |
| 1014 | } |
| 1015 | { |
| 1016 | long value = fields->f_dsp_48_u16; |
| 1017 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 1018 | errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); |
| 1019 | } |
| 1020 | if (errmsg) |
| 1021 | break; |
| 1022 | errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer); |
| 1023 | if (errmsg) |
| 1024 | break; |
| 1025 | } |
| 1026 | break; |
| 1027 | case M32C_OPERAND_DSP_48_U8 : |
| 1028 | errmsg = insert_normal (cd, fields->f_dsp_48_u8, 0, 32, 16, 8, 32, total_length, buffer); |
| 1029 | break; |
| 1030 | case M32C_OPERAND_DSP_8_S24 : |
| 1031 | { |
| 1032 | long value = fields->f_dsp_8_s24; |
| 1033 | value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16)))); |
| 1034 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, buffer); |
| 1035 | } |
| 1036 | break; |
| 1037 | case M32C_OPERAND_DSP_8_S8 : |
| 1038 | errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer); |
| 1039 | break; |
| 1040 | case M32C_OPERAND_DSP_8_U16 : |
| 1041 | { |
| 1042 | long value = fields->f_dsp_8_u16; |
| 1043 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 1044 | errmsg = insert_normal (cd, value, 0, 0, 8, 16, 32, total_length, buffer); |
| 1045 | } |
| 1046 | break; |
| 1047 | case M32C_OPERAND_DSP_8_U24 : |
| 1048 | { |
| 1049 | long value = fields->f_dsp_8_u24; |
| 1050 | value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); |
| 1051 | errmsg = insert_normal (cd, value, 0, 0, 8, 24, 32, total_length, buffer); |
| 1052 | } |
| 1053 | break; |
| 1054 | case M32C_OPERAND_DSP_8_U6 : |
| 1055 | errmsg = insert_normal (cd, fields->f_dsp_8_u6, 0, 0, 8, 6, 32, total_length, buffer); |
| 1056 | break; |
| 1057 | case M32C_OPERAND_DSP_8_U8 : |
| 1058 | errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer); |
| 1059 | break; |
| 1060 | case M32C_OPERAND_DST16AN : |
| 1061 | errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); |
| 1062 | break; |
| 1063 | case M32C_OPERAND_DST16AN_S : |
| 1064 | errmsg = insert_normal (cd, fields->f_dst16_an_s, 0, 0, 4, 1, 32, total_length, buffer); |
| 1065 | break; |
| 1066 | case M32C_OPERAND_DST16ANHI : |
| 1067 | errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); |
| 1068 | break; |
| 1069 | case M32C_OPERAND_DST16ANQI : |
| 1070 | errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); |
| 1071 | break; |
| 1072 | case M32C_OPERAND_DST16ANQI_S : |
| 1073 | errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer); |
| 1074 | break; |
| 1075 | case M32C_OPERAND_DST16ANSI : |
| 1076 | errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); |
| 1077 | break; |
| 1078 | case M32C_OPERAND_DST16RNEXTQI : |
| 1079 | errmsg = insert_normal (cd, fields->f_dst16_rn_ext, 0, 0, 14, 1, 32, total_length, buffer); |
| 1080 | break; |
| 1081 | case M32C_OPERAND_DST16RNHI : |
| 1082 | errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer); |
| 1083 | break; |
| 1084 | case M32C_OPERAND_DST16RNQI : |
| 1085 | errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer); |
| 1086 | break; |
| 1087 | case M32C_OPERAND_DST16RNQI_S : |
| 1088 | errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer); |
| 1089 | break; |
| 1090 | case M32C_OPERAND_DST16RNSI : |
| 1091 | errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer); |
| 1092 | break; |
| 1093 | case M32C_OPERAND_DST32ANEXTUNPREFIXED : |
| 1094 | errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); |
| 1095 | break; |
| 1096 | case M32C_OPERAND_DST32ANPREFIXED : |
| 1097 | errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); |
| 1098 | break; |
| 1099 | case M32C_OPERAND_DST32ANPREFIXEDHI : |
| 1100 | errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); |
| 1101 | break; |
| 1102 | case M32C_OPERAND_DST32ANPREFIXEDQI : |
| 1103 | errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); |
| 1104 | break; |
| 1105 | case M32C_OPERAND_DST32ANPREFIXEDSI : |
| 1106 | errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); |
| 1107 | break; |
| 1108 | case M32C_OPERAND_DST32ANUNPREFIXED : |
| 1109 | errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); |
| 1110 | break; |
| 1111 | case M32C_OPERAND_DST32ANUNPREFIXEDHI : |
| 1112 | errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); |
| 1113 | break; |
| 1114 | case M32C_OPERAND_DST32ANUNPREFIXEDQI : |
| 1115 | errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); |
| 1116 | break; |
| 1117 | case M32C_OPERAND_DST32ANUNPREFIXEDSI : |
| 1118 | errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); |
| 1119 | break; |
| 1120 | case M32C_OPERAND_DST32R0HI_S : |
| 1121 | break; |
| 1122 | case M32C_OPERAND_DST32R0QI_S : |
| 1123 | break; |
| 1124 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : |
| 1125 | errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); |
| 1126 | break; |
| 1127 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : |
| 1128 | errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); |
| 1129 | break; |
| 1130 | case M32C_OPERAND_DST32RNPREFIXEDHI : |
| 1131 | { |
| 1132 | long value = fields->f_dst32_rn_prefixed_HI; |
| 1133 | value = ((((value) + (2))) % (4)); |
| 1134 | errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); |
| 1135 | } |
| 1136 | break; |
| 1137 | case M32C_OPERAND_DST32RNPREFIXEDQI : |
| 1138 | { |
| 1139 | long value = fields->f_dst32_rn_prefixed_QI; |
| 1140 | value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1)))); |
| 1141 | errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); |
| 1142 | } |
| 1143 | break; |
| 1144 | case M32C_OPERAND_DST32RNPREFIXEDSI : |
| 1145 | { |
| 1146 | long value = fields->f_dst32_rn_prefixed_SI; |
| 1147 | value = ((value) + (2)); |
| 1148 | errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); |
| 1149 | } |
| 1150 | break; |
| 1151 | case M32C_OPERAND_DST32RNUNPREFIXEDHI : |
| 1152 | { |
| 1153 | long value = fields->f_dst32_rn_unprefixed_HI; |
| 1154 | value = ((((value) + (2))) % (4)); |
| 1155 | errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); |
| 1156 | } |
| 1157 | break; |
| 1158 | case M32C_OPERAND_DST32RNUNPREFIXEDQI : |
| 1159 | { |
| 1160 | long value = fields->f_dst32_rn_unprefixed_QI; |
| 1161 | value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1)))); |
| 1162 | errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); |
| 1163 | } |
| 1164 | break; |
| 1165 | case M32C_OPERAND_DST32RNUNPREFIXEDSI : |
| 1166 | { |
| 1167 | long value = fields->f_dst32_rn_unprefixed_SI; |
| 1168 | value = ((value) + (2)); |
| 1169 | errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); |
| 1170 | } |
| 1171 | break; |
| 1172 | case M32C_OPERAND_G : |
| 1173 | break; |
| 1174 | case M32C_OPERAND_IMM_12_S4 : |
| 1175 | errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer); |
| 1176 | break; |
| 1177 | case M32C_OPERAND_IMM_13_U3 : |
| 1178 | errmsg = insert_normal (cd, fields->f_imm_13_u3, 0, 0, 13, 3, 32, total_length, buffer); |
| 1179 | break; |
| 1180 | case M32C_OPERAND_IMM_16_HI : |
| 1181 | { |
| 1182 | long value = fields->f_dsp_16_s16; |
| 1183 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 1184 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer); |
| 1185 | } |
| 1186 | break; |
| 1187 | case M32C_OPERAND_IMM_16_QI : |
| 1188 | errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer); |
| 1189 | break; |
| 1190 | case M32C_OPERAND_IMM_16_SI : |
| 1191 | { |
| 1192 | { |
| 1193 | FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_16_s32)) >> (16))) & (65535)); |
| 1194 | FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_s32)) & (65535)); |
| 1195 | } |
| 1196 | { |
| 1197 | long value = fields->f_dsp_16_u16; |
| 1198 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 1199 | errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); |
| 1200 | } |
| 1201 | if (errmsg) |
| 1202 | break; |
| 1203 | { |
| 1204 | long value = fields->f_dsp_32_u16; |
| 1205 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 1206 | errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); |
| 1207 | } |
| 1208 | if (errmsg) |
| 1209 | break; |
| 1210 | } |
| 1211 | break; |
| 1212 | case M32C_OPERAND_IMM_20_S4 : |
| 1213 | errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer); |
| 1214 | break; |
| 1215 | case M32C_OPERAND_IMM_24_HI : |
| 1216 | { |
| 1217 | { |
| 1218 | FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255)); |
| 1219 | FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255)); |
| 1220 | } |
| 1221 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); |
| 1222 | if (errmsg) |
| 1223 | break; |
| 1224 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); |
| 1225 | if (errmsg) |
| 1226 | break; |
| 1227 | } |
| 1228 | break; |
| 1229 | case M32C_OPERAND_IMM_24_QI : |
| 1230 | errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer); |
| 1231 | break; |
| 1232 | case M32C_OPERAND_IMM_24_SI : |
| 1233 | { |
| 1234 | { |
| 1235 | FLD (f_dsp_32_u24) = ((((unsigned int) (FLD (f_dsp_24_s32)) >> (8))) & (16777215)); |
| 1236 | FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s32)) & (255)); |
| 1237 | } |
| 1238 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); |
| 1239 | if (errmsg) |
| 1240 | break; |
| 1241 | { |
| 1242 | long value = fields->f_dsp_32_u24; |
| 1243 | value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); |
| 1244 | errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer); |
| 1245 | } |
| 1246 | if (errmsg) |
| 1247 | break; |
| 1248 | } |
| 1249 | break; |
| 1250 | case M32C_OPERAND_IMM_32_HI : |
| 1251 | { |
| 1252 | long value = fields->f_dsp_32_s16; |
| 1253 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 1254 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer); |
| 1255 | } |
| 1256 | break; |
| 1257 | case M32C_OPERAND_IMM_32_QI : |
| 1258 | errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer); |
| 1259 | break; |
| 1260 | case M32C_OPERAND_IMM_32_SI : |
| 1261 | { |
| 1262 | long value = fields->f_dsp_32_s32; |
| 1263 | value = EXTSISI (((((((((unsigned int) (value) >> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000))))))); |
| 1264 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, buffer); |
| 1265 | } |
| 1266 | break; |
| 1267 | case M32C_OPERAND_IMM_40_HI : |
| 1268 | { |
| 1269 | long value = fields->f_dsp_40_s16; |
| 1270 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 1271 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer); |
| 1272 | } |
| 1273 | break; |
| 1274 | case M32C_OPERAND_IMM_40_QI : |
| 1275 | errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer); |
| 1276 | break; |
| 1277 | case M32C_OPERAND_IMM_40_SI : |
| 1278 | { |
| 1279 | { |
| 1280 | FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_40_s32)) >> (24))) & (255)); |
| 1281 | FLD (f_dsp_40_u24) = ((FLD (f_dsp_40_s32)) & (16777215)); |
| 1282 | } |
| 1283 | { |
| 1284 | long value = fields->f_dsp_40_u24; |
| 1285 | value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); |
| 1286 | errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer); |
| 1287 | } |
| 1288 | if (errmsg) |
| 1289 | break; |
| 1290 | errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer); |
| 1291 | if (errmsg) |
| 1292 | break; |
| 1293 | } |
| 1294 | break; |
| 1295 | case M32C_OPERAND_IMM_48_HI : |
| 1296 | { |
| 1297 | long value = fields->f_dsp_48_s16; |
| 1298 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 1299 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer); |
| 1300 | } |
| 1301 | break; |
| 1302 | case M32C_OPERAND_IMM_48_QI : |
| 1303 | errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer); |
| 1304 | break; |
| 1305 | case M32C_OPERAND_IMM_48_SI : |
| 1306 | { |
| 1307 | { |
| 1308 | FLD (f_dsp_64_u16) = ((((unsigned int) (FLD (f_dsp_48_s32)) >> (16))) & (65535)); |
| 1309 | FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_s32)) & (65535)); |
| 1310 | } |
| 1311 | { |
| 1312 | long value = fields->f_dsp_48_u16; |
| 1313 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 1314 | errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); |
| 1315 | } |
| 1316 | if (errmsg) |
| 1317 | break; |
| 1318 | { |
| 1319 | long value = fields->f_dsp_64_u16; |
| 1320 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 1321 | errmsg = insert_normal (cd, value, 0, 64, 0, 16, 32, total_length, buffer); |
| 1322 | } |
| 1323 | if (errmsg) |
| 1324 | break; |
| 1325 | } |
| 1326 | break; |
| 1327 | case M32C_OPERAND_IMM_56_HI : |
| 1328 | { |
| 1329 | { |
| 1330 | FLD (f_dsp_56_u8) = ((FLD (f_dsp_56_s16)) & (255)); |
| 1331 | FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_56_s16)) >> (8))) & (255)); |
| 1332 | } |
| 1333 | errmsg = insert_normal (cd, fields->f_dsp_56_u8, 0, 32, 24, 8, 32, total_length, buffer); |
| 1334 | if (errmsg) |
| 1335 | break; |
| 1336 | errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer); |
| 1337 | if (errmsg) |
| 1338 | break; |
| 1339 | } |
| 1340 | break; |
| 1341 | case M32C_OPERAND_IMM_56_QI : |
| 1342 | errmsg = insert_normal (cd, fields->f_dsp_56_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, buffer); |
| 1343 | break; |
| 1344 | case M32C_OPERAND_IMM_64_HI : |
| 1345 | { |
| 1346 | long value = fields->f_dsp_64_s16; |
| 1347 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 1348 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer); |
| 1349 | } |
| 1350 | break; |
| 1351 | case M32C_OPERAND_IMM_8_HI : |
| 1352 | { |
| 1353 | long value = fields->f_dsp_8_s16; |
| 1354 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 1355 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, buffer); |
| 1356 | } |
| 1357 | break; |
| 1358 | case M32C_OPERAND_IMM_8_QI : |
| 1359 | errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer); |
| 1360 | break; |
| 1361 | case M32C_OPERAND_IMM_8_S4 : |
| 1362 | errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer); |
| 1363 | break; |
| 1364 | case M32C_OPERAND_IMM_SH_12_S4 : |
| 1365 | errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer); |
| 1366 | break; |
| 1367 | case M32C_OPERAND_IMM_SH_20_S4 : |
| 1368 | errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer); |
| 1369 | break; |
| 1370 | case M32C_OPERAND_IMM_SH_8_S4 : |
| 1371 | errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer); |
| 1372 | break; |
| 1373 | case M32C_OPERAND_IMM1_S : |
| 1374 | { |
| 1375 | long value = fields->f_imm1_S; |
| 1376 | value = ((value) - (1)); |
| 1377 | errmsg = insert_normal (cd, value, 0, 0, 2, 1, 32, total_length, buffer); |
| 1378 | } |
| 1379 | break; |
| 1380 | case M32C_OPERAND_IMM3_S : |
| 1381 | { |
| 1382 | { |
| 1383 | FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1)); |
| 1384 | FLD (f_2_2) = ((((unsigned int) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3)); |
| 1385 | } |
| 1386 | errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer); |
| 1387 | if (errmsg) |
| 1388 | break; |
| 1389 | errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer); |
| 1390 | if (errmsg) |
| 1391 | break; |
| 1392 | } |
| 1393 | break; |
| 1394 | case M32C_OPERAND_LAB_16_8 : |
| 1395 | { |
| 1396 | long value = fields->f_lab_16_8; |
| 1397 | value = ((value) - (((pc) + (2)))); |
| 1398 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, buffer); |
| 1399 | } |
| 1400 | break; |
| 1401 | case M32C_OPERAND_LAB_24_8 : |
| 1402 | { |
| 1403 | long value = fields->f_lab_24_8; |
| 1404 | value = ((value) - (((pc) + (2)))); |
| 1405 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, buffer); |
| 1406 | } |
| 1407 | break; |
| 1408 | case M32C_OPERAND_LAB_32_8 : |
| 1409 | { |
| 1410 | long value = fields->f_lab_32_8; |
| 1411 | value = ((value) - (((pc) + (2)))); |
| 1412 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, buffer); |
| 1413 | } |
| 1414 | break; |
| 1415 | case M32C_OPERAND_LAB_40_8 : |
| 1416 | { |
| 1417 | long value = fields->f_lab_40_8; |
| 1418 | value = ((value) - (((pc) + (2)))); |
| 1419 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, buffer); |
| 1420 | } |
| 1421 | break; |
| 1422 | case M32C_OPERAND_LAB_5_3 : |
| 1423 | { |
| 1424 | long value = fields->f_lab_5_3; |
| 1425 | value = ((value) - (((pc) + (2)))); |
| 1426 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, buffer); |
| 1427 | } |
| 1428 | break; |
| 1429 | case M32C_OPERAND_LAB_8_16 : |
| 1430 | { |
| 1431 | long value = fields->f_lab_8_16; |
| 1432 | value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((unsigned int) (((((value) - (((pc) + (1))))) & (65535))) >> (8)))); |
| 1433 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, buffer); |
| 1434 | } |
| 1435 | break; |
| 1436 | case M32C_OPERAND_LAB_8_24 : |
| 1437 | { |
| 1438 | long value = fields->f_lab_8_24; |
| 1439 | value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); |
| 1440 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, buffer); |
| 1441 | } |
| 1442 | break; |
| 1443 | case M32C_OPERAND_LAB_8_8 : |
| 1444 | { |
| 1445 | long value = fields->f_lab_8_8; |
| 1446 | value = ((value) - (((pc) + (1)))); |
| 1447 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer); |
| 1448 | } |
| 1449 | break; |
| 1450 | case M32C_OPERAND_LAB32_JMP_S : |
| 1451 | { |
| 1452 | { |
| 1453 | SI tmp_val; |
| 1454 | tmp_val = ((((FLD (f_lab32_jmp_s)) - (pc))) - (2)); |
| 1455 | FLD (f_7_1) = ((tmp_val) & (1)); |
| 1456 | FLD (f_2_2) = ((unsigned int) (tmp_val) >> (1)); |
| 1457 | } |
| 1458 | errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer); |
| 1459 | if (errmsg) |
| 1460 | break; |
| 1461 | errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer); |
| 1462 | if (errmsg) |
| 1463 | break; |
| 1464 | } |
| 1465 | break; |
| 1466 | case M32C_OPERAND_Q : |
| 1467 | break; |
| 1468 | case M32C_OPERAND_R0 : |
| 1469 | break; |
| 1470 | case M32C_OPERAND_R0H : |
| 1471 | break; |
| 1472 | case M32C_OPERAND_R0L : |
| 1473 | break; |
| 1474 | case M32C_OPERAND_R1 : |
| 1475 | break; |
| 1476 | case M32C_OPERAND_R1R2R0 : |
| 1477 | break; |
| 1478 | case M32C_OPERAND_R2 : |
| 1479 | break; |
| 1480 | case M32C_OPERAND_R2R0 : |
| 1481 | break; |
| 1482 | case M32C_OPERAND_R3 : |
| 1483 | break; |
| 1484 | case M32C_OPERAND_R3R1 : |
| 1485 | break; |
| 1486 | case M32C_OPERAND_REGSETPOP : |
| 1487 | errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer); |
| 1488 | break; |
| 1489 | case M32C_OPERAND_REGSETPUSH : |
| 1490 | errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer); |
| 1491 | break; |
| 1492 | case M32C_OPERAND_RN16_PUSH_S : |
| 1493 | errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer); |
| 1494 | break; |
| 1495 | case M32C_OPERAND_S : |
| 1496 | break; |
| 1497 | case M32C_OPERAND_SRC16AN : |
| 1498 | errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer); |
| 1499 | break; |
| 1500 | case M32C_OPERAND_SRC16ANHI : |
| 1501 | errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer); |
| 1502 | break; |
| 1503 | case M32C_OPERAND_SRC16ANQI : |
| 1504 | errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer); |
| 1505 | break; |
| 1506 | case M32C_OPERAND_SRC16RNHI : |
| 1507 | errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer); |
| 1508 | break; |
| 1509 | case M32C_OPERAND_SRC16RNQI : |
| 1510 | errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer); |
| 1511 | break; |
| 1512 | case M32C_OPERAND_SRC32ANPREFIXED : |
| 1513 | errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer); |
| 1514 | break; |
| 1515 | case M32C_OPERAND_SRC32ANPREFIXEDHI : |
| 1516 | errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer); |
| 1517 | break; |
| 1518 | case M32C_OPERAND_SRC32ANPREFIXEDQI : |
| 1519 | errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer); |
| 1520 | break; |
| 1521 | case M32C_OPERAND_SRC32ANPREFIXEDSI : |
| 1522 | errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer); |
| 1523 | break; |
| 1524 | case M32C_OPERAND_SRC32ANUNPREFIXED : |
| 1525 | errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer); |
| 1526 | break; |
| 1527 | case M32C_OPERAND_SRC32ANUNPREFIXEDHI : |
| 1528 | errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer); |
| 1529 | break; |
| 1530 | case M32C_OPERAND_SRC32ANUNPREFIXEDQI : |
| 1531 | errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer); |
| 1532 | break; |
| 1533 | case M32C_OPERAND_SRC32ANUNPREFIXEDSI : |
| 1534 | errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer); |
| 1535 | break; |
| 1536 | case M32C_OPERAND_SRC32RNPREFIXEDHI : |
| 1537 | { |
| 1538 | long value = fields->f_src32_rn_prefixed_HI; |
| 1539 | value = ((((value) + (2))) % (4)); |
| 1540 | errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer); |
| 1541 | } |
| 1542 | break; |
| 1543 | case M32C_OPERAND_SRC32RNPREFIXEDQI : |
| 1544 | { |
| 1545 | long value = fields->f_src32_rn_prefixed_QI; |
| 1546 | value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1)))); |
| 1547 | errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer); |
| 1548 | } |
| 1549 | break; |
| 1550 | case M32C_OPERAND_SRC32RNPREFIXEDSI : |
| 1551 | { |
| 1552 | long value = fields->f_src32_rn_prefixed_SI; |
| 1553 | value = ((value) + (2)); |
| 1554 | errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer); |
| 1555 | } |
| 1556 | break; |
| 1557 | case M32C_OPERAND_SRC32RNUNPREFIXEDHI : |
| 1558 | { |
| 1559 | long value = fields->f_src32_rn_unprefixed_HI; |
| 1560 | value = ((((value) + (2))) % (4)); |
| 1561 | errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer); |
| 1562 | } |
| 1563 | break; |
| 1564 | case M32C_OPERAND_SRC32RNUNPREFIXEDQI : |
| 1565 | { |
| 1566 | long value = fields->f_src32_rn_unprefixed_QI; |
| 1567 | value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1)))); |
| 1568 | errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer); |
| 1569 | } |
| 1570 | break; |
| 1571 | case M32C_OPERAND_SRC32RNUNPREFIXEDSI : |
| 1572 | { |
| 1573 | long value = fields->f_src32_rn_unprefixed_SI; |
| 1574 | value = ((value) + (2)); |
| 1575 | errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer); |
| 1576 | } |
| 1577 | break; |
| 1578 | case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : |
| 1579 | errmsg = insert_normal (cd, fields->f_5_1, 0, 0, 5, 1, 32, total_length, buffer); |
| 1580 | break; |
| 1581 | case M32C_OPERAND_X : |
| 1582 | break; |
| 1583 | case M32C_OPERAND_Z : |
| 1584 | break; |
| 1585 | case M32C_OPERAND_COND16_16 : |
| 1586 | errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); |
| 1587 | break; |
| 1588 | case M32C_OPERAND_COND16_24 : |
| 1589 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); |
| 1590 | break; |
| 1591 | case M32C_OPERAND_COND16_32 : |
| 1592 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); |
| 1593 | break; |
| 1594 | case M32C_OPERAND_COND16C : |
| 1595 | errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer); |
| 1596 | break; |
| 1597 | case M32C_OPERAND_COND16J : |
| 1598 | errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer); |
| 1599 | break; |
| 1600 | case M32C_OPERAND_COND16J5 : |
| 1601 | errmsg = insert_normal (cd, fields->f_cond16j_5, 0, 0, 5, 3, 32, total_length, buffer); |
| 1602 | break; |
| 1603 | case M32C_OPERAND_COND32 : |
| 1604 | { |
| 1605 | { |
| 1606 | FLD (f_9_1) = ((((unsigned int) (FLD (f_cond32)) >> (3))) & (1)); |
| 1607 | FLD (f_13_3) = ((FLD (f_cond32)) & (7)); |
| 1608 | } |
| 1609 | errmsg = insert_normal (cd, fields->f_9_1, 0, 0, 9, 1, 32, total_length, buffer); |
| 1610 | if (errmsg) |
| 1611 | break; |
| 1612 | errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); |
| 1613 | if (errmsg) |
| 1614 | break; |
| 1615 | } |
| 1616 | break; |
| 1617 | case M32C_OPERAND_COND32_16 : |
| 1618 | errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); |
| 1619 | break; |
| 1620 | case M32C_OPERAND_COND32_24 : |
| 1621 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); |
| 1622 | break; |
| 1623 | case M32C_OPERAND_COND32_32 : |
| 1624 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); |
| 1625 | break; |
| 1626 | case M32C_OPERAND_COND32_40 : |
| 1627 | errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer); |
| 1628 | break; |
| 1629 | case M32C_OPERAND_COND32J : |
| 1630 | { |
| 1631 | { |
| 1632 | FLD (f_1_3) = ((((unsigned int) (FLD (f_cond32j)) >> (1))) & (7)); |
| 1633 | FLD (f_7_1) = ((FLD (f_cond32j)) & (1)); |
| 1634 | } |
| 1635 | errmsg = insert_normal (cd, fields->f_1_3, 0, 0, 1, 3, 32, total_length, buffer); |
| 1636 | if (errmsg) |
| 1637 | break; |
| 1638 | errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer); |
| 1639 | if (errmsg) |
| 1640 | break; |
| 1641 | } |
| 1642 | break; |
| 1643 | case M32C_OPERAND_CR1_PREFIXED_32 : |
| 1644 | errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer); |
| 1645 | break; |
| 1646 | case M32C_OPERAND_CR1_UNPREFIXED_32 : |
| 1647 | errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); |
| 1648 | break; |
| 1649 | case M32C_OPERAND_CR16 : |
| 1650 | errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer); |
| 1651 | break; |
| 1652 | case M32C_OPERAND_CR2_32 : |
| 1653 | errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); |
| 1654 | break; |
| 1655 | case M32C_OPERAND_CR3_PREFIXED_32 : |
| 1656 | errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer); |
| 1657 | break; |
| 1658 | case M32C_OPERAND_CR3_UNPREFIXED_32 : |
| 1659 | errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); |
| 1660 | break; |
| 1661 | case M32C_OPERAND_FLAGS16 : |
| 1662 | errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer); |
| 1663 | break; |
| 1664 | case M32C_OPERAND_FLAGS32 : |
| 1665 | errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); |
| 1666 | break; |
| 1667 | case M32C_OPERAND_SCCOND32 : |
| 1668 | errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer); |
| 1669 | break; |
| 1670 | case M32C_OPERAND_SIZE : |
| 1671 | break; |
| 1672 | |
| 1673 | default : |
| 1674 | /* xgettext:c-format */ |
| 1675 | fprintf (stderr, _("Unrecognized field %d while building insn.\n"), |
| 1676 | opindex); |
| 1677 | abort (); |
| 1678 | } |
| 1679 | |
| 1680 | return errmsg; |
| 1681 | } |
| 1682 | |
| 1683 | int m32c_cgen_extract_operand |
| 1684 | (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); |
| 1685 | |
| 1686 | /* Main entry point for operand extraction. |
| 1687 | The result is <= 0 for error, >0 for success. |
| 1688 | ??? Actual values aren't well defined right now. |
| 1689 | |
| 1690 | This function is basically just a big switch statement. Earlier versions |
| 1691 | used tables to look up the function to use, but |
| 1692 | - if the table contains both assembler and disassembler functions then |
| 1693 | the disassembler contains much of the assembler and vice-versa, |
| 1694 | - there's a lot of inlining possibilities as things grow, |
| 1695 | - using a switch statement avoids the function call overhead. |
| 1696 | |
| 1697 | This function could be moved into `print_insn_normal', but keeping it |
| 1698 | separate makes clear the interface between `print_insn_normal' and each of |
| 1699 | the handlers. */ |
| 1700 | |
| 1701 | int |
| 1702 | m32c_cgen_extract_operand (CGEN_CPU_DESC cd, |
| 1703 | int opindex, |
| 1704 | CGEN_EXTRACT_INFO *ex_info, |
| 1705 | CGEN_INSN_INT insn_value, |
| 1706 | CGEN_FIELDS * fields, |
| 1707 | bfd_vma pc) |
| 1708 | { |
| 1709 | /* Assume success (for those operands that are nops). */ |
| 1710 | int length = 1; |
| 1711 | unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); |
| 1712 | |
| 1713 | switch (opindex) |
| 1714 | { |
| 1715 | case M32C_OPERAND_A0 : |
| 1716 | break; |
| 1717 | case M32C_OPERAND_A1 : |
| 1718 | break; |
| 1719 | case M32C_OPERAND_AN16_PUSH_S : |
| 1720 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1); |
| 1721 | break; |
| 1722 | case M32C_OPERAND_BIT16AN : |
| 1723 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); |
| 1724 | break; |
| 1725 | case M32C_OPERAND_BIT16RN : |
| 1726 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn); |
| 1727 | break; |
| 1728 | case M32C_OPERAND_BIT32ANPREFIXED : |
| 1729 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); |
| 1730 | break; |
| 1731 | case M32C_OPERAND_BIT32ANUNPREFIXED : |
| 1732 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); |
| 1733 | break; |
| 1734 | case M32C_OPERAND_BIT32RNPREFIXED : |
| 1735 | { |
| 1736 | long value; |
| 1737 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); |
| 1738 | value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); |
| 1739 | fields->f_dst32_rn_prefixed_QI = value; |
| 1740 | } |
| 1741 | break; |
| 1742 | case M32C_OPERAND_BIT32RNUNPREFIXED : |
| 1743 | { |
| 1744 | long value; |
| 1745 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); |
| 1746 | value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); |
| 1747 | fields->f_dst32_rn_unprefixed_QI = value; |
| 1748 | } |
| 1749 | break; |
| 1750 | case M32C_OPERAND_BITBASE16_16_S8 : |
| 1751 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8); |
| 1752 | break; |
| 1753 | case M32C_OPERAND_BITBASE16_16_U16 : |
| 1754 | { |
| 1755 | long value; |
| 1756 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); |
| 1757 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 1758 | fields->f_dsp_16_u16 = value; |
| 1759 | } |
| 1760 | break; |
| 1761 | case M32C_OPERAND_BITBASE16_16_U8 : |
| 1762 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); |
| 1763 | break; |
| 1764 | case M32C_OPERAND_BITBASE16_8_U11_S : |
| 1765 | { |
| 1766 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_bitno16_S); |
| 1767 | if (length <= 0) break; |
| 1768 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8); |
| 1769 | if (length <= 0) break; |
| 1770 | { |
| 1771 | FLD (f_bitbase16_u11_S) = ((((FLD (f_dsp_8_u8)) << (3))) | (FLD (f_bitno16_S))); |
| 1772 | } |
| 1773 | } |
| 1774 | break; |
| 1775 | case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : |
| 1776 | { |
| 1777 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); |
| 1778 | if (length <= 0) break; |
| 1779 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8); |
| 1780 | if (length <= 0) break; |
| 1781 | { |
| 1782 | FLD (f_bitbase32_16_s11_unprefixed) = ((((FLD (f_dsp_16_s8)) << (3))) | (FLD (f_bitno32_unprefixed))); |
| 1783 | } |
| 1784 | } |
| 1785 | break; |
| 1786 | case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : |
| 1787 | { |
| 1788 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); |
| 1789 | if (length <= 0) break; |
| 1790 | { |
| 1791 | long value; |
| 1792 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value); |
| 1793 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 1794 | fields->f_dsp_16_s16 = value; |
| 1795 | } |
| 1796 | if (length <= 0) break; |
| 1797 | { |
| 1798 | FLD (f_bitbase32_16_s19_unprefixed) = ((((FLD (f_dsp_16_s16)) << (3))) | (FLD (f_bitno32_unprefixed))); |
| 1799 | } |
| 1800 | } |
| 1801 | break; |
| 1802 | case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : |
| 1803 | { |
| 1804 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); |
| 1805 | if (length <= 0) break; |
| 1806 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); |
| 1807 | if (length <= 0) break; |
| 1808 | { |
| 1809 | FLD (f_bitbase32_16_u11_unprefixed) = ((((FLD (f_dsp_16_u8)) << (3))) | (FLD (f_bitno32_unprefixed))); |
| 1810 | } |
| 1811 | } |
| 1812 | break; |
| 1813 | case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : |
| 1814 | { |
| 1815 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); |
| 1816 | if (length <= 0) break; |
| 1817 | { |
| 1818 | long value; |
| 1819 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); |
| 1820 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 1821 | fields->f_dsp_16_u16 = value; |
| 1822 | } |
| 1823 | if (length <= 0) break; |
| 1824 | { |
| 1825 | FLD (f_bitbase32_16_u19_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (FLD (f_bitno32_unprefixed))); |
| 1826 | } |
| 1827 | } |
| 1828 | break; |
| 1829 | case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : |
| 1830 | { |
| 1831 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); |
| 1832 | if (length <= 0) break; |
| 1833 | { |
| 1834 | long value; |
| 1835 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); |
| 1836 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 1837 | fields->f_dsp_16_u16 = value; |
| 1838 | } |
| 1839 | if (length <= 0) break; |
| 1840 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); |
| 1841 | if (length <= 0) break; |
| 1842 | { |
| 1843 | FLD (f_bitbase32_16_u27_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (((((FLD (f_dsp_32_u8)) << (19))) | (FLD (f_bitno32_unprefixed))))); |
| 1844 | } |
| 1845 | } |
| 1846 | break; |
| 1847 | case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : |
| 1848 | { |
| 1849 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); |
| 1850 | if (length <= 0) break; |
| 1851 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8); |
| 1852 | if (length <= 0) break; |
| 1853 | { |
| 1854 | FLD (f_bitbase32_24_s11_prefixed) = ((((FLD (f_dsp_24_s8)) << (3))) | (FLD (f_bitno32_prefixed))); |
| 1855 | } |
| 1856 | } |
| 1857 | break; |
| 1858 | case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : |
| 1859 | { |
| 1860 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); |
| 1861 | if (length <= 0) break; |
| 1862 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); |
| 1863 | if (length <= 0) break; |
| 1864 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8); |
| 1865 | if (length <= 0) break; |
| 1866 | { |
| 1867 | FLD (f_bitbase32_24_s19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_s8)) << (11))) | (FLD (f_bitno32_prefixed))))); |
| 1868 | } |
| 1869 | } |
| 1870 | break; |
| 1871 | case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : |
| 1872 | { |
| 1873 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); |
| 1874 | if (length <= 0) break; |
| 1875 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); |
| 1876 | if (length <= 0) break; |
| 1877 | { |
| 1878 | FLD (f_bitbase32_24_u11_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (FLD (f_bitno32_prefixed))); |
| 1879 | } |
| 1880 | } |
| 1881 | break; |
| 1882 | case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : |
| 1883 | { |
| 1884 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); |
| 1885 | if (length <= 0) break; |
| 1886 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); |
| 1887 | if (length <= 0) break; |
| 1888 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); |
| 1889 | if (length <= 0) break; |
| 1890 | { |
| 1891 | FLD (f_bitbase32_24_u19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u8)) << (11))) | (FLD (f_bitno32_prefixed))))); |
| 1892 | } |
| 1893 | } |
| 1894 | break; |
| 1895 | case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : |
| 1896 | { |
| 1897 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); |
| 1898 | if (length <= 0) break; |
| 1899 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); |
| 1900 | if (length <= 0) break; |
| 1901 | { |
| 1902 | long value; |
| 1903 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); |
| 1904 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 1905 | fields->f_dsp_32_u16 = value; |
| 1906 | } |
| 1907 | if (length <= 0) break; |
| 1908 | { |
| 1909 | FLD (f_bitbase32_24_u27_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u16)) << (11))) | (FLD (f_bitno32_prefixed))))); |
| 1910 | } |
| 1911 | } |
| 1912 | break; |
| 1913 | case M32C_OPERAND_BITNO16R : |
| 1914 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); |
| 1915 | break; |
| 1916 | case M32C_OPERAND_BITNO32PREFIXED : |
| 1917 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); |
| 1918 | break; |
| 1919 | case M32C_OPERAND_BITNO32UNPREFIXED : |
| 1920 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); |
| 1921 | break; |
| 1922 | case M32C_OPERAND_DSP_10_U6 : |
| 1923 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 6, 32, total_length, pc, & fields->f_dsp_10_u6); |
| 1924 | break; |
| 1925 | case M32C_OPERAND_DSP_16_S16 : |
| 1926 | { |
| 1927 | long value; |
| 1928 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value); |
| 1929 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 1930 | fields->f_dsp_16_s16 = value; |
| 1931 | } |
| 1932 | break; |
| 1933 | case M32C_OPERAND_DSP_16_S8 : |
| 1934 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8); |
| 1935 | break; |
| 1936 | case M32C_OPERAND_DSP_16_U16 : |
| 1937 | { |
| 1938 | long value; |
| 1939 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); |
| 1940 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 1941 | fields->f_dsp_16_u16 = value; |
| 1942 | } |
| 1943 | break; |
| 1944 | case M32C_OPERAND_DSP_16_U20 : |
| 1945 | { |
| 1946 | { |
| 1947 | long value; |
| 1948 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); |
| 1949 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 1950 | fields->f_dsp_16_u16 = value; |
| 1951 | } |
| 1952 | if (length <= 0) break; |
| 1953 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); |
| 1954 | if (length <= 0) break; |
| 1955 | { |
| 1956 | FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16))); |
| 1957 | } |
| 1958 | } |
| 1959 | break; |
| 1960 | case M32C_OPERAND_DSP_16_U24 : |
| 1961 | { |
| 1962 | { |
| 1963 | long value; |
| 1964 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); |
| 1965 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 1966 | fields->f_dsp_16_u16 = value; |
| 1967 | } |
| 1968 | if (length <= 0) break; |
| 1969 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); |
| 1970 | if (length <= 0) break; |
| 1971 | { |
| 1972 | FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16))); |
| 1973 | } |
| 1974 | } |
| 1975 | break; |
| 1976 | case M32C_OPERAND_DSP_16_U8 : |
| 1977 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); |
| 1978 | break; |
| 1979 | case M32C_OPERAND_DSP_24_S16 : |
| 1980 | { |
| 1981 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); |
| 1982 | if (length <= 0) break; |
| 1983 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); |
| 1984 | if (length <= 0) break; |
| 1985 | { |
| 1986 | FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)))))); |
| 1987 | } |
| 1988 | } |
| 1989 | break; |
| 1990 | case M32C_OPERAND_DSP_24_S8 : |
| 1991 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8); |
| 1992 | break; |
| 1993 | case M32C_OPERAND_DSP_24_U16 : |
| 1994 | { |
| 1995 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); |
| 1996 | if (length <= 0) break; |
| 1997 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); |
| 1998 | if (length <= 0) break; |
| 1999 | { |
| 2000 | FLD (f_dsp_24_u16) = ((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))); |
| 2001 | } |
| 2002 | } |
| 2003 | break; |
| 2004 | case M32C_OPERAND_DSP_24_U20 : |
| 2005 | { |
| 2006 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); |
| 2007 | if (length <= 0) break; |
| 2008 | { |
| 2009 | long value; |
| 2010 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); |
| 2011 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 2012 | fields->f_dsp_32_u16 = value; |
| 2013 | } |
| 2014 | if (length <= 0) break; |
| 2015 | { |
| 2016 | FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8))); |
| 2017 | } |
| 2018 | } |
| 2019 | break; |
| 2020 | case M32C_OPERAND_DSP_24_U24 : |
| 2021 | { |
| 2022 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); |
| 2023 | if (length <= 0) break; |
| 2024 | { |
| 2025 | long value; |
| 2026 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); |
| 2027 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 2028 | fields->f_dsp_32_u16 = value; |
| 2029 | } |
| 2030 | if (length <= 0) break; |
| 2031 | { |
| 2032 | FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8))); |
| 2033 | } |
| 2034 | } |
| 2035 | break; |
| 2036 | case M32C_OPERAND_DSP_24_U8 : |
| 2037 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); |
| 2038 | break; |
| 2039 | case M32C_OPERAND_DSP_32_S16 : |
| 2040 | { |
| 2041 | long value; |
| 2042 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value); |
| 2043 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 2044 | fields->f_dsp_32_s16 = value; |
| 2045 | } |
| 2046 | break; |
| 2047 | case M32C_OPERAND_DSP_32_S8 : |
| 2048 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8); |
| 2049 | break; |
| 2050 | case M32C_OPERAND_DSP_32_U16 : |
| 2051 | { |
| 2052 | long value; |
| 2053 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); |
| 2054 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 2055 | fields->f_dsp_32_u16 = value; |
| 2056 | } |
| 2057 | break; |
| 2058 | case M32C_OPERAND_DSP_32_U20 : |
| 2059 | { |
| 2060 | long value; |
| 2061 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value); |
| 2062 | value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); |
| 2063 | fields->f_dsp_32_u24 = value; |
| 2064 | } |
| 2065 | break; |
| 2066 | case M32C_OPERAND_DSP_32_U24 : |
| 2067 | { |
| 2068 | long value; |
| 2069 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value); |
| 2070 | value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); |
| 2071 | fields->f_dsp_32_u24 = value; |
| 2072 | } |
| 2073 | break; |
| 2074 | case M32C_OPERAND_DSP_32_U8 : |
| 2075 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); |
| 2076 | break; |
| 2077 | case M32C_OPERAND_DSP_40_S16 : |
| 2078 | { |
| 2079 | long value; |
| 2080 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value); |
| 2081 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 2082 | fields->f_dsp_40_s16 = value; |
| 2083 | } |
| 2084 | break; |
| 2085 | case M32C_OPERAND_DSP_40_S8 : |
| 2086 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8); |
| 2087 | break; |
| 2088 | case M32C_OPERAND_DSP_40_U16 : |
| 2089 | { |
| 2090 | long value; |
| 2091 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value); |
| 2092 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 2093 | fields->f_dsp_40_u16 = value; |
| 2094 | } |
| 2095 | break; |
| 2096 | case M32C_OPERAND_DSP_40_U24 : |
| 2097 | { |
| 2098 | long value; |
| 2099 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value); |
| 2100 | value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); |
| 2101 | fields->f_dsp_40_u24 = value; |
| 2102 | } |
| 2103 | break; |
| 2104 | case M32C_OPERAND_DSP_40_U8 : |
| 2105 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8); |
| 2106 | break; |
| 2107 | case M32C_OPERAND_DSP_48_S16 : |
| 2108 | { |
| 2109 | long value; |
| 2110 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value); |
| 2111 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 2112 | fields->f_dsp_48_s16 = value; |
| 2113 | } |
| 2114 | break; |
| 2115 | case M32C_OPERAND_DSP_48_S8 : |
| 2116 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8); |
| 2117 | break; |
| 2118 | case M32C_OPERAND_DSP_48_U16 : |
| 2119 | { |
| 2120 | long value; |
| 2121 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); |
| 2122 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 2123 | fields->f_dsp_48_u16 = value; |
| 2124 | } |
| 2125 | break; |
| 2126 | case M32C_OPERAND_DSP_48_U24 : |
| 2127 | { |
| 2128 | { |
| 2129 | long value; |
| 2130 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); |
| 2131 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 2132 | fields->f_dsp_48_u16 = value; |
| 2133 | } |
| 2134 | if (length <= 0) break; |
| 2135 | length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8); |
| 2136 | if (length <= 0) break; |
| 2137 | { |
| 2138 | FLD (f_dsp_48_u24) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (16711680)))); |
| 2139 | } |
| 2140 | } |
| 2141 | break; |
| 2142 | case M32C_OPERAND_DSP_48_U8 : |
| 2143 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_u8); |
| 2144 | break; |
| 2145 | case M32C_OPERAND_DSP_8_S24 : |
| 2146 | { |
| 2147 | long value; |
| 2148 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, pc, & value); |
| 2149 | value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16)))); |
| 2150 | fields->f_dsp_8_s24 = value; |
| 2151 | } |
| 2152 | break; |
| 2153 | case M32C_OPERAND_DSP_8_S8 : |
| 2154 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8); |
| 2155 | break; |
| 2156 | case M32C_OPERAND_DSP_8_U16 : |
| 2157 | { |
| 2158 | long value; |
| 2159 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value); |
| 2160 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 2161 | fields->f_dsp_8_u16 = value; |
| 2162 | } |
| 2163 | break; |
| 2164 | case M32C_OPERAND_DSP_8_U24 : |
| 2165 | { |
| 2166 | long value; |
| 2167 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value); |
| 2168 | value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); |
| 2169 | fields->f_dsp_8_u24 = value; |
| 2170 | } |
| 2171 | break; |
| 2172 | case M32C_OPERAND_DSP_8_U6 : |
| 2173 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 6, 32, total_length, pc, & fields->f_dsp_8_u6); |
| 2174 | break; |
| 2175 | case M32C_OPERAND_DSP_8_U8 : |
| 2176 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8); |
| 2177 | break; |
| 2178 | case M32C_OPERAND_DST16AN : |
| 2179 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); |
| 2180 | break; |
| 2181 | case M32C_OPERAND_DST16AN_S : |
| 2182 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_dst16_an_s); |
| 2183 | break; |
| 2184 | case M32C_OPERAND_DST16ANHI : |
| 2185 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); |
| 2186 | break; |
| 2187 | case M32C_OPERAND_DST16ANQI : |
| 2188 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); |
| 2189 | break; |
| 2190 | case M32C_OPERAND_DST16ANQI_S : |
| 2191 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s); |
| 2192 | break; |
| 2193 | case M32C_OPERAND_DST16ANSI : |
| 2194 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); |
| 2195 | break; |
| 2196 | case M32C_OPERAND_DST16RNEXTQI : |
| 2197 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 1, 32, total_length, pc, & fields->f_dst16_rn_ext); |
| 2198 | break; |
| 2199 | case M32C_OPERAND_DST16RNHI : |
| 2200 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn); |
| 2201 | break; |
| 2202 | case M32C_OPERAND_DST16RNQI : |
| 2203 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn); |
| 2204 | break; |
| 2205 | case M32C_OPERAND_DST16RNQI_S : |
| 2206 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s); |
| 2207 | break; |
| 2208 | case M32C_OPERAND_DST16RNSI : |
| 2209 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn); |
| 2210 | break; |
| 2211 | case M32C_OPERAND_DST32ANEXTUNPREFIXED : |
| 2212 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); |
| 2213 | break; |
| 2214 | case M32C_OPERAND_DST32ANPREFIXED : |
| 2215 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); |
| 2216 | break; |
| 2217 | case M32C_OPERAND_DST32ANPREFIXEDHI : |
| 2218 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); |
| 2219 | break; |
| 2220 | case M32C_OPERAND_DST32ANPREFIXEDQI : |
| 2221 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); |
| 2222 | break; |
| 2223 | case M32C_OPERAND_DST32ANPREFIXEDSI : |
| 2224 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); |
| 2225 | break; |
| 2226 | case M32C_OPERAND_DST32ANUNPREFIXED : |
| 2227 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); |
| 2228 | break; |
| 2229 | case M32C_OPERAND_DST32ANUNPREFIXEDHI : |
| 2230 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); |
| 2231 | break; |
| 2232 | case M32C_OPERAND_DST32ANUNPREFIXEDQI : |
| 2233 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); |
| 2234 | break; |
| 2235 | case M32C_OPERAND_DST32ANUNPREFIXEDSI : |
| 2236 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); |
| 2237 | break; |
| 2238 | case M32C_OPERAND_DST32R0HI_S : |
| 2239 | break; |
| 2240 | case M32C_OPERAND_DST32R0QI_S : |
| 2241 | break; |
| 2242 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : |
| 2243 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed); |
| 2244 | break; |
| 2245 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : |
| 2246 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed); |
| 2247 | break; |
| 2248 | case M32C_OPERAND_DST32RNPREFIXEDHI : |
| 2249 | { |
| 2250 | long value; |
| 2251 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); |
| 2252 | value = ((((value) + (2))) % (4)); |
| 2253 | fields->f_dst32_rn_prefixed_HI = value; |
| 2254 | } |
| 2255 | break; |
| 2256 | case M32C_OPERAND_DST32RNPREFIXEDQI : |
| 2257 | { |
| 2258 | long value; |
| 2259 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); |
| 2260 | value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); |
| 2261 | fields->f_dst32_rn_prefixed_QI = value; |
| 2262 | } |
| 2263 | break; |
| 2264 | case M32C_OPERAND_DST32RNPREFIXEDSI : |
| 2265 | { |
| 2266 | long value; |
| 2267 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); |
| 2268 | value = ((value) - (2)); |
| 2269 | fields->f_dst32_rn_prefixed_SI = value; |
| 2270 | } |
| 2271 | break; |
| 2272 | case M32C_OPERAND_DST32RNUNPREFIXEDHI : |
| 2273 | { |
| 2274 | long value; |
| 2275 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); |
| 2276 | value = ((((value) + (2))) % (4)); |
| 2277 | fields->f_dst32_rn_unprefixed_HI = value; |
| 2278 | } |
| 2279 | break; |
| 2280 | case M32C_OPERAND_DST32RNUNPREFIXEDQI : |
| 2281 | { |
| 2282 | long value; |
| 2283 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); |
| 2284 | value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); |
| 2285 | fields->f_dst32_rn_unprefixed_QI = value; |
| 2286 | } |
| 2287 | break; |
| 2288 | case M32C_OPERAND_DST32RNUNPREFIXEDSI : |
| 2289 | { |
| 2290 | long value; |
| 2291 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); |
| 2292 | value = ((value) - (2)); |
| 2293 | fields->f_dst32_rn_unprefixed_SI = value; |
| 2294 | } |
| 2295 | break; |
| 2296 | case M32C_OPERAND_G : |
| 2297 | break; |
| 2298 | case M32C_OPERAND_IMM_12_S4 : |
| 2299 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4); |
| 2300 | break; |
| 2301 | case M32C_OPERAND_IMM_13_U3 : |
| 2302 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_imm_13_u3); |
| 2303 | break; |
| 2304 | case M32C_OPERAND_IMM_16_HI : |
| 2305 | { |
| 2306 | long value; |
| 2307 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value); |
| 2308 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 2309 | fields->f_dsp_16_s16 = value; |
| 2310 | } |
| 2311 | break; |
| 2312 | case M32C_OPERAND_IMM_16_QI : |
| 2313 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8); |
| 2314 | break; |
| 2315 | case M32C_OPERAND_IMM_16_SI : |
| 2316 | { |
| 2317 | { |
| 2318 | long value; |
| 2319 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); |
| 2320 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 2321 | fields->f_dsp_16_u16 = value; |
| 2322 | } |
| 2323 | if (length <= 0) break; |
| 2324 | { |
| 2325 | long value; |
| 2326 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); |
| 2327 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 2328 | fields->f_dsp_32_u16 = value; |
| 2329 | } |
| 2330 | if (length <= 0) break; |
| 2331 | { |
| 2332 | FLD (f_dsp_16_s32) = ((((FLD (f_dsp_16_u16)) & (65535))) | (((((FLD (f_dsp_32_u16)) << (16))) & (0xffff0000)))); |
| 2333 | } |
| 2334 | } |
| 2335 | break; |
| 2336 | case M32C_OPERAND_IMM_20_S4 : |
| 2337 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4); |
| 2338 | break; |
| 2339 | case M32C_OPERAND_IMM_24_HI : |
| 2340 | { |
| 2341 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); |
| 2342 | if (length <= 0) break; |
| 2343 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); |
| 2344 | if (length <= 0) break; |
| 2345 | { |
| 2346 | FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)))))); |
| 2347 | } |
| 2348 | } |
| 2349 | break; |
| 2350 | case M32C_OPERAND_IMM_24_QI : |
| 2351 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8); |
| 2352 | break; |
| 2353 | case M32C_OPERAND_IMM_24_SI : |
| 2354 | { |
| 2355 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); |
| 2356 | if (length <= 0) break; |
| 2357 | { |
| 2358 | long value; |
| 2359 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value); |
| 2360 | value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); |
| 2361 | fields->f_dsp_32_u24 = value; |
| 2362 | } |
| 2363 | if (length <= 0) break; |
| 2364 | { |
| 2365 | FLD (f_dsp_24_s32) = ((((FLD (f_dsp_24_u8)) & (255))) | (((((FLD (f_dsp_32_u24)) << (8))) & (0xffffff00)))); |
| 2366 | } |
| 2367 | } |
| 2368 | break; |
| 2369 | case M32C_OPERAND_IMM_32_HI : |
| 2370 | { |
| 2371 | long value; |
| 2372 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value); |
| 2373 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 2374 | fields->f_dsp_32_s16 = value; |
| 2375 | } |
| 2376 | break; |
| 2377 | case M32C_OPERAND_IMM_32_QI : |
| 2378 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8); |
| 2379 | break; |
| 2380 | case M32C_OPERAND_IMM_32_SI : |
| 2381 | { |
| 2382 | long value; |
| 2383 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, pc, & value); |
| 2384 | value = EXTSISI (((((((((unsigned int) (value) >> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000))))))); |
| 2385 | fields->f_dsp_32_s32 = value; |
| 2386 | } |
| 2387 | break; |
| 2388 | case M32C_OPERAND_IMM_40_HI : |
| 2389 | { |
| 2390 | long value; |
| 2391 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value); |
| 2392 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 2393 | fields->f_dsp_40_s16 = value; |
| 2394 | } |
| 2395 | break; |
| 2396 | case M32C_OPERAND_IMM_40_QI : |
| 2397 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8); |
| 2398 | break; |
| 2399 | case M32C_OPERAND_IMM_40_SI : |
| 2400 | { |
| 2401 | { |
| 2402 | long value; |
| 2403 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value); |
| 2404 | value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); |
| 2405 | fields->f_dsp_40_u24 = value; |
| 2406 | } |
| 2407 | if (length <= 0) break; |
| 2408 | length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8); |
| 2409 | if (length <= 0) break; |
| 2410 | { |
| 2411 | FLD (f_dsp_40_s32) = ((((FLD (f_dsp_40_u24)) & (16777215))) | (((((FLD (f_dsp_64_u8)) << (24))) & (0xff000000)))); |
| 2412 | } |
| 2413 | } |
| 2414 | break; |
| 2415 | case M32C_OPERAND_IMM_48_HI : |
| 2416 | { |
| 2417 | long value; |
| 2418 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value); |
| 2419 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 2420 | fields->f_dsp_48_s16 = value; |
| 2421 | } |
| 2422 | break; |
| 2423 | case M32C_OPERAND_IMM_48_QI : |
| 2424 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8); |
| 2425 | break; |
| 2426 | case M32C_OPERAND_IMM_48_SI : |
| 2427 | { |
| 2428 | { |
| 2429 | long value; |
| 2430 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); |
| 2431 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 2432 | fields->f_dsp_48_u16 = value; |
| 2433 | } |
| 2434 | if (length <= 0) break; |
| 2435 | { |
| 2436 | long value; |
| 2437 | length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value); |
| 2438 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); |
| 2439 | fields->f_dsp_64_u16 = value; |
| 2440 | } |
| 2441 | if (length <= 0) break; |
| 2442 | { |
| 2443 | FLD (f_dsp_48_s32) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u16)) << (16))) & (0xffff0000)))); |
| 2444 | } |
| 2445 | } |
| 2446 | break; |
| 2447 | case M32C_OPERAND_IMM_56_HI : |
| 2448 | { |
| 2449 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_u8); |
| 2450 | if (length <= 0) break; |
| 2451 | length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8); |
| 2452 | if (length <= 0) break; |
| 2453 | { |
| 2454 | FLD (f_dsp_56_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_64_u8)) << (8))) | (FLD (f_dsp_56_u8)))))); |
| 2455 | } |
| 2456 | } |
| 2457 | break; |
| 2458 | case M32C_OPERAND_IMM_56_QI : |
| 2459 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_s8); |
| 2460 | break; |
| 2461 | case M32C_OPERAND_IMM_64_HI : |
| 2462 | { |
| 2463 | long value; |
| 2464 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value); |
| 2465 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 2466 | fields->f_dsp_64_s16 = value; |
| 2467 | } |
| 2468 | break; |
| 2469 | case M32C_OPERAND_IMM_8_HI : |
| 2470 | { |
| 2471 | long value; |
| 2472 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, pc, & value); |
| 2473 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); |
| 2474 | fields->f_dsp_8_s16 = value; |
| 2475 | } |
| 2476 | break; |
| 2477 | case M32C_OPERAND_IMM_8_QI : |
| 2478 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8); |
| 2479 | break; |
| 2480 | case M32C_OPERAND_IMM_8_S4 : |
| 2481 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4); |
| 2482 | break; |
| 2483 | case M32C_OPERAND_IMM_SH_12_S4 : |
| 2484 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4); |
| 2485 | break; |
| 2486 | case M32C_OPERAND_IMM_SH_20_S4 : |
| 2487 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4); |
| 2488 | break; |
| 2489 | case M32C_OPERAND_IMM_SH_8_S4 : |
| 2490 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4); |
| 2491 | break; |
| 2492 | case M32C_OPERAND_IMM1_S : |
| 2493 | { |
| 2494 | long value; |
| 2495 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 1, 32, total_length, pc, & value); |
| 2496 | value = ((value) + (1)); |
| 2497 | fields->f_imm1_S = value; |
| 2498 | } |
| 2499 | break; |
| 2500 | case M32C_OPERAND_IMM3_S : |
| 2501 | { |
| 2502 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2); |
| 2503 | if (length <= 0) break; |
| 2504 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1); |
| 2505 | if (length <= 0) break; |
| 2506 | { |
| 2507 | FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1)); |
| 2508 | } |
| 2509 | } |
| 2510 | break; |
| 2511 | case M32C_OPERAND_LAB_16_8 : |
| 2512 | { |
| 2513 | long value; |
| 2514 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, pc, & value); |
| 2515 | value = ((value) + (((pc) + (2)))); |
| 2516 | fields->f_lab_16_8 = value; |
| 2517 | } |
| 2518 | break; |
| 2519 | case M32C_OPERAND_LAB_24_8 : |
| 2520 | { |
| 2521 | long value; |
| 2522 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, pc, & value); |
| 2523 | value = ((value) + (((pc) + (2)))); |
| 2524 | fields->f_lab_24_8 = value; |
| 2525 | } |
| 2526 | break; |
| 2527 | case M32C_OPERAND_LAB_32_8 : |
| 2528 | { |
| 2529 | long value; |
| 2530 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, pc, & value); |
| 2531 | value = ((value) + (((pc) + (2)))); |
| 2532 | fields->f_lab_32_8 = value; |
| 2533 | } |
| 2534 | break; |
| 2535 | case M32C_OPERAND_LAB_40_8 : |
| 2536 | { |
| 2537 | long value; |
| 2538 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, pc, & value); |
| 2539 | value = ((value) + (((pc) + (2)))); |
| 2540 | fields->f_lab_40_8 = value; |
| 2541 | } |
| 2542 | break; |
| 2543 | case M32C_OPERAND_LAB_5_3 : |
| 2544 | { |
| 2545 | long value; |
| 2546 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value); |
| 2547 | value = ((value) + (((pc) + (2)))); |
| 2548 | fields->f_lab_5_3 = value; |
| 2549 | } |
| 2550 | break; |
| 2551 | case M32C_OPERAND_LAB_8_16 : |
| 2552 | { |
| 2553 | long value; |
| 2554 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value); |
| 2555 | value = ((((((unsigned int) (((value) & (65535))) >> (8))) | (((int) (((((value) & (255))) << (24))) >> (16))))) + (((pc) + (1)))); |
| 2556 | fields->f_lab_8_16 = value; |
| 2557 | } |
| 2558 | break; |
| 2559 | case M32C_OPERAND_LAB_8_24 : |
| 2560 | { |
| 2561 | long value; |
| 2562 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & value); |
| 2563 | value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); |
| 2564 | fields->f_lab_8_24 = value; |
| 2565 | } |
| 2566 | break; |
| 2567 | case M32C_OPERAND_LAB_8_8 : |
| 2568 | { |
| 2569 | long value; |
| 2570 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value); |
| 2571 | value = ((value) + (((pc) + (1)))); |
| 2572 | fields->f_lab_8_8 = value; |
| 2573 | } |
| 2574 | break; |
| 2575 | case M32C_OPERAND_LAB32_JMP_S : |
| 2576 | { |
| 2577 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2); |
| 2578 | if (length <= 0) break; |
| 2579 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1); |
| 2580 | if (length <= 0) break; |
| 2581 | { |
| 2582 | FLD (f_lab32_jmp_s) = ((pc) + (((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (2)))); |
| 2583 | } |
| 2584 | } |
| 2585 | break; |
| 2586 | case M32C_OPERAND_Q : |
| 2587 | break; |
| 2588 | case M32C_OPERAND_R0 : |
| 2589 | break; |
| 2590 | case M32C_OPERAND_R0H : |
| 2591 | break; |
| 2592 | case M32C_OPERAND_R0L : |
| 2593 | break; |
| 2594 | case M32C_OPERAND_R1 : |
| 2595 | break; |
| 2596 | case M32C_OPERAND_R1R2R0 : |
| 2597 | break; |
| 2598 | case M32C_OPERAND_R2 : |
| 2599 | break; |
| 2600 | case M32C_OPERAND_R2R0 : |
| 2601 | break; |
| 2602 | case M32C_OPERAND_R3 : |
| 2603 | break; |
| 2604 | case M32C_OPERAND_R3R1 : |
| 2605 | break; |
| 2606 | case M32C_OPERAND_REGSETPOP : |
| 2607 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8); |
| 2608 | break; |
| 2609 | case M32C_OPERAND_REGSETPUSH : |
| 2610 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8); |
| 2611 | break; |
| 2612 | case M32C_OPERAND_RN16_PUSH_S : |
| 2613 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1); |
| 2614 | break; |
| 2615 | case M32C_OPERAND_S : |
| 2616 | break; |
| 2617 | case M32C_OPERAND_SRC16AN : |
| 2618 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an); |
| 2619 | break; |
| 2620 | case M32C_OPERAND_SRC16ANHI : |
| 2621 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an); |
| 2622 | break; |
| 2623 | case M32C_OPERAND_SRC16ANQI : |
| 2624 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an); |
| 2625 | break; |
| 2626 | case M32C_OPERAND_SRC16RNHI : |
| 2627 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn); |
| 2628 | break; |
| 2629 | case M32C_OPERAND_SRC16RNQI : |
| 2630 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn); |
| 2631 | break; |
| 2632 | case M32C_OPERAND_SRC32ANPREFIXED : |
| 2633 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed); |
| 2634 | break; |
| 2635 | case M32C_OPERAND_SRC32ANPREFIXEDHI : |
| 2636 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed); |
| 2637 | break; |
| 2638 | case M32C_OPERAND_SRC32ANPREFIXEDQI : |
| 2639 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed); |
| 2640 | break; |
| 2641 | case M32C_OPERAND_SRC32ANPREFIXEDSI : |
| 2642 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed); |
| 2643 | break; |
| 2644 | case M32C_OPERAND_SRC32ANUNPREFIXED : |
| 2645 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed); |
| 2646 | break; |
| 2647 | case M32C_OPERAND_SRC32ANUNPREFIXEDHI : |
| 2648 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed); |
| 2649 | break; |
| 2650 | case M32C_OPERAND_SRC32ANUNPREFIXEDQI : |
| 2651 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed); |
| 2652 | break; |
| 2653 | case M32C_OPERAND_SRC32ANUNPREFIXEDSI : |
| 2654 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed); |
| 2655 | break; |
| 2656 | case M32C_OPERAND_SRC32RNPREFIXEDHI : |
| 2657 | { |
| 2658 | long value; |
| 2659 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value); |
| 2660 | value = ((((value) + (2))) % (4)); |
| 2661 | fields->f_src32_rn_prefixed_HI = value; |
| 2662 | } |
| 2663 | break; |
| 2664 | case M32C_OPERAND_SRC32RNPREFIXEDQI : |
| 2665 | { |
| 2666 | long value; |
| 2667 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value); |
| 2668 | value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); |
| 2669 | fields->f_src32_rn_prefixed_QI = value; |
| 2670 | } |
| 2671 | break; |
| 2672 | case M32C_OPERAND_SRC32RNPREFIXEDSI : |
| 2673 | { |
| 2674 | long value; |
| 2675 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value); |
| 2676 | value = ((value) - (2)); |
| 2677 | fields->f_src32_rn_prefixed_SI = value; |
| 2678 | } |
| 2679 | break; |
| 2680 | case M32C_OPERAND_SRC32RNUNPREFIXEDHI : |
| 2681 | { |
| 2682 | long value; |
| 2683 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value); |
| 2684 | value = ((((value) + (2))) % (4)); |
| 2685 | fields->f_src32_rn_unprefixed_HI = value; |
| 2686 | } |
| 2687 | break; |
| 2688 | case M32C_OPERAND_SRC32RNUNPREFIXEDQI : |
| 2689 | { |
| 2690 | long value; |
| 2691 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value); |
| 2692 | value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); |
| 2693 | fields->f_src32_rn_unprefixed_QI = value; |
| 2694 | } |
| 2695 | break; |
| 2696 | case M32C_OPERAND_SRC32RNUNPREFIXEDSI : |
| 2697 | { |
| 2698 | long value; |
| 2699 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value); |
| 2700 | value = ((value) - (2)); |
| 2701 | fields->f_src32_rn_unprefixed_SI = value; |
| 2702 | } |
| 2703 | break; |
| 2704 | case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : |
| 2705 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_5_1); |
| 2706 | break; |
| 2707 | case M32C_OPERAND_X : |
| 2708 | break; |
| 2709 | case M32C_OPERAND_Z : |
| 2710 | break; |
| 2711 | case M32C_OPERAND_COND16_16 : |
| 2712 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); |
| 2713 | break; |
| 2714 | case M32C_OPERAND_COND16_24 : |
| 2715 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); |
| 2716 | break; |
| 2717 | case M32C_OPERAND_COND16_32 : |
| 2718 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); |
| 2719 | break; |
| 2720 | case M32C_OPERAND_COND16C : |
| 2721 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16); |
| 2722 | break; |
| 2723 | case M32C_OPERAND_COND16J : |
| 2724 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16); |
| 2725 | break; |
| 2726 | case M32C_OPERAND_COND16J5 : |
| 2727 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cond16j_5); |
| 2728 | break; |
| 2729 | case M32C_OPERAND_COND32 : |
| 2730 | { |
| 2731 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_9_1); |
| 2732 | if (length <= 0) break; |
| 2733 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); |
| 2734 | if (length <= 0) break; |
| 2735 | { |
| 2736 | FLD (f_cond32) = ((((FLD (f_9_1)) << (3))) | (FLD (f_13_3))); |
| 2737 | } |
| 2738 | } |
| 2739 | break; |
| 2740 | case M32C_OPERAND_COND32_16 : |
| 2741 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); |
| 2742 | break; |
| 2743 | case M32C_OPERAND_COND32_24 : |
| 2744 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); |
| 2745 | break; |
| 2746 | case M32C_OPERAND_COND32_32 : |
| 2747 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); |
| 2748 | break; |
| 2749 | case M32C_OPERAND_COND32_40 : |
| 2750 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8); |
| 2751 | break; |
| 2752 | case M32C_OPERAND_COND32J : |
| 2753 | { |
| 2754 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 3, 32, total_length, pc, & fields->f_1_3); |
| 2755 | if (length <= 0) break; |
| 2756 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1); |
| 2757 | if (length <= 0) break; |
| 2758 | { |
| 2759 | FLD (f_cond32j) = ((((FLD (f_1_3)) << (1))) | (FLD (f_7_1))); |
| 2760 | } |
| 2761 | } |
| 2762 | break; |
| 2763 | case M32C_OPERAND_CR1_PREFIXED_32 : |
| 2764 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3); |
| 2765 | break; |
| 2766 | case M32C_OPERAND_CR1_UNPREFIXED_32 : |
| 2767 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); |
| 2768 | break; |
| 2769 | case M32C_OPERAND_CR16 : |
| 2770 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3); |
| 2771 | break; |
| 2772 | case M32C_OPERAND_CR2_32 : |
| 2773 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); |
| 2774 | break; |
| 2775 | case M32C_OPERAND_CR3_PREFIXED_32 : |
| 2776 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3); |
| 2777 | break; |
| 2778 | case M32C_OPERAND_CR3_UNPREFIXED_32 : |
| 2779 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); |
| 2780 | break; |
| 2781 | case M32C_OPERAND_FLAGS16 : |
| 2782 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3); |
| 2783 | break; |
| 2784 | case M32C_OPERAND_FLAGS32 : |
| 2785 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); |
| 2786 | break; |
| 2787 | case M32C_OPERAND_SCCOND32 : |
| 2788 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16); |
| 2789 | break; |
| 2790 | case M32C_OPERAND_SIZE : |
| 2791 | break; |
| 2792 | |
| 2793 | default : |
| 2794 | /* xgettext:c-format */ |
| 2795 | fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"), |
| 2796 | opindex); |
| 2797 | abort (); |
| 2798 | } |
| 2799 | |
| 2800 | return length; |
| 2801 | } |
| 2802 | |
| 2803 | cgen_insert_fn * const m32c_cgen_insert_handlers[] = |
| 2804 | { |
| 2805 | insert_insn_normal, |
| 2806 | }; |
| 2807 | |
| 2808 | cgen_extract_fn * const m32c_cgen_extract_handlers[] = |
| 2809 | { |
| 2810 | extract_insn_normal, |
| 2811 | }; |
| 2812 | |
| 2813 | int m32c_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); |
| 2814 | bfd_vma m32c_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); |
| 2815 | |
| 2816 | /* Getting values from cgen_fields is handled by a collection of functions. |
| 2817 | They are distinguished by the type of the VALUE argument they return. |
| 2818 | TODO: floating point, inlining support, remove cases where result type |
| 2819 | not appropriate. */ |
| 2820 | |
| 2821 | int |
| 2822 | m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 2823 | int opindex, |
| 2824 | const CGEN_FIELDS * fields) |
| 2825 | { |
| 2826 | int value; |
| 2827 | |
| 2828 | switch (opindex) |
| 2829 | { |
| 2830 | case M32C_OPERAND_A0 : |
| 2831 | value = 0; |
| 2832 | break; |
| 2833 | case M32C_OPERAND_A1 : |
| 2834 | value = 0; |
| 2835 | break; |
| 2836 | case M32C_OPERAND_AN16_PUSH_S : |
| 2837 | value = fields->f_4_1; |
| 2838 | break; |
| 2839 | case M32C_OPERAND_BIT16AN : |
| 2840 | value = fields->f_dst16_an; |
| 2841 | break; |
| 2842 | case M32C_OPERAND_BIT16RN : |
| 2843 | value = fields->f_dst16_rn; |
| 2844 | break; |
| 2845 | case M32C_OPERAND_BIT32ANPREFIXED : |
| 2846 | value = fields->f_dst32_an_prefixed; |
| 2847 | break; |
| 2848 | case M32C_OPERAND_BIT32ANUNPREFIXED : |
| 2849 | value = fields->f_dst32_an_unprefixed; |
| 2850 | break; |
| 2851 | case M32C_OPERAND_BIT32RNPREFIXED : |
| 2852 | value = fields->f_dst32_rn_prefixed_QI; |
| 2853 | break; |
| 2854 | case M32C_OPERAND_BIT32RNUNPREFIXED : |
| 2855 | value = fields->f_dst32_rn_unprefixed_QI; |
| 2856 | break; |
| 2857 | case M32C_OPERAND_BITBASE16_16_S8 : |
| 2858 | value = fields->f_dsp_16_s8; |
| 2859 | break; |
| 2860 | case M32C_OPERAND_BITBASE16_16_U16 : |
| 2861 | value = fields->f_dsp_16_u16; |
| 2862 | break; |
| 2863 | case M32C_OPERAND_BITBASE16_16_U8 : |
| 2864 | value = fields->f_dsp_16_u8; |
| 2865 | break; |
| 2866 | case M32C_OPERAND_BITBASE16_8_U11_S : |
| 2867 | value = fields->f_bitbase16_u11_S; |
| 2868 | break; |
| 2869 | case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : |
| 2870 | value = fields->f_bitbase32_16_s11_unprefixed; |
| 2871 | break; |
| 2872 | case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : |
| 2873 | value = fields->f_bitbase32_16_s19_unprefixed; |
| 2874 | break; |
| 2875 | case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : |
| 2876 | value = fields->f_bitbase32_16_u11_unprefixed; |
| 2877 | break; |
| 2878 | case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : |
| 2879 | value = fields->f_bitbase32_16_u19_unprefixed; |
| 2880 | break; |
| 2881 | case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : |
| 2882 | value = fields->f_bitbase32_16_u27_unprefixed; |
| 2883 | break; |
| 2884 | case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : |
| 2885 | value = fields->f_bitbase32_24_s11_prefixed; |
| 2886 | break; |
| 2887 | case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : |
| 2888 | value = fields->f_bitbase32_24_s19_prefixed; |
| 2889 | break; |
| 2890 | case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : |
| 2891 | value = fields->f_bitbase32_24_u11_prefixed; |
| 2892 | break; |
| 2893 | case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : |
| 2894 | value = fields->f_bitbase32_24_u19_prefixed; |
| 2895 | break; |
| 2896 | case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : |
| 2897 | value = fields->f_bitbase32_24_u27_prefixed; |
| 2898 | break; |
| 2899 | case M32C_OPERAND_BITNO16R : |
| 2900 | value = fields->f_dsp_16_u8; |
| 2901 | break; |
| 2902 | case M32C_OPERAND_BITNO32PREFIXED : |
| 2903 | value = fields->f_bitno32_prefixed; |
| 2904 | break; |
| 2905 | case M32C_OPERAND_BITNO32UNPREFIXED : |
| 2906 | value = fields->f_bitno32_unprefixed; |
| 2907 | break; |
| 2908 | case M32C_OPERAND_DSP_10_U6 : |
| 2909 | value = fields->f_dsp_10_u6; |
| 2910 | break; |
| 2911 | case M32C_OPERAND_DSP_16_S16 : |
| 2912 | value = fields->f_dsp_16_s16; |
| 2913 | break; |
| 2914 | case M32C_OPERAND_DSP_16_S8 : |
| 2915 | value = fields->f_dsp_16_s8; |
| 2916 | break; |
| 2917 | case M32C_OPERAND_DSP_16_U16 : |
| 2918 | value = fields->f_dsp_16_u16; |
| 2919 | break; |
| 2920 | case M32C_OPERAND_DSP_16_U20 : |
| 2921 | value = fields->f_dsp_16_u24; |
| 2922 | break; |
| 2923 | case M32C_OPERAND_DSP_16_U24 : |
| 2924 | value = fields->f_dsp_16_u24; |
| 2925 | break; |
| 2926 | case M32C_OPERAND_DSP_16_U8 : |
| 2927 | value = fields->f_dsp_16_u8; |
| 2928 | break; |
| 2929 | case M32C_OPERAND_DSP_24_S16 : |
| 2930 | value = fields->f_dsp_24_s16; |
| 2931 | break; |
| 2932 | case M32C_OPERAND_DSP_24_S8 : |
| 2933 | value = fields->f_dsp_24_s8; |
| 2934 | break; |
| 2935 | case M32C_OPERAND_DSP_24_U16 : |
| 2936 | value = fields->f_dsp_24_u16; |
| 2937 | break; |
| 2938 | case M32C_OPERAND_DSP_24_U20 : |
| 2939 | value = fields->f_dsp_24_u24; |
| 2940 | break; |
| 2941 | case M32C_OPERAND_DSP_24_U24 : |
| 2942 | value = fields->f_dsp_24_u24; |
| 2943 | break; |
| 2944 | case M32C_OPERAND_DSP_24_U8 : |
| 2945 | value = fields->f_dsp_24_u8; |
| 2946 | break; |
| 2947 | case M32C_OPERAND_DSP_32_S16 : |
| 2948 | value = fields->f_dsp_32_s16; |
| 2949 | break; |
| 2950 | case M32C_OPERAND_DSP_32_S8 : |
| 2951 | value = fields->f_dsp_32_s8; |
| 2952 | break; |
| 2953 | case M32C_OPERAND_DSP_32_U16 : |
| 2954 | value = fields->f_dsp_32_u16; |
| 2955 | break; |
| 2956 | case M32C_OPERAND_DSP_32_U20 : |
| 2957 | value = fields->f_dsp_32_u24; |
| 2958 | break; |
| 2959 | case M32C_OPERAND_DSP_32_U24 : |
| 2960 | value = fields->f_dsp_32_u24; |
| 2961 | break; |
| 2962 | case M32C_OPERAND_DSP_32_U8 : |
| 2963 | value = fields->f_dsp_32_u8; |
| 2964 | break; |
| 2965 | case M32C_OPERAND_DSP_40_S16 : |
| 2966 | value = fields->f_dsp_40_s16; |
| 2967 | break; |
| 2968 | case M32C_OPERAND_DSP_40_S8 : |
| 2969 | value = fields->f_dsp_40_s8; |
| 2970 | break; |
| 2971 | case M32C_OPERAND_DSP_40_U16 : |
| 2972 | value = fields->f_dsp_40_u16; |
| 2973 | break; |
| 2974 | case M32C_OPERAND_DSP_40_U24 : |
| 2975 | value = fields->f_dsp_40_u24; |
| 2976 | break; |
| 2977 | case M32C_OPERAND_DSP_40_U8 : |
| 2978 | value = fields->f_dsp_40_u8; |
| 2979 | break; |
| 2980 | case M32C_OPERAND_DSP_48_S16 : |
| 2981 | value = fields->f_dsp_48_s16; |
| 2982 | break; |
| 2983 | case M32C_OPERAND_DSP_48_S8 : |
| 2984 | value = fields->f_dsp_48_s8; |
| 2985 | break; |
| 2986 | case M32C_OPERAND_DSP_48_U16 : |
| 2987 | value = fields->f_dsp_48_u16; |
| 2988 | break; |
| 2989 | case M32C_OPERAND_DSP_48_U24 : |
| 2990 | value = fields->f_dsp_48_u24; |
| 2991 | break; |
| 2992 | case M32C_OPERAND_DSP_48_U8 : |
| 2993 | value = fields->f_dsp_48_u8; |
| 2994 | break; |
| 2995 | case M32C_OPERAND_DSP_8_S24 : |
| 2996 | value = fields->f_dsp_8_s24; |
| 2997 | break; |
| 2998 | case M32C_OPERAND_DSP_8_S8 : |
| 2999 | value = fields->f_dsp_8_s8; |
| 3000 | break; |
| 3001 | case M32C_OPERAND_DSP_8_U16 : |
| 3002 | value = fields->f_dsp_8_u16; |
| 3003 | break; |
| 3004 | case M32C_OPERAND_DSP_8_U24 : |
| 3005 | value = fields->f_dsp_8_u24; |
| 3006 | break; |
| 3007 | case M32C_OPERAND_DSP_8_U6 : |
| 3008 | value = fields->f_dsp_8_u6; |
| 3009 | break; |
| 3010 | case M32C_OPERAND_DSP_8_U8 : |
| 3011 | value = fields->f_dsp_8_u8; |
| 3012 | break; |
| 3013 | case M32C_OPERAND_DST16AN : |
| 3014 | value = fields->f_dst16_an; |
| 3015 | break; |
| 3016 | case M32C_OPERAND_DST16AN_S : |
| 3017 | value = fields->f_dst16_an_s; |
| 3018 | break; |
| 3019 | case M32C_OPERAND_DST16ANHI : |
| 3020 | value = fields->f_dst16_an; |
| 3021 | break; |
| 3022 | case M32C_OPERAND_DST16ANQI : |
| 3023 | value = fields->f_dst16_an; |
| 3024 | break; |
| 3025 | case M32C_OPERAND_DST16ANQI_S : |
| 3026 | value = fields->f_dst16_rn_QI_s; |
| 3027 | break; |
| 3028 | case M32C_OPERAND_DST16ANSI : |
| 3029 | value = fields->f_dst16_an; |
| 3030 | break; |
| 3031 | case M32C_OPERAND_DST16RNEXTQI : |
| 3032 | value = fields->f_dst16_rn_ext; |
| 3033 | break; |
| 3034 | case M32C_OPERAND_DST16RNHI : |
| 3035 | value = fields->f_dst16_rn; |
| 3036 | break; |
| 3037 | case M32C_OPERAND_DST16RNQI : |
| 3038 | value = fields->f_dst16_rn; |
| 3039 | break; |
| 3040 | case M32C_OPERAND_DST16RNQI_S : |
| 3041 | value = fields->f_dst16_rn_QI_s; |
| 3042 | break; |
| 3043 | case M32C_OPERAND_DST16RNSI : |
| 3044 | value = fields->f_dst16_rn; |
| 3045 | break; |
| 3046 | case M32C_OPERAND_DST32ANEXTUNPREFIXED : |
| 3047 | value = fields->f_dst32_an_unprefixed; |
| 3048 | break; |
| 3049 | case M32C_OPERAND_DST32ANPREFIXED : |
| 3050 | value = fields->f_dst32_an_prefixed; |
| 3051 | break; |
| 3052 | case M32C_OPERAND_DST32ANPREFIXEDHI : |
| 3053 | value = fields->f_dst32_an_prefixed; |
| 3054 | break; |
| 3055 | case M32C_OPERAND_DST32ANPREFIXEDQI : |
| 3056 | value = fields->f_dst32_an_prefixed; |
| 3057 | break; |
| 3058 | case M32C_OPERAND_DST32ANPREFIXEDSI : |
| 3059 | value = fields->f_dst32_an_prefixed; |
| 3060 | break; |
| 3061 | case M32C_OPERAND_DST32ANUNPREFIXED : |
| 3062 | value = fields->f_dst32_an_unprefixed; |
| 3063 | break; |
| 3064 | case M32C_OPERAND_DST32ANUNPREFIXEDHI : |
| 3065 | value = fields->f_dst32_an_unprefixed; |
| 3066 | break; |
| 3067 | case M32C_OPERAND_DST32ANUNPREFIXEDQI : |
| 3068 | value = fields->f_dst32_an_unprefixed; |
| 3069 | break; |
| 3070 | case M32C_OPERAND_DST32ANUNPREFIXEDSI : |
| 3071 | value = fields->f_dst32_an_unprefixed; |
| 3072 | break; |
| 3073 | case M32C_OPERAND_DST32R0HI_S : |
| 3074 | value = 0; |
| 3075 | break; |
| 3076 | case M32C_OPERAND_DST32R0QI_S : |
| 3077 | value = 0; |
| 3078 | break; |
| 3079 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : |
| 3080 | value = fields->f_dst32_rn_ext_unprefixed; |
| 3081 | break; |
| 3082 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : |
| 3083 | value = fields->f_dst32_rn_ext_unprefixed; |
| 3084 | break; |
| 3085 | case M32C_OPERAND_DST32RNPREFIXEDHI : |
| 3086 | value = fields->f_dst32_rn_prefixed_HI; |
| 3087 | break; |
| 3088 | case M32C_OPERAND_DST32RNPREFIXEDQI : |
| 3089 | value = fields->f_dst32_rn_prefixed_QI; |
| 3090 | break; |
| 3091 | case M32C_OPERAND_DST32RNPREFIXEDSI : |
| 3092 | value = fields->f_dst32_rn_prefixed_SI; |
| 3093 | break; |
| 3094 | case M32C_OPERAND_DST32RNUNPREFIXEDHI : |
| 3095 | value = fields->f_dst32_rn_unprefixed_HI; |
| 3096 | break; |
| 3097 | case M32C_OPERAND_DST32RNUNPREFIXEDQI : |
| 3098 | value = fields->f_dst32_rn_unprefixed_QI; |
| 3099 | break; |
| 3100 | case M32C_OPERAND_DST32RNUNPREFIXEDSI : |
| 3101 | value = fields->f_dst32_rn_unprefixed_SI; |
| 3102 | break; |
| 3103 | case M32C_OPERAND_G : |
| 3104 | value = 0; |
| 3105 | break; |
| 3106 | case M32C_OPERAND_IMM_12_S4 : |
| 3107 | value = fields->f_imm_12_s4; |
| 3108 | break; |
| 3109 | case M32C_OPERAND_IMM_13_U3 : |
| 3110 | value = fields->f_imm_13_u3; |
| 3111 | break; |
| 3112 | case M32C_OPERAND_IMM_16_HI : |
| 3113 | value = fields->f_dsp_16_s16; |
| 3114 | break; |
| 3115 | case M32C_OPERAND_IMM_16_QI : |
| 3116 | value = fields->f_dsp_16_s8; |
| 3117 | break; |
| 3118 | case M32C_OPERAND_IMM_16_SI : |
| 3119 | value = fields->f_dsp_16_s32; |
| 3120 | break; |
| 3121 | case M32C_OPERAND_IMM_20_S4 : |
| 3122 | value = fields->f_imm_20_s4; |
| 3123 | break; |
| 3124 | case M32C_OPERAND_IMM_24_HI : |
| 3125 | value = fields->f_dsp_24_s16; |
| 3126 | break; |
| 3127 | case M32C_OPERAND_IMM_24_QI : |
| 3128 | value = fields->f_dsp_24_s8; |
| 3129 | break; |
| 3130 | case M32C_OPERAND_IMM_24_SI : |
| 3131 | value = fields->f_dsp_24_s32; |
| 3132 | break; |
| 3133 | case M32C_OPERAND_IMM_32_HI : |
| 3134 | value = fields->f_dsp_32_s16; |
| 3135 | break; |
| 3136 | case M32C_OPERAND_IMM_32_QI : |
| 3137 | value = fields->f_dsp_32_s8; |
| 3138 | break; |
| 3139 | case M32C_OPERAND_IMM_32_SI : |
| 3140 | value = fields->f_dsp_32_s32; |
| 3141 | break; |
| 3142 | case M32C_OPERAND_IMM_40_HI : |
| 3143 | value = fields->f_dsp_40_s16; |
| 3144 | break; |
| 3145 | case M32C_OPERAND_IMM_40_QI : |
| 3146 | value = fields->f_dsp_40_s8; |
| 3147 | break; |
| 3148 | case M32C_OPERAND_IMM_40_SI : |
| 3149 | value = fields->f_dsp_40_s32; |
| 3150 | break; |
| 3151 | case M32C_OPERAND_IMM_48_HI : |
| 3152 | value = fields->f_dsp_48_s16; |
| 3153 | break; |
| 3154 | case M32C_OPERAND_IMM_48_QI : |
| 3155 | value = fields->f_dsp_48_s8; |
| 3156 | break; |
| 3157 | case M32C_OPERAND_IMM_48_SI : |
| 3158 | value = fields->f_dsp_48_s32; |
| 3159 | break; |
| 3160 | case M32C_OPERAND_IMM_56_HI : |
| 3161 | value = fields->f_dsp_56_s16; |
| 3162 | break; |
| 3163 | case M32C_OPERAND_IMM_56_QI : |
| 3164 | value = fields->f_dsp_56_s8; |
| 3165 | break; |
| 3166 | case M32C_OPERAND_IMM_64_HI : |
| 3167 | value = fields->f_dsp_64_s16; |
| 3168 | break; |
| 3169 | case M32C_OPERAND_IMM_8_HI : |
| 3170 | value = fields->f_dsp_8_s16; |
| 3171 | break; |
| 3172 | case M32C_OPERAND_IMM_8_QI : |
| 3173 | value = fields->f_dsp_8_s8; |
| 3174 | break; |
| 3175 | case M32C_OPERAND_IMM_8_S4 : |
| 3176 | value = fields->f_imm_8_s4; |
| 3177 | break; |
| 3178 | case M32C_OPERAND_IMM_SH_12_S4 : |
| 3179 | value = fields->f_imm_12_s4; |
| 3180 | break; |
| 3181 | case M32C_OPERAND_IMM_SH_20_S4 : |
| 3182 | value = fields->f_imm_20_s4; |
| 3183 | break; |
| 3184 | case M32C_OPERAND_IMM_SH_8_S4 : |
| 3185 | value = fields->f_imm_8_s4; |
| 3186 | break; |
| 3187 | case M32C_OPERAND_IMM1_S : |
| 3188 | value = fields->f_imm1_S; |
| 3189 | break; |
| 3190 | case M32C_OPERAND_IMM3_S : |
| 3191 | value = fields->f_imm3_S; |
| 3192 | break; |
| 3193 | case M32C_OPERAND_LAB_16_8 : |
| 3194 | value = fields->f_lab_16_8; |
| 3195 | break; |
| 3196 | case M32C_OPERAND_LAB_24_8 : |
| 3197 | value = fields->f_lab_24_8; |
| 3198 | break; |
| 3199 | case M32C_OPERAND_LAB_32_8 : |
| 3200 | value = fields->f_lab_32_8; |
| 3201 | break; |
| 3202 | case M32C_OPERAND_LAB_40_8 : |
| 3203 | value = fields->f_lab_40_8; |
| 3204 | break; |
| 3205 | case M32C_OPERAND_LAB_5_3 : |
| 3206 | value = fields->f_lab_5_3; |
| 3207 | break; |
| 3208 | case M32C_OPERAND_LAB_8_16 : |
| 3209 | value = fields->f_lab_8_16; |
| 3210 | break; |
| 3211 | case M32C_OPERAND_LAB_8_24 : |
| 3212 | value = fields->f_lab_8_24; |
| 3213 | break; |
| 3214 | case M32C_OPERAND_LAB_8_8 : |
| 3215 | value = fields->f_lab_8_8; |
| 3216 | break; |
| 3217 | case M32C_OPERAND_LAB32_JMP_S : |
| 3218 | value = fields->f_lab32_jmp_s; |
| 3219 | break; |
| 3220 | case M32C_OPERAND_Q : |
| 3221 | value = 0; |
| 3222 | break; |
| 3223 | case M32C_OPERAND_R0 : |
| 3224 | value = 0; |
| 3225 | break; |
| 3226 | case M32C_OPERAND_R0H : |
| 3227 | value = 0; |
| 3228 | break; |
| 3229 | case M32C_OPERAND_R0L : |
| 3230 | value = 0; |
| 3231 | break; |
| 3232 | case M32C_OPERAND_R1 : |
| 3233 | value = 0; |
| 3234 | break; |
| 3235 | case M32C_OPERAND_R1R2R0 : |
| 3236 | value = 0; |
| 3237 | break; |
| 3238 | case M32C_OPERAND_R2 : |
| 3239 | value = 0; |
| 3240 | break; |
| 3241 | case M32C_OPERAND_R2R0 : |
| 3242 | value = 0; |
| 3243 | break; |
| 3244 | case M32C_OPERAND_R3 : |
| 3245 | value = 0; |
| 3246 | break; |
| 3247 | case M32C_OPERAND_R3R1 : |
| 3248 | value = 0; |
| 3249 | break; |
| 3250 | case M32C_OPERAND_REGSETPOP : |
| 3251 | value = fields->f_8_8; |
| 3252 | break; |
| 3253 | case M32C_OPERAND_REGSETPUSH : |
| 3254 | value = fields->f_8_8; |
| 3255 | break; |
| 3256 | case M32C_OPERAND_RN16_PUSH_S : |
| 3257 | value = fields->f_4_1; |
| 3258 | break; |
| 3259 | case M32C_OPERAND_S : |
| 3260 | value = 0; |
| 3261 | break; |
| 3262 | case M32C_OPERAND_SRC16AN : |
| 3263 | value = fields->f_src16_an; |
| 3264 | break; |
| 3265 | case M32C_OPERAND_SRC16ANHI : |
| 3266 | value = fields->f_src16_an; |
| 3267 | break; |
| 3268 | case M32C_OPERAND_SRC16ANQI : |
| 3269 | value = fields->f_src16_an; |
| 3270 | break; |
| 3271 | case M32C_OPERAND_SRC16RNHI : |
| 3272 | value = fields->f_src16_rn; |
| 3273 | break; |
| 3274 | case M32C_OPERAND_SRC16RNQI : |
| 3275 | value = fields->f_src16_rn; |
| 3276 | break; |
| 3277 | case M32C_OPERAND_SRC32ANPREFIXED : |
| 3278 | value = fields->f_src32_an_prefixed; |
| 3279 | break; |
| 3280 | case M32C_OPERAND_SRC32ANPREFIXEDHI : |
| 3281 | value = fields->f_src32_an_prefixed; |
| 3282 | break; |
| 3283 | case M32C_OPERAND_SRC32ANPREFIXEDQI : |
| 3284 | value = fields->f_src32_an_prefixed; |
| 3285 | break; |
| 3286 | case M32C_OPERAND_SRC32ANPREFIXEDSI : |
| 3287 | value = fields->f_src32_an_prefixed; |
| 3288 | break; |
| 3289 | case M32C_OPERAND_SRC32ANUNPREFIXED : |
| 3290 | value = fields->f_src32_an_unprefixed; |
| 3291 | break; |
| 3292 | case M32C_OPERAND_SRC32ANUNPREFIXEDHI : |
| 3293 | value = fields->f_src32_an_unprefixed; |
| 3294 | break; |
| 3295 | case M32C_OPERAND_SRC32ANUNPREFIXEDQI : |
| 3296 | value = fields->f_src32_an_unprefixed; |
| 3297 | break; |
| 3298 | case M32C_OPERAND_SRC32ANUNPREFIXEDSI : |
| 3299 | value = fields->f_src32_an_unprefixed; |
| 3300 | break; |
| 3301 | case M32C_OPERAND_SRC32RNPREFIXEDHI : |
| 3302 | value = fields->f_src32_rn_prefixed_HI; |
| 3303 | break; |
| 3304 | case M32C_OPERAND_SRC32RNPREFIXEDQI : |
| 3305 | value = fields->f_src32_rn_prefixed_QI; |
| 3306 | break; |
| 3307 | case M32C_OPERAND_SRC32RNPREFIXEDSI : |
| 3308 | value = fields->f_src32_rn_prefixed_SI; |
| 3309 | break; |
| 3310 | case M32C_OPERAND_SRC32RNUNPREFIXEDHI : |
| 3311 | value = fields->f_src32_rn_unprefixed_HI; |
| 3312 | break; |
| 3313 | case M32C_OPERAND_SRC32RNUNPREFIXEDQI : |
| 3314 | value = fields->f_src32_rn_unprefixed_QI; |
| 3315 | break; |
| 3316 | case M32C_OPERAND_SRC32RNUNPREFIXEDSI : |
| 3317 | value = fields->f_src32_rn_unprefixed_SI; |
| 3318 | break; |
| 3319 | case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : |
| 3320 | value = fields->f_5_1; |
| 3321 | break; |
| 3322 | case M32C_OPERAND_X : |
| 3323 | value = 0; |
| 3324 | break; |
| 3325 | case M32C_OPERAND_Z : |
| 3326 | value = 0; |
| 3327 | break; |
| 3328 | case M32C_OPERAND_COND16_16 : |
| 3329 | value = fields->f_dsp_16_u8; |
| 3330 | break; |
| 3331 | case M32C_OPERAND_COND16_24 : |
| 3332 | value = fields->f_dsp_24_u8; |
| 3333 | break; |
| 3334 | case M32C_OPERAND_COND16_32 : |
| 3335 | value = fields->f_dsp_32_u8; |
| 3336 | break; |
| 3337 | case M32C_OPERAND_COND16C : |
| 3338 | value = fields->f_cond16; |
| 3339 | break; |
| 3340 | case M32C_OPERAND_COND16J : |
| 3341 | value = fields->f_cond16; |
| 3342 | break; |
| 3343 | case M32C_OPERAND_COND16J5 : |
| 3344 | value = fields->f_cond16j_5; |
| 3345 | break; |
| 3346 | case M32C_OPERAND_COND32 : |
| 3347 | value = fields->f_cond32; |
| 3348 | break; |
| 3349 | case M32C_OPERAND_COND32_16 : |
| 3350 | value = fields->f_dsp_16_u8; |
| 3351 | break; |
| 3352 | case M32C_OPERAND_COND32_24 : |
| 3353 | value = fields->f_dsp_24_u8; |
| 3354 | break; |
| 3355 | case M32C_OPERAND_COND32_32 : |
| 3356 | value = fields->f_dsp_32_u8; |
| 3357 | break; |
| 3358 | case M32C_OPERAND_COND32_40 : |
| 3359 | value = fields->f_dsp_40_u8; |
| 3360 | break; |
| 3361 | case M32C_OPERAND_COND32J : |
| 3362 | value = fields->f_cond32j; |
| 3363 | break; |
| 3364 | case M32C_OPERAND_CR1_PREFIXED_32 : |
| 3365 | value = fields->f_21_3; |
| 3366 | break; |
| 3367 | case M32C_OPERAND_CR1_UNPREFIXED_32 : |
| 3368 | value = fields->f_13_3; |
| 3369 | break; |
| 3370 | case M32C_OPERAND_CR16 : |
| 3371 | value = fields->f_9_3; |
| 3372 | break; |
| 3373 | case M32C_OPERAND_CR2_32 : |
| 3374 | value = fields->f_13_3; |
| 3375 | break; |
| 3376 | case M32C_OPERAND_CR3_PREFIXED_32 : |
| 3377 | value = fields->f_21_3; |
| 3378 | break; |
| 3379 | case M32C_OPERAND_CR3_UNPREFIXED_32 : |
| 3380 | value = fields->f_13_3; |
| 3381 | break; |
| 3382 | case M32C_OPERAND_FLAGS16 : |
| 3383 | value = fields->f_9_3; |
| 3384 | break; |
| 3385 | case M32C_OPERAND_FLAGS32 : |
| 3386 | value = fields->f_13_3; |
| 3387 | break; |
| 3388 | case M32C_OPERAND_SCCOND32 : |
| 3389 | value = fields->f_cond16; |
| 3390 | break; |
| 3391 | case M32C_OPERAND_SIZE : |
| 3392 | value = 0; |
| 3393 | break; |
| 3394 | |
| 3395 | default : |
| 3396 | /* xgettext:c-format */ |
| 3397 | fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"), |
| 3398 | opindex); |
| 3399 | abort (); |
| 3400 | } |
| 3401 | |
| 3402 | return value; |
| 3403 | } |
| 3404 | |
| 3405 | bfd_vma |
| 3406 | m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 3407 | int opindex, |
| 3408 | const CGEN_FIELDS * fields) |
| 3409 | { |
| 3410 | bfd_vma value; |
| 3411 | |
| 3412 | switch (opindex) |
| 3413 | { |
| 3414 | case M32C_OPERAND_A0 : |
| 3415 | value = 0; |
| 3416 | break; |
| 3417 | case M32C_OPERAND_A1 : |
| 3418 | value = 0; |
| 3419 | break; |
| 3420 | case M32C_OPERAND_AN16_PUSH_S : |
| 3421 | value = fields->f_4_1; |
| 3422 | break; |
| 3423 | case M32C_OPERAND_BIT16AN : |
| 3424 | value = fields->f_dst16_an; |
| 3425 | break; |
| 3426 | case M32C_OPERAND_BIT16RN : |
| 3427 | value = fields->f_dst16_rn; |
| 3428 | break; |
| 3429 | case M32C_OPERAND_BIT32ANPREFIXED : |
| 3430 | value = fields->f_dst32_an_prefixed; |
| 3431 | break; |
| 3432 | case M32C_OPERAND_BIT32ANUNPREFIXED : |
| 3433 | value = fields->f_dst32_an_unprefixed; |
| 3434 | break; |
| 3435 | case M32C_OPERAND_BIT32RNPREFIXED : |
| 3436 | value = fields->f_dst32_rn_prefixed_QI; |
| 3437 | break; |
| 3438 | case M32C_OPERAND_BIT32RNUNPREFIXED : |
| 3439 | value = fields->f_dst32_rn_unprefixed_QI; |
| 3440 | break; |
| 3441 | case M32C_OPERAND_BITBASE16_16_S8 : |
| 3442 | value = fields->f_dsp_16_s8; |
| 3443 | break; |
| 3444 | case M32C_OPERAND_BITBASE16_16_U16 : |
| 3445 | value = fields->f_dsp_16_u16; |
| 3446 | break; |
| 3447 | case M32C_OPERAND_BITBASE16_16_U8 : |
| 3448 | value = fields->f_dsp_16_u8; |
| 3449 | break; |
| 3450 | case M32C_OPERAND_BITBASE16_8_U11_S : |
| 3451 | value = fields->f_bitbase16_u11_S; |
| 3452 | break; |
| 3453 | case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : |
| 3454 | value = fields->f_bitbase32_16_s11_unprefixed; |
| 3455 | break; |
| 3456 | case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : |
| 3457 | value = fields->f_bitbase32_16_s19_unprefixed; |
| 3458 | break; |
| 3459 | case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : |
| 3460 | value = fields->f_bitbase32_16_u11_unprefixed; |
| 3461 | break; |
| 3462 | case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : |
| 3463 | value = fields->f_bitbase32_16_u19_unprefixed; |
| 3464 | break; |
| 3465 | case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : |
| 3466 | value = fields->f_bitbase32_16_u27_unprefixed; |
| 3467 | break; |
| 3468 | case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : |
| 3469 | value = fields->f_bitbase32_24_s11_prefixed; |
| 3470 | break; |
| 3471 | case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : |
| 3472 | value = fields->f_bitbase32_24_s19_prefixed; |
| 3473 | break; |
| 3474 | case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : |
| 3475 | value = fields->f_bitbase32_24_u11_prefixed; |
| 3476 | break; |
| 3477 | case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : |
| 3478 | value = fields->f_bitbase32_24_u19_prefixed; |
| 3479 | break; |
| 3480 | case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : |
| 3481 | value = fields->f_bitbase32_24_u27_prefixed; |
| 3482 | break; |
| 3483 | case M32C_OPERAND_BITNO16R : |
| 3484 | value = fields->f_dsp_16_u8; |
| 3485 | break; |
| 3486 | case M32C_OPERAND_BITNO32PREFIXED : |
| 3487 | value = fields->f_bitno32_prefixed; |
| 3488 | break; |
| 3489 | case M32C_OPERAND_BITNO32UNPREFIXED : |
| 3490 | value = fields->f_bitno32_unprefixed; |
| 3491 | break; |
| 3492 | case M32C_OPERAND_DSP_10_U6 : |
| 3493 | value = fields->f_dsp_10_u6; |
| 3494 | break; |
| 3495 | case M32C_OPERAND_DSP_16_S16 : |
| 3496 | value = fields->f_dsp_16_s16; |
| 3497 | break; |
| 3498 | case M32C_OPERAND_DSP_16_S8 : |
| 3499 | value = fields->f_dsp_16_s8; |
| 3500 | break; |
| 3501 | case M32C_OPERAND_DSP_16_U16 : |
| 3502 | value = fields->f_dsp_16_u16; |
| 3503 | break; |
| 3504 | case M32C_OPERAND_DSP_16_U20 : |
| 3505 | value = fields->f_dsp_16_u24; |
| 3506 | break; |
| 3507 | case M32C_OPERAND_DSP_16_U24 : |
| 3508 | value = fields->f_dsp_16_u24; |
| 3509 | break; |
| 3510 | case M32C_OPERAND_DSP_16_U8 : |
| 3511 | value = fields->f_dsp_16_u8; |
| 3512 | break; |
| 3513 | case M32C_OPERAND_DSP_24_S16 : |
| 3514 | value = fields->f_dsp_24_s16; |
| 3515 | break; |
| 3516 | case M32C_OPERAND_DSP_24_S8 : |
| 3517 | value = fields->f_dsp_24_s8; |
| 3518 | break; |
| 3519 | case M32C_OPERAND_DSP_24_U16 : |
| 3520 | value = fields->f_dsp_24_u16; |
| 3521 | break; |
| 3522 | case M32C_OPERAND_DSP_24_U20 : |
| 3523 | value = fields->f_dsp_24_u24; |
| 3524 | break; |
| 3525 | case M32C_OPERAND_DSP_24_U24 : |
| 3526 | value = fields->f_dsp_24_u24; |
| 3527 | break; |
| 3528 | case M32C_OPERAND_DSP_24_U8 : |
| 3529 | value = fields->f_dsp_24_u8; |
| 3530 | break; |
| 3531 | case M32C_OPERAND_DSP_32_S16 : |
| 3532 | value = fields->f_dsp_32_s16; |
| 3533 | break; |
| 3534 | case M32C_OPERAND_DSP_32_S8 : |
| 3535 | value = fields->f_dsp_32_s8; |
| 3536 | break; |
| 3537 | case M32C_OPERAND_DSP_32_U16 : |
| 3538 | value = fields->f_dsp_32_u16; |
| 3539 | break; |
| 3540 | case M32C_OPERAND_DSP_32_U20 : |
| 3541 | value = fields->f_dsp_32_u24; |
| 3542 | break; |
| 3543 | case M32C_OPERAND_DSP_32_U24 : |
| 3544 | value = fields->f_dsp_32_u24; |
| 3545 | break; |
| 3546 | case M32C_OPERAND_DSP_32_U8 : |
| 3547 | value = fields->f_dsp_32_u8; |
| 3548 | break; |
| 3549 | case M32C_OPERAND_DSP_40_S16 : |
| 3550 | value = fields->f_dsp_40_s16; |
| 3551 | break; |
| 3552 | case M32C_OPERAND_DSP_40_S8 : |
| 3553 | value = fields->f_dsp_40_s8; |
| 3554 | break; |
| 3555 | case M32C_OPERAND_DSP_40_U16 : |
| 3556 | value = fields->f_dsp_40_u16; |
| 3557 | break; |
| 3558 | case M32C_OPERAND_DSP_40_U24 : |
| 3559 | value = fields->f_dsp_40_u24; |
| 3560 | break; |
| 3561 | case M32C_OPERAND_DSP_40_U8 : |
| 3562 | value = fields->f_dsp_40_u8; |
| 3563 | break; |
| 3564 | case M32C_OPERAND_DSP_48_S16 : |
| 3565 | value = fields->f_dsp_48_s16; |
| 3566 | break; |
| 3567 | case M32C_OPERAND_DSP_48_S8 : |
| 3568 | value = fields->f_dsp_48_s8; |
| 3569 | break; |
| 3570 | case M32C_OPERAND_DSP_48_U16 : |
| 3571 | value = fields->f_dsp_48_u16; |
| 3572 | break; |
| 3573 | case M32C_OPERAND_DSP_48_U24 : |
| 3574 | value = fields->f_dsp_48_u24; |
| 3575 | break; |
| 3576 | case M32C_OPERAND_DSP_48_U8 : |
| 3577 | value = fields->f_dsp_48_u8; |
| 3578 | break; |
| 3579 | case M32C_OPERAND_DSP_8_S24 : |
| 3580 | value = fields->f_dsp_8_s24; |
| 3581 | break; |
| 3582 | case M32C_OPERAND_DSP_8_S8 : |
| 3583 | value = fields->f_dsp_8_s8; |
| 3584 | break; |
| 3585 | case M32C_OPERAND_DSP_8_U16 : |
| 3586 | value = fields->f_dsp_8_u16; |
| 3587 | break; |
| 3588 | case M32C_OPERAND_DSP_8_U24 : |
| 3589 | value = fields->f_dsp_8_u24; |
| 3590 | break; |
| 3591 | case M32C_OPERAND_DSP_8_U6 : |
| 3592 | value = fields->f_dsp_8_u6; |
| 3593 | break; |
| 3594 | case M32C_OPERAND_DSP_8_U8 : |
| 3595 | value = fields->f_dsp_8_u8; |
| 3596 | break; |
| 3597 | case M32C_OPERAND_DST16AN : |
| 3598 | value = fields->f_dst16_an; |
| 3599 | break; |
| 3600 | case M32C_OPERAND_DST16AN_S : |
| 3601 | value = fields->f_dst16_an_s; |
| 3602 | break; |
| 3603 | case M32C_OPERAND_DST16ANHI : |
| 3604 | value = fields->f_dst16_an; |
| 3605 | break; |
| 3606 | case M32C_OPERAND_DST16ANQI : |
| 3607 | value = fields->f_dst16_an; |
| 3608 | break; |
| 3609 | case M32C_OPERAND_DST16ANQI_S : |
| 3610 | value = fields->f_dst16_rn_QI_s; |
| 3611 | break; |
| 3612 | case M32C_OPERAND_DST16ANSI : |
| 3613 | value = fields->f_dst16_an; |
| 3614 | break; |
| 3615 | case M32C_OPERAND_DST16RNEXTQI : |
| 3616 | value = fields->f_dst16_rn_ext; |
| 3617 | break; |
| 3618 | case M32C_OPERAND_DST16RNHI : |
| 3619 | value = fields->f_dst16_rn; |
| 3620 | break; |
| 3621 | case M32C_OPERAND_DST16RNQI : |
| 3622 | value = fields->f_dst16_rn; |
| 3623 | break; |
| 3624 | case M32C_OPERAND_DST16RNQI_S : |
| 3625 | value = fields->f_dst16_rn_QI_s; |
| 3626 | break; |
| 3627 | case M32C_OPERAND_DST16RNSI : |
| 3628 | value = fields->f_dst16_rn; |
| 3629 | break; |
| 3630 | case M32C_OPERAND_DST32ANEXTUNPREFIXED : |
| 3631 | value = fields->f_dst32_an_unprefixed; |
| 3632 | break; |
| 3633 | case M32C_OPERAND_DST32ANPREFIXED : |
| 3634 | value = fields->f_dst32_an_prefixed; |
| 3635 | break; |
| 3636 | case M32C_OPERAND_DST32ANPREFIXEDHI : |
| 3637 | value = fields->f_dst32_an_prefixed; |
| 3638 | break; |
| 3639 | case M32C_OPERAND_DST32ANPREFIXEDQI : |
| 3640 | value = fields->f_dst32_an_prefixed; |
| 3641 | break; |
| 3642 | case M32C_OPERAND_DST32ANPREFIXEDSI : |
| 3643 | value = fields->f_dst32_an_prefixed; |
| 3644 | break; |
| 3645 | case M32C_OPERAND_DST32ANUNPREFIXED : |
| 3646 | value = fields->f_dst32_an_unprefixed; |
| 3647 | break; |
| 3648 | case M32C_OPERAND_DST32ANUNPREFIXEDHI : |
| 3649 | value = fields->f_dst32_an_unprefixed; |
| 3650 | break; |
| 3651 | case M32C_OPERAND_DST32ANUNPREFIXEDQI : |
| 3652 | value = fields->f_dst32_an_unprefixed; |
| 3653 | break; |
| 3654 | case M32C_OPERAND_DST32ANUNPREFIXEDSI : |
| 3655 | value = fields->f_dst32_an_unprefixed; |
| 3656 | break; |
| 3657 | case M32C_OPERAND_DST32R0HI_S : |
| 3658 | value = 0; |
| 3659 | break; |
| 3660 | case M32C_OPERAND_DST32R0QI_S : |
| 3661 | value = 0; |
| 3662 | break; |
| 3663 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : |
| 3664 | value = fields->f_dst32_rn_ext_unprefixed; |
| 3665 | break; |
| 3666 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : |
| 3667 | value = fields->f_dst32_rn_ext_unprefixed; |
| 3668 | break; |
| 3669 | case M32C_OPERAND_DST32RNPREFIXEDHI : |
| 3670 | value = fields->f_dst32_rn_prefixed_HI; |
| 3671 | break; |
| 3672 | case M32C_OPERAND_DST32RNPREFIXEDQI : |
| 3673 | value = fields->f_dst32_rn_prefixed_QI; |
| 3674 | break; |
| 3675 | case M32C_OPERAND_DST32RNPREFIXEDSI : |
| 3676 | value = fields->f_dst32_rn_prefixed_SI; |
| 3677 | break; |
| 3678 | case M32C_OPERAND_DST32RNUNPREFIXEDHI : |
| 3679 | value = fields->f_dst32_rn_unprefixed_HI; |
| 3680 | break; |
| 3681 | case M32C_OPERAND_DST32RNUNPREFIXEDQI : |
| 3682 | value = fields->f_dst32_rn_unprefixed_QI; |
| 3683 | break; |
| 3684 | case M32C_OPERAND_DST32RNUNPREFIXEDSI : |
| 3685 | value = fields->f_dst32_rn_unprefixed_SI; |
| 3686 | break; |
| 3687 | case M32C_OPERAND_G : |
| 3688 | value = 0; |
| 3689 | break; |
| 3690 | case M32C_OPERAND_IMM_12_S4 : |
| 3691 | value = fields->f_imm_12_s4; |
| 3692 | break; |
| 3693 | case M32C_OPERAND_IMM_13_U3 : |
| 3694 | value = fields->f_imm_13_u3; |
| 3695 | break; |
| 3696 | case M32C_OPERAND_IMM_16_HI : |
| 3697 | value = fields->f_dsp_16_s16; |
| 3698 | break; |
| 3699 | case M32C_OPERAND_IMM_16_QI : |
| 3700 | value = fields->f_dsp_16_s8; |
| 3701 | break; |
| 3702 | case M32C_OPERAND_IMM_16_SI : |
| 3703 | value = fields->f_dsp_16_s32; |
| 3704 | break; |
| 3705 | case M32C_OPERAND_IMM_20_S4 : |
| 3706 | value = fields->f_imm_20_s4; |
| 3707 | break; |
| 3708 | case M32C_OPERAND_IMM_24_HI : |
| 3709 | value = fields->f_dsp_24_s16; |
| 3710 | break; |
| 3711 | case M32C_OPERAND_IMM_24_QI : |
| 3712 | value = fields->f_dsp_24_s8; |
| 3713 | break; |
| 3714 | case M32C_OPERAND_IMM_24_SI : |
| 3715 | value = fields->f_dsp_24_s32; |
| 3716 | break; |
| 3717 | case M32C_OPERAND_IMM_32_HI : |
| 3718 | value = fields->f_dsp_32_s16; |
| 3719 | break; |
| 3720 | case M32C_OPERAND_IMM_32_QI : |
| 3721 | value = fields->f_dsp_32_s8; |
| 3722 | break; |
| 3723 | case M32C_OPERAND_IMM_32_SI : |
| 3724 | value = fields->f_dsp_32_s32; |
| 3725 | break; |
| 3726 | case M32C_OPERAND_IMM_40_HI : |
| 3727 | value = fields->f_dsp_40_s16; |
| 3728 | break; |
| 3729 | case M32C_OPERAND_IMM_40_QI : |
| 3730 | value = fields->f_dsp_40_s8; |
| 3731 | break; |
| 3732 | case M32C_OPERAND_IMM_40_SI : |
| 3733 | value = fields->f_dsp_40_s32; |
| 3734 | break; |
| 3735 | case M32C_OPERAND_IMM_48_HI : |
| 3736 | value = fields->f_dsp_48_s16; |
| 3737 | break; |
| 3738 | case M32C_OPERAND_IMM_48_QI : |
| 3739 | value = fields->f_dsp_48_s8; |
| 3740 | break; |
| 3741 | case M32C_OPERAND_IMM_48_SI : |
| 3742 | value = fields->f_dsp_48_s32; |
| 3743 | break; |
| 3744 | case M32C_OPERAND_IMM_56_HI : |
| 3745 | value = fields->f_dsp_56_s16; |
| 3746 | break; |
| 3747 | case M32C_OPERAND_IMM_56_QI : |
| 3748 | value = fields->f_dsp_56_s8; |
| 3749 | break; |
| 3750 | case M32C_OPERAND_IMM_64_HI : |
| 3751 | value = fields->f_dsp_64_s16; |
| 3752 | break; |
| 3753 | case M32C_OPERAND_IMM_8_HI : |
| 3754 | value = fields->f_dsp_8_s16; |
| 3755 | break; |
| 3756 | case M32C_OPERAND_IMM_8_QI : |
| 3757 | value = fields->f_dsp_8_s8; |
| 3758 | break; |
| 3759 | case M32C_OPERAND_IMM_8_S4 : |
| 3760 | value = fields->f_imm_8_s4; |
| 3761 | break; |
| 3762 | case M32C_OPERAND_IMM_SH_12_S4 : |
| 3763 | value = fields->f_imm_12_s4; |
| 3764 | break; |
| 3765 | case M32C_OPERAND_IMM_SH_20_S4 : |
| 3766 | value = fields->f_imm_20_s4; |
| 3767 | break; |
| 3768 | case M32C_OPERAND_IMM_SH_8_S4 : |
| 3769 | value = fields->f_imm_8_s4; |
| 3770 | break; |
| 3771 | case M32C_OPERAND_IMM1_S : |
| 3772 | value = fields->f_imm1_S; |
| 3773 | break; |
| 3774 | case M32C_OPERAND_IMM3_S : |
| 3775 | value = fields->f_imm3_S; |
| 3776 | break; |
| 3777 | case M32C_OPERAND_LAB_16_8 : |
| 3778 | value = fields->f_lab_16_8; |
| 3779 | break; |
| 3780 | case M32C_OPERAND_LAB_24_8 : |
| 3781 | value = fields->f_lab_24_8; |
| 3782 | break; |
| 3783 | case M32C_OPERAND_LAB_32_8 : |
| 3784 | value = fields->f_lab_32_8; |
| 3785 | break; |
| 3786 | case M32C_OPERAND_LAB_40_8 : |
| 3787 | value = fields->f_lab_40_8; |
| 3788 | break; |
| 3789 | case M32C_OPERAND_LAB_5_3 : |
| 3790 | value = fields->f_lab_5_3; |
| 3791 | break; |
| 3792 | case M32C_OPERAND_LAB_8_16 : |
| 3793 | value = fields->f_lab_8_16; |
| 3794 | break; |
| 3795 | case M32C_OPERAND_LAB_8_24 : |
| 3796 | value = fields->f_lab_8_24; |
| 3797 | break; |
| 3798 | case M32C_OPERAND_LAB_8_8 : |
| 3799 | value = fields->f_lab_8_8; |
| 3800 | break; |
| 3801 | case M32C_OPERAND_LAB32_JMP_S : |
| 3802 | value = fields->f_lab32_jmp_s; |
| 3803 | break; |
| 3804 | case M32C_OPERAND_Q : |
| 3805 | value = 0; |
| 3806 | break; |
| 3807 | case M32C_OPERAND_R0 : |
| 3808 | value = 0; |
| 3809 | break; |
| 3810 | case M32C_OPERAND_R0H : |
| 3811 | value = 0; |
| 3812 | break; |
| 3813 | case M32C_OPERAND_R0L : |
| 3814 | value = 0; |
| 3815 | break; |
| 3816 | case M32C_OPERAND_R1 : |
| 3817 | value = 0; |
| 3818 | break; |
| 3819 | case M32C_OPERAND_R1R2R0 : |
| 3820 | value = 0; |
| 3821 | break; |
| 3822 | case M32C_OPERAND_R2 : |
| 3823 | value = 0; |
| 3824 | break; |
| 3825 | case M32C_OPERAND_R2R0 : |
| 3826 | value = 0; |
| 3827 | break; |
| 3828 | case M32C_OPERAND_R3 : |
| 3829 | value = 0; |
| 3830 | break; |
| 3831 | case M32C_OPERAND_R3R1 : |
| 3832 | value = 0; |
| 3833 | break; |
| 3834 | case M32C_OPERAND_REGSETPOP : |
| 3835 | value = fields->f_8_8; |
| 3836 | break; |
| 3837 | case M32C_OPERAND_REGSETPUSH : |
| 3838 | value = fields->f_8_8; |
| 3839 | break; |
| 3840 | case M32C_OPERAND_RN16_PUSH_S : |
| 3841 | value = fields->f_4_1; |
| 3842 | break; |
| 3843 | case M32C_OPERAND_S : |
| 3844 | value = 0; |
| 3845 | break; |
| 3846 | case M32C_OPERAND_SRC16AN : |
| 3847 | value = fields->f_src16_an; |
| 3848 | break; |
| 3849 | case M32C_OPERAND_SRC16ANHI : |
| 3850 | value = fields->f_src16_an; |
| 3851 | break; |
| 3852 | case M32C_OPERAND_SRC16ANQI : |
| 3853 | value = fields->f_src16_an; |
| 3854 | break; |
| 3855 | case M32C_OPERAND_SRC16RNHI : |
| 3856 | value = fields->f_src16_rn; |
| 3857 | break; |
| 3858 | case M32C_OPERAND_SRC16RNQI : |
| 3859 | value = fields->f_src16_rn; |
| 3860 | break; |
| 3861 | case M32C_OPERAND_SRC32ANPREFIXED : |
| 3862 | value = fields->f_src32_an_prefixed; |
| 3863 | break; |
| 3864 | case M32C_OPERAND_SRC32ANPREFIXEDHI : |
| 3865 | value = fields->f_src32_an_prefixed; |
| 3866 | break; |
| 3867 | case M32C_OPERAND_SRC32ANPREFIXEDQI : |
| 3868 | value = fields->f_src32_an_prefixed; |
| 3869 | break; |
| 3870 | case M32C_OPERAND_SRC32ANPREFIXEDSI : |
| 3871 | value = fields->f_src32_an_prefixed; |
| 3872 | break; |
| 3873 | case M32C_OPERAND_SRC32ANUNPREFIXED : |
| 3874 | value = fields->f_src32_an_unprefixed; |
| 3875 | break; |
| 3876 | case M32C_OPERAND_SRC32ANUNPREFIXEDHI : |
| 3877 | value = fields->f_src32_an_unprefixed; |
| 3878 | break; |
| 3879 | case M32C_OPERAND_SRC32ANUNPREFIXEDQI : |
| 3880 | value = fields->f_src32_an_unprefixed; |
| 3881 | break; |
| 3882 | case M32C_OPERAND_SRC32ANUNPREFIXEDSI : |
| 3883 | value = fields->f_src32_an_unprefixed; |
| 3884 | break; |
| 3885 | case M32C_OPERAND_SRC32RNPREFIXEDHI : |
| 3886 | value = fields->f_src32_rn_prefixed_HI; |
| 3887 | break; |
| 3888 | case M32C_OPERAND_SRC32RNPREFIXEDQI : |
| 3889 | value = fields->f_src32_rn_prefixed_QI; |
| 3890 | break; |
| 3891 | case M32C_OPERAND_SRC32RNPREFIXEDSI : |
| 3892 | value = fields->f_src32_rn_prefixed_SI; |
| 3893 | break; |
| 3894 | case M32C_OPERAND_SRC32RNUNPREFIXEDHI : |
| 3895 | value = fields->f_src32_rn_unprefixed_HI; |
| 3896 | break; |
| 3897 | case M32C_OPERAND_SRC32RNUNPREFIXEDQI : |
| 3898 | value = fields->f_src32_rn_unprefixed_QI; |
| 3899 | break; |
| 3900 | case M32C_OPERAND_SRC32RNUNPREFIXEDSI : |
| 3901 | value = fields->f_src32_rn_unprefixed_SI; |
| 3902 | break; |
| 3903 | case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : |
| 3904 | value = fields->f_5_1; |
| 3905 | break; |
| 3906 | case M32C_OPERAND_X : |
| 3907 | value = 0; |
| 3908 | break; |
| 3909 | case M32C_OPERAND_Z : |
| 3910 | value = 0; |
| 3911 | break; |
| 3912 | case M32C_OPERAND_COND16_16 : |
| 3913 | value = fields->f_dsp_16_u8; |
| 3914 | break; |
| 3915 | case M32C_OPERAND_COND16_24 : |
| 3916 | value = fields->f_dsp_24_u8; |
| 3917 | break; |
| 3918 | case M32C_OPERAND_COND16_32 : |
| 3919 | value = fields->f_dsp_32_u8; |
| 3920 | break; |
| 3921 | case M32C_OPERAND_COND16C : |
| 3922 | value = fields->f_cond16; |
| 3923 | break; |
| 3924 | case M32C_OPERAND_COND16J : |
| 3925 | value = fields->f_cond16; |
| 3926 | break; |
| 3927 | case M32C_OPERAND_COND16J5 : |
| 3928 | value = fields->f_cond16j_5; |
| 3929 | break; |
| 3930 | case M32C_OPERAND_COND32 : |
| 3931 | value = fields->f_cond32; |
| 3932 | break; |
| 3933 | case M32C_OPERAND_COND32_16 : |
| 3934 | value = fields->f_dsp_16_u8; |
| 3935 | break; |
| 3936 | case M32C_OPERAND_COND32_24 : |
| 3937 | value = fields->f_dsp_24_u8; |
| 3938 | break; |
| 3939 | case M32C_OPERAND_COND32_32 : |
| 3940 | value = fields->f_dsp_32_u8; |
| 3941 | break; |
| 3942 | case M32C_OPERAND_COND32_40 : |
| 3943 | value = fields->f_dsp_40_u8; |
| 3944 | break; |
| 3945 | case M32C_OPERAND_COND32J : |
| 3946 | value = fields->f_cond32j; |
| 3947 | break; |
| 3948 | case M32C_OPERAND_CR1_PREFIXED_32 : |
| 3949 | value = fields->f_21_3; |
| 3950 | break; |
| 3951 | case M32C_OPERAND_CR1_UNPREFIXED_32 : |
| 3952 | value = fields->f_13_3; |
| 3953 | break; |
| 3954 | case M32C_OPERAND_CR16 : |
| 3955 | value = fields->f_9_3; |
| 3956 | break; |
| 3957 | case M32C_OPERAND_CR2_32 : |
| 3958 | value = fields->f_13_3; |
| 3959 | break; |
| 3960 | case M32C_OPERAND_CR3_PREFIXED_32 : |
| 3961 | value = fields->f_21_3; |
| 3962 | break; |
| 3963 | case M32C_OPERAND_CR3_UNPREFIXED_32 : |
| 3964 | value = fields->f_13_3; |
| 3965 | break; |
| 3966 | case M32C_OPERAND_FLAGS16 : |
| 3967 | value = fields->f_9_3; |
| 3968 | break; |
| 3969 | case M32C_OPERAND_FLAGS32 : |
| 3970 | value = fields->f_13_3; |
| 3971 | break; |
| 3972 | case M32C_OPERAND_SCCOND32 : |
| 3973 | value = fields->f_cond16; |
| 3974 | break; |
| 3975 | case M32C_OPERAND_SIZE : |
| 3976 | value = 0; |
| 3977 | break; |
| 3978 | |
| 3979 | default : |
| 3980 | /* xgettext:c-format */ |
| 3981 | fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"), |
| 3982 | opindex); |
| 3983 | abort (); |
| 3984 | } |
| 3985 | |
| 3986 | return value; |
| 3987 | } |
| 3988 | |
| 3989 | void m32c_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int); |
| 3990 | void m32c_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma); |
| 3991 | |
| 3992 | /* Stuffing values in cgen_fields is handled by a collection of functions. |
| 3993 | They are distinguished by the type of the VALUE argument they accept. |
| 3994 | TODO: floating point, inlining support, remove cases where argument type |
| 3995 | not appropriate. */ |
| 3996 | |
| 3997 | void |
| 3998 | m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 3999 | int opindex, |
| 4000 | CGEN_FIELDS * fields, |
| 4001 | int value) |
| 4002 | { |
| 4003 | switch (opindex) |
| 4004 | { |
| 4005 | case M32C_OPERAND_A0 : |
| 4006 | break; |
| 4007 | case M32C_OPERAND_A1 : |
| 4008 | break; |
| 4009 | case M32C_OPERAND_AN16_PUSH_S : |
| 4010 | fields->f_4_1 = value; |
| 4011 | break; |
| 4012 | case M32C_OPERAND_BIT16AN : |
| 4013 | fields->f_dst16_an = value; |
| 4014 | break; |
| 4015 | case M32C_OPERAND_BIT16RN : |
| 4016 | fields->f_dst16_rn = value; |
| 4017 | break; |
| 4018 | case M32C_OPERAND_BIT32ANPREFIXED : |
| 4019 | fields->f_dst32_an_prefixed = value; |
| 4020 | break; |
| 4021 | case M32C_OPERAND_BIT32ANUNPREFIXED : |
| 4022 | fields->f_dst32_an_unprefixed = value; |
| 4023 | break; |
| 4024 | case M32C_OPERAND_BIT32RNPREFIXED : |
| 4025 | fields->f_dst32_rn_prefixed_QI = value; |
| 4026 | break; |
| 4027 | case M32C_OPERAND_BIT32RNUNPREFIXED : |
| 4028 | fields->f_dst32_rn_unprefixed_QI = value; |
| 4029 | break; |
| 4030 | case M32C_OPERAND_BITBASE16_16_S8 : |
| 4031 | fields->f_dsp_16_s8 = value; |
| 4032 | break; |
| 4033 | case M32C_OPERAND_BITBASE16_16_U16 : |
| 4034 | fields->f_dsp_16_u16 = value; |
| 4035 | break; |
| 4036 | case M32C_OPERAND_BITBASE16_16_U8 : |
| 4037 | fields->f_dsp_16_u8 = value; |
| 4038 | break; |
| 4039 | case M32C_OPERAND_BITBASE16_8_U11_S : |
| 4040 | fields->f_bitbase16_u11_S = value; |
| 4041 | break; |
| 4042 | case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : |
| 4043 | fields->f_bitbase32_16_s11_unprefixed = value; |
| 4044 | break; |
| 4045 | case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : |
| 4046 | fields->f_bitbase32_16_s19_unprefixed = value; |
| 4047 | break; |
| 4048 | case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : |
| 4049 | fields->f_bitbase32_16_u11_unprefixed = value; |
| 4050 | break; |
| 4051 | case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : |
| 4052 | fields->f_bitbase32_16_u19_unprefixed = value; |
| 4053 | break; |
| 4054 | case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : |
| 4055 | fields->f_bitbase32_16_u27_unprefixed = value; |
| 4056 | break; |
| 4057 | case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : |
| 4058 | fields->f_bitbase32_24_s11_prefixed = value; |
| 4059 | break; |
| 4060 | case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : |
| 4061 | fields->f_bitbase32_24_s19_prefixed = value; |
| 4062 | break; |
| 4063 | case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : |
| 4064 | fields->f_bitbase32_24_u11_prefixed = value; |
| 4065 | break; |
| 4066 | case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : |
| 4067 | fields->f_bitbase32_24_u19_prefixed = value; |
| 4068 | break; |
| 4069 | case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : |
| 4070 | fields->f_bitbase32_24_u27_prefixed = value; |
| 4071 | break; |
| 4072 | case M32C_OPERAND_BITNO16R : |
| 4073 | fields->f_dsp_16_u8 = value; |
| 4074 | break; |
| 4075 | case M32C_OPERAND_BITNO32PREFIXED : |
| 4076 | fields->f_bitno32_prefixed = value; |
| 4077 | break; |
| 4078 | case M32C_OPERAND_BITNO32UNPREFIXED : |
| 4079 | fields->f_bitno32_unprefixed = value; |
| 4080 | break; |
| 4081 | case M32C_OPERAND_DSP_10_U6 : |
| 4082 | fields->f_dsp_10_u6 = value; |
| 4083 | break; |
| 4084 | case M32C_OPERAND_DSP_16_S16 : |
| 4085 | fields->f_dsp_16_s16 = value; |
| 4086 | break; |
| 4087 | case M32C_OPERAND_DSP_16_S8 : |
| 4088 | fields->f_dsp_16_s8 = value; |
| 4089 | break; |
| 4090 | case M32C_OPERAND_DSP_16_U16 : |
| 4091 | fields->f_dsp_16_u16 = value; |
| 4092 | break; |
| 4093 | case M32C_OPERAND_DSP_16_U20 : |
| 4094 | fields->f_dsp_16_u24 = value; |
| 4095 | break; |
| 4096 | case M32C_OPERAND_DSP_16_U24 : |
| 4097 | fields->f_dsp_16_u24 = value; |
| 4098 | break; |
| 4099 | case M32C_OPERAND_DSP_16_U8 : |
| 4100 | fields->f_dsp_16_u8 = value; |
| 4101 | break; |
| 4102 | case M32C_OPERAND_DSP_24_S16 : |
| 4103 | fields->f_dsp_24_s16 = value; |
| 4104 | break; |
| 4105 | case M32C_OPERAND_DSP_24_S8 : |
| 4106 | fields->f_dsp_24_s8 = value; |
| 4107 | break; |
| 4108 | case M32C_OPERAND_DSP_24_U16 : |
| 4109 | fields->f_dsp_24_u16 = value; |
| 4110 | break; |
| 4111 | case M32C_OPERAND_DSP_24_U20 : |
| 4112 | fields->f_dsp_24_u24 = value; |
| 4113 | break; |
| 4114 | case M32C_OPERAND_DSP_24_U24 : |
| 4115 | fields->f_dsp_24_u24 = value; |
| 4116 | break; |
| 4117 | case M32C_OPERAND_DSP_24_U8 : |
| 4118 | fields->f_dsp_24_u8 = value; |
| 4119 | break; |
| 4120 | case M32C_OPERAND_DSP_32_S16 : |
| 4121 | fields->f_dsp_32_s16 = value; |
| 4122 | break; |
| 4123 | case M32C_OPERAND_DSP_32_S8 : |
| 4124 | fields->f_dsp_32_s8 = value; |
| 4125 | break; |
| 4126 | case M32C_OPERAND_DSP_32_U16 : |
| 4127 | fields->f_dsp_32_u16 = value; |
| 4128 | break; |
| 4129 | case M32C_OPERAND_DSP_32_U20 : |
| 4130 | fields->f_dsp_32_u24 = value; |
| 4131 | break; |
| 4132 | case M32C_OPERAND_DSP_32_U24 : |
| 4133 | fields->f_dsp_32_u24 = value; |
| 4134 | break; |
| 4135 | case M32C_OPERAND_DSP_32_U8 : |
| 4136 | fields->f_dsp_32_u8 = value; |
| 4137 | break; |
| 4138 | case M32C_OPERAND_DSP_40_S16 : |
| 4139 | fields->f_dsp_40_s16 = value; |
| 4140 | break; |
| 4141 | case M32C_OPERAND_DSP_40_S8 : |
| 4142 | fields->f_dsp_40_s8 = value; |
| 4143 | break; |
| 4144 | case M32C_OPERAND_DSP_40_U16 : |
| 4145 | fields->f_dsp_40_u16 = value; |
| 4146 | break; |
| 4147 | case M32C_OPERAND_DSP_40_U24 : |
| 4148 | fields->f_dsp_40_u24 = value; |
| 4149 | break; |
| 4150 | case M32C_OPERAND_DSP_40_U8 : |
| 4151 | fields->f_dsp_40_u8 = value; |
| 4152 | break; |
| 4153 | case M32C_OPERAND_DSP_48_S16 : |
| 4154 | fields->f_dsp_48_s16 = value; |
| 4155 | break; |
| 4156 | case M32C_OPERAND_DSP_48_S8 : |
| 4157 | fields->f_dsp_48_s8 = value; |
| 4158 | break; |
| 4159 | case M32C_OPERAND_DSP_48_U16 : |
| 4160 | fields->f_dsp_48_u16 = value; |
| 4161 | break; |
| 4162 | case M32C_OPERAND_DSP_48_U24 : |
| 4163 | fields->f_dsp_48_u24 = value; |
| 4164 | break; |
| 4165 | case M32C_OPERAND_DSP_48_U8 : |
| 4166 | fields->f_dsp_48_u8 = value; |
| 4167 | break; |
| 4168 | case M32C_OPERAND_DSP_8_S24 : |
| 4169 | fields->f_dsp_8_s24 = value; |
| 4170 | break; |
| 4171 | case M32C_OPERAND_DSP_8_S8 : |
| 4172 | fields->f_dsp_8_s8 = value; |
| 4173 | break; |
| 4174 | case M32C_OPERAND_DSP_8_U16 : |
| 4175 | fields->f_dsp_8_u16 = value; |
| 4176 | break; |
| 4177 | case M32C_OPERAND_DSP_8_U24 : |
| 4178 | fields->f_dsp_8_u24 = value; |
| 4179 | break; |
| 4180 | case M32C_OPERAND_DSP_8_U6 : |
| 4181 | fields->f_dsp_8_u6 = value; |
| 4182 | break; |
| 4183 | case M32C_OPERAND_DSP_8_U8 : |
| 4184 | fields->f_dsp_8_u8 = value; |
| 4185 | break; |
| 4186 | case M32C_OPERAND_DST16AN : |
| 4187 | fields->f_dst16_an = value; |
| 4188 | break; |
| 4189 | case M32C_OPERAND_DST16AN_S : |
| 4190 | fields->f_dst16_an_s = value; |
| 4191 | break; |
| 4192 | case M32C_OPERAND_DST16ANHI : |
| 4193 | fields->f_dst16_an = value; |
| 4194 | break; |
| 4195 | case M32C_OPERAND_DST16ANQI : |
| 4196 | fields->f_dst16_an = value; |
| 4197 | break; |
| 4198 | case M32C_OPERAND_DST16ANQI_S : |
| 4199 | fields->f_dst16_rn_QI_s = value; |
| 4200 | break; |
| 4201 | case M32C_OPERAND_DST16ANSI : |
| 4202 | fields->f_dst16_an = value; |
| 4203 | break; |
| 4204 | case M32C_OPERAND_DST16RNEXTQI : |
| 4205 | fields->f_dst16_rn_ext = value; |
| 4206 | break; |
| 4207 | case M32C_OPERAND_DST16RNHI : |
| 4208 | fields->f_dst16_rn = value; |
| 4209 | break; |
| 4210 | case M32C_OPERAND_DST16RNQI : |
| 4211 | fields->f_dst16_rn = value; |
| 4212 | break; |
| 4213 | case M32C_OPERAND_DST16RNQI_S : |
| 4214 | fields->f_dst16_rn_QI_s = value; |
| 4215 | break; |
| 4216 | case M32C_OPERAND_DST16RNSI : |
| 4217 | fields->f_dst16_rn = value; |
| 4218 | break; |
| 4219 | case M32C_OPERAND_DST32ANEXTUNPREFIXED : |
| 4220 | fields->f_dst32_an_unprefixed = value; |
| 4221 | break; |
| 4222 | case M32C_OPERAND_DST32ANPREFIXED : |
| 4223 | fields->f_dst32_an_prefixed = value; |
| 4224 | break; |
| 4225 | case M32C_OPERAND_DST32ANPREFIXEDHI : |
| 4226 | fields->f_dst32_an_prefixed = value; |
| 4227 | break; |
| 4228 | case M32C_OPERAND_DST32ANPREFIXEDQI : |
| 4229 | fields->f_dst32_an_prefixed = value; |
| 4230 | break; |
| 4231 | case M32C_OPERAND_DST32ANPREFIXEDSI : |
| 4232 | fields->f_dst32_an_prefixed = value; |
| 4233 | break; |
| 4234 | case M32C_OPERAND_DST32ANUNPREFIXED : |
| 4235 | fields->f_dst32_an_unprefixed = value; |
| 4236 | break; |
| 4237 | case M32C_OPERAND_DST32ANUNPREFIXEDHI : |
| 4238 | fields->f_dst32_an_unprefixed = value; |
| 4239 | break; |
| 4240 | case M32C_OPERAND_DST32ANUNPREFIXEDQI : |
| 4241 | fields->f_dst32_an_unprefixed = value; |
| 4242 | break; |
| 4243 | case M32C_OPERAND_DST32ANUNPREFIXEDSI : |
| 4244 | fields->f_dst32_an_unprefixed = value; |
| 4245 | break; |
| 4246 | case M32C_OPERAND_DST32R0HI_S : |
| 4247 | break; |
| 4248 | case M32C_OPERAND_DST32R0QI_S : |
| 4249 | break; |
| 4250 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : |
| 4251 | fields->f_dst32_rn_ext_unprefixed = value; |
| 4252 | break; |
| 4253 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : |
| 4254 | fields->f_dst32_rn_ext_unprefixed = value; |
| 4255 | break; |
| 4256 | case M32C_OPERAND_DST32RNPREFIXEDHI : |
| 4257 | fields->f_dst32_rn_prefixed_HI = value; |
| 4258 | break; |
| 4259 | case M32C_OPERAND_DST32RNPREFIXEDQI : |
| 4260 | fields->f_dst32_rn_prefixed_QI = value; |
| 4261 | break; |
| 4262 | case M32C_OPERAND_DST32RNPREFIXEDSI : |
| 4263 | fields->f_dst32_rn_prefixed_SI = value; |
| 4264 | break; |
| 4265 | case M32C_OPERAND_DST32RNUNPREFIXEDHI : |
| 4266 | fields->f_dst32_rn_unprefixed_HI = value; |
| 4267 | break; |
| 4268 | case M32C_OPERAND_DST32RNUNPREFIXEDQI : |
| 4269 | fields->f_dst32_rn_unprefixed_QI = value; |
| 4270 | break; |
| 4271 | case M32C_OPERAND_DST32RNUNPREFIXEDSI : |
| 4272 | fields->f_dst32_rn_unprefixed_SI = value; |
| 4273 | break; |
| 4274 | case M32C_OPERAND_G : |
| 4275 | break; |
| 4276 | case M32C_OPERAND_IMM_12_S4 : |
| 4277 | fields->f_imm_12_s4 = value; |
| 4278 | break; |
| 4279 | case M32C_OPERAND_IMM_13_U3 : |
| 4280 | fields->f_imm_13_u3 = value; |
| 4281 | break; |
| 4282 | case M32C_OPERAND_IMM_16_HI : |
| 4283 | fields->f_dsp_16_s16 = value; |
| 4284 | break; |
| 4285 | case M32C_OPERAND_IMM_16_QI : |
| 4286 | fields->f_dsp_16_s8 = value; |
| 4287 | break; |
| 4288 | case M32C_OPERAND_IMM_16_SI : |
| 4289 | fields->f_dsp_16_s32 = value; |
| 4290 | break; |
| 4291 | case M32C_OPERAND_IMM_20_S4 : |
| 4292 | fields->f_imm_20_s4 = value; |
| 4293 | break; |
| 4294 | case M32C_OPERAND_IMM_24_HI : |
| 4295 | fields->f_dsp_24_s16 = value; |
| 4296 | break; |
| 4297 | case M32C_OPERAND_IMM_24_QI : |
| 4298 | fields->f_dsp_24_s8 = value; |
| 4299 | break; |
| 4300 | case M32C_OPERAND_IMM_24_SI : |
| 4301 | fields->f_dsp_24_s32 = value; |
| 4302 | break; |
| 4303 | case M32C_OPERAND_IMM_32_HI : |
| 4304 | fields->f_dsp_32_s16 = value; |
| 4305 | break; |
| 4306 | case M32C_OPERAND_IMM_32_QI : |
| 4307 | fields->f_dsp_32_s8 = value; |
| 4308 | break; |
| 4309 | case M32C_OPERAND_IMM_32_SI : |
| 4310 | fields->f_dsp_32_s32 = value; |
| 4311 | break; |
| 4312 | case M32C_OPERAND_IMM_40_HI : |
| 4313 | fields->f_dsp_40_s16 = value; |
| 4314 | break; |
| 4315 | case M32C_OPERAND_IMM_40_QI : |
| 4316 | fields->f_dsp_40_s8 = value; |
| 4317 | break; |
| 4318 | case M32C_OPERAND_IMM_40_SI : |
| 4319 | fields->f_dsp_40_s32 = value; |
| 4320 | break; |
| 4321 | case M32C_OPERAND_IMM_48_HI : |
| 4322 | fields->f_dsp_48_s16 = value; |
| 4323 | break; |
| 4324 | case M32C_OPERAND_IMM_48_QI : |
| 4325 | fields->f_dsp_48_s8 = value; |
| 4326 | break; |
| 4327 | case M32C_OPERAND_IMM_48_SI : |
| 4328 | fields->f_dsp_48_s32 = value; |
| 4329 | break; |
| 4330 | case M32C_OPERAND_IMM_56_HI : |
| 4331 | fields->f_dsp_56_s16 = value; |
| 4332 | break; |
| 4333 | case M32C_OPERAND_IMM_56_QI : |
| 4334 | fields->f_dsp_56_s8 = value; |
| 4335 | break; |
| 4336 | case M32C_OPERAND_IMM_64_HI : |
| 4337 | fields->f_dsp_64_s16 = value; |
| 4338 | break; |
| 4339 | case M32C_OPERAND_IMM_8_HI : |
| 4340 | fields->f_dsp_8_s16 = value; |
| 4341 | break; |
| 4342 | case M32C_OPERAND_IMM_8_QI : |
| 4343 | fields->f_dsp_8_s8 = value; |
| 4344 | break; |
| 4345 | case M32C_OPERAND_IMM_8_S4 : |
| 4346 | fields->f_imm_8_s4 = value; |
| 4347 | break; |
| 4348 | case M32C_OPERAND_IMM_SH_12_S4 : |
| 4349 | fields->f_imm_12_s4 = value; |
| 4350 | break; |
| 4351 | case M32C_OPERAND_IMM_SH_20_S4 : |
| 4352 | fields->f_imm_20_s4 = value; |
| 4353 | break; |
| 4354 | case M32C_OPERAND_IMM_SH_8_S4 : |
| 4355 | fields->f_imm_8_s4 = value; |
| 4356 | break; |
| 4357 | case M32C_OPERAND_IMM1_S : |
| 4358 | fields->f_imm1_S = value; |
| 4359 | break; |
| 4360 | case M32C_OPERAND_IMM3_S : |
| 4361 | fields->f_imm3_S = value; |
| 4362 | break; |
| 4363 | case M32C_OPERAND_LAB_16_8 : |
| 4364 | fields->f_lab_16_8 = value; |
| 4365 | break; |
| 4366 | case M32C_OPERAND_LAB_24_8 : |
| 4367 | fields->f_lab_24_8 = value; |
| 4368 | break; |
| 4369 | case M32C_OPERAND_LAB_32_8 : |
| 4370 | fields->f_lab_32_8 = value; |
| 4371 | break; |
| 4372 | case M32C_OPERAND_LAB_40_8 : |
| 4373 | fields->f_lab_40_8 = value; |
| 4374 | break; |
| 4375 | case M32C_OPERAND_LAB_5_3 : |
| 4376 | fields->f_lab_5_3 = value; |
| 4377 | break; |
| 4378 | case M32C_OPERAND_LAB_8_16 : |
| 4379 | fields->f_lab_8_16 = value; |
| 4380 | break; |
| 4381 | case M32C_OPERAND_LAB_8_24 : |
| 4382 | fields->f_lab_8_24 = value; |
| 4383 | break; |
| 4384 | case M32C_OPERAND_LAB_8_8 : |
| 4385 | fields->f_lab_8_8 = value; |
| 4386 | break; |
| 4387 | case M32C_OPERAND_LAB32_JMP_S : |
| 4388 | fields->f_lab32_jmp_s = value; |
| 4389 | break; |
| 4390 | case M32C_OPERAND_Q : |
| 4391 | break; |
| 4392 | case M32C_OPERAND_R0 : |
| 4393 | break; |
| 4394 | case M32C_OPERAND_R0H : |
| 4395 | break; |
| 4396 | case M32C_OPERAND_R0L : |
| 4397 | break; |
| 4398 | case M32C_OPERAND_R1 : |
| 4399 | break; |
| 4400 | case M32C_OPERAND_R1R2R0 : |
| 4401 | break; |
| 4402 | case M32C_OPERAND_R2 : |
| 4403 | break; |
| 4404 | case M32C_OPERAND_R2R0 : |
| 4405 | break; |
| 4406 | case M32C_OPERAND_R3 : |
| 4407 | break; |
| 4408 | case M32C_OPERAND_R3R1 : |
| 4409 | break; |
| 4410 | case M32C_OPERAND_REGSETPOP : |
| 4411 | fields->f_8_8 = value; |
| 4412 | break; |
| 4413 | case M32C_OPERAND_REGSETPUSH : |
| 4414 | fields->f_8_8 = value; |
| 4415 | break; |
| 4416 | case M32C_OPERAND_RN16_PUSH_S : |
| 4417 | fields->f_4_1 = value; |
| 4418 | break; |
| 4419 | case M32C_OPERAND_S : |
| 4420 | break; |
| 4421 | case M32C_OPERAND_SRC16AN : |
| 4422 | fields->f_src16_an = value; |
| 4423 | break; |
| 4424 | case M32C_OPERAND_SRC16ANHI : |
| 4425 | fields->f_src16_an = value; |
| 4426 | break; |
| 4427 | case M32C_OPERAND_SRC16ANQI : |
| 4428 | fields->f_src16_an = value; |
| 4429 | break; |
| 4430 | case M32C_OPERAND_SRC16RNHI : |
| 4431 | fields->f_src16_rn = value; |
| 4432 | break; |
| 4433 | case M32C_OPERAND_SRC16RNQI : |
| 4434 | fields->f_src16_rn = value; |
| 4435 | break; |
| 4436 | case M32C_OPERAND_SRC32ANPREFIXED : |
| 4437 | fields->f_src32_an_prefixed = value; |
| 4438 | break; |
| 4439 | case M32C_OPERAND_SRC32ANPREFIXEDHI : |
| 4440 | fields->f_src32_an_prefixed = value; |
| 4441 | break; |
| 4442 | case M32C_OPERAND_SRC32ANPREFIXEDQI : |
| 4443 | fields->f_src32_an_prefixed = value; |
| 4444 | break; |
| 4445 | case M32C_OPERAND_SRC32ANPREFIXEDSI : |
| 4446 | fields->f_src32_an_prefixed = value; |
| 4447 | break; |
| 4448 | case M32C_OPERAND_SRC32ANUNPREFIXED : |
| 4449 | fields->f_src32_an_unprefixed = value; |
| 4450 | break; |
| 4451 | case M32C_OPERAND_SRC32ANUNPREFIXEDHI : |
| 4452 | fields->f_src32_an_unprefixed = value; |
| 4453 | break; |
| 4454 | case M32C_OPERAND_SRC32ANUNPREFIXEDQI : |
| 4455 | fields->f_src32_an_unprefixed = value; |
| 4456 | break; |
| 4457 | case M32C_OPERAND_SRC32ANUNPREFIXEDSI : |
| 4458 | fields->f_src32_an_unprefixed = value; |
| 4459 | break; |
| 4460 | case M32C_OPERAND_SRC32RNPREFIXEDHI : |
| 4461 | fields->f_src32_rn_prefixed_HI = value; |
| 4462 | break; |
| 4463 | case M32C_OPERAND_SRC32RNPREFIXEDQI : |
| 4464 | fields->f_src32_rn_prefixed_QI = value; |
| 4465 | break; |
| 4466 | case M32C_OPERAND_SRC32RNPREFIXEDSI : |
| 4467 | fields->f_src32_rn_prefixed_SI = value; |
| 4468 | break; |
| 4469 | case M32C_OPERAND_SRC32RNUNPREFIXEDHI : |
| 4470 | fields->f_src32_rn_unprefixed_HI = value; |
| 4471 | break; |
| 4472 | case M32C_OPERAND_SRC32RNUNPREFIXEDQI : |
| 4473 | fields->f_src32_rn_unprefixed_QI = value; |
| 4474 | break; |
| 4475 | case M32C_OPERAND_SRC32RNUNPREFIXEDSI : |
| 4476 | fields->f_src32_rn_unprefixed_SI = value; |
| 4477 | break; |
| 4478 | case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : |
| 4479 | fields->f_5_1 = value; |
| 4480 | break; |
| 4481 | case M32C_OPERAND_X : |
| 4482 | break; |
| 4483 | case M32C_OPERAND_Z : |
| 4484 | break; |
| 4485 | case M32C_OPERAND_COND16_16 : |
| 4486 | fields->f_dsp_16_u8 = value; |
| 4487 | break; |
| 4488 | case M32C_OPERAND_COND16_24 : |
| 4489 | fields->f_dsp_24_u8 = value; |
| 4490 | break; |
| 4491 | case M32C_OPERAND_COND16_32 : |
| 4492 | fields->f_dsp_32_u8 = value; |
| 4493 | break; |
| 4494 | case M32C_OPERAND_COND16C : |
| 4495 | fields->f_cond16 = value; |
| 4496 | break; |
| 4497 | case M32C_OPERAND_COND16J : |
| 4498 | fields->f_cond16 = value; |
| 4499 | break; |
| 4500 | case M32C_OPERAND_COND16J5 : |
| 4501 | fields->f_cond16j_5 = value; |
| 4502 | break; |
| 4503 | case M32C_OPERAND_COND32 : |
| 4504 | fields->f_cond32 = value; |
| 4505 | break; |
| 4506 | case M32C_OPERAND_COND32_16 : |
| 4507 | fields->f_dsp_16_u8 = value; |
| 4508 | break; |
| 4509 | case M32C_OPERAND_COND32_24 : |
| 4510 | fields->f_dsp_24_u8 = value; |
| 4511 | break; |
| 4512 | case M32C_OPERAND_COND32_32 : |
| 4513 | fields->f_dsp_32_u8 = value; |
| 4514 | break; |
| 4515 | case M32C_OPERAND_COND32_40 : |
| 4516 | fields->f_dsp_40_u8 = value; |
| 4517 | break; |
| 4518 | case M32C_OPERAND_COND32J : |
| 4519 | fields->f_cond32j = value; |
| 4520 | break; |
| 4521 | case M32C_OPERAND_CR1_PREFIXED_32 : |
| 4522 | fields->f_21_3 = value; |
| 4523 | break; |
| 4524 | case M32C_OPERAND_CR1_UNPREFIXED_32 : |
| 4525 | fields->f_13_3 = value; |
| 4526 | break; |
| 4527 | case M32C_OPERAND_CR16 : |
| 4528 | fields->f_9_3 = value; |
| 4529 | break; |
| 4530 | case M32C_OPERAND_CR2_32 : |
| 4531 | fields->f_13_3 = value; |
| 4532 | break; |
| 4533 | case M32C_OPERAND_CR3_PREFIXED_32 : |
| 4534 | fields->f_21_3 = value; |
| 4535 | break; |
| 4536 | case M32C_OPERAND_CR3_UNPREFIXED_32 : |
| 4537 | fields->f_13_3 = value; |
| 4538 | break; |
| 4539 | case M32C_OPERAND_FLAGS16 : |
| 4540 | fields->f_9_3 = value; |
| 4541 | break; |
| 4542 | case M32C_OPERAND_FLAGS32 : |
| 4543 | fields->f_13_3 = value; |
| 4544 | break; |
| 4545 | case M32C_OPERAND_SCCOND32 : |
| 4546 | fields->f_cond16 = value; |
| 4547 | break; |
| 4548 | case M32C_OPERAND_SIZE : |
| 4549 | break; |
| 4550 | |
| 4551 | default : |
| 4552 | /* xgettext:c-format */ |
| 4553 | fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"), |
| 4554 | opindex); |
| 4555 | abort (); |
| 4556 | } |
| 4557 | } |
| 4558 | |
| 4559 | void |
| 4560 | m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 4561 | int opindex, |
| 4562 | CGEN_FIELDS * fields, |
| 4563 | bfd_vma value) |
| 4564 | { |
| 4565 | switch (opindex) |
| 4566 | { |
| 4567 | case M32C_OPERAND_A0 : |
| 4568 | break; |
| 4569 | case M32C_OPERAND_A1 : |
| 4570 | break; |
| 4571 | case M32C_OPERAND_AN16_PUSH_S : |
| 4572 | fields->f_4_1 = value; |
| 4573 | break; |
| 4574 | case M32C_OPERAND_BIT16AN : |
| 4575 | fields->f_dst16_an = value; |
| 4576 | break; |
| 4577 | case M32C_OPERAND_BIT16RN : |
| 4578 | fields->f_dst16_rn = value; |
| 4579 | break; |
| 4580 | case M32C_OPERAND_BIT32ANPREFIXED : |
| 4581 | fields->f_dst32_an_prefixed = value; |
| 4582 | break; |
| 4583 | case M32C_OPERAND_BIT32ANUNPREFIXED : |
| 4584 | fields->f_dst32_an_unprefixed = value; |
| 4585 | break; |
| 4586 | case M32C_OPERAND_BIT32RNPREFIXED : |
| 4587 | fields->f_dst32_rn_prefixed_QI = value; |
| 4588 | break; |
| 4589 | case M32C_OPERAND_BIT32RNUNPREFIXED : |
| 4590 | fields->f_dst32_rn_unprefixed_QI = value; |
| 4591 | break; |
| 4592 | case M32C_OPERAND_BITBASE16_16_S8 : |
| 4593 | fields->f_dsp_16_s8 = value; |
| 4594 | break; |
| 4595 | case M32C_OPERAND_BITBASE16_16_U16 : |
| 4596 | fields->f_dsp_16_u16 = value; |
| 4597 | break; |
| 4598 | case M32C_OPERAND_BITBASE16_16_U8 : |
| 4599 | fields->f_dsp_16_u8 = value; |
| 4600 | break; |
| 4601 | case M32C_OPERAND_BITBASE16_8_U11_S : |
| 4602 | fields->f_bitbase16_u11_S = value; |
| 4603 | break; |
| 4604 | case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : |
| 4605 | fields->f_bitbase32_16_s11_unprefixed = value; |
| 4606 | break; |
| 4607 | case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : |
| 4608 | fields->f_bitbase32_16_s19_unprefixed = value; |
| 4609 | break; |
| 4610 | case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : |
| 4611 | fields->f_bitbase32_16_u11_unprefixed = value; |
| 4612 | break; |
| 4613 | case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : |
| 4614 | fields->f_bitbase32_16_u19_unprefixed = value; |
| 4615 | break; |
| 4616 | case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : |
| 4617 | fields->f_bitbase32_16_u27_unprefixed = value; |
| 4618 | break; |
| 4619 | case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : |
| 4620 | fields->f_bitbase32_24_s11_prefixed = value; |
| 4621 | break; |
| 4622 | case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : |
| 4623 | fields->f_bitbase32_24_s19_prefixed = value; |
| 4624 | break; |
| 4625 | case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : |
| 4626 | fields->f_bitbase32_24_u11_prefixed = value; |
| 4627 | break; |
| 4628 | case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : |
| 4629 | fields->f_bitbase32_24_u19_prefixed = value; |
| 4630 | break; |
| 4631 | case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : |
| 4632 | fields->f_bitbase32_24_u27_prefixed = value; |
| 4633 | break; |
| 4634 | case M32C_OPERAND_BITNO16R : |
| 4635 | fields->f_dsp_16_u8 = value; |
| 4636 | break; |
| 4637 | case M32C_OPERAND_BITNO32PREFIXED : |
| 4638 | fields->f_bitno32_prefixed = value; |
| 4639 | break; |
| 4640 | case M32C_OPERAND_BITNO32UNPREFIXED : |
| 4641 | fields->f_bitno32_unprefixed = value; |
| 4642 | break; |
| 4643 | case M32C_OPERAND_DSP_10_U6 : |
| 4644 | fields->f_dsp_10_u6 = value; |
| 4645 | break; |
| 4646 | case M32C_OPERAND_DSP_16_S16 : |
| 4647 | fields->f_dsp_16_s16 = value; |
| 4648 | break; |
| 4649 | case M32C_OPERAND_DSP_16_S8 : |
| 4650 | fields->f_dsp_16_s8 = value; |
| 4651 | break; |
| 4652 | case M32C_OPERAND_DSP_16_U16 : |
| 4653 | fields->f_dsp_16_u16 = value; |
| 4654 | break; |
| 4655 | case M32C_OPERAND_DSP_16_U20 : |
| 4656 | fields->f_dsp_16_u24 = value; |
| 4657 | break; |
| 4658 | case M32C_OPERAND_DSP_16_U24 : |
| 4659 | fields->f_dsp_16_u24 = value; |
| 4660 | break; |
| 4661 | case M32C_OPERAND_DSP_16_U8 : |
| 4662 | fields->f_dsp_16_u8 = value; |
| 4663 | break; |
| 4664 | case M32C_OPERAND_DSP_24_S16 : |
| 4665 | fields->f_dsp_24_s16 = value; |
| 4666 | break; |
| 4667 | case M32C_OPERAND_DSP_24_S8 : |
| 4668 | fields->f_dsp_24_s8 = value; |
| 4669 | break; |
| 4670 | case M32C_OPERAND_DSP_24_U16 : |
| 4671 | fields->f_dsp_24_u16 = value; |
| 4672 | break; |
| 4673 | case M32C_OPERAND_DSP_24_U20 : |
| 4674 | fields->f_dsp_24_u24 = value; |
| 4675 | break; |
| 4676 | case M32C_OPERAND_DSP_24_U24 : |
| 4677 | fields->f_dsp_24_u24 = value; |
| 4678 | break; |
| 4679 | case M32C_OPERAND_DSP_24_U8 : |
| 4680 | fields->f_dsp_24_u8 = value; |
| 4681 | break; |
| 4682 | case M32C_OPERAND_DSP_32_S16 : |
| 4683 | fields->f_dsp_32_s16 = value; |
| 4684 | break; |
| 4685 | case M32C_OPERAND_DSP_32_S8 : |
| 4686 | fields->f_dsp_32_s8 = value; |
| 4687 | break; |
| 4688 | case M32C_OPERAND_DSP_32_U16 : |
| 4689 | fields->f_dsp_32_u16 = value; |
| 4690 | break; |
| 4691 | case M32C_OPERAND_DSP_32_U20 : |
| 4692 | fields->f_dsp_32_u24 = value; |
| 4693 | break; |
| 4694 | case M32C_OPERAND_DSP_32_U24 : |
| 4695 | fields->f_dsp_32_u24 = value; |
| 4696 | break; |
| 4697 | case M32C_OPERAND_DSP_32_U8 : |
| 4698 | fields->f_dsp_32_u8 = value; |
| 4699 | break; |
| 4700 | case M32C_OPERAND_DSP_40_S16 : |
| 4701 | fields->f_dsp_40_s16 = value; |
| 4702 | break; |
| 4703 | case M32C_OPERAND_DSP_40_S8 : |
| 4704 | fields->f_dsp_40_s8 = value; |
| 4705 | break; |
| 4706 | case M32C_OPERAND_DSP_40_U16 : |
| 4707 | fields->f_dsp_40_u16 = value; |
| 4708 | break; |
| 4709 | case M32C_OPERAND_DSP_40_U24 : |
| 4710 | fields->f_dsp_40_u24 = value; |
| 4711 | break; |
| 4712 | case M32C_OPERAND_DSP_40_U8 : |
| 4713 | fields->f_dsp_40_u8 = value; |
| 4714 | break; |
| 4715 | case M32C_OPERAND_DSP_48_S16 : |
| 4716 | fields->f_dsp_48_s16 = value; |
| 4717 | break; |
| 4718 | case M32C_OPERAND_DSP_48_S8 : |
| 4719 | fields->f_dsp_48_s8 = value; |
| 4720 | break; |
| 4721 | case M32C_OPERAND_DSP_48_U16 : |
| 4722 | fields->f_dsp_48_u16 = value; |
| 4723 | break; |
| 4724 | case M32C_OPERAND_DSP_48_U24 : |
| 4725 | fields->f_dsp_48_u24 = value; |
| 4726 | break; |
| 4727 | case M32C_OPERAND_DSP_48_U8 : |
| 4728 | fields->f_dsp_48_u8 = value; |
| 4729 | break; |
| 4730 | case M32C_OPERAND_DSP_8_S24 : |
| 4731 | fields->f_dsp_8_s24 = value; |
| 4732 | break; |
| 4733 | case M32C_OPERAND_DSP_8_S8 : |
| 4734 | fields->f_dsp_8_s8 = value; |
| 4735 | break; |
| 4736 | case M32C_OPERAND_DSP_8_U16 : |
| 4737 | fields->f_dsp_8_u16 = value; |
| 4738 | break; |
| 4739 | case M32C_OPERAND_DSP_8_U24 : |
| 4740 | fields->f_dsp_8_u24 = value; |
| 4741 | break; |
| 4742 | case M32C_OPERAND_DSP_8_U6 : |
| 4743 | fields->f_dsp_8_u6 = value; |
| 4744 | break; |
| 4745 | case M32C_OPERAND_DSP_8_U8 : |
| 4746 | fields->f_dsp_8_u8 = value; |
| 4747 | break; |
| 4748 | case M32C_OPERAND_DST16AN : |
| 4749 | fields->f_dst16_an = value; |
| 4750 | break; |
| 4751 | case M32C_OPERAND_DST16AN_S : |
| 4752 | fields->f_dst16_an_s = value; |
| 4753 | break; |
| 4754 | case M32C_OPERAND_DST16ANHI : |
| 4755 | fields->f_dst16_an = value; |
| 4756 | break; |
| 4757 | case M32C_OPERAND_DST16ANQI : |
| 4758 | fields->f_dst16_an = value; |
| 4759 | break; |
| 4760 | case M32C_OPERAND_DST16ANQI_S : |
| 4761 | fields->f_dst16_rn_QI_s = value; |
| 4762 | break; |
| 4763 | case M32C_OPERAND_DST16ANSI : |
| 4764 | fields->f_dst16_an = value; |
| 4765 | break; |
| 4766 | case M32C_OPERAND_DST16RNEXTQI : |
| 4767 | fields->f_dst16_rn_ext = value; |
| 4768 | break; |
| 4769 | case M32C_OPERAND_DST16RNHI : |
| 4770 | fields->f_dst16_rn = value; |
| 4771 | break; |
| 4772 | case M32C_OPERAND_DST16RNQI : |
| 4773 | fields->f_dst16_rn = value; |
| 4774 | break; |
| 4775 | case M32C_OPERAND_DST16RNQI_S : |
| 4776 | fields->f_dst16_rn_QI_s = value; |
| 4777 | break; |
| 4778 | case M32C_OPERAND_DST16RNSI : |
| 4779 | fields->f_dst16_rn = value; |
| 4780 | break; |
| 4781 | case M32C_OPERAND_DST32ANEXTUNPREFIXED : |
| 4782 | fields->f_dst32_an_unprefixed = value; |
| 4783 | break; |
| 4784 | case M32C_OPERAND_DST32ANPREFIXED : |
| 4785 | fields->f_dst32_an_prefixed = value; |
| 4786 | break; |
| 4787 | case M32C_OPERAND_DST32ANPREFIXEDHI : |
| 4788 | fields->f_dst32_an_prefixed = value; |
| 4789 | break; |
| 4790 | case M32C_OPERAND_DST32ANPREFIXEDQI : |
| 4791 | fields->f_dst32_an_prefixed = value; |
| 4792 | break; |
| 4793 | case M32C_OPERAND_DST32ANPREFIXEDSI : |
| 4794 | fields->f_dst32_an_prefixed = value; |
| 4795 | break; |
| 4796 | case M32C_OPERAND_DST32ANUNPREFIXED : |
| 4797 | fields->f_dst32_an_unprefixed = value; |
| 4798 | break; |
| 4799 | case M32C_OPERAND_DST32ANUNPREFIXEDHI : |
| 4800 | fields->f_dst32_an_unprefixed = value; |
| 4801 | break; |
| 4802 | case M32C_OPERAND_DST32ANUNPREFIXEDQI : |
| 4803 | fields->f_dst32_an_unprefixed = value; |
| 4804 | break; |
| 4805 | case M32C_OPERAND_DST32ANUNPREFIXEDSI : |
| 4806 | fields->f_dst32_an_unprefixed = value; |
| 4807 | break; |
| 4808 | case M32C_OPERAND_DST32R0HI_S : |
| 4809 | break; |
| 4810 | case M32C_OPERAND_DST32R0QI_S : |
| 4811 | break; |
| 4812 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : |
| 4813 | fields->f_dst32_rn_ext_unprefixed = value; |
| 4814 | break; |
| 4815 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : |
| 4816 | fields->f_dst32_rn_ext_unprefixed = value; |
| 4817 | break; |
| 4818 | case M32C_OPERAND_DST32RNPREFIXEDHI : |
| 4819 | fields->f_dst32_rn_prefixed_HI = value; |
| 4820 | break; |
| 4821 | case M32C_OPERAND_DST32RNPREFIXEDQI : |
| 4822 | fields->f_dst32_rn_prefixed_QI = value; |
| 4823 | break; |
| 4824 | case M32C_OPERAND_DST32RNPREFIXEDSI : |
| 4825 | fields->f_dst32_rn_prefixed_SI = value; |
| 4826 | break; |
| 4827 | case M32C_OPERAND_DST32RNUNPREFIXEDHI : |
| 4828 | fields->f_dst32_rn_unprefixed_HI = value; |
| 4829 | break; |
| 4830 | case M32C_OPERAND_DST32RNUNPREFIXEDQI : |
| 4831 | fields->f_dst32_rn_unprefixed_QI = value; |
| 4832 | break; |
| 4833 | case M32C_OPERAND_DST32RNUNPREFIXEDSI : |
| 4834 | fields->f_dst32_rn_unprefixed_SI = value; |
| 4835 | break; |
| 4836 | case M32C_OPERAND_G : |
| 4837 | break; |
| 4838 | case M32C_OPERAND_IMM_12_S4 : |
| 4839 | fields->f_imm_12_s4 = value; |
| 4840 | break; |
| 4841 | case M32C_OPERAND_IMM_13_U3 : |
| 4842 | fields->f_imm_13_u3 = value; |
| 4843 | break; |
| 4844 | case M32C_OPERAND_IMM_16_HI : |
| 4845 | fields->f_dsp_16_s16 = value; |
| 4846 | break; |
| 4847 | case M32C_OPERAND_IMM_16_QI : |
| 4848 | fields->f_dsp_16_s8 = value; |
| 4849 | break; |
| 4850 | case M32C_OPERAND_IMM_16_SI : |
| 4851 | fields->f_dsp_16_s32 = value; |
| 4852 | break; |
| 4853 | case M32C_OPERAND_IMM_20_S4 : |
| 4854 | fields->f_imm_20_s4 = value; |
| 4855 | break; |
| 4856 | case M32C_OPERAND_IMM_24_HI : |
| 4857 | fields->f_dsp_24_s16 = value; |
| 4858 | break; |
| 4859 | case M32C_OPERAND_IMM_24_QI : |
| 4860 | fields->f_dsp_24_s8 = value; |
| 4861 | break; |
| 4862 | case M32C_OPERAND_IMM_24_SI : |
| 4863 | fields->f_dsp_24_s32 = value; |
| 4864 | break; |
| 4865 | case M32C_OPERAND_IMM_32_HI : |
| 4866 | fields->f_dsp_32_s16 = value; |
| 4867 | break; |
| 4868 | case M32C_OPERAND_IMM_32_QI : |
| 4869 | fields->f_dsp_32_s8 = value; |
| 4870 | break; |
| 4871 | case M32C_OPERAND_IMM_32_SI : |
| 4872 | fields->f_dsp_32_s32 = value; |
| 4873 | break; |
| 4874 | case M32C_OPERAND_IMM_40_HI : |
| 4875 | fields->f_dsp_40_s16 = value; |
| 4876 | break; |
| 4877 | case M32C_OPERAND_IMM_40_QI : |
| 4878 | fields->f_dsp_40_s8 = value; |
| 4879 | break; |
| 4880 | case M32C_OPERAND_IMM_40_SI : |
| 4881 | fields->f_dsp_40_s32 = value; |
| 4882 | break; |
| 4883 | case M32C_OPERAND_IMM_48_HI : |
| 4884 | fields->f_dsp_48_s16 = value; |
| 4885 | break; |
| 4886 | case M32C_OPERAND_IMM_48_QI : |
| 4887 | fields->f_dsp_48_s8 = value; |
| 4888 | break; |
| 4889 | case M32C_OPERAND_IMM_48_SI : |
| 4890 | fields->f_dsp_48_s32 = value; |
| 4891 | break; |
| 4892 | case M32C_OPERAND_IMM_56_HI : |
| 4893 | fields->f_dsp_56_s16 = value; |
| 4894 | break; |
| 4895 | case M32C_OPERAND_IMM_56_QI : |
| 4896 | fields->f_dsp_56_s8 = value; |
| 4897 | break; |
| 4898 | case M32C_OPERAND_IMM_64_HI : |
| 4899 | fields->f_dsp_64_s16 = value; |
| 4900 | break; |
| 4901 | case M32C_OPERAND_IMM_8_HI : |
| 4902 | fields->f_dsp_8_s16 = value; |
| 4903 | break; |
| 4904 | case M32C_OPERAND_IMM_8_QI : |
| 4905 | fields->f_dsp_8_s8 = value; |
| 4906 | break; |
| 4907 | case M32C_OPERAND_IMM_8_S4 : |
| 4908 | fields->f_imm_8_s4 = value; |
| 4909 | break; |
| 4910 | case M32C_OPERAND_IMM_SH_12_S4 : |
| 4911 | fields->f_imm_12_s4 = value; |
| 4912 | break; |
| 4913 | case M32C_OPERAND_IMM_SH_20_S4 : |
| 4914 | fields->f_imm_20_s4 = value; |
| 4915 | break; |
| 4916 | case M32C_OPERAND_IMM_SH_8_S4 : |
| 4917 | fields->f_imm_8_s4 = value; |
| 4918 | break; |
| 4919 | case M32C_OPERAND_IMM1_S : |
| 4920 | fields->f_imm1_S = value; |
| 4921 | break; |
| 4922 | case M32C_OPERAND_IMM3_S : |
| 4923 | fields->f_imm3_S = value; |
| 4924 | break; |
| 4925 | case M32C_OPERAND_LAB_16_8 : |
| 4926 | fields->f_lab_16_8 = value; |
| 4927 | break; |
| 4928 | case M32C_OPERAND_LAB_24_8 : |
| 4929 | fields->f_lab_24_8 = value; |
| 4930 | break; |
| 4931 | case M32C_OPERAND_LAB_32_8 : |
| 4932 | fields->f_lab_32_8 = value; |
| 4933 | break; |
| 4934 | case M32C_OPERAND_LAB_40_8 : |
| 4935 | fields->f_lab_40_8 = value; |
| 4936 | break; |
| 4937 | case M32C_OPERAND_LAB_5_3 : |
| 4938 | fields->f_lab_5_3 = value; |
| 4939 | break; |
| 4940 | case M32C_OPERAND_LAB_8_16 : |
| 4941 | fields->f_lab_8_16 = value; |
| 4942 | break; |
| 4943 | case M32C_OPERAND_LAB_8_24 : |
| 4944 | fields->f_lab_8_24 = value; |
| 4945 | break; |
| 4946 | case M32C_OPERAND_LAB_8_8 : |
| 4947 | fields->f_lab_8_8 = value; |
| 4948 | break; |
| 4949 | case M32C_OPERAND_LAB32_JMP_S : |
| 4950 | fields->f_lab32_jmp_s = value; |
| 4951 | break; |
| 4952 | case M32C_OPERAND_Q : |
| 4953 | break; |
| 4954 | case M32C_OPERAND_R0 : |
| 4955 | break; |
| 4956 | case M32C_OPERAND_R0H : |
| 4957 | break; |
| 4958 | case M32C_OPERAND_R0L : |
| 4959 | break; |
| 4960 | case M32C_OPERAND_R1 : |
| 4961 | break; |
| 4962 | case M32C_OPERAND_R1R2R0 : |
| 4963 | break; |
| 4964 | case M32C_OPERAND_R2 : |
| 4965 | break; |
| 4966 | case M32C_OPERAND_R2R0 : |
| 4967 | break; |
| 4968 | case M32C_OPERAND_R3 : |
| 4969 | break; |
| 4970 | case M32C_OPERAND_R3R1 : |
| 4971 | break; |
| 4972 | case M32C_OPERAND_REGSETPOP : |
| 4973 | fields->f_8_8 = value; |
| 4974 | break; |
| 4975 | case M32C_OPERAND_REGSETPUSH : |
| 4976 | fields->f_8_8 = value; |
| 4977 | break; |
| 4978 | case M32C_OPERAND_RN16_PUSH_S : |
| 4979 | fields->f_4_1 = value; |
| 4980 | break; |
| 4981 | case M32C_OPERAND_S : |
| 4982 | break; |
| 4983 | case M32C_OPERAND_SRC16AN : |
| 4984 | fields->f_src16_an = value; |
| 4985 | break; |
| 4986 | case M32C_OPERAND_SRC16ANHI : |
| 4987 | fields->f_src16_an = value; |
| 4988 | break; |
| 4989 | case M32C_OPERAND_SRC16ANQI : |
| 4990 | fields->f_src16_an = value; |
| 4991 | break; |
| 4992 | case M32C_OPERAND_SRC16RNHI : |
| 4993 | fields->f_src16_rn = value; |
| 4994 | break; |
| 4995 | case M32C_OPERAND_SRC16RNQI : |
| 4996 | fields->f_src16_rn = value; |
| 4997 | break; |
| 4998 | case M32C_OPERAND_SRC32ANPREFIXED : |
| 4999 | fields->f_src32_an_prefixed = value; |
| 5000 | break; |
| 5001 | case M32C_OPERAND_SRC32ANPREFIXEDHI : |
| 5002 | fields->f_src32_an_prefixed = value; |
| 5003 | break; |
| 5004 | case M32C_OPERAND_SRC32ANPREFIXEDQI : |
| 5005 | fields->f_src32_an_prefixed = value; |
| 5006 | break; |
| 5007 | case M32C_OPERAND_SRC32ANPREFIXEDSI : |
| 5008 | fields->f_src32_an_prefixed = value; |
| 5009 | break; |
| 5010 | case M32C_OPERAND_SRC32ANUNPREFIXED : |
| 5011 | fields->f_src32_an_unprefixed = value; |
| 5012 | break; |
| 5013 | case M32C_OPERAND_SRC32ANUNPREFIXEDHI : |
| 5014 | fields->f_src32_an_unprefixed = value; |
| 5015 | break; |
| 5016 | case M32C_OPERAND_SRC32ANUNPREFIXEDQI : |
| 5017 | fields->f_src32_an_unprefixed = value; |
| 5018 | break; |
| 5019 | case M32C_OPERAND_SRC32ANUNPREFIXEDSI : |
| 5020 | fields->f_src32_an_unprefixed = value; |
| 5021 | break; |
| 5022 | case M32C_OPERAND_SRC32RNPREFIXEDHI : |
| 5023 | fields->f_src32_rn_prefixed_HI = value; |
| 5024 | break; |
| 5025 | case M32C_OPERAND_SRC32RNPREFIXEDQI : |
| 5026 | fields->f_src32_rn_prefixed_QI = value; |
| 5027 | break; |
| 5028 | case M32C_OPERAND_SRC32RNPREFIXEDSI : |
| 5029 | fields->f_src32_rn_prefixed_SI = value; |
| 5030 | break; |
| 5031 | case M32C_OPERAND_SRC32RNUNPREFIXEDHI : |
| 5032 | fields->f_src32_rn_unprefixed_HI = value; |
| 5033 | break; |
| 5034 | case M32C_OPERAND_SRC32RNUNPREFIXEDQI : |
| 5035 | fields->f_src32_rn_unprefixed_QI = value; |
| 5036 | break; |
| 5037 | case M32C_OPERAND_SRC32RNUNPREFIXEDSI : |
| 5038 | fields->f_src32_rn_unprefixed_SI = value; |
| 5039 | break; |
| 5040 | case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : |
| 5041 | fields->f_5_1 = value; |
| 5042 | break; |
| 5043 | case M32C_OPERAND_X : |
| 5044 | break; |
| 5045 | case M32C_OPERAND_Z : |
| 5046 | break; |
| 5047 | case M32C_OPERAND_COND16_16 : |
| 5048 | fields->f_dsp_16_u8 = value; |
| 5049 | break; |
| 5050 | case M32C_OPERAND_COND16_24 : |
| 5051 | fields->f_dsp_24_u8 = value; |
| 5052 | break; |
| 5053 | case M32C_OPERAND_COND16_32 : |
| 5054 | fields->f_dsp_32_u8 = value; |
| 5055 | break; |
| 5056 | case M32C_OPERAND_COND16C : |
| 5057 | fields->f_cond16 = value; |
| 5058 | break; |
| 5059 | case M32C_OPERAND_COND16J : |
| 5060 | fields->f_cond16 = value; |
| 5061 | break; |
| 5062 | case M32C_OPERAND_COND16J5 : |
| 5063 | fields->f_cond16j_5 = value; |
| 5064 | break; |
| 5065 | case M32C_OPERAND_COND32 : |
| 5066 | fields->f_cond32 = value; |
| 5067 | break; |
| 5068 | case M32C_OPERAND_COND32_16 : |
| 5069 | fields->f_dsp_16_u8 = value; |
| 5070 | break; |
| 5071 | case M32C_OPERAND_COND32_24 : |
| 5072 | fields->f_dsp_24_u8 = value; |
| 5073 | break; |
| 5074 | case M32C_OPERAND_COND32_32 : |
| 5075 | fields->f_dsp_32_u8 = value; |
| 5076 | break; |
| 5077 | case M32C_OPERAND_COND32_40 : |
| 5078 | fields->f_dsp_40_u8 = value; |
| 5079 | break; |
| 5080 | case M32C_OPERAND_COND32J : |
| 5081 | fields->f_cond32j = value; |
| 5082 | break; |
| 5083 | case M32C_OPERAND_CR1_PREFIXED_32 : |
| 5084 | fields->f_21_3 = value; |
| 5085 | break; |
| 5086 | case M32C_OPERAND_CR1_UNPREFIXED_32 : |
| 5087 | fields->f_13_3 = value; |
| 5088 | break; |
| 5089 | case M32C_OPERAND_CR16 : |
| 5090 | fields->f_9_3 = value; |
| 5091 | break; |
| 5092 | case M32C_OPERAND_CR2_32 : |
| 5093 | fields->f_13_3 = value; |
| 5094 | break; |
| 5095 | case M32C_OPERAND_CR3_PREFIXED_32 : |
| 5096 | fields->f_21_3 = value; |
| 5097 | break; |
| 5098 | case M32C_OPERAND_CR3_UNPREFIXED_32 : |
| 5099 | fields->f_13_3 = value; |
| 5100 | break; |
| 5101 | case M32C_OPERAND_FLAGS16 : |
| 5102 | fields->f_9_3 = value; |
| 5103 | break; |
| 5104 | case M32C_OPERAND_FLAGS32 : |
| 5105 | fields->f_13_3 = value; |
| 5106 | break; |
| 5107 | case M32C_OPERAND_SCCOND32 : |
| 5108 | fields->f_cond16 = value; |
| 5109 | break; |
| 5110 | case M32C_OPERAND_SIZE : |
| 5111 | break; |
| 5112 | |
| 5113 | default : |
| 5114 | /* xgettext:c-format */ |
| 5115 | fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"), |
| 5116 | opindex); |
| 5117 | abort (); |
| 5118 | } |
| 5119 | } |
| 5120 | |
| 5121 | /* Function to call before using the instruction builder tables. */ |
| 5122 | |
| 5123 | void |
| 5124 | m32c_cgen_init_ibld_table (CGEN_CPU_DESC cd) |
| 5125 | { |
| 5126 | cd->insert_handlers = & m32c_cgen_insert_handlers[0]; |
| 5127 | cd->extract_handlers = & m32c_cgen_extract_handlers[0]; |
| 5128 | |
| 5129 | cd->insert_operand = m32c_cgen_insert_operand; |
| 5130 | cd->extract_operand = m32c_cgen_extract_operand; |
| 5131 | |
| 5132 | cd->get_int_operand = m32c_cgen_get_int_operand; |
| 5133 | cd->set_int_operand = m32c_cgen_set_int_operand; |
| 5134 | cd->get_vma_operand = m32c_cgen_get_vma_operand; |
| 5135 | cd->set_vma_operand = m32c_cgen_set_vma_operand; |
| 5136 | } |