| 1 | /* s12z-decode.c -- Freescale S12Z disassembly |
| 2 | Copyright (C) 2018-2020 Free Software Foundation, Inc. |
| 3 | |
| 4 | This file is part of the GNU opcodes library. |
| 5 | |
| 6 | This library is free software; you can redistribute it and/or modify |
| 7 | it under the terms of the GNU General Public License as published by |
| 8 | the Free Software Foundation; either version 3, or (at your option) |
| 9 | any later version. |
| 10 | |
| 11 | It is distributed in the hope that it will be useful, but WITHOUT |
| 12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| 13 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
| 14 | License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with this program; if not, write to the Free Software |
| 18 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
| 19 | MA 02110-1301, USA. */ |
| 20 | |
| 21 | #include "sysdep.h" |
| 22 | #include <stdio.h> |
| 23 | #include <stdint.h> |
| 24 | #include <stdbool.h> |
| 25 | #include <assert.h> |
| 26 | |
| 27 | #include "opcode/s12z.h" |
| 28 | |
| 29 | #include "bfd.h" |
| 30 | |
| 31 | #include "s12z-opc.h" |
| 32 | |
| 33 | |
| 34 | typedef int (*insn_bytes_f) (struct mem_read_abstraction_base *); |
| 35 | |
| 36 | typedef int (*operands_f) (struct mem_read_abstraction_base *, |
| 37 | int *n_operands, struct operand **operand); |
| 38 | |
| 39 | typedef enum optr (*discriminator_f) (struct mem_read_abstraction_base *, |
| 40 | enum optr hint); |
| 41 | |
| 42 | enum OPR_MODE |
| 43 | { |
| 44 | OPR_IMMe4, |
| 45 | OPR_REG, |
| 46 | OPR_OFXYS, |
| 47 | OPR_XY_PRE_INC, |
| 48 | OPR_XY_POST_INC, |
| 49 | OPR_XY_PRE_DEC, |
| 50 | OPR_XY_POST_DEC, |
| 51 | OPR_S_PRE_DEC, |
| 52 | OPR_S_POST_INC, |
| 53 | OPR_REG_DIRECT, |
| 54 | OPR_REG_INDIRECT, |
| 55 | OPR_IDX_DIRECT, |
| 56 | OPR_IDX_INDIRECT, |
| 57 | OPR_EXT1, |
| 58 | OPR_IDX2_REG, |
| 59 | OPR_IDX3_DIRECT, |
| 60 | OPR_IDX3_INDIRECT, |
| 61 | |
| 62 | OPR_EXT18, |
| 63 | OPR_IDX3_DIRECT_REG, |
| 64 | OPR_EXT3_DIRECT, |
| 65 | OPR_EXT3_INDIRECT |
| 66 | }; |
| 67 | |
| 68 | struct opr_pb |
| 69 | { |
| 70 | uint8_t mask; |
| 71 | uint8_t value; |
| 72 | int n_operands; |
| 73 | enum OPR_MODE mode; |
| 74 | }; |
| 75 | |
| 76 | static const struct opr_pb opr_pb[] = { |
| 77 | {0xF0, 0x70, 1, OPR_IMMe4}, |
| 78 | {0xF8, 0xB8, 1, OPR_REG}, |
| 79 | {0xC0, 0x40, 1, OPR_OFXYS}, |
| 80 | {0xEF, 0xE3, 1, OPR_XY_PRE_INC}, |
| 81 | {0xEF, 0xE7, 1, OPR_XY_POST_INC}, |
| 82 | {0xEF, 0xC3, 1, OPR_XY_PRE_DEC}, |
| 83 | {0xEF, 0xC7, 1, OPR_XY_POST_DEC}, |
| 84 | {0xFF, 0xFB, 1, OPR_S_PRE_DEC}, |
| 85 | {0xFF, 0xFF, 1, OPR_S_POST_INC}, |
| 86 | {0xC8, 0x88, 1, OPR_REG_DIRECT}, |
| 87 | {0xE8, 0xC8, 1, OPR_REG_INDIRECT}, |
| 88 | |
| 89 | {0xCE, 0xC0, 2, OPR_IDX_DIRECT}, |
| 90 | {0xCE, 0xC4, 2, OPR_IDX_INDIRECT}, |
| 91 | {0xC0, 0x00, 2, OPR_EXT1}, |
| 92 | |
| 93 | {0xC8, 0x80, 3, OPR_IDX2_REG}, |
| 94 | {0xFA, 0xF8, 3, OPR_EXT18}, |
| 95 | |
| 96 | {0xCF, 0xC2, 4, OPR_IDX3_DIRECT}, |
| 97 | {0xCF, 0xC6, 4, OPR_IDX3_INDIRECT}, |
| 98 | |
| 99 | {0xF8, 0xE8, 4, OPR_IDX3_DIRECT_REG}, |
| 100 | {0xFF, 0xFA, 4, OPR_EXT3_DIRECT}, |
| 101 | {0xFF, 0xFE, 4, OPR_EXT3_INDIRECT}, |
| 102 | }; |
| 103 | |
| 104 | /* Return the number of bytes in a OPR operand, including the XB postbyte. |
| 105 | It does not include any preceeding opcodes. */ |
| 106 | static int |
| 107 | x_opr_n_bytes (struct mem_read_abstraction_base *mra, int offset) |
| 108 | { |
| 109 | bfd_byte xb; |
| 110 | int status = mra->read (mra, offset, 1, &xb); |
| 111 | if (status < 0) |
| 112 | return status; |
| 113 | |
| 114 | size_t i; |
| 115 | for (i = 0; i < sizeof (opr_pb) / sizeof (opr_pb[0]); ++i) |
| 116 | { |
| 117 | const struct opr_pb *pb = opr_pb + i; |
| 118 | if ((xb & pb->mask) == pb->value) |
| 119 | { |
| 120 | return pb->n_operands; |
| 121 | } |
| 122 | } |
| 123 | |
| 124 | return 1; |
| 125 | } |
| 126 | |
| 127 | static int |
| 128 | opr_n_bytes_p1 (struct mem_read_abstraction_base *mra) |
| 129 | { |
| 130 | int n = x_opr_n_bytes (mra, 0); |
| 131 | if (n < 0) |
| 132 | return n; |
| 133 | return 1 + n; |
| 134 | } |
| 135 | |
| 136 | static int |
| 137 | opr_n_bytes2 (struct mem_read_abstraction_base *mra) |
| 138 | { |
| 139 | int s = x_opr_n_bytes (mra, 0); |
| 140 | if (s < 0) |
| 141 | return s; |
| 142 | int n = x_opr_n_bytes (mra, s); |
| 143 | if (n < 0) |
| 144 | return n; |
| 145 | return s + n + 1; |
| 146 | } |
| 147 | |
| 148 | enum BB_MODE |
| 149 | { |
| 150 | BB_REG_REG_REG, |
| 151 | BB_REG_REG_IMM, |
| 152 | BB_REG_OPR_REG, |
| 153 | BB_OPR_REG_REG, |
| 154 | BB_REG_OPR_IMM, |
| 155 | BB_OPR_REG_IMM |
| 156 | }; |
| 157 | |
| 158 | struct opr_bb |
| 159 | { |
| 160 | uint8_t mask; |
| 161 | uint8_t value; |
| 162 | int n_operands; |
| 163 | bool opr; |
| 164 | enum BB_MODE mode; |
| 165 | }; |
| 166 | |
| 167 | static const struct opr_bb bb_modes[] = |
| 168 | { |
| 169 | {0x60, 0x00, 2, false, BB_REG_REG_REG}, |
| 170 | {0x60, 0x20, 3, false, BB_REG_REG_IMM}, |
| 171 | {0x70, 0x40, 2, true, BB_REG_OPR_REG}, |
| 172 | {0x70, 0x50, 2, true, BB_OPR_REG_REG}, |
| 173 | {0x70, 0x60, 3, true, BB_REG_OPR_IMM}, |
| 174 | {0x70, 0x70, 3, true, BB_OPR_REG_IMM} |
| 175 | }; |
| 176 | |
| 177 | static int |
| 178 | bfextins_n_bytes (struct mem_read_abstraction_base *mra) |
| 179 | { |
| 180 | bfd_byte bb; |
| 181 | int status = mra->read (mra, 0, 1, &bb); |
| 182 | if (status < 0) |
| 183 | return status; |
| 184 | |
| 185 | size_t i; |
| 186 | const struct opr_bb *bbs = 0; |
| 187 | for (i = 0; i < sizeof (bb_modes) / sizeof (bb_modes[0]); ++i) |
| 188 | { |
| 189 | bbs = bb_modes + i; |
| 190 | if ((bb & bbs->mask) == bbs->value) |
| 191 | { |
| 192 | break; |
| 193 | } |
| 194 | } |
| 195 | |
| 196 | int n = bbs->n_operands; |
| 197 | if (bbs->opr) |
| 198 | { |
| 199 | int x = x_opr_n_bytes (mra, n - 1); |
| 200 | if (x < 0) |
| 201 | return x; |
| 202 | n += x; |
| 203 | } |
| 204 | |
| 205 | return n; |
| 206 | } |
| 207 | |
| 208 | static int |
| 209 | single (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED) |
| 210 | { |
| 211 | return 1; |
| 212 | } |
| 213 | |
| 214 | static int |
| 215 | two (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED) |
| 216 | { |
| 217 | return 2; |
| 218 | } |
| 219 | |
| 220 | static int |
| 221 | three (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED) |
| 222 | { |
| 223 | return 3; |
| 224 | } |
| 225 | |
| 226 | static int |
| 227 | four (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED) |
| 228 | { |
| 229 | return 4; |
| 230 | } |
| 231 | |
| 232 | static int |
| 233 | five (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED) |
| 234 | { |
| 235 | return 5; |
| 236 | } |
| 237 | |
| 238 | static int |
| 239 | pcrel_15bit (struct mem_read_abstraction_base *mra) |
| 240 | { |
| 241 | bfd_byte byte; |
| 242 | int status = mra->read (mra, 0, 1, &byte); |
| 243 | if (status < 0) |
| 244 | return status; |
| 245 | return (byte & 0x80) ? 3 : 2; |
| 246 | } |
| 247 | |
| 248 | |
| 249 | \f |
| 250 | static int |
| 251 | xysp_reg_from_postbyte (uint8_t postbyte) |
| 252 | { |
| 253 | int reg = -1; |
| 254 | switch ((postbyte & 0x30) >> 4) |
| 255 | { |
| 256 | case 0: |
| 257 | reg = REG_X; |
| 258 | break; |
| 259 | case 1: |
| 260 | reg = REG_Y; |
| 261 | break; |
| 262 | case 2: |
| 263 | reg = REG_S; |
| 264 | break; |
| 265 | default: |
| 266 | reg = REG_P; |
| 267 | } |
| 268 | return reg; |
| 269 | } |
| 270 | |
| 271 | static struct operand * |
| 272 | create_immediate_operand (int value) |
| 273 | { |
| 274 | struct immediate_operand *op = malloc (sizeof (*op)); |
| 275 | |
| 276 | if (op != NULL) |
| 277 | { |
| 278 | op->parent.cl = OPND_CL_IMMEDIATE; |
| 279 | op->parent.osize = -1; |
| 280 | op->value = value; |
| 281 | } |
| 282 | return (struct operand *) op; |
| 283 | } |
| 284 | |
| 285 | static struct operand * |
| 286 | create_bitfield_operand (int width, int offset) |
| 287 | { |
| 288 | struct bitfield_operand *op = malloc (sizeof (*op)); |
| 289 | |
| 290 | if (op != NULL) |
| 291 | { |
| 292 | op->parent.cl = OPND_CL_BIT_FIELD; |
| 293 | op->parent.osize = -1; |
| 294 | op->width = width; |
| 295 | op->offset = offset; |
| 296 | } |
| 297 | return (struct operand *) op; |
| 298 | } |
| 299 | |
| 300 | static struct operand * |
| 301 | create_register_operand_with_size (int reg, short osize) |
| 302 | { |
| 303 | struct register_operand *op = malloc (sizeof (*op)); |
| 304 | |
| 305 | if (op != NULL) |
| 306 | { |
| 307 | op->parent.cl = OPND_CL_REGISTER; |
| 308 | op->parent.osize = osize; |
| 309 | op->reg = reg; |
| 310 | } |
| 311 | return (struct operand *) op; |
| 312 | } |
| 313 | |
| 314 | static struct operand * |
| 315 | create_register_operand (int reg) |
| 316 | { |
| 317 | return create_register_operand_with_size (reg, -1); |
| 318 | } |
| 319 | |
| 320 | static struct operand * |
| 321 | create_register_all_operand (void) |
| 322 | { |
| 323 | struct register_operand *op = malloc (sizeof (*op)); |
| 324 | |
| 325 | if (op != NULL) |
| 326 | { |
| 327 | op->parent.cl = OPND_CL_REGISTER_ALL; |
| 328 | op->parent.osize = -1; |
| 329 | } |
| 330 | return (struct operand *) op; |
| 331 | } |
| 332 | |
| 333 | static struct operand * |
| 334 | create_register_all16_operand (void) |
| 335 | { |
| 336 | struct register_operand *op = malloc (sizeof (*op)); |
| 337 | |
| 338 | if (op != NULL) |
| 339 | { |
| 340 | op->parent.cl = OPND_CL_REGISTER_ALL16; |
| 341 | op->parent.osize = -1; |
| 342 | } |
| 343 | return (struct operand *) op; |
| 344 | } |
| 345 | |
| 346 | |
| 347 | static struct operand * |
| 348 | create_simple_memory_operand (bfd_vma addr, bfd_vma base, bool relative) |
| 349 | { |
| 350 | struct simple_memory_operand *op; |
| 351 | |
| 352 | assert (relative || base == 0); |
| 353 | op = malloc (sizeof (*op)); |
| 354 | if (op != NULL) |
| 355 | { |
| 356 | op->parent.cl = OPND_CL_SIMPLE_MEMORY; |
| 357 | op->parent.osize = -1; |
| 358 | op->addr = addr; |
| 359 | op->base = base; |
| 360 | op->relative = relative; |
| 361 | } |
| 362 | return (struct operand *) op; |
| 363 | } |
| 364 | |
| 365 | static struct operand * |
| 366 | create_memory_operand (bool indirect, int base, int n_regs, int reg0, int reg1) |
| 367 | { |
| 368 | struct memory_operand *op = malloc (sizeof (*op)); |
| 369 | |
| 370 | if (op != NULL) |
| 371 | { |
| 372 | op->parent.cl = OPND_CL_MEMORY; |
| 373 | op->parent.osize = -1; |
| 374 | op->indirect = indirect; |
| 375 | op->base_offset = base; |
| 376 | op->mutation = OPND_RM_NONE; |
| 377 | op->n_regs = n_regs; |
| 378 | op->regs[0] = reg0; |
| 379 | op->regs[1] = reg1; |
| 380 | } |
| 381 | return (struct operand *) op; |
| 382 | } |
| 383 | |
| 384 | static struct operand * |
| 385 | create_memory_auto_operand (enum op_reg_mutation mutation, int reg) |
| 386 | { |
| 387 | struct memory_operand *op = malloc (sizeof (*op)); |
| 388 | |
| 389 | if (op != NULL) |
| 390 | { |
| 391 | op->parent.cl = OPND_CL_MEMORY; |
| 392 | op->parent.osize = -1; |
| 393 | op->indirect = false; |
| 394 | op->base_offset = 0; |
| 395 | op->mutation = mutation; |
| 396 | op->n_regs = 1; |
| 397 | op->regs[0] = reg; |
| 398 | op->regs[1] = -1; |
| 399 | } |
| 400 | return (struct operand *) op; |
| 401 | } |
| 402 | |
| 403 | \f |
| 404 | |
| 405 | static int |
| 406 | z_ext24_decode (struct mem_read_abstraction_base *mra, int *n_operands, |
| 407 | struct operand **operand) |
| 408 | { |
| 409 | struct operand *op; |
| 410 | uint8_t buffer[3]; |
| 411 | int status = mra->read (mra, 0, 3, buffer); |
| 412 | if (status < 0) |
| 413 | return status; |
| 414 | |
| 415 | int i; |
| 416 | uint32_t addr = 0; |
| 417 | for (i = 0; i < 3; ++i) |
| 418 | { |
| 419 | addr <<= 8; |
| 420 | addr |= buffer[i]; |
| 421 | } |
| 422 | |
| 423 | op = create_simple_memory_operand (addr, 0, false); |
| 424 | if (op == NULL) |
| 425 | return -1; |
| 426 | operand[(*n_operands)++] = op; |
| 427 | return 0; |
| 428 | } |
| 429 | |
| 430 | |
| 431 | static int |
| 432 | z_decode_signed_value (struct mem_read_abstraction_base *mra, int offset, |
| 433 | short size, uint32_t *result) |
| 434 | { |
| 435 | assert (size >0); |
| 436 | assert (size <= 4); |
| 437 | bfd_byte buffer[4]; |
| 438 | int status = mra->read (mra, offset, size, buffer); |
| 439 | if (status < 0) |
| 440 | return status; |
| 441 | |
| 442 | int i; |
| 443 | uint32_t value = 0; |
| 444 | for (i = 0; i < size; ++i) |
| 445 | value = (value << 8) | buffer[i]; |
| 446 | |
| 447 | if (buffer[0] & 0x80) |
| 448 | { |
| 449 | /* Deal with negative values */ |
| 450 | value -= 1u << (size * 4) << (size * 4); |
| 451 | } |
| 452 | *result = value; |
| 453 | return 0; |
| 454 | } |
| 455 | |
| 456 | static int |
| 457 | decode_signed_value (struct mem_read_abstraction_base *mra, short size, |
| 458 | uint32_t *result) |
| 459 | { |
| 460 | return z_decode_signed_value (mra, 0, size, result); |
| 461 | } |
| 462 | |
| 463 | static int |
| 464 | x_imm1 (struct mem_read_abstraction_base *mra, |
| 465 | int offset, |
| 466 | int *n_operands, struct operand **operand) |
| 467 | { |
| 468 | struct operand *op; |
| 469 | bfd_byte byte; |
| 470 | int status = mra->read (mra, offset, 1, &byte); |
| 471 | if (status < 0) |
| 472 | return status; |
| 473 | |
| 474 | op = create_immediate_operand (byte); |
| 475 | if (op == NULL) |
| 476 | return -1; |
| 477 | operand[(*n_operands)++] = op; |
| 478 | return 0; |
| 479 | } |
| 480 | |
| 481 | /* An eight bit immediate operand. */ |
| 482 | static int |
| 483 | imm1_decode (struct mem_read_abstraction_base *mra, |
| 484 | int *n_operands, struct operand **operand) |
| 485 | { |
| 486 | return x_imm1 (mra, 0, n_operands, operand); |
| 487 | } |
| 488 | |
| 489 | static int |
| 490 | trap_decode (struct mem_read_abstraction_base *mra, |
| 491 | int *n_operands, struct operand **operand) |
| 492 | { |
| 493 | return x_imm1 (mra, -1, n_operands, operand); |
| 494 | } |
| 495 | |
| 496 | |
| 497 | static struct operand * |
| 498 | x_opr_decode_with_size (struct mem_read_abstraction_base *mra, int offset, |
| 499 | short osize) |
| 500 | { |
| 501 | bfd_byte postbyte; |
| 502 | int status = mra->read (mra, offset, 1, &postbyte); |
| 503 | if (status < 0) |
| 504 | return NULL; |
| 505 | offset++; |
| 506 | |
| 507 | enum OPR_MODE mode = -1; |
| 508 | size_t i; |
| 509 | for (i = 0; i < sizeof (opr_pb) / sizeof (opr_pb[0]); ++i) |
| 510 | { |
| 511 | const struct opr_pb *pb = opr_pb + i; |
| 512 | if ((postbyte & pb->mask) == pb->value) |
| 513 | { |
| 514 | mode = pb->mode; |
| 515 | break; |
| 516 | } |
| 517 | } |
| 518 | |
| 519 | struct operand *operand = NULL; |
| 520 | switch (mode) |
| 521 | { |
| 522 | case OPR_IMMe4: |
| 523 | { |
| 524 | int n; |
| 525 | uint8_t x = (postbyte & 0x0F); |
| 526 | if (x == 0) |
| 527 | n = -1; |
| 528 | else |
| 529 | n = x; |
| 530 | |
| 531 | operand = create_immediate_operand (n); |
| 532 | break; |
| 533 | } |
| 534 | case OPR_REG: |
| 535 | { |
| 536 | uint8_t x = (postbyte & 0x07); |
| 537 | operand = create_register_operand (x); |
| 538 | break; |
| 539 | } |
| 540 | case OPR_OFXYS: |
| 541 | { |
| 542 | operand = create_memory_operand (false, postbyte & 0x0F, 1, |
| 543 | xysp_reg_from_postbyte (postbyte), -1); |
| 544 | break; |
| 545 | } |
| 546 | case OPR_REG_DIRECT: |
| 547 | { |
| 548 | operand = create_memory_operand (false, 0, 2, postbyte & 0x07, |
| 549 | xysp_reg_from_postbyte (postbyte)); |
| 550 | break; |
| 551 | } |
| 552 | case OPR_REG_INDIRECT: |
| 553 | { |
| 554 | operand = create_memory_operand (true, 0, 2, postbyte & 0x07, |
| 555 | (postbyte & 0x10) ? REG_Y : REG_X); |
| 556 | break; |
| 557 | } |
| 558 | |
| 559 | case OPR_IDX_INDIRECT: |
| 560 | { |
| 561 | uint8_t x1; |
| 562 | status = mra->read (mra, offset, 1, &x1); |
| 563 | if (status < 0) |
| 564 | return NULL; |
| 565 | int idx = x1; |
| 566 | |
| 567 | if (postbyte & 0x01) |
| 568 | { |
| 569 | /* Deal with negative values */ |
| 570 | idx -= 0x1UL << 8; |
| 571 | } |
| 572 | |
| 573 | operand = create_memory_operand (true, idx, 1, |
| 574 | xysp_reg_from_postbyte (postbyte), -1); |
| 575 | break; |
| 576 | } |
| 577 | |
| 578 | case OPR_IDX3_DIRECT: |
| 579 | { |
| 580 | uint8_t x[3]; |
| 581 | status = mra->read (mra, offset, 3, x); |
| 582 | if (status < 0) |
| 583 | return NULL; |
| 584 | int idx = x[0] << 16 | x[1] << 8 | x[2]; |
| 585 | |
| 586 | if (x[0] & 0x80) |
| 587 | { |
| 588 | /* Deal with negative values */ |
| 589 | idx -= 0x1UL << 24; |
| 590 | } |
| 591 | |
| 592 | operand = create_memory_operand (false, idx, 1, |
| 593 | xysp_reg_from_postbyte (postbyte), -1); |
| 594 | break; |
| 595 | } |
| 596 | |
| 597 | case OPR_IDX3_DIRECT_REG: |
| 598 | { |
| 599 | uint8_t x[3]; |
| 600 | status = mra->read (mra, offset, 3, x); |
| 601 | if (status < 0) |
| 602 | return NULL; |
| 603 | int idx = x[0] << 16 | x[1] << 8 | x[2]; |
| 604 | |
| 605 | if (x[0] & 0x80) |
| 606 | { |
| 607 | /* Deal with negative values */ |
| 608 | idx -= 0x1UL << 24; |
| 609 | } |
| 610 | |
| 611 | operand = create_memory_operand (false, idx, 1, postbyte & 0x07, -1); |
| 612 | break; |
| 613 | } |
| 614 | |
| 615 | case OPR_IDX3_INDIRECT: |
| 616 | { |
| 617 | uint8_t x[3]; |
| 618 | status = mra->read (mra, offset, 3, x); |
| 619 | if (status < 0) |
| 620 | return NULL; |
| 621 | int idx = x[0] << 16 | x[1] << 8 | x[2]; |
| 622 | |
| 623 | if (x[0] & 0x80) |
| 624 | { |
| 625 | /* Deal with negative values */ |
| 626 | idx -= 0x1UL << 24; |
| 627 | } |
| 628 | |
| 629 | operand = create_memory_operand (true, idx, 1, |
| 630 | xysp_reg_from_postbyte (postbyte), -1); |
| 631 | break; |
| 632 | } |
| 633 | |
| 634 | case OPR_IDX_DIRECT: |
| 635 | { |
| 636 | uint8_t x1; |
| 637 | status = mra->read (mra, offset, 1, &x1); |
| 638 | if (status < 0) |
| 639 | return NULL; |
| 640 | int idx = x1; |
| 641 | |
| 642 | if (postbyte & 0x01) |
| 643 | { |
| 644 | /* Deal with negative values */ |
| 645 | idx -= 0x1UL << 8; |
| 646 | } |
| 647 | |
| 648 | operand = create_memory_operand (false, idx, 1, |
| 649 | xysp_reg_from_postbyte (postbyte), -1); |
| 650 | break; |
| 651 | } |
| 652 | |
| 653 | case OPR_IDX2_REG: |
| 654 | { |
| 655 | uint8_t x[2]; |
| 656 | status = mra->read (mra, offset, 2, x); |
| 657 | if (status < 0) |
| 658 | return NULL; |
| 659 | uint32_t idx = x[1] | x[0] << 8 ; |
| 660 | idx |= (postbyte & 0x30) << 12; |
| 661 | |
| 662 | operand = create_memory_operand (false, idx, 1, postbyte & 0x07, -1); |
| 663 | break; |
| 664 | } |
| 665 | |
| 666 | case OPR_XY_PRE_INC: |
| 667 | { |
| 668 | operand = create_memory_auto_operand (OPND_RM_PRE_INC, |
| 669 | (postbyte & 0x10) ? REG_Y: REG_X); |
| 670 | break; |
| 671 | } |
| 672 | case OPR_XY_POST_INC: |
| 673 | { |
| 674 | operand = create_memory_auto_operand (OPND_RM_POST_INC, |
| 675 | (postbyte & 0x10) ? REG_Y: REG_X); |
| 676 | break; |
| 677 | } |
| 678 | case OPR_XY_PRE_DEC: |
| 679 | { |
| 680 | operand = create_memory_auto_operand (OPND_RM_PRE_DEC, |
| 681 | (postbyte & 0x10) ? REG_Y: REG_X); |
| 682 | break; |
| 683 | } |
| 684 | case OPR_XY_POST_DEC: |
| 685 | { |
| 686 | operand = create_memory_auto_operand (OPND_RM_POST_DEC, |
| 687 | (postbyte & 0x10) ? REG_Y: REG_X); |
| 688 | break; |
| 689 | } |
| 690 | case OPR_S_PRE_DEC: |
| 691 | { |
| 692 | operand = create_memory_auto_operand (OPND_RM_PRE_DEC, REG_S); |
| 693 | break; |
| 694 | } |
| 695 | case OPR_S_POST_INC: |
| 696 | { |
| 697 | operand = create_memory_auto_operand (OPND_RM_POST_INC, REG_S); |
| 698 | break; |
| 699 | } |
| 700 | |
| 701 | case OPR_EXT18: |
| 702 | { |
| 703 | const size_t size = 2; |
| 704 | bfd_byte buffer[4]; |
| 705 | status = mra->read (mra, offset, size, buffer); |
| 706 | if (status < 0) |
| 707 | return NULL; |
| 708 | |
| 709 | uint32_t ext18 = 0; |
| 710 | for (i = 0; i < size; ++i) |
| 711 | { |
| 712 | ext18 <<= 8; |
| 713 | ext18 |= buffer[i]; |
| 714 | } |
| 715 | |
| 716 | ext18 |= (postbyte & 0x01) << 16; |
| 717 | ext18 |= (postbyte & 0x04) << 15; |
| 718 | |
| 719 | operand = create_simple_memory_operand (ext18, 0, false); |
| 720 | break; |
| 721 | } |
| 722 | |
| 723 | case OPR_EXT1: |
| 724 | { |
| 725 | uint8_t x1 = 0; |
| 726 | status = mra->read (mra, offset, 1, &x1); |
| 727 | if (status < 0) |
| 728 | return NULL; |
| 729 | int16_t addr; |
| 730 | addr = x1; |
| 731 | addr |= (postbyte & 0x3f) << 8; |
| 732 | |
| 733 | operand = create_simple_memory_operand (addr, 0, false); |
| 734 | break; |
| 735 | } |
| 736 | |
| 737 | case OPR_EXT3_DIRECT: |
| 738 | { |
| 739 | const size_t size = 3; |
| 740 | bfd_byte buffer[4]; |
| 741 | status = mra->read (mra, offset, size, buffer); |
| 742 | if (status < 0) |
| 743 | return NULL; |
| 744 | |
| 745 | uint32_t ext24 = 0; |
| 746 | for (i = 0; i < size; ++i) |
| 747 | { |
| 748 | ext24 |= buffer[i] << (8 * (size - i - 1)); |
| 749 | } |
| 750 | |
| 751 | operand = create_simple_memory_operand (ext24, 0, false); |
| 752 | break; |
| 753 | } |
| 754 | |
| 755 | case OPR_EXT3_INDIRECT: |
| 756 | { |
| 757 | const size_t size = 3; |
| 758 | bfd_byte buffer[4]; |
| 759 | status = mra->read (mra, offset, size, buffer); |
| 760 | if (status < 0) |
| 761 | return NULL; |
| 762 | |
| 763 | uint32_t ext24 = 0; |
| 764 | for (i = 0; i < size; ++i) |
| 765 | { |
| 766 | ext24 |= buffer[i] << (8 * (size - i - 1)); |
| 767 | } |
| 768 | |
| 769 | operand = create_memory_operand (true, ext24, 0, -1, -1); |
| 770 | break; |
| 771 | } |
| 772 | |
| 773 | default: |
| 774 | printf ("Unknown OPR mode #0x%x (%d)", postbyte, mode); |
| 775 | abort (); |
| 776 | } |
| 777 | |
| 778 | if (operand != NULL) |
| 779 | operand->osize = osize; |
| 780 | |
| 781 | return operand; |
| 782 | } |
| 783 | |
| 784 | static struct operand * |
| 785 | x_opr_decode (struct mem_read_abstraction_base *mra, int offset) |
| 786 | { |
| 787 | return x_opr_decode_with_size (mra, offset, -1); |
| 788 | } |
| 789 | |
| 790 | static int |
| 791 | z_opr_decode (struct mem_read_abstraction_base *mra, |
| 792 | int *n_operands, struct operand **operand) |
| 793 | { |
| 794 | struct operand *op = x_opr_decode (mra, 0); |
| 795 | if (op == NULL) |
| 796 | return -1; |
| 797 | operand[(*n_operands)++] = op; |
| 798 | return 0; |
| 799 | } |
| 800 | |
| 801 | static int |
| 802 | z_opr_decode2 (struct mem_read_abstraction_base *mra, |
| 803 | int *n_operands, struct operand **operand) |
| 804 | { |
| 805 | int n = x_opr_n_bytes (mra, 0); |
| 806 | if (n < 0) |
| 807 | return n; |
| 808 | struct operand *op = x_opr_decode (mra, 0); |
| 809 | if (op == NULL) |
| 810 | return -1; |
| 811 | operand[(*n_operands)++] = op; |
| 812 | op = x_opr_decode (mra, n); |
| 813 | if (op == NULL) |
| 814 | return -1; |
| 815 | operand[(*n_operands)++] = op; |
| 816 | return 0; |
| 817 | } |
| 818 | |
| 819 | static int |
| 820 | imm1234 (struct mem_read_abstraction_base *mra, int base, |
| 821 | int *n_operands, struct operand **operand) |
| 822 | { |
| 823 | struct operand *op; |
| 824 | bfd_byte opcode; |
| 825 | int status = mra->read (mra, -1, 1, &opcode); |
| 826 | if (status < 0) |
| 827 | return status; |
| 828 | |
| 829 | opcode -= base; |
| 830 | |
| 831 | int size = registers[opcode & 0xF].bytes; |
| 832 | |
| 833 | uint32_t imm; |
| 834 | if (decode_signed_value (mra, size, &imm) < 0) |
| 835 | return -1; |
| 836 | |
| 837 | op = create_immediate_operand (imm); |
| 838 | if (op == NULL) |
| 839 | return -1; |
| 840 | operand[(*n_operands)++] = op; |
| 841 | return 0; |
| 842 | } |
| 843 | |
| 844 | |
| 845 | /* Special case of LD and CMP with register S and IMM operand */ |
| 846 | static int |
| 847 | reg_s_imm (struct mem_read_abstraction_base *mra, int *n_operands, |
| 848 | struct operand **operand) |
| 849 | { |
| 850 | struct operand *op; |
| 851 | |
| 852 | op = create_register_operand (REG_S); |
| 853 | if (op == NULL) |
| 854 | return -1; |
| 855 | operand[(*n_operands)++] = op; |
| 856 | |
| 857 | uint32_t imm; |
| 858 | if (decode_signed_value (mra, 3, &imm) < 0) |
| 859 | return -1; |
| 860 | op = create_immediate_operand (imm); |
| 861 | if (op == NULL) |
| 862 | return -1; |
| 863 | operand[(*n_operands)++] = op; |
| 864 | return 0; |
| 865 | } |
| 866 | |
| 867 | /* Special case of LD, CMP and ST with register S and OPR operand */ |
| 868 | static int |
| 869 | reg_s_opr (struct mem_read_abstraction_base *mra, int *n_operands, |
| 870 | struct operand **operand) |
| 871 | { |
| 872 | struct operand *op; |
| 873 | |
| 874 | op = create_register_operand (REG_S); |
| 875 | if (op == NULL) |
| 876 | return -1; |
| 877 | operand[(*n_operands)++] = op; |
| 878 | op = x_opr_decode (mra, 0); |
| 879 | if (op == NULL) |
| 880 | return -1; |
| 881 | operand[(*n_operands)++] = op; |
| 882 | return 0; |
| 883 | } |
| 884 | |
| 885 | static int |
| 886 | z_imm1234_8base (struct mem_read_abstraction_base *mra, int *n_operands, |
| 887 | struct operand **operand) |
| 888 | { |
| 889 | return imm1234 (mra, 8, n_operands, operand); |
| 890 | } |
| 891 | |
| 892 | static int |
| 893 | z_imm1234_0base (struct mem_read_abstraction_base *mra, int *n_operands, |
| 894 | struct operand **operand) |
| 895 | { |
| 896 | return imm1234 (mra, 0, n_operands, operand); |
| 897 | } |
| 898 | |
| 899 | |
| 900 | static int |
| 901 | z_tfr (struct mem_read_abstraction_base *mra, int *n_operands, |
| 902 | struct operand **operand) |
| 903 | { |
| 904 | struct operand *op; |
| 905 | bfd_byte byte; |
| 906 | int status = mra->read (mra, 0, 1, &byte); |
| 907 | if (status < 0) |
| 908 | return status; |
| 909 | |
| 910 | op = create_register_operand (byte >> 4); |
| 911 | if (op == NULL) |
| 912 | return -1; |
| 913 | operand[(*n_operands)++] = op; |
| 914 | op = create_register_operand (byte & 0x0F); |
| 915 | if (op == NULL) |
| 916 | return -1; |
| 917 | operand[(*n_operands)++] = op; |
| 918 | return 0; |
| 919 | } |
| 920 | |
| 921 | static int |
| 922 | z_reg (struct mem_read_abstraction_base *mra, int *n_operands, |
| 923 | struct operand **operand) |
| 924 | { |
| 925 | struct operand *op; |
| 926 | bfd_byte byte; |
| 927 | int status = mra->read (mra, -1, 1, &byte); |
| 928 | if (status < 0) |
| 929 | return status; |
| 930 | |
| 931 | op = create_register_operand (byte & 0x07); |
| 932 | if (op == NULL) |
| 933 | return -1; |
| 934 | operand[(*n_operands)++] = op; |
| 935 | return 0; |
| 936 | } |
| 937 | |
| 938 | |
| 939 | static int |
| 940 | reg_xy (struct mem_read_abstraction_base *mra, |
| 941 | int *n_operands, struct operand **operand) |
| 942 | { |
| 943 | struct operand *op; |
| 944 | bfd_byte byte; |
| 945 | int status = mra->read (mra, -1, 1, &byte); |
| 946 | if (status < 0) |
| 947 | return status; |
| 948 | |
| 949 | op = create_register_operand ((byte & 0x01) ? REG_Y : REG_X); |
| 950 | if (op == NULL) |
| 951 | return -1; |
| 952 | operand[(*n_operands)++] = op; |
| 953 | return 0; |
| 954 | } |
| 955 | |
| 956 | static int |
| 957 | lea_reg_xys_opr (struct mem_read_abstraction_base *mra, |
| 958 | int *n_operands, struct operand **operand) |
| 959 | { |
| 960 | struct operand *op; |
| 961 | bfd_byte byte; |
| 962 | int status = mra->read (mra, -1, 1, &byte); |
| 963 | if (status < 0) |
| 964 | return status; |
| 965 | |
| 966 | int reg_xys = -1; |
| 967 | switch (byte & 0x03) |
| 968 | { |
| 969 | case 0x00: |
| 970 | reg_xys = REG_X; |
| 971 | break; |
| 972 | case 0x01: |
| 973 | reg_xys = REG_Y; |
| 974 | break; |
| 975 | case 0x02: |
| 976 | reg_xys = REG_S; |
| 977 | break; |
| 978 | } |
| 979 | |
| 980 | op = create_register_operand (reg_xys); |
| 981 | if (op == NULL) |
| 982 | return -1; |
| 983 | operand[(*n_operands)++] = op; |
| 984 | op = x_opr_decode (mra, 0); |
| 985 | if (op == NULL) |
| 986 | return -1; |
| 987 | operand[(*n_operands)++] = op; |
| 988 | return 0; |
| 989 | } |
| 990 | |
| 991 | static int |
| 992 | lea_reg_xys (struct mem_read_abstraction_base *mra, |
| 993 | int *n_operands, struct operand **operand) |
| 994 | { |
| 995 | struct operand *op; |
| 996 | bfd_byte byte; |
| 997 | int status = mra->read (mra, -1, 1, &byte); |
| 998 | if (status < 0) |
| 999 | return status; |
| 1000 | |
| 1001 | int reg_n = -1; |
| 1002 | switch (byte & 0x03) |
| 1003 | { |
| 1004 | case 0x00: |
| 1005 | reg_n = REG_X; |
| 1006 | break; |
| 1007 | case 0x01: |
| 1008 | reg_n = REG_Y; |
| 1009 | break; |
| 1010 | case 0x02: |
| 1011 | reg_n = REG_S; |
| 1012 | break; |
| 1013 | } |
| 1014 | |
| 1015 | status = mra->read (mra, 0, 1, &byte); |
| 1016 | if (status < 0) |
| 1017 | return status; |
| 1018 | |
| 1019 | op = create_register_operand (reg_n); |
| 1020 | if (op == NULL) |
| 1021 | return -1; |
| 1022 | operand[(*n_operands)++] = op; |
| 1023 | op = create_memory_operand (false, (int8_t) byte, 1, reg_n, -1); |
| 1024 | if (op == NULL) |
| 1025 | return -1; |
| 1026 | operand[(*n_operands)++] = op; |
| 1027 | return 0; |
| 1028 | } |
| 1029 | |
| 1030 | |
| 1031 | /* PC Relative offsets of size 15 or 7 bits */ |
| 1032 | static int |
| 1033 | rel_15_7 (struct mem_read_abstraction_base *mra, int offset, |
| 1034 | int *n_operands, struct operand **operands) |
| 1035 | { |
| 1036 | struct operand *op; |
| 1037 | bfd_byte upper; |
| 1038 | int status = mra->read (mra, offset - 1, 1, &upper); |
| 1039 | if (status < 0) |
| 1040 | return status; |
| 1041 | |
| 1042 | bool rel_size = (upper & 0x80); |
| 1043 | |
| 1044 | int16_t addr = upper; |
| 1045 | if (rel_size) |
| 1046 | { |
| 1047 | /* 15 bits. Get the next byte */ |
| 1048 | bfd_byte lower; |
| 1049 | status = mra->read (mra, offset, 1, &lower); |
| 1050 | if (status < 0) |
| 1051 | return status; |
| 1052 | |
| 1053 | addr <<= 8; |
| 1054 | addr |= lower; |
| 1055 | addr &= 0x7FFF; |
| 1056 | |
| 1057 | bool negative = (addr & 0x4000); |
| 1058 | addr &= 0x3FFF; |
| 1059 | if (negative) |
| 1060 | addr = addr - 0x4000; |
| 1061 | } |
| 1062 | else |
| 1063 | { |
| 1064 | /* 7 bits. */ |
| 1065 | bool negative = (addr & 0x40); |
| 1066 | addr &= 0x3F; |
| 1067 | if (negative) |
| 1068 | addr = addr - 0x40; |
| 1069 | } |
| 1070 | |
| 1071 | op = create_simple_memory_operand (addr, mra->posn (mra) - 1, true); |
| 1072 | if (op == NULL) |
| 1073 | return -1; |
| 1074 | operands[(*n_operands)++] = op; |
| 1075 | return 0; |
| 1076 | } |
| 1077 | |
| 1078 | |
| 1079 | /* PC Relative offsets of size 15 or 7 bits */ |
| 1080 | static int |
| 1081 | decode_rel_15_7 (struct mem_read_abstraction_base *mra, |
| 1082 | int *n_operands, struct operand **operand) |
| 1083 | { |
| 1084 | return rel_15_7 (mra, 1, n_operands, operand); |
| 1085 | } |
| 1086 | |
| 1087 | static int shift_n_bytes (struct mem_read_abstraction_base *); |
| 1088 | static int mov_imm_opr_n_bytes (struct mem_read_abstraction_base *); |
| 1089 | static int loop_prim_n_bytes (struct mem_read_abstraction_base *); |
| 1090 | static int bm_rel_n_bytes (struct mem_read_abstraction_base *); |
| 1091 | static int mul_n_bytes (struct mem_read_abstraction_base *); |
| 1092 | static int bm_n_bytes (struct mem_read_abstraction_base *); |
| 1093 | |
| 1094 | static int psh_pul_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand); |
| 1095 | static int shift_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand); |
| 1096 | static int mul_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand); |
| 1097 | static int bm_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand); |
| 1098 | static int bm_rel_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand); |
| 1099 | static int mov_imm_opr (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand); |
| 1100 | static int loop_primitive_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operands); |
| 1101 | static int bit_field_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operands); |
| 1102 | static int exg_sex_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operands); |
| 1103 | |
| 1104 | |
| 1105 | static enum optr shift_discrim (struct mem_read_abstraction_base *mra, enum optr hint); |
| 1106 | static enum optr psh_pul_discrim (struct mem_read_abstraction_base *mra, enum optr hint); |
| 1107 | static enum optr mul_discrim (struct mem_read_abstraction_base *mra, enum optr hint); |
| 1108 | static enum optr loop_primitive_discrim (struct mem_read_abstraction_base *mra, enum optr hint); |
| 1109 | static enum optr bit_field_discrim (struct mem_read_abstraction_base *mra, enum optr hint); |
| 1110 | static enum optr exg_sex_discrim (struct mem_read_abstraction_base *mra, enum optr hint); |
| 1111 | |
| 1112 | |
| 1113 | static int |
| 1114 | cmp_xy (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED, |
| 1115 | int *n_operands, struct operand **operand) |
| 1116 | { |
| 1117 | struct operand *op; |
| 1118 | |
| 1119 | op = create_register_operand (REG_X); |
| 1120 | if (op == NULL) |
| 1121 | return -1; |
| 1122 | operand[(*n_operands)++] = op; |
| 1123 | op = create_register_operand (REG_Y); |
| 1124 | if (op == NULL) |
| 1125 | return -1; |
| 1126 | operand[(*n_operands)++] = op; |
| 1127 | return 0; |
| 1128 | } |
| 1129 | |
| 1130 | static int |
| 1131 | sub_d6_x_y (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED, |
| 1132 | int *n_operands, struct operand **operand) |
| 1133 | { |
| 1134 | struct operand *op; |
| 1135 | |
| 1136 | op = create_register_operand (REG_D6); |
| 1137 | if (op == NULL) |
| 1138 | return -1; |
| 1139 | operand[(*n_operands)++] = op; |
| 1140 | op = create_register_operand (REG_X); |
| 1141 | if (op == NULL) |
| 1142 | return -1; |
| 1143 | operand[(*n_operands)++] = op; |
| 1144 | op = create_register_operand (REG_Y); |
| 1145 | if (op == NULL) |
| 1146 | return -1; |
| 1147 | operand[(*n_operands)++] = op; |
| 1148 | return 0; |
| 1149 | } |
| 1150 | |
| 1151 | static int |
| 1152 | sub_d6_y_x (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED, |
| 1153 | int *n_operands, struct operand **operand) |
| 1154 | { |
| 1155 | struct operand *op; |
| 1156 | |
| 1157 | op = create_register_operand (REG_D6); |
| 1158 | if (op == NULL) |
| 1159 | return -1; |
| 1160 | operand[(*n_operands)++] = op; |
| 1161 | op = create_register_operand (REG_Y); |
| 1162 | if (op == NULL) |
| 1163 | return -1; |
| 1164 | operand[(*n_operands)++] = op; |
| 1165 | op = create_register_operand (REG_X); |
| 1166 | if (op == NULL) |
| 1167 | return -1; |
| 1168 | operand[(*n_operands)++] = op; |
| 1169 | return 0; |
| 1170 | } |
| 1171 | |
| 1172 | static int |
| 1173 | ld_18bit_decode (struct mem_read_abstraction_base *mra, int *n_operands, |
| 1174 | struct operand **operand); |
| 1175 | |
| 1176 | static enum optr |
| 1177 | mul_discrim (struct mem_read_abstraction_base *mra, enum optr hint) |
| 1178 | { |
| 1179 | uint8_t mb; |
| 1180 | int status = mra->read (mra, 0, 1, &mb); |
| 1181 | if (status < 0) |
| 1182 | return OP_INVALID; |
| 1183 | |
| 1184 | bool signed_op = (mb & 0x80); |
| 1185 | |
| 1186 | switch (hint) |
| 1187 | { |
| 1188 | case OPBASE_mul: |
| 1189 | return signed_op ? OP_muls : OP_mulu; |
| 1190 | break; |
| 1191 | case OPBASE_div: |
| 1192 | return signed_op ? OP_divs : OP_divu; |
| 1193 | break; |
| 1194 | case OPBASE_mod: |
| 1195 | return signed_op ? OP_mods : OP_modu; |
| 1196 | break; |
| 1197 | case OPBASE_mac: |
| 1198 | return signed_op ? OP_macs : OP_macu; |
| 1199 | break; |
| 1200 | case OPBASE_qmul: |
| 1201 | return signed_op ? OP_qmuls : OP_qmulu; |
| 1202 | break; |
| 1203 | default: |
| 1204 | abort (); |
| 1205 | } |
| 1206 | |
| 1207 | return OP_INVALID; |
| 1208 | } |
| 1209 | |
| 1210 | struct opcode |
| 1211 | { |
| 1212 | /* The operation that this opcode performs. */ |
| 1213 | enum optr operator; |
| 1214 | |
| 1215 | /* The size of this operation. May be -1 if it is implied |
| 1216 | in the operands or if size is not applicable. */ |
| 1217 | short osize; |
| 1218 | |
| 1219 | /* Some operations need this function to work out which operation |
| 1220 | is intended. */ |
| 1221 | discriminator_f discriminator; |
| 1222 | |
| 1223 | /* A function returning the number of bytes in this instruction. */ |
| 1224 | insn_bytes_f insn_bytes; |
| 1225 | |
| 1226 | operands_f operands; |
| 1227 | operands_f operands2; |
| 1228 | }; |
| 1229 | |
| 1230 | static const struct opcode page2[] = |
| 1231 | { |
| 1232 | [0x00] = {OP_ld, -1, 0, opr_n_bytes_p1, reg_s_opr, 0}, |
| 1233 | [0x01] = {OP_st, -1, 0, opr_n_bytes_p1, reg_s_opr, 0}, |
| 1234 | [0x02] = {OP_cmp, -1, 0, opr_n_bytes_p1, reg_s_opr, 0}, |
| 1235 | [0x03] = {OP_ld, -1, 0, four, reg_s_imm, 0}, |
| 1236 | [0x04] = {OP_cmp, -1, 0, four, reg_s_imm, 0}, |
| 1237 | [0x05] = {OP_stop, -1, 0, single, 0, 0}, |
| 1238 | [0x06] = {OP_wai, -1, 0, single, 0, 0}, |
| 1239 | [0x07] = {OP_sys, -1, 0, single, 0, 0}, |
| 1240 | [0x08] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, /* BFEXT / BFINS */ |
| 1241 | [0x09] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, |
| 1242 | [0x0a] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, |
| 1243 | [0x0b] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, |
| 1244 | [0x0c] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, |
| 1245 | [0x0d] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, |
| 1246 | [0x0e] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, |
| 1247 | [0x0f] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, |
| 1248 | [0x10] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1249 | [0x11] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1250 | [0x12] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1251 | [0x13] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1252 | [0x14] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1253 | [0x15] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1254 | [0x16] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1255 | [0x17] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1256 | [0x18] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1257 | [0x19] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1258 | [0x1a] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1259 | [0x1b] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1260 | [0x1c] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1261 | [0x1d] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1262 | [0x1e] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1263 | [0x1f] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1264 | [0x20] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1265 | [0x21] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1266 | [0x22] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1267 | [0x23] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1268 | [0x24] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1269 | [0x25] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1270 | [0x26] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1271 | [0x27] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1272 | [0x28] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1273 | [0x29] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1274 | [0x2a] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1275 | [0x2b] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1276 | [0x2c] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1277 | [0x2d] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1278 | [0x2e] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1279 | [0x2f] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1280 | [0x30] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1281 | [0x31] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1282 | [0x32] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1283 | [0x33] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1284 | [0x34] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1285 | [0x35] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1286 | [0x36] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1287 | [0x37] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1288 | [0x38] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1289 | [0x39] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1290 | [0x3a] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1291 | [0x3b] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1292 | [0x3c] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1293 | [0x3d] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1294 | [0x3e] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1295 | [0x3f] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1296 | [0x40] = {OP_abs, -1, 0, single, z_reg, 0}, |
| 1297 | [0x41] = {OP_abs, -1, 0, single, z_reg, 0}, |
| 1298 | [0x42] = {OP_abs, -1, 0, single, z_reg, 0}, |
| 1299 | [0x43] = {OP_abs, -1, 0, single, z_reg, 0}, |
| 1300 | [0x44] = {OP_abs, -1, 0, single, z_reg, 0}, |
| 1301 | [0x45] = {OP_abs, -1, 0, single, z_reg, 0}, |
| 1302 | [0x46] = {OP_abs, -1, 0, single, z_reg, 0}, |
| 1303 | [0x47] = {OP_abs, -1, 0, single, z_reg, 0}, |
| 1304 | [0x48] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1305 | [0x49] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1306 | [0x4a] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1307 | [0x4b] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1308 | [0x4c] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1309 | [0x4d] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1310 | [0x4e] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1311 | [0x4f] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1312 | [0x50] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1313 | [0x51] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1314 | [0x52] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1315 | [0x53] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1316 | [0x54] = {OP_adc, -1, 0, two, z_reg, z_imm1234_0base}, |
| 1317 | [0x55] = {OP_adc, -1, 0, two, z_reg, z_imm1234_0base}, |
| 1318 | [0x56] = {OP_adc, -1, 0, five, z_reg, z_imm1234_0base}, |
| 1319 | [0x57] = {OP_adc, -1, 0, five, z_reg, z_imm1234_0base}, |
| 1320 | [0x58] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base}, |
| 1321 | [0x59] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base}, |
| 1322 | [0x5a] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base}, |
| 1323 | [0x5b] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base}, |
| 1324 | [0x5c] = {OP_bit, -1, 0, two, z_reg, z_imm1234_8base}, |
| 1325 | [0x5d] = {OP_bit, -1, 0, two, z_reg, z_imm1234_8base}, |
| 1326 | [0x5e] = {OP_bit, -1, 0, five, z_reg, z_imm1234_8base}, |
| 1327 | [0x5f] = {OP_bit, -1, 0, five, z_reg, z_imm1234_8base}, |
| 1328 | [0x60] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1329 | [0x61] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1330 | [0x62] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1331 | [0x63] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1332 | [0x64] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1333 | [0x65] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1334 | [0x66] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1335 | [0x67] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1336 | [0x68] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1337 | [0x69] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1338 | [0x6a] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1339 | [0x6b] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1340 | [0x6c] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1341 | [0x6d] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1342 | [0x6e] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1343 | [0x6f] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1344 | [0x70] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1345 | [0x71] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1346 | [0x72] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1347 | [0x73] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1348 | [0x74] = {OP_sbc, -1, 0, two, z_reg, z_imm1234_0base}, |
| 1349 | [0x75] = {OP_sbc, -1, 0, two, z_reg, z_imm1234_0base}, |
| 1350 | [0x76] = {OP_sbc, -1, 0, five, z_reg, z_imm1234_0base}, |
| 1351 | [0x77] = {OP_sbc, -1, 0, five, z_reg, z_imm1234_0base}, |
| 1352 | [0x78] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base}, |
| 1353 | [0x79] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base}, |
| 1354 | [0x7a] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base}, |
| 1355 | [0x7b] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base}, |
| 1356 | [0x7c] = {OP_eor, -1, 0, two, z_reg, z_imm1234_8base}, |
| 1357 | [0x7d] = {OP_eor, -1, 0, two, z_reg, z_imm1234_8base}, |
| 1358 | [0x7e] = {OP_eor, -1, 0, five, z_reg, z_imm1234_8base}, |
| 1359 | [0x7f] = {OP_eor, -1, 0, five, z_reg, z_imm1234_8base}, |
| 1360 | [0x80] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1361 | [0x81] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1362 | [0x82] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1363 | [0x83] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1364 | [0x84] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1365 | [0x85] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1366 | [0x86] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1367 | [0x87] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1368 | [0x88] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1369 | [0x89] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1370 | [0x8a] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1371 | [0x8b] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1372 | [0x8c] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1373 | [0x8d] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1374 | [0x8e] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1375 | [0x8f] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1376 | [0x90] = {OP_rti, -1, 0, single, 0, 0}, |
| 1377 | [0x91] = {OP_clb, -1, 0, two, z_tfr, 0}, |
| 1378 | [0x92] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1379 | [0x93] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1380 | [0x94] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1381 | [0x95] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1382 | [0x96] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1383 | [0x97] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1384 | [0x98] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1385 | [0x99] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1386 | [0x9a] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1387 | [0x9b] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1388 | [0x9c] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1389 | [0x9d] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1390 | [0x9e] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1391 | [0x9f] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1392 | [0xa0] = {OP_sat, -1, 0, single, z_reg, 0}, |
| 1393 | [0xa1] = {OP_sat, -1, 0, single, z_reg, 0}, |
| 1394 | [0xa2] = {OP_sat, -1, 0, single, z_reg, 0}, |
| 1395 | [0xa3] = {OP_sat, -1, 0, single, z_reg, 0}, |
| 1396 | [0xa4] = {OP_sat, -1, 0, single, z_reg, 0}, |
| 1397 | [0xa5] = {OP_sat, -1, 0, single, z_reg, 0}, |
| 1398 | [0xa6] = {OP_sat, -1, 0, single, z_reg, 0}, |
| 1399 | [0xa7] = {OP_sat, -1, 0, single, z_reg, 0}, |
| 1400 | [0xa8] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1401 | [0xa9] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1402 | [0xaa] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1403 | [0xab] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1404 | [0xac] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1405 | [0xad] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1406 | [0xae] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1407 | [0xaf] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1408 | [0xb0] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1409 | [0xb1] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1410 | [0xb2] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1411 | [0xb3] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1412 | [0xb4] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1413 | [0xb5] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1414 | [0xb6] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1415 | [0xb7] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1416 | [0xb8] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1417 | [0xb9] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1418 | [0xba] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1419 | [0xbb] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1420 | [0xbc] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1421 | [0xbd] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1422 | [0xbe] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1423 | [0xbf] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1424 | [0xc0] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1425 | [0xc1] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1426 | [0xc2] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1427 | [0xc3] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1428 | [0xc4] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1429 | [0xc5] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1430 | [0xc6] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1431 | [0xc7] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1432 | [0xc8] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1433 | [0xc9] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1434 | [0xca] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1435 | [0xcb] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1436 | [0xcc] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1437 | [0xcd] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1438 | [0xce] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1439 | [0xcf] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1440 | [0xd0] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1441 | [0xd1] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1442 | [0xd2] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1443 | [0xd3] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1444 | [0xd4] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1445 | [0xd5] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1446 | [0xd6] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1447 | [0xd7] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1448 | [0xd8] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1449 | [0xd9] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1450 | [0xda] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1451 | [0xdb] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1452 | [0xdc] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1453 | [0xdd] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1454 | [0xde] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1455 | [0xdf] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1456 | [0xe0] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1457 | [0xe1] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1458 | [0xe2] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1459 | [0xe3] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1460 | [0xe4] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1461 | [0xe5] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1462 | [0xe6] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1463 | [0xe7] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1464 | [0xe8] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1465 | [0xe9] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1466 | [0xea] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1467 | [0xeb] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1468 | [0xec] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1469 | [0xed] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1470 | [0xee] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1471 | [0xef] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1472 | [0xf0] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1473 | [0xf1] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1474 | [0xf2] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1475 | [0xf3] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1476 | [0xf4] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1477 | [0xf5] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1478 | [0xf6] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1479 | [0xf7] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1480 | [0xf8] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1481 | [0xf9] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1482 | [0xfa] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1483 | [0xfb] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1484 | [0xfc] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1485 | [0xfd] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1486 | [0xfe] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1487 | [0xff] = {OP_trap, -1, 0, single, trap_decode, 0}, |
| 1488 | }; |
| 1489 | |
| 1490 | static const struct opcode page1[] = |
| 1491 | { |
| 1492 | [0x00] = {OP_bgnd, -1, 0, single, 0, 0}, |
| 1493 | [0x01] = {OP_nop, -1, 0, single, 0, 0}, |
| 1494 | [0x02] = {OP_brclr, -1, 0, bm_rel_n_bytes, bm_rel_decode, 0}, |
| 1495 | [0x03] = {OP_brset, -1, 0, bm_rel_n_bytes, bm_rel_decode, 0}, |
| 1496 | [0x04] = {0xFFFF, -1, psh_pul_discrim, two, psh_pul_decode, 0}, /* psh/pul */ |
| 1497 | [0x05] = {OP_rts, -1, 0, single, 0, 0}, |
| 1498 | [0x06] = {OP_lea, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1499 | [0x07] = {OP_lea, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1500 | [0x08] = {OP_lea, -1, 0, opr_n_bytes_p1, lea_reg_xys_opr, 0}, |
| 1501 | [0x09] = {OP_lea, -1, 0, opr_n_bytes_p1, lea_reg_xys_opr, 0}, |
| 1502 | [0x0a] = {OP_lea, -1, 0, opr_n_bytes_p1, lea_reg_xys_opr, 0}, |
| 1503 | [0x0b] = {0xFFFF, -1, loop_primitive_discrim, loop_prim_n_bytes, loop_primitive_decode, 0}, /* Loop primitives TBcc / DBcc */ |
| 1504 | [0x0c] = {OP_mov, 0, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0}, |
| 1505 | [0x0d] = {OP_mov, 1, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0}, |
| 1506 | [0x0e] = {OP_mov, 2, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0}, |
| 1507 | [0x0f] = {OP_mov, 3, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0}, |
| 1508 | [0x10] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, /* lsr/lsl/asl/asr/rol/ror */ |
| 1509 | [0x11] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, |
| 1510 | [0x12] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, |
| 1511 | [0x13] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, |
| 1512 | [0x14] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, |
| 1513 | [0x15] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, |
| 1514 | [0x16] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, |
| 1515 | [0x17] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, |
| 1516 | [0x18] = {OP_lea, -1, 0, two, lea_reg_xys, NULL}, |
| 1517 | [0x19] = {OP_lea, -1, 0, two, lea_reg_xys, NULL}, |
| 1518 | [0x1a] = {OP_lea, -1, 0, two, lea_reg_xys, NULL}, |
| 1519 | /* 0x1b PG2 */ |
| 1520 | [0x1c] = {OP_mov, 0, 0, opr_n_bytes2, z_opr_decode2, 0}, |
| 1521 | [0x1d] = {OP_mov, 1, 0, opr_n_bytes2, z_opr_decode2, 0}, |
| 1522 | [0x1e] = {OP_mov, 2, 0, opr_n_bytes2, z_opr_decode2, 0}, |
| 1523 | [0x1f] = {OP_mov, 3, 0, opr_n_bytes2, z_opr_decode2, 0}, |
| 1524 | [0x20] = {OP_bra, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, |
| 1525 | [0x21] = {OP_bsr, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, |
| 1526 | [0x22] = {OP_bhi, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, |
| 1527 | [0x23] = {OP_bls, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, |
| 1528 | [0x24] = {OP_bcc, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, |
| 1529 | [0x25] = {OP_bcs, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, |
| 1530 | [0x26] = {OP_bne, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, |
| 1531 | [0x27] = {OP_beq, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, |
| 1532 | [0x28] = {OP_bvc, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, |
| 1533 | [0x29] = {OP_bvs, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, |
| 1534 | [0x2a] = {OP_bpl, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, |
| 1535 | [0x2b] = {OP_bmi, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, |
| 1536 | [0x2c] = {OP_bge, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, |
| 1537 | [0x2d] = {OP_blt, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, |
| 1538 | [0x2e] = {OP_bgt, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, |
| 1539 | [0x2f] = {OP_ble, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, |
| 1540 | [0x30] = {OP_inc, -1, 0, single, z_reg, 0}, |
| 1541 | [0x31] = {OP_inc, -1, 0, single, z_reg, 0}, |
| 1542 | [0x32] = {OP_inc, -1, 0, single, z_reg, 0}, |
| 1543 | [0x33] = {OP_inc, -1, 0, single, z_reg, 0}, |
| 1544 | [0x34] = {OP_inc, -1, 0, single, z_reg, 0}, |
| 1545 | [0x35] = {OP_inc, -1, 0, single, z_reg, 0}, |
| 1546 | [0x36] = {OP_inc, -1, 0, single, z_reg, 0}, |
| 1547 | [0x37] = {OP_inc, -1, 0, single, z_reg, 0}, |
| 1548 | [0x38] = {OP_clr, -1, 0, single, z_reg, 0}, |
| 1549 | [0x39] = {OP_clr, -1, 0, single, z_reg, 0}, |
| 1550 | [0x3a] = {OP_clr, -1, 0, single, z_reg, 0}, |
| 1551 | [0x3b] = {OP_clr, -1, 0, single, z_reg, 0}, |
| 1552 | [0x3c] = {OP_clr, -1, 0, single, z_reg, 0}, |
| 1553 | [0x3d] = {OP_clr, -1, 0, single, z_reg, 0}, |
| 1554 | [0x3e] = {OP_clr, -1, 0, single, z_reg, 0}, |
| 1555 | [0x3f] = {OP_clr, -1, 0, single, z_reg, 0}, |
| 1556 | [0x40] = {OP_dec, -1, 0, single, z_reg, 0}, |
| 1557 | [0x41] = {OP_dec, -1, 0, single, z_reg, 0}, |
| 1558 | [0x42] = {OP_dec, -1, 0, single, z_reg, 0}, |
| 1559 | [0x43] = {OP_dec, -1, 0, single, z_reg, 0}, |
| 1560 | [0x44] = {OP_dec, -1, 0, single, z_reg, 0}, |
| 1561 | [0x45] = {OP_dec, -1, 0, single, z_reg, 0}, |
| 1562 | [0x46] = {OP_dec, -1, 0, single, z_reg, 0}, |
| 1563 | [0x47] = {OP_dec, -1, 0, single, z_reg, 0}, |
| 1564 | [0x48] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1565 | [0x49] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1566 | [0x4a] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1567 | [0x4b] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1568 | [0x4c] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1569 | [0x4d] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1570 | [0x4e] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1571 | [0x4f] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, |
| 1572 | [0x50] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1573 | [0x51] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1574 | [0x52] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1575 | [0x53] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1576 | [0x54] = {OP_add, -1, 0, two, z_reg, z_imm1234_0base}, |
| 1577 | [0x55] = {OP_add, -1, 0, two, z_reg, z_imm1234_0base}, |
| 1578 | [0x56] = {OP_add, -1, 0, five, z_reg, z_imm1234_0base}, |
| 1579 | [0x57] = {OP_add, -1, 0, five, z_reg, z_imm1234_0base}, |
| 1580 | [0x58] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base}, |
| 1581 | [0x59] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base}, |
| 1582 | [0x5a] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base}, |
| 1583 | [0x5b] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base}, |
| 1584 | [0x5c] = {OP_and, -1, 0, two, z_reg, z_imm1234_8base}, |
| 1585 | [0x5d] = {OP_and, -1, 0, two, z_reg, z_imm1234_8base}, |
| 1586 | [0x5e] = {OP_and, -1, 0, five, z_reg, z_imm1234_8base}, |
| 1587 | [0x5f] = {OP_and, -1, 0, five, z_reg, z_imm1234_8base}, |
| 1588 | [0x60] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1589 | [0x61] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1590 | [0x62] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1591 | [0x63] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1592 | [0x64] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1593 | [0x65] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1594 | [0x66] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1595 | [0x67] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1596 | [0x68] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1597 | [0x69] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1598 | [0x6a] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1599 | [0x6b] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1600 | [0x6c] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1601 | [0x6d] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1602 | [0x6e] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1603 | [0x6f] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1604 | [0x70] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1605 | [0x71] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1606 | [0x72] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1607 | [0x73] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1608 | [0x74] = {OP_sub, -1, 0, two, z_reg, z_imm1234_0base}, |
| 1609 | [0x75] = {OP_sub, -1, 0, two, z_reg, z_imm1234_0base}, |
| 1610 | [0x76] = {OP_sub, -1, 0, five, z_reg, z_imm1234_0base}, |
| 1611 | [0x77] = {OP_sub, -1, 0, five, z_reg, z_imm1234_0base}, |
| 1612 | [0x78] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base}, |
| 1613 | [0x79] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base}, |
| 1614 | [0x7a] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base}, |
| 1615 | [0x7b] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base}, |
| 1616 | [0x7c] = {OP_or, -1, 0, two, z_reg, z_imm1234_8base}, |
| 1617 | [0x7d] = {OP_or, -1, 0, two, z_reg, z_imm1234_8base}, |
| 1618 | [0x7e] = {OP_or, -1, 0, five, z_reg, z_imm1234_8base}, |
| 1619 | [0x7f] = {OP_or, -1, 0, five, z_reg, z_imm1234_8base}, |
| 1620 | [0x80] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1621 | [0x81] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1622 | [0x82] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1623 | [0x83] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1624 | [0x84] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1625 | [0x85] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1626 | [0x86] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1627 | [0x87] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1628 | [0x88] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1629 | [0x89] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1630 | [0x8a] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1631 | [0x8b] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1632 | [0x8c] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1633 | [0x8d] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1634 | [0x8e] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1635 | [0x8f] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1636 | [0x90] = {OP_ld, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1637 | [0x91] = {OP_ld, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1638 | [0x92] = {OP_ld, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1639 | [0x93] = {OP_ld, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1640 | [0x94] = {OP_ld, -1, 0, two, z_reg, z_imm1234_0base}, |
| 1641 | [0x95] = {OP_ld, -1, 0, two, z_reg, z_imm1234_0base}, |
| 1642 | [0x96] = {OP_ld, -1, 0, five, z_reg, z_imm1234_0base}, |
| 1643 | [0x97] = {OP_ld, -1, 0, five, z_reg, z_imm1234_0base}, |
| 1644 | [0x98] = {OP_ld, -1, 0, four, reg_xy, z_imm1234_0base}, |
| 1645 | [0x99] = {OP_ld, -1, 0, four, reg_xy, z_imm1234_0base}, |
| 1646 | [0x9a] = {OP_clr, -1, 0, single, reg_xy, 0}, |
| 1647 | [0x9b] = {OP_clr, -1, 0, single, reg_xy, 0}, |
| 1648 | [0x9c] = {OP_inc, 0, 0, opr_n_bytes_p1, z_opr_decode, 0}, |
| 1649 | [0x9d] = {OP_inc, 1, 0, opr_n_bytes_p1, z_opr_decode, 0}, |
| 1650 | [0x9e] = {OP_tfr, -1, 0, two, z_tfr, NULL}, |
| 1651 | [0x9f] = {OP_inc, 3, 0, opr_n_bytes_p1, z_opr_decode, 0}, |
| 1652 | [0xa0] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1653 | [0xa1] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1654 | [0xa2] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1655 | [0xa3] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1656 | [0xa4] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1657 | [0xa5] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1658 | [0xa6] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1659 | [0xa7] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1660 | [0xa8] = {OP_ld, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode}, |
| 1661 | [0xa9] = {OP_ld, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode}, |
| 1662 | [0xaa] = {OP_jmp, -1, 0, opr_n_bytes_p1, z_opr_decode, 0}, |
| 1663 | [0xab] = {OP_jsr, -1, 0, opr_n_bytes_p1, z_opr_decode, 0}, |
| 1664 | [0xac] = {OP_dec, 0, 0, opr_n_bytes_p1, z_opr_decode, 0}, |
| 1665 | [0xad] = {OP_dec, 1, 0, opr_n_bytes_p1, z_opr_decode, 0}, |
| 1666 | [0xae] = {0xFFFF, -1, exg_sex_discrim, two, exg_sex_decode, 0}, /* EXG / SEX */ |
| 1667 | [0xaf] = {OP_dec, 3, 0, opr_n_bytes_p1, 0, z_opr_decode}, |
| 1668 | [0xb0] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, |
| 1669 | [0xb1] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, |
| 1670 | [0xb2] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, |
| 1671 | [0xb3] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, |
| 1672 | [0xb4] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, |
| 1673 | [0xb5] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, |
| 1674 | [0xb6] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, |
| 1675 | [0xb7] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, |
| 1676 | [0xb8] = {OP_ld, -1, 0, four, reg_xy, z_ext24_decode}, |
| 1677 | [0xb9] = {OP_ld, -1, 0, four, reg_xy, z_ext24_decode}, |
| 1678 | [0xba] = {OP_jmp, -1, 0, four, z_ext24_decode, 0}, |
| 1679 | [0xbb] = {OP_jsr, -1, 0, four, z_ext24_decode, 0}, |
| 1680 | [0xbc] = {OP_clr, 0, 0, opr_n_bytes_p1, z_opr_decode, 0}, |
| 1681 | [0xbd] = {OP_clr, 1, 0, opr_n_bytes_p1, z_opr_decode, 0}, |
| 1682 | [0xbe] = {OP_clr, 2, 0, opr_n_bytes_p1, z_opr_decode, 0}, |
| 1683 | [0xbf] = {OP_clr, 3, 0, opr_n_bytes_p1, z_opr_decode, 0}, |
| 1684 | [0xc0] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1685 | [0xc1] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1686 | [0xc2] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1687 | [0xc3] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1688 | [0xc4] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1689 | [0xc5] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1690 | [0xc6] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1691 | [0xc7] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1692 | [0xc8] = {OP_st, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode}, |
| 1693 | [0xc9] = {OP_st, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode}, |
| 1694 | [0xca] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, |
| 1695 | [0xcb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, |
| 1696 | [0xcc] = {OP_com, 0, 0, opr_n_bytes_p1, NULL, z_opr_decode}, |
| 1697 | [0xcd] = {OP_com, 1, 0, opr_n_bytes_p1, NULL, z_opr_decode}, |
| 1698 | [0xce] = {OP_andcc, -1, 0, two, imm1_decode, 0}, |
| 1699 | [0xcf] = {OP_com, 3, 0, opr_n_bytes_p1, NULL, z_opr_decode}, |
| 1700 | [0xd0] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, |
| 1701 | [0xd1] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, |
| 1702 | [0xd2] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, |
| 1703 | [0xd3] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, |
| 1704 | [0xd4] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, |
| 1705 | [0xd5] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, |
| 1706 | [0xd6] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, |
| 1707 | [0xd7] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, |
| 1708 | [0xd8] = {OP_st, -1, 0, four, reg_xy, z_ext24_decode}, |
| 1709 | [0xd9] = {OP_st, -1, 0, four, reg_xy, z_ext24_decode}, |
| 1710 | [0xda] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, |
| 1711 | [0xdb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, |
| 1712 | [0xdc] = {OP_neg, 0, 0, opr_n_bytes_p1, NULL, z_opr_decode}, |
| 1713 | [0xdd] = {OP_neg, 1, 0, opr_n_bytes_p1, NULL, z_opr_decode}, |
| 1714 | [0xde] = {OP_orcc, -1, 0, two, imm1_decode, 0}, |
| 1715 | [0xdf] = {OP_neg, 3, 0, opr_n_bytes_p1, NULL, z_opr_decode}, |
| 1716 | [0xe0] = {OP_cmp, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1717 | [0xe1] = {OP_cmp, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1718 | [0xe2] = {OP_cmp, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1719 | [0xe3] = {OP_cmp, -1, 0, three, z_reg, z_imm1234_0base}, |
| 1720 | [0xe4] = {OP_cmp, -1, 0, two, z_reg, z_imm1234_0base}, |
| 1721 | [0xe5] = {OP_cmp, -1, 0, two, z_reg, z_imm1234_0base}, |
| 1722 | [0xe6] = {OP_cmp, -1, 0, five, z_reg, z_imm1234_0base}, |
| 1723 | [0xe7] = {OP_cmp, -1, 0, five, z_reg, z_imm1234_0base}, |
| 1724 | [0xe8] = {OP_cmp, -1, 0, four, reg_xy, z_imm1234_0base}, |
| 1725 | [0xe9] = {OP_cmp, -1, 0, four, reg_xy, z_imm1234_0base}, |
| 1726 | [0xea] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, |
| 1727 | [0xeb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, |
| 1728 | [0xec] = {OP_bclr, -1, 0, bm_n_bytes, bm_decode, 0}, |
| 1729 | [0xed] = {OP_bset, -1, 0, bm_n_bytes, bm_decode, 0}, |
| 1730 | [0xee] = {OP_btgl, -1, 0, bm_n_bytes, bm_decode, 0}, |
| 1731 | [0xef] = {OP_INVALID, -1, 0, NULL, NULL, NULL}, /* SPARE */ |
| 1732 | [0xf0] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1733 | [0xf1] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1734 | [0xf2] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1735 | [0xf3] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1736 | [0xf4] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1737 | [0xf5] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1738 | [0xf6] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1739 | [0xf7] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, |
| 1740 | [0xf8] = {OP_cmp, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode}, |
| 1741 | [0xf9] = {OP_cmp, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode}, |
| 1742 | [0xfa] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, |
| 1743 | [0xfb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, |
| 1744 | [0xfc] = {OP_cmp, -1, 0, single, cmp_xy, 0}, |
| 1745 | [0xfd] = {OP_sub, -1, 0, single, sub_d6_x_y, 0}, |
| 1746 | [0xfe] = {OP_sub, -1, 0, single, sub_d6_y_x, 0}, |
| 1747 | [0xff] = {OP_swi, -1, 0, single, 0, 0} |
| 1748 | }; |
| 1749 | |
| 1750 | static const int oprregs1[] = |
| 1751 | { |
| 1752 | REG_D3, REG_D2, REG_D1, REG_D0, REG_CCL, REG_CCH |
| 1753 | }; |
| 1754 | |
| 1755 | static const int oprregs2[] = |
| 1756 | { |
| 1757 | REG_Y, REG_X, REG_D7, REG_D6, REG_D5, REG_D4 |
| 1758 | }; |
| 1759 | |
| 1760 | |
| 1761 | \f |
| 1762 | |
| 1763 | enum MUL_MODE |
| 1764 | { |
| 1765 | MUL_REG_REG, |
| 1766 | MUL_REG_OPR, |
| 1767 | MUL_REG_IMM, |
| 1768 | MUL_OPR_OPR |
| 1769 | }; |
| 1770 | |
| 1771 | struct mb |
| 1772 | { |
| 1773 | uint8_t mask; |
| 1774 | uint8_t value; |
| 1775 | enum MUL_MODE mode; |
| 1776 | }; |
| 1777 | |
| 1778 | static const struct mb mul_table[] = { |
| 1779 | {0x40, 0x00, MUL_REG_REG}, |
| 1780 | |
| 1781 | {0x47, 0x40, MUL_REG_OPR}, |
| 1782 | {0x47, 0x41, MUL_REG_OPR}, |
| 1783 | {0x47, 0x43, MUL_REG_OPR}, |
| 1784 | |
| 1785 | {0x47, 0x44, MUL_REG_IMM}, |
| 1786 | {0x47, 0x45, MUL_REG_IMM}, |
| 1787 | {0x47, 0x47, MUL_REG_IMM}, |
| 1788 | |
| 1789 | {0x43, 0x42, MUL_OPR_OPR}, |
| 1790 | }; |
| 1791 | |
| 1792 | |
| 1793 | static int |
| 1794 | mul_decode (struct mem_read_abstraction_base *mra, |
| 1795 | int *n_operands, struct operand **operand) |
| 1796 | { |
| 1797 | uint8_t mb; |
| 1798 | struct operand *op; |
| 1799 | int status = mra->read (mra, 0, 1, &mb); |
| 1800 | if (status < 0) |
| 1801 | return status; |
| 1802 | |
| 1803 | uint8_t byte; |
| 1804 | status = mra->read (mra, -1, 1, &byte); |
| 1805 | if (status < 0) |
| 1806 | return status; |
| 1807 | |
| 1808 | enum MUL_MODE mode = -1; |
| 1809 | size_t i; |
| 1810 | for (i = 0; i < sizeof (mul_table) / sizeof (mul_table[0]); ++i) |
| 1811 | { |
| 1812 | const struct mb *mm = mul_table + i; |
| 1813 | if ((mb & mm->mask) == mm->value) |
| 1814 | { |
| 1815 | mode = mm->mode; |
| 1816 | break; |
| 1817 | } |
| 1818 | } |
| 1819 | op = create_register_operand (byte & 0x07); |
| 1820 | if (op == NULL) |
| 1821 | return -1; |
| 1822 | operand[(*n_operands)++] = op; |
| 1823 | |
| 1824 | switch (mode) |
| 1825 | { |
| 1826 | case MUL_REG_IMM: |
| 1827 | { |
| 1828 | int size = (mb & 0x3); |
| 1829 | op = create_register_operand_with_size ((mb & 0x38) >> 3, size); |
| 1830 | if (op == NULL) |
| 1831 | return -1; |
| 1832 | operand[(*n_operands)++] = op; |
| 1833 | |
| 1834 | uint32_t imm; |
| 1835 | if (z_decode_signed_value (mra, 1, size + 1, &imm) < 0) |
| 1836 | return -1; |
| 1837 | op = create_immediate_operand (imm); |
| 1838 | if (op == NULL) |
| 1839 | return -1; |
| 1840 | operand[(*n_operands)++] = op; |
| 1841 | } |
| 1842 | break; |
| 1843 | case MUL_REG_REG: |
| 1844 | op = create_register_operand ((mb & 0x38) >> 3); |
| 1845 | if (op == NULL) |
| 1846 | return -1; |
| 1847 | operand[(*n_operands)++] = op; |
| 1848 | op = create_register_operand (mb & 0x07); |
| 1849 | if (op == NULL) |
| 1850 | return -1; |
| 1851 | operand[(*n_operands)++] = op; |
| 1852 | break; |
| 1853 | case MUL_REG_OPR: |
| 1854 | op = create_register_operand ((mb & 0x38) >> 3); |
| 1855 | if (op == NULL) |
| 1856 | return -1; |
| 1857 | operand[(*n_operands)++] = op; |
| 1858 | op = x_opr_decode_with_size (mra, 1, mb & 0x3); |
| 1859 | if (op == NULL) |
| 1860 | return -1; |
| 1861 | operand[(*n_operands)++] = op; |
| 1862 | break; |
| 1863 | case MUL_OPR_OPR: |
| 1864 | { |
| 1865 | int first = x_opr_n_bytes (mra, 1); |
| 1866 | if (first < 0) |
| 1867 | return first; |
| 1868 | op = x_opr_decode_with_size (mra, 1, (mb & 0x30) >> 4); |
| 1869 | if (op == NULL) |
| 1870 | return -1; |
| 1871 | operand[(*n_operands)++] = op; |
| 1872 | op = x_opr_decode_with_size (mra, first + 1, (mb & 0x0c) >> 2); |
| 1873 | if (op == NULL) |
| 1874 | return -1; |
| 1875 | operand[(*n_operands)++] = op; |
| 1876 | break; |
| 1877 | } |
| 1878 | } |
| 1879 | return 0; |
| 1880 | } |
| 1881 | |
| 1882 | |
| 1883 | static int |
| 1884 | mul_n_bytes (struct mem_read_abstraction_base *mra) |
| 1885 | { |
| 1886 | int nx = 2; |
| 1887 | int first, second; |
| 1888 | uint8_t mb; |
| 1889 | int status = mra->read (mra, 0, 1, &mb); |
| 1890 | if (status < 0) |
| 1891 | return status; |
| 1892 | |
| 1893 | enum MUL_MODE mode = -1; |
| 1894 | size_t i; |
| 1895 | for (i = 0; i < sizeof (mul_table) / sizeof (mul_table[0]); ++i) |
| 1896 | { |
| 1897 | const struct mb *mm = mul_table + i; |
| 1898 | if ((mb & mm->mask) == mm->value) |
| 1899 | { |
| 1900 | mode = mm->mode; |
| 1901 | break; |
| 1902 | } |
| 1903 | } |
| 1904 | |
| 1905 | int size = (mb & 0x3) + 1; |
| 1906 | |
| 1907 | switch (mode) |
| 1908 | { |
| 1909 | case MUL_REG_IMM: |
| 1910 | nx += size; |
| 1911 | break; |
| 1912 | case MUL_REG_REG: |
| 1913 | break; |
| 1914 | case MUL_REG_OPR: |
| 1915 | first = x_opr_n_bytes (mra, 1); |
| 1916 | if (first < 0) |
| 1917 | return first; |
| 1918 | nx += first; |
| 1919 | break; |
| 1920 | case MUL_OPR_OPR: |
| 1921 | first = x_opr_n_bytes (mra, nx - 1); |
| 1922 | if (first < 0) |
| 1923 | return first; |
| 1924 | nx += first; |
| 1925 | second = x_opr_n_bytes (mra, nx - 1); |
| 1926 | if (second < 0) |
| 1927 | return second; |
| 1928 | nx += second; |
| 1929 | break; |
| 1930 | } |
| 1931 | |
| 1932 | return nx; |
| 1933 | } |
| 1934 | |
| 1935 | \f |
| 1936 | /* The NXP documentation is vague about BM_RESERVED0 and BM_RESERVED1, |
| 1937 | and contains obvious typos. |
| 1938 | However the Freescale tools and experiments with the chip itself |
| 1939 | seem to indicate that they behave like BM_REG_IMM and BM_OPR_REG |
| 1940 | respectively. */ |
| 1941 | |
| 1942 | enum BM_MODE |
| 1943 | { |
| 1944 | BM_REG_IMM, |
| 1945 | BM_RESERVED0, |
| 1946 | BM_OPR_B, |
| 1947 | BM_OPR_W, |
| 1948 | BM_OPR_L, |
| 1949 | BM_OPR_REG, |
| 1950 | BM_RESERVED1 |
| 1951 | }; |
| 1952 | |
| 1953 | struct bm |
| 1954 | { |
| 1955 | uint8_t mask; |
| 1956 | uint8_t value; |
| 1957 | enum BM_MODE mode; |
| 1958 | }; |
| 1959 | |
| 1960 | static const struct bm bm_table[] = { |
| 1961 | { 0xC6, 0x04, BM_REG_IMM}, |
| 1962 | { 0x84, 0x00, BM_REG_IMM}, |
| 1963 | { 0x06, 0x06, BM_REG_IMM}, |
| 1964 | { 0xC6, 0x44, BM_RESERVED0}, |
| 1965 | |
| 1966 | { 0x8F, 0x80, BM_OPR_B}, |
| 1967 | { 0x8E, 0x82, BM_OPR_W}, |
| 1968 | { 0x8C, 0x88, BM_OPR_L}, |
| 1969 | |
| 1970 | { 0x83, 0x81, BM_OPR_REG}, |
| 1971 | { 0x87, 0x84, BM_RESERVED1}, |
| 1972 | }; |
| 1973 | |
| 1974 | static int |
| 1975 | bm_decode (struct mem_read_abstraction_base *mra, |
| 1976 | int *n_operands, struct operand **operand) |
| 1977 | { |
| 1978 | struct operand *op; |
| 1979 | uint8_t bm; |
| 1980 | int status = mra->read (mra, 0, 1, &bm); |
| 1981 | if (status < 0) |
| 1982 | return status; |
| 1983 | |
| 1984 | size_t i; |
| 1985 | enum BM_MODE mode = -1; |
| 1986 | for (i = 0; i < sizeof (bm_table) / sizeof (bm_table[0]); ++i) |
| 1987 | { |
| 1988 | const struct bm *bme = bm_table + i; |
| 1989 | if ((bm & bme->mask) == bme->value) |
| 1990 | { |
| 1991 | mode = bme->mode; |
| 1992 | break; |
| 1993 | } |
| 1994 | } |
| 1995 | |
| 1996 | switch (mode) |
| 1997 | { |
| 1998 | case BM_REG_IMM: |
| 1999 | case BM_RESERVED0: |
| 2000 | op = create_register_operand (bm & 0x07); |
| 2001 | if (op == NULL) |
| 2002 | return -1; |
| 2003 | operand[(*n_operands)++] = op; |
| 2004 | break; |
| 2005 | case BM_OPR_B: |
| 2006 | op = x_opr_decode_with_size (mra, 1, 0); |
| 2007 | if (op == NULL) |
| 2008 | return -1; |
| 2009 | operand[(*n_operands)++] = op; |
| 2010 | break; |
| 2011 | case BM_OPR_W: |
| 2012 | op = x_opr_decode_with_size (mra, 1, 1); |
| 2013 | if (op == NULL) |
| 2014 | return -1; |
| 2015 | operand[(*n_operands)++] = op; |
| 2016 | break; |
| 2017 | case BM_OPR_L: |
| 2018 | op = x_opr_decode_with_size (mra, 1, 3); |
| 2019 | if (op == NULL) |
| 2020 | return -1; |
| 2021 | operand[(*n_operands)++] = op; |
| 2022 | break; |
| 2023 | case BM_OPR_REG: |
| 2024 | case BM_RESERVED1: |
| 2025 | { |
| 2026 | uint8_t xb; |
| 2027 | status = mra->read (mra, 1, 1, &xb); |
| 2028 | if (status < 0) |
| 2029 | return status; |
| 2030 | /* Don't emit a size suffix for register operands */ |
| 2031 | if ((xb & 0xF8) != 0xB8) |
| 2032 | op = x_opr_decode_with_size (mra, 1, (bm & 0x0c) >> 2); |
| 2033 | else |
| 2034 | op = x_opr_decode (mra, 1); |
| 2035 | if (op == NULL) |
| 2036 | return -1; |
| 2037 | operand[(*n_operands)++] = op; |
| 2038 | } |
| 2039 | break; |
| 2040 | } |
| 2041 | |
| 2042 | uint8_t imm = 0; |
| 2043 | switch (mode) |
| 2044 | { |
| 2045 | case BM_REG_IMM: |
| 2046 | case BM_RESERVED0: |
| 2047 | imm = (bm & 0x38) >> 3; |
| 2048 | op = create_immediate_operand (imm); |
| 2049 | if (op == NULL) |
| 2050 | return -1; |
| 2051 | operand[(*n_operands)++] = op; |
| 2052 | break; |
| 2053 | case BM_OPR_L: |
| 2054 | imm |= (bm & 0x03) << 3; |
| 2055 | /* fallthrough */ |
| 2056 | case BM_OPR_W: |
| 2057 | imm |= (bm & 0x01) << 3; |
| 2058 | /* fallthrough */ |
| 2059 | case BM_OPR_B: |
| 2060 | imm |= (bm & 0x70) >> 4; |
| 2061 | op = create_immediate_operand (imm); |
| 2062 | if (op == NULL) |
| 2063 | return -1; |
| 2064 | operand[(*n_operands)++] = op; |
| 2065 | break; |
| 2066 | case BM_OPR_REG: |
| 2067 | case BM_RESERVED1: |
| 2068 | op = create_register_operand ((bm & 0x70) >> 4); |
| 2069 | if (op == NULL) |
| 2070 | return -1; |
| 2071 | operand[(*n_operands)++] = op; |
| 2072 | break; |
| 2073 | } |
| 2074 | return 0; |
| 2075 | } |
| 2076 | |
| 2077 | |
| 2078 | static int |
| 2079 | bm_rel_decode (struct mem_read_abstraction_base *mra, |
| 2080 | int *n_operands, struct operand **operand) |
| 2081 | { |
| 2082 | struct operand *op; |
| 2083 | uint8_t bm; |
| 2084 | int status = mra->read (mra, 0, 1, &bm); |
| 2085 | if (status < 0) |
| 2086 | return status; |
| 2087 | |
| 2088 | size_t i; |
| 2089 | enum BM_MODE mode = -1; |
| 2090 | for (i = 0; i < sizeof (bm_table) / sizeof (bm_table[0]); ++i) |
| 2091 | { |
| 2092 | const struct bm *bme = bm_table + i; |
| 2093 | if ((bm & bme->mask) == bme->value) |
| 2094 | { |
| 2095 | mode = bme->mode; |
| 2096 | break; |
| 2097 | } |
| 2098 | } |
| 2099 | |
| 2100 | int n = 1; |
| 2101 | switch (mode) |
| 2102 | { |
| 2103 | case BM_REG_IMM: |
| 2104 | case BM_RESERVED0: |
| 2105 | op = create_register_operand (bm & 0x07); |
| 2106 | if (op == NULL) |
| 2107 | return -1; |
| 2108 | operand[(*n_operands)++] = op; |
| 2109 | break; |
| 2110 | case BM_OPR_B: |
| 2111 | op = x_opr_decode_with_size (mra, 1, 0); |
| 2112 | if (op == NULL) |
| 2113 | return -1; |
| 2114 | operand[(*n_operands)++] = op; |
| 2115 | n = x_opr_n_bytes (mra, 1); |
| 2116 | if (n < 0) |
| 2117 | return n; |
| 2118 | n += 1; |
| 2119 | break; |
| 2120 | case BM_OPR_W: |
| 2121 | op = x_opr_decode_with_size (mra, 1, 1); |
| 2122 | if (op == NULL) |
| 2123 | return -1; |
| 2124 | operand[(*n_operands)++] = op; |
| 2125 | n = x_opr_n_bytes (mra, 1); |
| 2126 | if (n < 0) |
| 2127 | return n; |
| 2128 | n += 1; |
| 2129 | break; |
| 2130 | case BM_OPR_L: |
| 2131 | op = x_opr_decode_with_size (mra, 1, 3); |
| 2132 | if (op == NULL) |
| 2133 | return -1; |
| 2134 | operand[(*n_operands)++] = op; |
| 2135 | n = x_opr_n_bytes (mra, 1); |
| 2136 | if (n < 0) |
| 2137 | return n; |
| 2138 | n += 1; |
| 2139 | break; |
| 2140 | case BM_OPR_REG: |
| 2141 | case BM_RESERVED1: |
| 2142 | { |
| 2143 | uint8_t xb; |
| 2144 | status = mra->read (mra, +1, 1, &xb); |
| 2145 | if (status < 0) |
| 2146 | return status; |
| 2147 | /* Don't emit a size suffix for register operands */ |
| 2148 | if ((xb & 0xF8) != 0xB8) |
| 2149 | { |
| 2150 | short os = (bm & 0x0c) >> 2; |
| 2151 | op = x_opr_decode_with_size (mra, 1, os); |
| 2152 | } |
| 2153 | else |
| 2154 | op = x_opr_decode (mra, 1); |
| 2155 | if (op == NULL) |
| 2156 | return -1; |
| 2157 | operand[(*n_operands)++] = op; |
| 2158 | } |
| 2159 | break; |
| 2160 | } |
| 2161 | |
| 2162 | int x, imm = 0; |
| 2163 | switch (mode) |
| 2164 | { |
| 2165 | case BM_OPR_L: |
| 2166 | imm |= (bm & 0x02) << 3; |
| 2167 | /* fall through */ |
| 2168 | case BM_OPR_W: |
| 2169 | imm |= (bm & 0x01) << 3; |
| 2170 | /* fall through */ |
| 2171 | case BM_OPR_B: |
| 2172 | imm |= (bm & 0x70) >> 4; |
| 2173 | op = create_immediate_operand (imm); |
| 2174 | if (op == NULL) |
| 2175 | return -1; |
| 2176 | operand[(*n_operands)++] = op; |
| 2177 | break; |
| 2178 | case BM_RESERVED0: |
| 2179 | imm = (bm & 0x38) >> 3; |
| 2180 | op = create_immediate_operand (imm); |
| 2181 | if (op == NULL) |
| 2182 | return -1; |
| 2183 | operand[(*n_operands)++] = op; |
| 2184 | break; |
| 2185 | case BM_REG_IMM: |
| 2186 | imm = (bm & 0xF8) >> 3; |
| 2187 | op = create_immediate_operand (imm); |
| 2188 | if (op == NULL) |
| 2189 | return -1; |
| 2190 | operand[(*n_operands)++] = op; |
| 2191 | break; |
| 2192 | case BM_OPR_REG: |
| 2193 | case BM_RESERVED1: |
| 2194 | op = create_register_operand ((bm & 0x70) >> 4); |
| 2195 | if (op == NULL) |
| 2196 | return -1; |
| 2197 | operand[(*n_operands)++] = op; |
| 2198 | x = x_opr_n_bytes (mra, 1); |
| 2199 | if (x < 0) |
| 2200 | return x; |
| 2201 | n += x; |
| 2202 | break; |
| 2203 | } |
| 2204 | |
| 2205 | return rel_15_7 (mra, n + 1, n_operands, operand); |
| 2206 | } |
| 2207 | |
| 2208 | static int |
| 2209 | bm_n_bytes (struct mem_read_abstraction_base *mra) |
| 2210 | { |
| 2211 | uint8_t bm; |
| 2212 | int status = mra->read (mra, 0, 1, &bm); |
| 2213 | if (status < 0) |
| 2214 | return status; |
| 2215 | |
| 2216 | size_t i; |
| 2217 | enum BM_MODE mode = -1; |
| 2218 | for (i = 0; i < sizeof (bm_table) / sizeof (bm_table[0]); ++i) |
| 2219 | { |
| 2220 | const struct bm *bme = bm_table + i; |
| 2221 | if ((bm & bme->mask) == bme->value) |
| 2222 | { |
| 2223 | mode = bme->mode; |
| 2224 | break; |
| 2225 | } |
| 2226 | } |
| 2227 | |
| 2228 | int n = 0; |
| 2229 | switch (mode) |
| 2230 | { |
| 2231 | case BM_REG_IMM: |
| 2232 | case BM_RESERVED0: |
| 2233 | break; |
| 2234 | |
| 2235 | case BM_OPR_B: |
| 2236 | case BM_OPR_W: |
| 2237 | case BM_OPR_L: |
| 2238 | case BM_OPR_REG: |
| 2239 | case BM_RESERVED1: |
| 2240 | n = x_opr_n_bytes (mra, 1); |
| 2241 | if (n < 0) |
| 2242 | return n; |
| 2243 | break; |
| 2244 | } |
| 2245 | |
| 2246 | return n + 2; |
| 2247 | } |
| 2248 | |
| 2249 | static int |
| 2250 | bm_rel_n_bytes (struct mem_read_abstraction_base *mra) |
| 2251 | { |
| 2252 | int n = 1 + bm_n_bytes (mra); |
| 2253 | |
| 2254 | bfd_byte rb; |
| 2255 | int status = mra->read (mra, n - 2, 1, &rb); |
| 2256 | if (status != 0) |
| 2257 | return status; |
| 2258 | |
| 2259 | if (rb & 0x80) |
| 2260 | n++; |
| 2261 | |
| 2262 | return n; |
| 2263 | } |
| 2264 | |
| 2265 | |
| 2266 | \f |
| 2267 | |
| 2268 | |
| 2269 | /* shift direction */ |
| 2270 | enum SB_DIR |
| 2271 | { |
| 2272 | SB_LEFT, |
| 2273 | SB_RIGHT |
| 2274 | }; |
| 2275 | |
| 2276 | enum SB_TYPE |
| 2277 | { |
| 2278 | SB_ARITHMETIC, |
| 2279 | SB_LOGICAL |
| 2280 | }; |
| 2281 | |
| 2282 | |
| 2283 | enum SB_MODE |
| 2284 | { |
| 2285 | SB_REG_REG_N_EFF, |
| 2286 | SB_REG_REG_N, |
| 2287 | SB_REG_OPR_EFF, |
| 2288 | SB_ROT, |
| 2289 | SB_REG_OPR_OPR, |
| 2290 | SB_OPR_N |
| 2291 | }; |
| 2292 | |
| 2293 | struct sb |
| 2294 | { |
| 2295 | uint8_t mask; |
| 2296 | uint8_t value; |
| 2297 | enum SB_MODE mode; |
| 2298 | }; |
| 2299 | |
| 2300 | static const struct sb sb_table[] = { |
| 2301 | {0x30, 0x00, SB_REG_REG_N_EFF}, |
| 2302 | {0x30, 0x10, SB_REG_REG_N}, |
| 2303 | {0x34, 0x20, SB_REG_OPR_EFF}, |
| 2304 | {0x34, 0x24, SB_ROT}, |
| 2305 | {0x34, 0x30, SB_REG_OPR_OPR}, |
| 2306 | {0x34, 0x34, SB_OPR_N}, |
| 2307 | }; |
| 2308 | |
| 2309 | static int |
| 2310 | shift_n_bytes (struct mem_read_abstraction_base *mra) |
| 2311 | { |
| 2312 | bfd_byte sb; |
| 2313 | int opr1, opr2; |
| 2314 | int status = mra->read (mra, 0, 1, &sb); |
| 2315 | if (status != 0) |
| 2316 | return status; |
| 2317 | |
| 2318 | size_t i; |
| 2319 | enum SB_MODE mode = -1; |
| 2320 | for (i = 0; i < sizeof (sb_table) / sizeof (sb_table[0]); ++i) |
| 2321 | { |
| 2322 | const struct sb *sbe = sb_table + i; |
| 2323 | if ((sb & sbe->mask) == sbe->value) |
| 2324 | mode = sbe->mode; |
| 2325 | } |
| 2326 | |
| 2327 | switch (mode) |
| 2328 | { |
| 2329 | case SB_REG_REG_N_EFF: |
| 2330 | return 2; |
| 2331 | case SB_REG_OPR_EFF: |
| 2332 | case SB_ROT: |
| 2333 | opr1 = x_opr_n_bytes (mra, 1); |
| 2334 | if (opr1 < 0) |
| 2335 | return opr1; |
| 2336 | return 2 + opr1; |
| 2337 | case SB_REG_OPR_OPR: |
| 2338 | opr1 = x_opr_n_bytes (mra, 1); |
| 2339 | if (opr1 < 0) |
| 2340 | return opr1; |
| 2341 | opr2 = 0; |
| 2342 | if ((sb & 0x30) != 0x20) |
| 2343 | { |
| 2344 | opr2 = x_opr_n_bytes (mra, opr1 + 1); |
| 2345 | if (opr2 < 0) |
| 2346 | return opr2; |
| 2347 | } |
| 2348 | return 2 + opr1 + opr2; |
| 2349 | default: |
| 2350 | return 3; |
| 2351 | } |
| 2352 | |
| 2353 | /* not reached */ |
| 2354 | return -1; |
| 2355 | } |
| 2356 | \f |
| 2357 | |
| 2358 | static int |
| 2359 | mov_imm_opr_n_bytes (struct mem_read_abstraction_base *mra) |
| 2360 | { |
| 2361 | bfd_byte byte; |
| 2362 | int status = mra->read (mra, -1, 1, &byte); |
| 2363 | if (status < 0) |
| 2364 | return status; |
| 2365 | |
| 2366 | int size = byte - 0x0c + 1; |
| 2367 | int n = x_opr_n_bytes (mra, size); |
| 2368 | if (n < 0) |
| 2369 | return n; |
| 2370 | |
| 2371 | return size + n + 1; |
| 2372 | } |
| 2373 | |
| 2374 | static int |
| 2375 | mov_imm_opr (struct mem_read_abstraction_base *mra, |
| 2376 | int *n_operands, struct operand **operand) |
| 2377 | { |
| 2378 | struct operand *op; |
| 2379 | bfd_byte byte; |
| 2380 | int status = mra->read (mra, -1, 1, &byte); |
| 2381 | if (status < 0) |
| 2382 | return status; |
| 2383 | |
| 2384 | int size = byte - 0x0c + 1; |
| 2385 | uint32_t imm; |
| 2386 | if (decode_signed_value (mra, size, &imm)) |
| 2387 | return -1; |
| 2388 | |
| 2389 | op = create_immediate_operand (imm); |
| 2390 | if (op == NULL) |
| 2391 | return -1; |
| 2392 | operand[(*n_operands)++] = op; |
| 2393 | op = x_opr_decode (mra, size); |
| 2394 | if (op == NULL) |
| 2395 | return -1; |
| 2396 | operand[(*n_operands)++] = op; |
| 2397 | return 0; |
| 2398 | } |
| 2399 | |
| 2400 | \f |
| 2401 | |
| 2402 | static int |
| 2403 | ld_18bit_decode (struct mem_read_abstraction_base *mra, |
| 2404 | int *n_operands, struct operand **operand) |
| 2405 | { |
| 2406 | struct operand *op; |
| 2407 | size_t size = 3; |
| 2408 | bfd_byte buffer[3]; |
| 2409 | int status = mra->read (mra, 0, 2, buffer + 1); |
| 2410 | if (status < 0) |
| 2411 | return status; |
| 2412 | |
| 2413 | status = mra->read (mra, -1, 1, buffer); |
| 2414 | if (status < 0) |
| 2415 | return status; |
| 2416 | |
| 2417 | buffer[0] = (buffer[0] & 0x30) >> 4; |
| 2418 | |
| 2419 | size_t i; |
| 2420 | uint32_t imm = 0; |
| 2421 | for (i = 0; i < size; ++i) |
| 2422 | { |
| 2423 | imm |= buffer[i] << (8 * (size - i - 1)); |
| 2424 | } |
| 2425 | |
| 2426 | op = create_immediate_operand (imm); |
| 2427 | if (op == NULL) |
| 2428 | return -1; |
| 2429 | operand[(*n_operands)++] = op; |
| 2430 | return 0; |
| 2431 | } |
| 2432 | |
| 2433 | \f |
| 2434 | |
| 2435 | /* Loop Primitives */ |
| 2436 | |
| 2437 | enum LP_MODE { |
| 2438 | LP_REG, |
| 2439 | LP_XY, |
| 2440 | LP_OPR |
| 2441 | }; |
| 2442 | |
| 2443 | struct lp |
| 2444 | { |
| 2445 | uint8_t mask; |
| 2446 | uint8_t value; |
| 2447 | enum LP_MODE mode; |
| 2448 | }; |
| 2449 | |
| 2450 | static const struct lp lp_mode[] = { |
| 2451 | {0x08, 0x00, LP_REG}, |
| 2452 | {0x0C, 0x08, LP_XY}, |
| 2453 | {0x0C, 0x0C, LP_OPR}, |
| 2454 | }; |
| 2455 | |
| 2456 | |
| 2457 | static int |
| 2458 | loop_prim_n_bytes (struct mem_read_abstraction_base *mra) |
| 2459 | { |
| 2460 | int mx = 0; |
| 2461 | uint8_t lb; |
| 2462 | int status = mra->read (mra, mx++, 1, &lb); |
| 2463 | if (status < 0) |
| 2464 | return status; |
| 2465 | |
| 2466 | enum LP_MODE mode = -1; |
| 2467 | size_t i; |
| 2468 | for (i = 0; i < sizeof (lp_mode) / sizeof (lp_mode[0]); ++i) |
| 2469 | { |
| 2470 | const struct lp *pb = lp_mode + i; |
| 2471 | if ((lb & pb->mask) == pb->value) |
| 2472 | { |
| 2473 | mode = pb->mode; |
| 2474 | break; |
| 2475 | } |
| 2476 | } |
| 2477 | |
| 2478 | if (mode == LP_OPR) |
| 2479 | { |
| 2480 | int n = x_opr_n_bytes (mra, mx); |
| 2481 | if (n < 0) |
| 2482 | return n; |
| 2483 | mx += n; |
| 2484 | } |
| 2485 | |
| 2486 | uint8_t rb; |
| 2487 | status = mra->read (mra, mx++, 1, &rb); |
| 2488 | if (status < 0) |
| 2489 | return status; |
| 2490 | if (rb & 0x80) |
| 2491 | mx++; |
| 2492 | |
| 2493 | return mx + 1; |
| 2494 | } |
| 2495 | |
| 2496 | |
| 2497 | \f |
| 2498 | |
| 2499 | static enum optr |
| 2500 | exg_sex_discrim (struct mem_read_abstraction_base *mra, |
| 2501 | enum optr hint ATTRIBUTE_UNUSED) |
| 2502 | { |
| 2503 | uint8_t eb; |
| 2504 | int status = mra->read (mra, 0, 1, &eb); |
| 2505 | enum optr operator = OP_INVALID; |
| 2506 | if (status < 0) |
| 2507 | return operator; |
| 2508 | |
| 2509 | struct operand *op0 = create_register_operand ((eb & 0xf0) >> 4); |
| 2510 | if (op0 == NULL) |
| 2511 | return -1; |
| 2512 | struct operand *op1 = create_register_operand (eb & 0xf); |
| 2513 | if (op1 == NULL) |
| 2514 | return -1; |
| 2515 | |
| 2516 | int reg0 = ((struct register_operand *) op0)->reg; |
| 2517 | int reg1 = ((struct register_operand *) op1)->reg; |
| 2518 | if (reg0 >= 0 && reg0 < S12Z_N_REGISTERS |
| 2519 | && reg1 >= 0 && reg1 < S12Z_N_REGISTERS) |
| 2520 | { |
| 2521 | const struct reg *r0 = registers + reg0; |
| 2522 | const struct reg *r1 = registers + reg1; |
| 2523 | |
| 2524 | operator = r0->bytes < r1->bytes ? OP_sex : OP_exg; |
| 2525 | } |
| 2526 | |
| 2527 | free (op0); |
| 2528 | free (op1); |
| 2529 | |
| 2530 | return operator; |
| 2531 | } |
| 2532 | |
| 2533 | |
| 2534 | static int |
| 2535 | exg_sex_decode (struct mem_read_abstraction_base *mra, |
| 2536 | int *n_operands, struct operand **operands) |
| 2537 | { |
| 2538 | struct operand *op; |
| 2539 | uint8_t eb; |
| 2540 | int status = mra->read (mra, 0, 1, &eb); |
| 2541 | if (status < 0) |
| 2542 | return status; |
| 2543 | |
| 2544 | /* Ship out the operands. */ |
| 2545 | op = create_register_operand ((eb & 0xf0) >> 4); |
| 2546 | if (op == NULL) |
| 2547 | return -1; |
| 2548 | operands[(*n_operands)++] = op; |
| 2549 | op = create_register_operand (eb & 0xf); |
| 2550 | if (op == NULL) |
| 2551 | return -1; |
| 2552 | operands[(*n_operands)++] = op; |
| 2553 | return 0; |
| 2554 | } |
| 2555 | |
| 2556 | static enum optr |
| 2557 | loop_primitive_discrim (struct mem_read_abstraction_base *mra, |
| 2558 | enum optr hint ATTRIBUTE_UNUSED) |
| 2559 | { |
| 2560 | uint8_t lb; |
| 2561 | int status = mra->read (mra, 0, 1, &lb); |
| 2562 | if (status < 0) |
| 2563 | return OP_INVALID; |
| 2564 | |
| 2565 | enum optr opbase = (lb & 0x80) ? OP_dbNE : OP_tbNE; |
| 2566 | return opbase + ((lb & 0x70) >> 4); |
| 2567 | } |
| 2568 | |
| 2569 | static int |
| 2570 | loop_primitive_decode (struct mem_read_abstraction_base *mra, |
| 2571 | int *n_operands, struct operand **operands) |
| 2572 | { |
| 2573 | struct operand *op; |
| 2574 | int n, offs = 1; |
| 2575 | uint8_t lb; |
| 2576 | int status = mra->read (mra, 0, 1, &lb); |
| 2577 | if (status < 0) |
| 2578 | return status; |
| 2579 | |
| 2580 | enum LP_MODE mode = -1; |
| 2581 | size_t i; |
| 2582 | for (i = 0; i < sizeof (lp_mode) / sizeof (lp_mode[0]); ++i) |
| 2583 | { |
| 2584 | const struct lp *pb = lp_mode + i; |
| 2585 | if ((lb & pb->mask) == pb->value) |
| 2586 | { |
| 2587 | mode = pb->mode; |
| 2588 | break; |
| 2589 | } |
| 2590 | } |
| 2591 | |
| 2592 | switch (mode) |
| 2593 | { |
| 2594 | case LP_REG: |
| 2595 | op = create_register_operand (lb & 0x07); |
| 2596 | if (op == NULL) |
| 2597 | return -1; |
| 2598 | operands[(*n_operands)++] = op; |
| 2599 | break; |
| 2600 | case LP_XY: |
| 2601 | op = create_register_operand ((lb & 0x01) + REG_X); |
| 2602 | if (op == NULL) |
| 2603 | return -1; |
| 2604 | operands[(*n_operands)++] = op; |
| 2605 | break; |
| 2606 | case LP_OPR: |
| 2607 | n = x_opr_n_bytes (mra, 1); |
| 2608 | if (n < 0) |
| 2609 | return n; |
| 2610 | offs += n; |
| 2611 | op = x_opr_decode_with_size (mra, 1, lb & 0x03); |
| 2612 | if (op == NULL) |
| 2613 | return -1; |
| 2614 | operands[(*n_operands)++] = op; |
| 2615 | break; |
| 2616 | } |
| 2617 | |
| 2618 | return rel_15_7 (mra, offs + 1, n_operands, operands); |
| 2619 | } |
| 2620 | |
| 2621 | |
| 2622 | static enum optr |
| 2623 | shift_discrim (struct mem_read_abstraction_base *mra, |
| 2624 | enum optr hint ATTRIBUTE_UNUSED) |
| 2625 | { |
| 2626 | size_t i; |
| 2627 | uint8_t sb; |
| 2628 | int status = mra->read (mra, 0, 1, &sb); |
| 2629 | if (status < 0) |
| 2630 | return OP_INVALID; |
| 2631 | |
| 2632 | enum SB_DIR dir = (sb & 0x40) ? SB_LEFT : SB_RIGHT; |
| 2633 | enum SB_TYPE type = (sb & 0x80) ? SB_ARITHMETIC : SB_LOGICAL; |
| 2634 | enum SB_MODE mode = -1; |
| 2635 | for (i = 0; i < sizeof (sb_table) / sizeof (sb_table[0]); ++i) |
| 2636 | { |
| 2637 | const struct sb *sbe = sb_table + i; |
| 2638 | if ((sb & sbe->mask) == sbe->value) |
| 2639 | mode = sbe->mode; |
| 2640 | } |
| 2641 | |
| 2642 | if (mode == SB_ROT) |
| 2643 | return (dir == SB_LEFT) ? OP_rol : OP_ror; |
| 2644 | |
| 2645 | if (type == SB_LOGICAL) |
| 2646 | return (dir == SB_LEFT) ? OP_lsl : OP_lsr; |
| 2647 | |
| 2648 | return (dir == SB_LEFT) ? OP_asl : OP_asr; |
| 2649 | } |
| 2650 | |
| 2651 | |
| 2652 | static int |
| 2653 | shift_decode (struct mem_read_abstraction_base *mra, int *n_operands, |
| 2654 | struct operand **operands) |
| 2655 | { |
| 2656 | struct operand *op; |
| 2657 | size_t i; |
| 2658 | uint8_t byte; |
| 2659 | int status = mra->read (mra, -1, 1, &byte); |
| 2660 | if (status < 0) |
| 2661 | return status; |
| 2662 | |
| 2663 | uint8_t sb; |
| 2664 | status = mra->read (mra, 0, 1, &sb); |
| 2665 | if (status < 0) |
| 2666 | return status; |
| 2667 | |
| 2668 | enum SB_MODE mode = -1; |
| 2669 | for (i = 0; i < sizeof (sb_table) / sizeof (sb_table[0]); ++i) |
| 2670 | { |
| 2671 | const struct sb *sbe = sb_table + i; |
| 2672 | if ((sb & sbe->mask) == sbe->value) |
| 2673 | mode = sbe->mode; |
| 2674 | } |
| 2675 | |
| 2676 | short osize = -1; |
| 2677 | switch (mode) |
| 2678 | { |
| 2679 | case SB_REG_OPR_EFF: |
| 2680 | case SB_ROT: |
| 2681 | case SB_REG_OPR_OPR: |
| 2682 | osize = sb & 0x03; |
| 2683 | break; |
| 2684 | case SB_OPR_N: |
| 2685 | { |
| 2686 | uint8_t xb; |
| 2687 | status = mra->read (mra, 1, 1, &xb); |
| 2688 | if (status < 0) |
| 2689 | return status; |
| 2690 | /* The size suffix is not printed if the OPR operand refers |
| 2691 | directly to a register, because the size is implied by the |
| 2692 | size of that register. */ |
| 2693 | if ((xb & 0xF8) != 0xB8) |
| 2694 | osize = sb & 0x03; |
| 2695 | } |
| 2696 | break; |
| 2697 | default: |
| 2698 | break; |
| 2699 | }; |
| 2700 | |
| 2701 | /* Destination register */ |
| 2702 | switch (mode) |
| 2703 | { |
| 2704 | case SB_REG_REG_N_EFF: |
| 2705 | case SB_REG_REG_N: |
| 2706 | op = create_register_operand (byte & 0x07); |
| 2707 | if (op == NULL) |
| 2708 | return -1; |
| 2709 | operands[(*n_operands)++] = op; |
| 2710 | break; |
| 2711 | case SB_REG_OPR_EFF: |
| 2712 | case SB_REG_OPR_OPR: |
| 2713 | op = create_register_operand (byte & 0x07); |
| 2714 | if (op == NULL) |
| 2715 | return -1; |
| 2716 | operands[(*n_operands)++] = op; |
| 2717 | break; |
| 2718 | |
| 2719 | case SB_ROT: |
| 2720 | op = x_opr_decode_with_size (mra, 1, osize); |
| 2721 | if (op == NULL) |
| 2722 | return -1; |
| 2723 | operands[(*n_operands)++] = op; |
| 2724 | break; |
| 2725 | |
| 2726 | default: |
| 2727 | break; |
| 2728 | } |
| 2729 | |
| 2730 | /* Source register */ |
| 2731 | switch (mode) |
| 2732 | { |
| 2733 | case SB_REG_REG_N_EFF: |
| 2734 | case SB_REG_REG_N: |
| 2735 | op = create_register_operand_with_size (sb & 0x07, osize); |
| 2736 | if (op == NULL) |
| 2737 | return -1; |
| 2738 | operands[(*n_operands)++] = op; |
| 2739 | break; |
| 2740 | |
| 2741 | case SB_REG_OPR_OPR: |
| 2742 | op = x_opr_decode_with_size (mra, 1, osize); |
| 2743 | if (op == NULL) |
| 2744 | return -1; |
| 2745 | operands[(*n_operands)++] = op; |
| 2746 | break; |
| 2747 | |
| 2748 | default: |
| 2749 | break; |
| 2750 | } |
| 2751 | |
| 2752 | /* 3rd arg */ |
| 2753 | switch (mode) |
| 2754 | { |
| 2755 | case SB_REG_OPR_EFF: |
| 2756 | case SB_OPR_N: |
| 2757 | op = x_opr_decode_with_size (mra, 1, osize); |
| 2758 | if (op == NULL) |
| 2759 | return -1; |
| 2760 | operands[(*n_operands)++] = op; |
| 2761 | break; |
| 2762 | |
| 2763 | case SB_REG_REG_N: |
| 2764 | { |
| 2765 | uint8_t xb; |
| 2766 | status = mra->read (mra, 1, 1, &xb); |
| 2767 | if (status < 0) |
| 2768 | return status; |
| 2769 | |
| 2770 | /* This case is slightly unusual. |
| 2771 | If XB matches the binary pattern 0111XXXX, then instead of |
| 2772 | interpreting this as a general OPR postbyte in the IMMe4 mode, |
| 2773 | the XB byte is interpreted in s special way. */ |
| 2774 | if ((xb & 0xF0) == 0x70) |
| 2775 | { |
| 2776 | if (byte & 0x10) |
| 2777 | { |
| 2778 | int shift = ((sb & 0x08) >> 3) | ((xb & 0x0f) << 1); |
| 2779 | op = create_immediate_operand (shift); |
| 2780 | if (op == NULL) |
| 2781 | return -1; |
| 2782 | operands[(*n_operands)++] = op; |
| 2783 | } |
| 2784 | else |
| 2785 | { |
| 2786 | /* This should not happen. */ |
| 2787 | abort (); |
| 2788 | } |
| 2789 | } |
| 2790 | else |
| 2791 | { |
| 2792 | op = x_opr_decode (mra, 1); |
| 2793 | if (op == NULL) |
| 2794 | return -1; |
| 2795 | operands[(*n_operands)++] = op; |
| 2796 | } |
| 2797 | } |
| 2798 | break; |
| 2799 | case SB_REG_OPR_OPR: |
| 2800 | { |
| 2801 | uint8_t xb; |
| 2802 | int n = x_opr_n_bytes (mra, 1); |
| 2803 | if (n < 0) |
| 2804 | return n; |
| 2805 | status = mra->read (mra, 1 + n, 1, &xb); |
| 2806 | if (status < 0) |
| 2807 | return status; |
| 2808 | |
| 2809 | if ((xb & 0xF0) == 0x70) |
| 2810 | { |
| 2811 | int imm = xb & 0x0F; |
| 2812 | imm <<= 1; |
| 2813 | imm |= (sb & 0x08) >> 3; |
| 2814 | op = create_immediate_operand (imm); |
| 2815 | if (op == NULL) |
| 2816 | return -1; |
| 2817 | operands[(*n_operands)++] = op; |
| 2818 | } |
| 2819 | else |
| 2820 | { |
| 2821 | op = x_opr_decode (mra, 1 + n); |
| 2822 | if (op == NULL) |
| 2823 | return -1; |
| 2824 | operands[(*n_operands)++] = op; |
| 2825 | } |
| 2826 | } |
| 2827 | break; |
| 2828 | default: |
| 2829 | break; |
| 2830 | } |
| 2831 | |
| 2832 | switch (mode) |
| 2833 | { |
| 2834 | case SB_REG_REG_N_EFF: |
| 2835 | case SB_REG_OPR_EFF: |
| 2836 | case SB_OPR_N: |
| 2837 | { |
| 2838 | int imm = (sb & 0x08) ? 2 : 1; |
| 2839 | op = create_immediate_operand (imm); |
| 2840 | if (op == NULL) |
| 2841 | return -1; |
| 2842 | operands[(*n_operands)++] = op; |
| 2843 | } |
| 2844 | break; |
| 2845 | |
| 2846 | default: |
| 2847 | break; |
| 2848 | } |
| 2849 | return 0; |
| 2850 | } |
| 2851 | |
| 2852 | static enum optr |
| 2853 | psh_pul_discrim (struct mem_read_abstraction_base *mra, |
| 2854 | enum optr hint ATTRIBUTE_UNUSED) |
| 2855 | { |
| 2856 | uint8_t byte; |
| 2857 | int status = mra->read (mra, 0, 1, &byte); |
| 2858 | if (status != 0) |
| 2859 | return OP_INVALID; |
| 2860 | |
| 2861 | return (byte & 0x80) ? OP_pull: OP_push; |
| 2862 | } |
| 2863 | |
| 2864 | |
| 2865 | static int |
| 2866 | psh_pul_decode (struct mem_read_abstraction_base *mra, |
| 2867 | int *n_operands, struct operand **operand) |
| 2868 | { |
| 2869 | struct operand *op; |
| 2870 | uint8_t byte; |
| 2871 | int status = mra->read (mra, 0, 1, &byte); |
| 2872 | if (status != 0) |
| 2873 | return status; |
| 2874 | int bit; |
| 2875 | if (byte & 0x40) |
| 2876 | { |
| 2877 | if ((byte & 0x3F) == 0) |
| 2878 | { |
| 2879 | op = create_register_all16_operand (); |
| 2880 | if (op == NULL) |
| 2881 | return -1; |
| 2882 | operand[(*n_operands)++] = op; |
| 2883 | } |
| 2884 | else |
| 2885 | for (bit = 5; bit >= 0; --bit) |
| 2886 | { |
| 2887 | if (byte & (0x1 << bit)) |
| 2888 | { |
| 2889 | op = create_register_operand (oprregs2[bit]); |
| 2890 | if (op == NULL) |
| 2891 | return -1; |
| 2892 | operand[(*n_operands)++] = op; |
| 2893 | } |
| 2894 | } |
| 2895 | } |
| 2896 | else |
| 2897 | { |
| 2898 | if ((byte & 0x3F) == 0) |
| 2899 | { |
| 2900 | op = create_register_all_operand (); |
| 2901 | if (op == NULL) |
| 2902 | return -1; |
| 2903 | operand[(*n_operands)++] = op; |
| 2904 | } |
| 2905 | else |
| 2906 | for (bit = 5; bit >= 0; --bit) |
| 2907 | { |
| 2908 | if (byte & (0x1 << bit)) |
| 2909 | { |
| 2910 | op = create_register_operand (oprregs1[bit]); |
| 2911 | if (op == NULL) |
| 2912 | return -1; |
| 2913 | operand[(*n_operands)++] = op; |
| 2914 | } |
| 2915 | } |
| 2916 | } |
| 2917 | return 0; |
| 2918 | } |
| 2919 | |
| 2920 | static enum optr |
| 2921 | bit_field_discrim (struct mem_read_abstraction_base *mra, |
| 2922 | enum optr hint ATTRIBUTE_UNUSED) |
| 2923 | { |
| 2924 | int status; |
| 2925 | bfd_byte bb; |
| 2926 | status = mra->read (mra, 0, 1, &bb); |
| 2927 | if (status != 0) |
| 2928 | return OP_INVALID; |
| 2929 | |
| 2930 | return (bb & 0x80) ? OP_bfins : OP_bfext; |
| 2931 | } |
| 2932 | |
| 2933 | static int |
| 2934 | bit_field_decode (struct mem_read_abstraction_base *mra, |
| 2935 | int *n_operands, struct operand **operands) |
| 2936 | { |
| 2937 | struct operand *op; |
| 2938 | int status; |
| 2939 | |
| 2940 | bfd_byte byte2; |
| 2941 | status = mra->read (mra, -1, 1, &byte2); |
| 2942 | if (status != 0) |
| 2943 | return status; |
| 2944 | |
| 2945 | bfd_byte bb; |
| 2946 | status = mra->read (mra, 0, 1, &bb); |
| 2947 | if (status != 0) |
| 2948 | return status; |
| 2949 | |
| 2950 | enum BB_MODE mode = -1; |
| 2951 | size_t i; |
| 2952 | const struct opr_bb *bbs = 0; |
| 2953 | for (i = 0; i < sizeof (bb_modes) / sizeof (bb_modes[0]); ++i) |
| 2954 | { |
| 2955 | bbs = bb_modes + i; |
| 2956 | if ((bb & bbs->mask) == bbs->value) |
| 2957 | { |
| 2958 | mode = bbs->mode; |
| 2959 | break; |
| 2960 | } |
| 2961 | } |
| 2962 | int reg1 = byte2 & 0x07; |
| 2963 | /* First operand */ |
| 2964 | switch (mode) |
| 2965 | { |
| 2966 | case BB_REG_REG_REG: |
| 2967 | case BB_REG_REG_IMM: |
| 2968 | case BB_REG_OPR_REG: |
| 2969 | case BB_REG_OPR_IMM: |
| 2970 | op = create_register_operand (reg1); |
| 2971 | if (op == NULL) |
| 2972 | return -1; |
| 2973 | operands[(*n_operands)++] = op; |
| 2974 | break; |
| 2975 | case BB_OPR_REG_REG: |
| 2976 | op = x_opr_decode_with_size (mra, 1, (bb >> 2) & 0x03); |
| 2977 | if (op == NULL) |
| 2978 | return -1; |
| 2979 | operands[(*n_operands)++] = op; |
| 2980 | break; |
| 2981 | case BB_OPR_REG_IMM: |
| 2982 | op = x_opr_decode_with_size (mra, 2, (bb >> 2) & 0x03); |
| 2983 | if (op == NULL) |
| 2984 | return -1; |
| 2985 | operands[(*n_operands)++] = op; |
| 2986 | break; |
| 2987 | } |
| 2988 | |
| 2989 | /* Second operand */ |
| 2990 | switch (mode) |
| 2991 | { |
| 2992 | case BB_REG_REG_REG: |
| 2993 | case BB_REG_REG_IMM: |
| 2994 | { |
| 2995 | int reg_src = (bb >> 2) & 0x07; |
| 2996 | op = create_register_operand (reg_src); |
| 2997 | if (op == NULL) |
| 2998 | return -1; |
| 2999 | operands[(*n_operands)++] = op; |
| 3000 | } |
| 3001 | break; |
| 3002 | case BB_OPR_REG_REG: |
| 3003 | case BB_OPR_REG_IMM: |
| 3004 | { |
| 3005 | int reg_src = (byte2 & 0x07); |
| 3006 | op = create_register_operand (reg_src); |
| 3007 | if (op == NULL) |
| 3008 | return -1; |
| 3009 | operands[(*n_operands)++] = op; |
| 3010 | } |
| 3011 | break; |
| 3012 | case BB_REG_OPR_REG: |
| 3013 | op = x_opr_decode_with_size (mra, 1, (bb >> 2) & 0x03); |
| 3014 | if (op == NULL) |
| 3015 | return -1; |
| 3016 | operands[(*n_operands)++] = op; |
| 3017 | break; |
| 3018 | case BB_REG_OPR_IMM: |
| 3019 | op = x_opr_decode_with_size (mra, 2, (bb >> 2) & 0x03); |
| 3020 | if (op == NULL) |
| 3021 | return -1; |
| 3022 | operands[(*n_operands)++] = op; |
| 3023 | break; |
| 3024 | } |
| 3025 | |
| 3026 | /* Third operand */ |
| 3027 | switch (mode) |
| 3028 | { |
| 3029 | case BB_REG_REG_REG: |
| 3030 | case BB_OPR_REG_REG: |
| 3031 | case BB_REG_OPR_REG: |
| 3032 | { |
| 3033 | int reg_parm = bb & 0x03; |
| 3034 | op = create_register_operand (reg_parm); |
| 3035 | if (op == NULL) |
| 3036 | return -1; |
| 3037 | operands[(*n_operands)++] = op; |
| 3038 | } |
| 3039 | break; |
| 3040 | case BB_REG_REG_IMM: |
| 3041 | case BB_OPR_REG_IMM: |
| 3042 | case BB_REG_OPR_IMM: |
| 3043 | { |
| 3044 | bfd_byte i1; |
| 3045 | status = mra->read (mra, 1, 1, &i1); |
| 3046 | if (status < 0) |
| 3047 | return status; |
| 3048 | int offset = i1 & 0x1f; |
| 3049 | int width = bb & 0x03; |
| 3050 | width <<= 3; |
| 3051 | width |= i1 >> 5; |
| 3052 | op = create_bitfield_operand (width, offset); |
| 3053 | if (op == NULL) |
| 3054 | return -1; |
| 3055 | operands[(*n_operands)++] = op; |
| 3056 | } |
| 3057 | break; |
| 3058 | } |
| 3059 | return 0; |
| 3060 | } |
| 3061 | |
| 3062 | |
| 3063 | /* Decode the next instruction at MRA, according to OPC. |
| 3064 | The operation to be performed is returned. |
| 3065 | The number of operands, will be placed in N_OPERANDS. |
| 3066 | The operands themselved into OPERANDS. */ |
| 3067 | static enum optr |
| 3068 | decode_operation (const struct opcode *opc, |
| 3069 | struct mem_read_abstraction_base *mra, |
| 3070 | int *n_operands, struct operand **operands) |
| 3071 | { |
| 3072 | enum optr op = opc->operator; |
| 3073 | if (opc->discriminator) |
| 3074 | { |
| 3075 | op = opc->discriminator (mra, opc->operator); |
| 3076 | if (op == OP_INVALID) |
| 3077 | return op; |
| 3078 | } |
| 3079 | |
| 3080 | if (opc->operands) |
| 3081 | if (opc->operands (mra, n_operands, operands) < 0) |
| 3082 | return OP_INVALID; |
| 3083 | |
| 3084 | if (opc->operands2) |
| 3085 | if (opc->operands2 (mra, n_operands, operands) < 0) |
| 3086 | return OP_INVALID; |
| 3087 | |
| 3088 | return op; |
| 3089 | } |
| 3090 | |
| 3091 | int |
| 3092 | decode_s12z (enum optr *myoperator, short *osize, |
| 3093 | int *n_operands, struct operand **operands, |
| 3094 | struct mem_read_abstraction_base *mra) |
| 3095 | { |
| 3096 | int n_bytes = 0; |
| 3097 | bfd_byte byte; |
| 3098 | |
| 3099 | int status = mra->read (mra, 0, 1, &byte); |
| 3100 | if (status < 0) |
| 3101 | return status; |
| 3102 | |
| 3103 | mra->advance (mra); |
| 3104 | |
| 3105 | const struct opcode *opc = page1 + byte; |
| 3106 | if (byte == PAGE2_PREBYTE) |
| 3107 | { |
| 3108 | /* Opcodes in page2 have an additional byte */ |
| 3109 | n_bytes++; |
| 3110 | |
| 3111 | bfd_byte byte2; |
| 3112 | status = mra->read (mra, 0, 1, &byte2); |
| 3113 | if (status < 0) |
| 3114 | return status; |
| 3115 | mra->advance (mra); |
| 3116 | opc = page2 + byte2; |
| 3117 | } |
| 3118 | *myoperator = decode_operation (opc, mra, n_operands, operands); |
| 3119 | *osize = opc->osize; |
| 3120 | |
| 3121 | /* Return the number of bytes in the instruction. */ |
| 3122 | if (*myoperator != OP_INVALID && opc->insn_bytes) |
| 3123 | { |
| 3124 | int n = opc->insn_bytes (mra); |
| 3125 | if (n < 0) |
| 3126 | return n; |
| 3127 | n_bytes += n; |
| 3128 | } |
| 3129 | else |
| 3130 | n_bytes += 1; |
| 3131 | |
| 3132 | return n_bytes; |
| 3133 | } |
| 3134 | |