Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt

   1 Samsung Exynos SoC Low Power Audio Subsystem (LPASS)
   2
   3 Required properties:
   4
   5  - compatible           : "samsung,exynos5433-lpass"
   6  - reg                  : should contain the LPASS top SFR region location
   7                           and size
   8  - samsung,pmu-syscon   : the phandle to the Power Management Unit node
   9  - #address-cells       : should be 1
  10  - #size-cells          : should be 1
  11  - ranges               : must be present
  12
  13 Each IP block of the Low Power Audio Subsystem should be specified as
  14 an optional sub-node. For "samsung,exynos5433-lpass" compatible this includes:
  15 UART, SLIMBUS, PCM, I2S, DMAC, Timers 0...4, VIC, WDT 0...1 devices.
  16
  17 Bindings of the sub-nodes are described in:
  18   ../serial/samsung_uart.txt
  19   ../sound/samsung-i2s.txt
  20   ../dma/arm-pl330.txt
  21
  22
  23 Example:
  24
  25 audio-subsystem {
  26         compatible = "samsung,exynos5433-lpass";
  27         reg = <0x11400000 0x100>, <0x11500000 0x08>;
  28         samsung,pmu-syscon = <&pmu_system_controller>;
  29         #address-cells = <1>;
  30         #size-cells = <1>;
  31         ranges;
  32
  33         adma: adma@11420000 {
  34                 compatible = "arm,pl330", "arm,primecell";
  35                 reg = <0x11420000 0x1000>;
  36                 interrupts = <0 73 0>;
  37                 clocks = <&cmu_aud CLK_ACLK_DMAC>;
  38                 clock-names = "apb_pclk";
  39                 #dma-cells = <1>;
  40                 #dma-channels = <8>;
  41                 #dma-requests = <32>;
  42         };
  43
  44         i2s0: i2s0@11440000 {
  45                 compatible = "samsung,exynos7-i2s";
  46                 reg = <0x11440000 0x100>;
  47                 dmas = <&adma 0 &adma 2>;
  48                 dma-names = "tx", "rx";
  49                 interrupts = <0 70 0>;
  50                 clocks = <&cmu_aud CLK_PCLK_AUD_I2S>,
  51                          <&cmu_aud CLK_SCLK_AUD_I2S>,
  52                          <&cmu_aud CLK_SCLK_I2S_BCLK>;
  53                 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
  54                 pinctrl-names = "default";
  55                 pinctrl-0 = <&i2s0_bus>;
  56                 status = "disabled";
  57         };
  58
  59         serial_3: serial@11460000 {
  60                 compatible = "samsung,exynos5433-uart";
  61                 reg = <0x11460000 0x100>;
  62                 interrupts = <0 67 0>;
  63                 clocks = <&cmu_aud CLK_PCLK_AUD_UART>,
  64                          <&cmu_aud CLK_SCLK_AUD_UART>;
  65                 clock-names = "uart", "clk_uart_baud0";
  66                 pinctrl-names = "default";
  67                 pinctrl-0 = <&uart_aud_bus>;
  68                 status = "disabled";
  69         };
  70  };