Documentation/devicetree/bindings/mmc/amlogic,meson-gxbb.txt

   1 Amlogic SD / eMMC controller for S905/GXBB family SoCs
   2
   3 The MMC 5.1 compliant host controller on Amlogic provides the
   4 interface for SD, eMMC and SDIO devices.
   5
   6 This file documents the properties in addition to those available in
   7 the MMC core bindings, documented by mmc.txt.
   8
   9 Required properties:
  10 - compatible : contains "amlogic,meson-gxbb-mmc"
  11 - clocks     : A list of phandle + clock-specifier pairs for the clocks listed in clock-names.
  12 - clock-names: Should contain the following:
  13         "core" - Main peripheral bus clock
  14         "clkin0" - Parent clock of internal mux
  15         "clkin1" - Other parent clock of internal mux
  16   The driver has an interal mux clock which switches between clkin0 and clkin1 depending on the
  17   clock rate requested by the MMC core.
  18
  19 Example:
  20
  21         sd_emmc_a: mmc@70000 {
  22                 compatible = "amlogic,meson-gxbb-mmc";
  23                 reg = <0x0 0x70000 0x0 0x2000>;
  24                 interrupts = < GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
  25                 clocks = <&clkc CLKID_SD_EMMC_A>, <&xtal>, <&clkc CLKID_FCLK_DIV2>;
  26                 clock-names = "core", "clkin0", "clkin1";
  27                 pinctrl-0 = <&emmc_pins>;
  28         };
  29