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[deliverable/linux.git] / Documentation / devicetree / bindings / pinctrl / renesas,pfc-pinctrl.txt
1 * Renesas Pin Function Controller (GPIO and Pin Mux/Config)
2
3 The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH73A0,
4 R8A73A4 and R8A7740 it also acts as a GPIO controller.
5
6
7 Pin Control
8 -----------
9
10 Required Properties:
11
12 - compatible: should be one of the following.
13 - "renesas,pfc-emev2": for EMEV2 (EMMA Mobile EV2) compatible pin-controller.
14 - "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller.
15 - "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller.
16 - "renesas,pfc-r8a7778": for R8A7778 (R-Mobile M1) compatible pin-controller.
17 - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.
18 - "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.
19 - "renesas,pfc-r8a7791": for R8A7791 (R-Car M2-W) compatible pin-controller.
20 - "renesas,pfc-r8a7792": for R8A7792 (R-Car V2H) compatible pin-controller.
21 - "renesas,pfc-r8a7793": for R8A7793 (R-Car M2-N) compatible pin-controller.
22 - "renesas,pfc-r8a7794": for R8A7794 (R-Car E2) compatible pin-controller.
23 - "renesas,pfc-r8a7795": for R8A7795 (R-Car H3) compatible pin-controller.
24 - "renesas,pfc-r8a7796": for R8A7796 (R-Car M3-W) compatible pin-controller.
25 - "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller.
26
27 - reg: Base address and length of each memory resource used by the pin
28 controller hardware module.
29
30 Optional properties:
31
32 - #gpio-range-cells: Mandatory when the PFC doesn't handle GPIO, forbidden
33 otherwise. Should be 3.
34
35 - interrupts-extended: Specify the interrupts associated with external
36 IRQ pins. This property is mandatory when the PFC handles GPIOs and
37 forbidden otherwise. When specified, it must contain one interrupt per
38 external IRQ, sorted by external IRQ number.
39
40 The PFC node also acts as a container for pin configuration nodes. Please refer
41 to pinctrl-bindings.txt in this directory for the definition of the term "pin
42 configuration node" and for the common pinctrl bindings used by client devices.
43
44 Each pin configuration node represents a desired configuration for a pin, a
45 pin group, or a list of pins or pin groups. The configuration can include the
46 function to select on those pin(s) and pin configuration parameters (such as
47 pull-up and pull-down).
48
49 Pin configuration nodes contain pin configuration properties, either directly
50 or grouped in child subnodes. Both pin muxing and configuration parameters can
51 be grouped in that way and referenced as a single pin configuration node by
52 client devices.
53
54 A configuration node or subnode must reference at least one pin (through the
55 pins or pin groups properties) and contain at least a function or one
56 configuration parameter. When the function is present only pin groups can be
57 used to reference pins.
58
59 All pin configuration nodes and subnodes names are ignored. All of those nodes
60 are parsed through phandles and processed purely based on their content.
61
62 Pin Configuration Node Properties:
63
64 - pins : An array of strings, each string containing the name of a pin.
65 - groups : An array of strings, each string containing the name of a pin
66 group.
67
68 - function: A string containing the name of the function to mux to the pin
69 group(s) specified by the groups property.
70
71 Valid values for pin, group and function names can be found in the group and
72 function arrays of the PFC data file corresponding to the SoC
73 (drivers/pinctrl/sh-pfc/pfc-*.c)
74
75 The pin configuration parameters use the generic pinconf bindings defined in
76 pinctrl-bindings.txt in this directory. The supported parameters are
77 bias-disable, bias-pull-up, bias-pull-down, drive-strength and power-source. For
78 pins that have a configurable I/O voltage, the power-source value should be the
79 nominal I/O voltage in millivolts.
80
81
82 GPIO
83 ----
84
85 On SH73A0, R8A73A4 and R8A7740 the PFC node is also a GPIO controller node.
86
87 Required Properties:
88
89 - gpio-controller: Marks the device node as a gpio controller.
90
91 - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
92 cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
93 GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
94
95 The syntax of the gpio specifier used by client nodes should be the following
96 with values derived from the SoC user manual.
97
98 <[phandle of the gpio controller node]
99 [pin number within the gpio controller]
100 [flags]>
101
102 On other mach-shmobile platforms GPIO is handled by the gpio-rcar driver.
103 Please refer to Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
104 for documentation of the GPIO device tree bindings on those platforms.
105
106
107 Examples
108 --------
109
110 Example 1: SH73A0 (SH-Mobile AG5) pin controller node
111
112 pfc: pfc@e6050000 {
113 compatible = "renesas,pfc-sh73a0";
114 reg = <0xe6050000 0x8000>,
115 <0xe605801c 0x1c>;
116 gpio-controller;
117 #gpio-cells = <2>;
118 interrupts-extended =
119 <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
120 <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
121 <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
122 <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
123 <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
124 <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
125 <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
126 <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
127 };
128
129 Example 2: A GPIO LED node that references a GPIO
130
131 #include <dt-bindings/gpio/gpio.h>
132
133 leds {
134 compatible = "gpio-leds";
135 led1 {
136 gpios = <&pfc 20 GPIO_ACTIVE_LOW>;
137 };
138 };
139
140 Example 3: KZM-A9-GT (SH-Mobile AG5) default pin state hog and pin control maps
141 for the MMCIF and SCIFA4 devices
142
143 &pfc {
144 pinctrl-0 = <&scifa4_pins>;
145 pinctrl-names = "default";
146
147 mmcif_pins: mmcif {
148 mux {
149 groups = "mmc0_data8_0", "mmc0_ctrl_0";
150 function = "mmc0";
151 };
152 cfg {
153 groups = "mmc0_data8_0";
154 pins = "PORT279";
155 bias-pull-up;
156 };
157 };
158
159 scifa4_pins: scifa4 {
160 groups = "scifa4_data", "scifa4_ctrl";
161 function = "scifa4";
162 };
163 };
164
165 Example 4: KZM-A9-GT (SH-Mobile AG5) default pin state for the MMCIF device
166
167 &mmcif {
168 pinctrl-0 = <&mmcif_pins>;
169 pinctrl-names = "default";
170
171 bus-width = <8>;
172 vmmc-supply = <&reg_1p8v>;
173 status = "okay";
174 };
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