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selinux: fix overflow and 0 length allocations
[deliverable/linux.git] / arch / arm / boot / dts / am4372.dtsi
1 /*
2 * Device Tree Source for AM4372 SoC
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13
14 #include "skeleton.dtsi"
15
16 / {
17 compatible = "ti,am4372", "ti,am43";
18 interrupt-parent = <&wakeupgen>;
19
20
21 aliases {
22 i2c0 = &i2c0;
23 i2c1 = &i2c1;
24 i2c2 = &i2c2;
25 serial0 = &uart0;
26 serial1 = &uart1;
27 serial2 = &uart2;
28 serial3 = &uart3;
29 serial4 = &uart4;
30 serial5 = &uart5;
31 ethernet0 = &cpsw_emac0;
32 ethernet1 = &cpsw_emac1;
33 spi0 = &qspi;
34 };
35
36 cpus {
37 #address-cells = <1>;
38 #size-cells = <0>;
39 cpu: cpu@0 {
40 compatible = "arm,cortex-a9";
41 device_type = "cpu";
42 reg = <0>;
43
44 clocks = <&dpll_mpu_ck>;
45 clock-names = "cpu";
46
47 operating-points-v2 = <&cpu0_opp_table>;
48 ti,syscon-efuse = <&scm_conf 0x610 0x3f 0>;
49 ti,syscon-rev = <&scm_conf 0x600>;
50
51 clock-latency = <300000>; /* From omap-cpufreq driver */
52 };
53 };
54
55 cpu0_opp_table: opp_table0 {
56 compatible = "operating-points-v2";
57
58 opp50@300000000 {
59 opp-hz = /bits/ 64 <300000000>;
60 opp-microvolt = <950000 931000 969000>;
61 opp-supported-hw = <0xFF 0x01>;
62 opp-suspend;
63 };
64
65 opp100@600000000 {
66 opp-hz = /bits/ 64 <600000000>;
67 opp-microvolt = <1100000 1078000 1122000>;
68 opp-supported-hw = <0xFF 0x04>;
69 };
70
71 opp120@720000000 {
72 opp-hz = /bits/ 64 <720000000>;
73 opp-microvolt = <1200000 1176000 1224000>;
74 opp-supported-hw = <0xFF 0x08>;
75 };
76
77 oppturbo@800000000 {
78 opp-hz = /bits/ 64 <800000000>;
79 opp-microvolt = <1260000 1234800 1285200>;
80 opp-supported-hw = <0xFF 0x10>;
81 };
82
83 oppnitro@1000000000 {
84 opp-hz = /bits/ 64 <1000000000>;
85 opp-microvolt = <1325000 1298500 1351500>;
86 opp-supported-hw = <0xFF 0x20>;
87 };
88 };
89
90 gic: interrupt-controller@48241000 {
91 compatible = "arm,cortex-a9-gic";
92 interrupt-controller;
93 #interrupt-cells = <3>;
94 reg = <0x48241000 0x1000>,
95 <0x48240100 0x0100>;
96 interrupt-parent = <&gic>;
97 };
98
99 wakeupgen: interrupt-controller@48281000 {
100 compatible = "ti,omap4-wugen-mpu";
101 interrupt-controller;
102 #interrupt-cells = <3>;
103 reg = <0x48281000 0x1000>;
104 interrupt-parent = <&gic>;
105 };
106
107 scu: scu@48240000 {
108 compatible = "arm,cortex-a9-scu";
109 reg = <0x48240000 0x100>;
110 };
111
112 global_timer: timer@48240200 {
113 compatible = "arm,cortex-a9-global-timer";
114 reg = <0x48240200 0x100>;
115 interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
116 interrupt-parent = <&gic>;
117 clocks = <&mpu_periphclk>;
118 };
119
120 local_timer: timer@48240600 {
121 compatible = "arm,cortex-a9-twd-timer";
122 reg = <0x48240600 0x100>;
123 interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
124 interrupt-parent = <&gic>;
125 clocks = <&mpu_periphclk>;
126 };
127
128 l2-cache-controller@48242000 {
129 compatible = "arm,pl310-cache";
130 reg = <0x48242000 0x1000>;
131 cache-unified;
132 cache-level = <2>;
133 };
134
135 ocp {
136 compatible = "ti,am4372-l3-noc", "simple-bus";
137 #address-cells = <1>;
138 #size-cells = <1>;
139 ranges;
140 ti,hwmods = "l3_main";
141 reg = <0x44000000 0x400000
142 0x44800000 0x400000>;
143 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
144 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
145
146 l4_wkup: l4_wkup@44c00000 {
147 compatible = "ti,am4-l4-wkup", "simple-bus";
148 #address-cells = <1>;
149 #size-cells = <1>;
150 ranges = <0 0x44c00000 0x287000>;
151
152 wkup_m3: wkup_m3@100000 {
153 compatible = "ti,am4372-wkup-m3";
154 reg = <0x100000 0x4000>,
155 <0x180000 0x2000>;
156 reg-names = "umem", "dmem";
157 ti,hwmods = "wkup_m3";
158 ti,pm-firmware = "am335x-pm-firmware.elf";
159 };
160
161 prcm: prcm@1f0000 {
162 compatible = "ti,am4-prcm";
163 reg = <0x1f0000 0x11000>;
164 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
165
166 prcm_clocks: clocks {
167 #address-cells = <1>;
168 #size-cells = <0>;
169 };
170
171 prcm_clockdomains: clockdomains {
172 };
173 };
174
175 scm: scm@210000 {
176 compatible = "ti,am4-scm", "simple-bus";
177 reg = <0x210000 0x4000>;
178 #address-cells = <1>;
179 #size-cells = <1>;
180 ranges = <0 0x210000 0x4000>;
181
182 am43xx_pinmux: pinmux@800 {
183 compatible = "ti,am437-padconf",
184 "pinctrl-single";
185 reg = <0x800 0x31c>;
186 #address-cells = <1>;
187 #size-cells = <0>;
188 #interrupt-cells = <1>;
189 interrupt-controller;
190 pinctrl-single,register-width = <32>;
191 pinctrl-single,function-mask = <0xffffffff>;
192 };
193
194 scm_conf: scm_conf@0 {
195 compatible = "syscon";
196 reg = <0x0 0x800>;
197 #address-cells = <1>;
198 #size-cells = <1>;
199
200 scm_clocks: clocks {
201 #address-cells = <1>;
202 #size-cells = <0>;
203 };
204 };
205
206 wkup_m3_ipc: wkup_m3_ipc@1324 {
207 compatible = "ti,am4372-wkup-m3-ipc";
208 reg = <0x1324 0x44>;
209 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
210 ti,rproc = <&wkup_m3>;
211 mboxes = <&mailbox &mbox_wkupm3>;
212 };
213
214 edma_xbar: dma-router@f90 {
215 compatible = "ti,am335x-edma-crossbar";
216 reg = <0xf90 0x40>;
217 #dma-cells = <3>;
218 dma-requests = <64>;
219 dma-masters = <&edma>;
220 };
221
222 scm_clockdomains: clockdomains {
223 };
224 };
225 };
226
227 emif: emif@4c000000 {
228 compatible = "ti,emif-am4372";
229 reg = <0x4c000000 0x1000000>;
230 ti,hwmods = "emif";
231 };
232
233 edma: edma@49000000 {
234 compatible = "ti,edma3-tpcc";
235 ti,hwmods = "tpcc";
236 reg = <0x49000000 0x10000>;
237 reg-names = "edma3_cc";
238 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
239 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
240 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
241 interrupt-names = "edma3_ccint", "edma3_mperr",
242 "edma3_ccerrint";
243 dma-requests = <64>;
244 #dma-cells = <2>;
245
246 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
247 <&edma_tptc2 0>;
248
249 ti,edma-memcpy-channels = <58 59>;
250 };
251
252 edma_tptc0: tptc@49800000 {
253 compatible = "ti,edma3-tptc";
254 ti,hwmods = "tptc0";
255 reg = <0x49800000 0x100000>;
256 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
257 interrupt-names = "edma3_tcerrint";
258 };
259
260 edma_tptc1: tptc@49900000 {
261 compatible = "ti,edma3-tptc";
262 ti,hwmods = "tptc1";
263 reg = <0x49900000 0x100000>;
264 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
265 interrupt-names = "edma3_tcerrint";
266 };
267
268 edma_tptc2: tptc@49a00000 {
269 compatible = "ti,edma3-tptc";
270 ti,hwmods = "tptc2";
271 reg = <0x49a00000 0x100000>;
272 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
273 interrupt-names = "edma3_tcerrint";
274 };
275
276 uart0: serial@44e09000 {
277 compatible = "ti,am4372-uart","ti,omap2-uart";
278 reg = <0x44e09000 0x2000>;
279 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
280 ti,hwmods = "uart1";
281 };
282
283 uart1: serial@48022000 {
284 compatible = "ti,am4372-uart","ti,omap2-uart";
285 reg = <0x48022000 0x2000>;
286 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
287 ti,hwmods = "uart2";
288 status = "disabled";
289 };
290
291 uart2: serial@48024000 {
292 compatible = "ti,am4372-uart","ti,omap2-uart";
293 reg = <0x48024000 0x2000>;
294 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
295 ti,hwmods = "uart3";
296 status = "disabled";
297 };
298
299 uart3: serial@481a6000 {
300 compatible = "ti,am4372-uart","ti,omap2-uart";
301 reg = <0x481a6000 0x2000>;
302 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
303 ti,hwmods = "uart4";
304 status = "disabled";
305 };
306
307 uart4: serial@481a8000 {
308 compatible = "ti,am4372-uart","ti,omap2-uart";
309 reg = <0x481a8000 0x2000>;
310 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
311 ti,hwmods = "uart5";
312 status = "disabled";
313 };
314
315 uart5: serial@481aa000 {
316 compatible = "ti,am4372-uart","ti,omap2-uart";
317 reg = <0x481aa000 0x2000>;
318 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
319 ti,hwmods = "uart6";
320 status = "disabled";
321 };
322
323 mailbox: mailbox@480C8000 {
324 compatible = "ti,omap4-mailbox";
325 reg = <0x480C8000 0x200>;
326 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
327 ti,hwmods = "mailbox";
328 #mbox-cells = <1>;
329 ti,mbox-num-users = <4>;
330 ti,mbox-num-fifos = <8>;
331 mbox_wkupm3: wkup_m3 {
332 ti,mbox-send-noirq;
333 ti,mbox-tx = <0 0 0>;
334 ti,mbox-rx = <0 0 3>;
335 };
336 };
337
338 timer1: timer@44e31000 {
339 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
340 reg = <0x44e31000 0x400>;
341 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
342 ti,timer-alwon;
343 ti,hwmods = "timer1";
344 };
345
346 timer2: timer@48040000 {
347 compatible = "ti,am4372-timer","ti,am335x-timer";
348 reg = <0x48040000 0x400>;
349 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
350 ti,hwmods = "timer2";
351 };
352
353 timer3: timer@48042000 {
354 compatible = "ti,am4372-timer","ti,am335x-timer";
355 reg = <0x48042000 0x400>;
356 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
357 ti,hwmods = "timer3";
358 status = "disabled";
359 };
360
361 timer4: timer@48044000 {
362 compatible = "ti,am4372-timer","ti,am335x-timer";
363 reg = <0x48044000 0x400>;
364 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
365 ti,timer-pwm;
366 ti,hwmods = "timer4";
367 status = "disabled";
368 };
369
370 timer5: timer@48046000 {
371 compatible = "ti,am4372-timer","ti,am335x-timer";
372 reg = <0x48046000 0x400>;
373 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
374 ti,timer-pwm;
375 ti,hwmods = "timer5";
376 status = "disabled";
377 };
378
379 timer6: timer@48048000 {
380 compatible = "ti,am4372-timer","ti,am335x-timer";
381 reg = <0x48048000 0x400>;
382 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
383 ti,timer-pwm;
384 ti,hwmods = "timer6";
385 status = "disabled";
386 };
387
388 timer7: timer@4804a000 {
389 compatible = "ti,am4372-timer","ti,am335x-timer";
390 reg = <0x4804a000 0x400>;
391 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
392 ti,timer-pwm;
393 ti,hwmods = "timer7";
394 status = "disabled";
395 };
396
397 timer8: timer@481c1000 {
398 compatible = "ti,am4372-timer","ti,am335x-timer";
399 reg = <0x481c1000 0x400>;
400 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
401 ti,hwmods = "timer8";
402 status = "disabled";
403 };
404
405 timer9: timer@4833d000 {
406 compatible = "ti,am4372-timer","ti,am335x-timer";
407 reg = <0x4833d000 0x400>;
408 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
409 ti,hwmods = "timer9";
410 status = "disabled";
411 };
412
413 timer10: timer@4833f000 {
414 compatible = "ti,am4372-timer","ti,am335x-timer";
415 reg = <0x4833f000 0x400>;
416 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
417 ti,hwmods = "timer10";
418 status = "disabled";
419 };
420
421 timer11: timer@48341000 {
422 compatible = "ti,am4372-timer","ti,am335x-timer";
423 reg = <0x48341000 0x400>;
424 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
425 ti,hwmods = "timer11";
426 status = "disabled";
427 };
428
429 counter32k: counter@44e86000 {
430 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
431 reg = <0x44e86000 0x40>;
432 ti,hwmods = "counter_32k";
433 };
434
435 rtc: rtc@44e3e000 {
436 compatible = "ti,am4372-rtc", "ti,am3352-rtc",
437 "ti,da830-rtc";
438 reg = <0x44e3e000 0x1000>;
439 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
440 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
441 ti,hwmods = "rtc";
442 clocks = <&clk_32768_ck>;
443 clock-names = "int-clk";
444 status = "disabled";
445 };
446
447 wdt: wdt@44e35000 {
448 compatible = "ti,am4372-wdt","ti,omap3-wdt";
449 reg = <0x44e35000 0x1000>;
450 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
451 ti,hwmods = "wd_timer2";
452 };
453
454 gpio0: gpio@44e07000 {
455 compatible = "ti,am4372-gpio","ti,omap4-gpio";
456 reg = <0x44e07000 0x1000>;
457 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
458 gpio-controller;
459 #gpio-cells = <2>;
460 interrupt-controller;
461 #interrupt-cells = <2>;
462 ti,hwmods = "gpio1";
463 status = "disabled";
464 };
465
466 gpio1: gpio@4804c000 {
467 compatible = "ti,am4372-gpio","ti,omap4-gpio";
468 reg = <0x4804c000 0x1000>;
469 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
470 gpio-controller;
471 #gpio-cells = <2>;
472 interrupt-controller;
473 #interrupt-cells = <2>;
474 ti,hwmods = "gpio2";
475 status = "disabled";
476 };
477
478 gpio2: gpio@481ac000 {
479 compatible = "ti,am4372-gpio","ti,omap4-gpio";
480 reg = <0x481ac000 0x1000>;
481 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
482 gpio-controller;
483 #gpio-cells = <2>;
484 interrupt-controller;
485 #interrupt-cells = <2>;
486 ti,hwmods = "gpio3";
487 status = "disabled";
488 };
489
490 gpio3: gpio@481ae000 {
491 compatible = "ti,am4372-gpio","ti,omap4-gpio";
492 reg = <0x481ae000 0x1000>;
493 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
494 gpio-controller;
495 #gpio-cells = <2>;
496 interrupt-controller;
497 #interrupt-cells = <2>;
498 ti,hwmods = "gpio4";
499 status = "disabled";
500 };
501
502 gpio4: gpio@48320000 {
503 compatible = "ti,am4372-gpio","ti,omap4-gpio";
504 reg = <0x48320000 0x1000>;
505 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
506 gpio-controller;
507 #gpio-cells = <2>;
508 interrupt-controller;
509 #interrupt-cells = <2>;
510 ti,hwmods = "gpio5";
511 status = "disabled";
512 };
513
514 gpio5: gpio@48322000 {
515 compatible = "ti,am4372-gpio","ti,omap4-gpio";
516 reg = <0x48322000 0x1000>;
517 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
518 gpio-controller;
519 #gpio-cells = <2>;
520 interrupt-controller;
521 #interrupt-cells = <2>;
522 ti,hwmods = "gpio6";
523 status = "disabled";
524 };
525
526 hwspinlock: spinlock@480ca000 {
527 compatible = "ti,omap4-hwspinlock";
528 reg = <0x480ca000 0x1000>;
529 ti,hwmods = "spinlock";
530 #hwlock-cells = <1>;
531 };
532
533 i2c0: i2c@44e0b000 {
534 compatible = "ti,am4372-i2c","ti,omap4-i2c";
535 reg = <0x44e0b000 0x1000>;
536 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
537 ti,hwmods = "i2c1";
538 #address-cells = <1>;
539 #size-cells = <0>;
540 status = "disabled";
541 };
542
543 i2c1: i2c@4802a000 {
544 compatible = "ti,am4372-i2c","ti,omap4-i2c";
545 reg = <0x4802a000 0x1000>;
546 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
547 ti,hwmods = "i2c2";
548 #address-cells = <1>;
549 #size-cells = <0>;
550 status = "disabled";
551 };
552
553 i2c2: i2c@4819c000 {
554 compatible = "ti,am4372-i2c","ti,omap4-i2c";
555 reg = <0x4819c000 0x1000>;
556 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
557 ti,hwmods = "i2c3";
558 #address-cells = <1>;
559 #size-cells = <0>;
560 status = "disabled";
561 };
562
563 spi0: spi@48030000 {
564 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
565 reg = <0x48030000 0x400>;
566 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
567 ti,hwmods = "spi0";
568 #address-cells = <1>;
569 #size-cells = <0>;
570 status = "disabled";
571 };
572
573 mmc1: mmc@48060000 {
574 compatible = "ti,omap4-hsmmc";
575 reg = <0x48060000 0x1000>;
576 ti,hwmods = "mmc1";
577 ti,dual-volt;
578 ti,needs-special-reset;
579 dmas = <&edma 24 0>,
580 <&edma 25 0>;
581 dma-names = "tx", "rx";
582 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
583 status = "disabled";
584 };
585
586 mmc2: mmc@481d8000 {
587 compatible = "ti,omap4-hsmmc";
588 reg = <0x481d8000 0x1000>;
589 ti,hwmods = "mmc2";
590 ti,needs-special-reset;
591 dmas = <&edma 2 0>,
592 <&edma 3 0>;
593 dma-names = "tx", "rx";
594 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
595 status = "disabled";
596 };
597
598 mmc3: mmc@47810000 {
599 compatible = "ti,omap4-hsmmc";
600 reg = <0x47810000 0x1000>;
601 ti,hwmods = "mmc3";
602 ti,needs-special-reset;
603 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
604 status = "disabled";
605 };
606
607 spi1: spi@481a0000 {
608 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
609 reg = <0x481a0000 0x400>;
610 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
611 ti,hwmods = "spi1";
612 #address-cells = <1>;
613 #size-cells = <0>;
614 status = "disabled";
615 };
616
617 spi2: spi@481a2000 {
618 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
619 reg = <0x481a2000 0x400>;
620 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
621 ti,hwmods = "spi2";
622 #address-cells = <1>;
623 #size-cells = <0>;
624 status = "disabled";
625 };
626
627 spi3: spi@481a4000 {
628 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
629 reg = <0x481a4000 0x400>;
630 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
631 ti,hwmods = "spi3";
632 #address-cells = <1>;
633 #size-cells = <0>;
634 status = "disabled";
635 };
636
637 spi4: spi@48345000 {
638 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
639 reg = <0x48345000 0x400>;
640 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
641 ti,hwmods = "spi4";
642 #address-cells = <1>;
643 #size-cells = <0>;
644 status = "disabled";
645 };
646
647 mac: ethernet@4a100000 {
648 compatible = "ti,am4372-cpsw","ti,cpsw";
649 reg = <0x4a100000 0x800
650 0x4a101200 0x100>;
651 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
652 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
653 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
654 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
655 #address-cells = <1>;
656 #size-cells = <1>;
657 ti,hwmods = "cpgmac0";
658 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>,
659 <&dpll_clksel_mac_clk>;
660 clock-names = "fck", "cpts", "50mclk";
661 assigned-clocks = <&dpll_clksel_mac_clk>;
662 assigned-clock-rates = <50000000>;
663 status = "disabled";
664 cpdma_channels = <8>;
665 ale_entries = <1024>;
666 bd_ram_size = <0x2000>;
667 no_bd_ram = <0>;
668 mac_control = <0x20>;
669 slaves = <2>;
670 active_slave = <0>;
671 cpts_clock_mult = <0x80000000>;
672 cpts_clock_shift = <29>;
673 ranges;
674 syscon = <&scm_conf>;
675
676 davinci_mdio: mdio@4a101000 {
677 compatible = "ti,am4372-mdio","ti,cpsw-mdio","ti,davinci_mdio";
678 reg = <0x4a101000 0x100>;
679 #address-cells = <1>;
680 #size-cells = <0>;
681 ti,hwmods = "davinci_mdio";
682 bus_freq = <1000000>;
683 status = "disabled";
684 };
685
686 cpsw_emac0: slave@4a100200 {
687 /* Filled in by U-Boot */
688 mac-address = [ 00 00 00 00 00 00 ];
689 };
690
691 cpsw_emac1: slave@4a100300 {
692 /* Filled in by U-Boot */
693 mac-address = [ 00 00 00 00 00 00 ];
694 };
695
696 phy_sel: cpsw-phy-sel@44e10650 {
697 compatible = "ti,am43xx-cpsw-phy-sel";
698 reg= <0x44e10650 0x4>;
699 reg-names = "gmii-sel";
700 };
701 };
702
703 epwmss0: epwmss@48300000 {
704 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
705 reg = <0x48300000 0x10>;
706 #address-cells = <1>;
707 #size-cells = <1>;
708 ranges;
709 ti,hwmods = "epwmss0";
710 status = "disabled";
711
712 ecap0: ecap@48300100 {
713 compatible = "ti,am4372-ecap",
714 "ti,am3352-ecap",
715 "ti,am33xx-ecap";
716 #pwm-cells = <3>;
717 reg = <0x48300100 0x80>;
718 clocks = <&l4ls_gclk>;
719 clock-names = "fck";
720 status = "disabled";
721 };
722
723 ehrpwm0: pwm@48300200 {
724 compatible = "ti,am4372-ehrpwm",
725 "ti,am3352-ehrpwm",
726 "ti,am33xx-ehrpwm";
727 #pwm-cells = <3>;
728 reg = <0x48300200 0x80>;
729 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
730 clock-names = "tbclk", "fck";
731 status = "disabled";
732 };
733 };
734
735 epwmss1: epwmss@48302000 {
736 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
737 reg = <0x48302000 0x10>;
738 #address-cells = <1>;
739 #size-cells = <1>;
740 ranges;
741 ti,hwmods = "epwmss1";
742 status = "disabled";
743
744 ecap1: ecap@48302100 {
745 compatible = "ti,am4372-ecap",
746 "ti,am3352-ecap",
747 "ti,am33xx-ecap";
748 #pwm-cells = <3>;
749 reg = <0x48302100 0x80>;
750 clocks = <&l4ls_gclk>;
751 clock-names = "fck";
752 status = "disabled";
753 };
754
755 ehrpwm1: pwm@48302200 {
756 compatible = "ti,am4372-ehrpwm",
757 "ti,am3352-ehrpwm",
758 "ti,am33xx-ehrpwm";
759 #pwm-cells = <3>;
760 reg = <0x48302200 0x80>;
761 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
762 clock-names = "tbclk", "fck";
763 status = "disabled";
764 };
765 };
766
767 epwmss2: epwmss@48304000 {
768 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
769 reg = <0x48304000 0x10>;
770 #address-cells = <1>;
771 #size-cells = <1>;
772 ranges;
773 ti,hwmods = "epwmss2";
774 status = "disabled";
775
776 ecap2: ecap@48304100 {
777 compatible = "ti,am4372-ecap",
778 "ti,am3352-ecap",
779 "ti,am33xx-ecap";
780 #pwm-cells = <3>;
781 reg = <0x48304100 0x80>;
782 clocks = <&l4ls_gclk>;
783 clock-names = "fck";
784 status = "disabled";
785 };
786
787 ehrpwm2: pwm@48304200 {
788 compatible = "ti,am4372-ehrpwm",
789 "ti,am3352-ehrpwm",
790 "ti,am33xx-ehrpwm";
791 #pwm-cells = <3>;
792 reg = <0x48304200 0x80>;
793 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
794 clock-names = "tbclk", "fck";
795 status = "disabled";
796 };
797 };
798
799 epwmss3: epwmss@48306000 {
800 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
801 reg = <0x48306000 0x10>;
802 #address-cells = <1>;
803 #size-cells = <1>;
804 ranges;
805 ti,hwmods = "epwmss3";
806 status = "disabled";
807
808 ehrpwm3: pwm@48306200 {
809 compatible = "ti,am4372-ehrpwm",
810 "ti,am3352-ehrpwm",
811 "ti,am33xx-ehrpwm";
812 #pwm-cells = <3>;
813 reg = <0x48306200 0x80>;
814 clocks = <&ehrpwm3_tbclk>, <&l4ls_gclk>;
815 clock-names = "tbclk", "fck";
816 status = "disabled";
817 };
818 };
819
820 epwmss4: epwmss@48308000 {
821 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
822 reg = <0x48308000 0x10>;
823 #address-cells = <1>;
824 #size-cells = <1>;
825 ranges;
826 ti,hwmods = "epwmss4";
827 status = "disabled";
828
829 ehrpwm4: pwm@48308200 {
830 compatible = "ti,am4372-ehrpwm",
831 "ti,am3352-ehrpwm",
832 "ti,am33xx-ehrpwm";
833 #pwm-cells = <3>;
834 reg = <0x48308200 0x80>;
835 clocks = <&ehrpwm4_tbclk>, <&l4ls_gclk>;
836 clock-names = "tbclk", "fck";
837 status = "disabled";
838 };
839 };
840
841 epwmss5: epwmss@4830a000 {
842 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
843 reg = <0x4830a000 0x10>;
844 #address-cells = <1>;
845 #size-cells = <1>;
846 ranges;
847 ti,hwmods = "epwmss5";
848 status = "disabled";
849
850 ehrpwm5: pwm@4830a200 {
851 compatible = "ti,am4372-ehrpwm",
852 "ti,am3352-ehrpwm",
853 "ti,am33xx-ehrpwm";
854 #pwm-cells = <3>;
855 reg = <0x4830a200 0x80>;
856 clocks = <&ehrpwm5_tbclk>, <&l4ls_gclk>;
857 clock-names = "tbclk", "fck";
858 status = "disabled";
859 };
860 };
861
862 tscadc: tscadc@44e0d000 {
863 compatible = "ti,am3359-tscadc";
864 reg = <0x44e0d000 0x1000>;
865 ti,hwmods = "adc_tsc";
866 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
867 clocks = <&adc_tsc_fck>;
868 clock-names = "fck";
869 status = "disabled";
870
871 tsc {
872 compatible = "ti,am3359-tsc";
873 };
874
875 adc {
876 #io-channel-cells = <1>;
877 compatible = "ti,am3359-adc";
878 };
879
880 };
881
882 sham: sham@53100000 {
883 compatible = "ti,omap5-sham";
884 ti,hwmods = "sham";
885 reg = <0x53100000 0x300>;
886 dmas = <&edma 36 0>;
887 dma-names = "rx";
888 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
889 };
890
891 aes: aes@53501000 {
892 compatible = "ti,omap4-aes";
893 ti,hwmods = "aes";
894 reg = <0x53501000 0xa0>;
895 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
896 dmas = <&edma 6 0>,
897 <&edma 5 0>;
898 dma-names = "tx", "rx";
899 };
900
901 des: des@53701000 {
902 compatible = "ti,omap4-des";
903 ti,hwmods = "des";
904 reg = <0x53701000 0xa0>;
905 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
906 dmas = <&edma 34 0>,
907 <&edma 33 0>;
908 dma-names = "tx", "rx";
909 };
910
911 rng: rng@48310000 {
912 compatible = "ti,omap4-rng";
913 ti,hwmods = "rng";
914 reg = <0x48310000 0x2000>;
915 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
916 };
917
918 mcasp0: mcasp@48038000 {
919 compatible = "ti,am33xx-mcasp-audio";
920 ti,hwmods = "mcasp0";
921 reg = <0x48038000 0x2000>,
922 <0x46000000 0x400000>;
923 reg-names = "mpu", "dat";
924 interrupts = <80>, <81>;
925 interrupt-names = "tx", "rx";
926 status = "disabled";
927 dmas = <&edma 8 2>,
928 <&edma 9 2>;
929 dma-names = "tx", "rx";
930 };
931
932 mcasp1: mcasp@4803C000 {
933 compatible = "ti,am33xx-mcasp-audio";
934 ti,hwmods = "mcasp1";
935 reg = <0x4803C000 0x2000>,
936 <0x46400000 0x400000>;
937 reg-names = "mpu", "dat";
938 interrupts = <82>, <83>;
939 interrupt-names = "tx", "rx";
940 status = "disabled";
941 dmas = <&edma 10 2>,
942 <&edma 11 2>;
943 dma-names = "tx", "rx";
944 };
945
946 elm: elm@48080000 {
947 compatible = "ti,am3352-elm";
948 reg = <0x48080000 0x2000>;
949 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
950 ti,hwmods = "elm";
951 clocks = <&l4ls_gclk>;
952 clock-names = "fck";
953 status = "disabled";
954 };
955
956 gpmc: gpmc@50000000 {
957 compatible = "ti,am3352-gpmc";
958 ti,hwmods = "gpmc";
959 dmas = <&edma 52 0>;
960 dma-names = "rxtx";
961 clocks = <&l3s_gclk>;
962 clock-names = "fck";
963 reg = <0x50000000 0x2000>;
964 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
965 gpmc,num-cs = <7>;
966 gpmc,num-waitpins = <2>;
967 #address-cells = <2>;
968 #size-cells = <1>;
969 interrupt-controller;
970 #interrupt-cells = <2>;
971 gpio-controller;
972 #gpio-cells = <2>;
973 status = "disabled";
974 };
975
976 ocp2scp0: ocp2scp@483a8000 {
977 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
978 #address-cells = <1>;
979 #size-cells = <1>;
980 ranges;
981 ti,hwmods = "ocp2scp0";
982
983 usb2_phy1: phy@483a8000 {
984 compatible = "ti,am437x-usb2";
985 reg = <0x483a8000 0x8000>;
986 syscon-phy-power = <&scm_conf 0x620>;
987 clocks = <&usb_phy0_always_on_clk32k>,
988 <&usb_otg_ss0_refclk960m>;
989 clock-names = "wkupclk", "refclk";
990 #phy-cells = <0>;
991 status = "disabled";
992 };
993 };
994
995 ocp2scp1: ocp2scp@483e8000 {
996 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
997 #address-cells = <1>;
998 #size-cells = <1>;
999 ranges;
1000 ti,hwmods = "ocp2scp1";
1001
1002 usb2_phy2: phy@483e8000 {
1003 compatible = "ti,am437x-usb2";
1004 reg = <0x483e8000 0x8000>;
1005 syscon-phy-power = <&scm_conf 0x628>;
1006 clocks = <&usb_phy1_always_on_clk32k>,
1007 <&usb_otg_ss1_refclk960m>;
1008 clock-names = "wkupclk", "refclk";
1009 #phy-cells = <0>;
1010 status = "disabled";
1011 };
1012 };
1013
1014 dwc3_1: omap_dwc3@48380000 {
1015 compatible = "ti,am437x-dwc3";
1016 ti,hwmods = "usb_otg_ss0";
1017 reg = <0x48380000 0x10000>;
1018 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
1019 #address-cells = <1>;
1020 #size-cells = <1>;
1021 utmi-mode = <1>;
1022 ranges;
1023
1024 usb1: usb@48390000 {
1025 compatible = "synopsys,dwc3";
1026 reg = <0x48390000 0x10000>;
1027 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
1028 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
1029 <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
1030 interrupt-names = "peripheral",
1031 "host",
1032 "otg";
1033 phys = <&usb2_phy1>;
1034 phy-names = "usb2-phy";
1035 maximum-speed = "high-speed";
1036 dr_mode = "otg";
1037 status = "disabled";
1038 snps,dis_u3_susphy_quirk;
1039 snps,dis_u2_susphy_quirk;
1040 };
1041 };
1042
1043 dwc3_2: omap_dwc3@483c0000 {
1044 compatible = "ti,am437x-dwc3";
1045 ti,hwmods = "usb_otg_ss1";
1046 reg = <0x483c0000 0x10000>;
1047 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
1048 #address-cells = <1>;
1049 #size-cells = <1>;
1050 utmi-mode = <1>;
1051 ranges;
1052
1053 usb2: usb@483d0000 {
1054 compatible = "synopsys,dwc3";
1055 reg = <0x483d0000 0x10000>;
1056 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
1057 <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
1058 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
1059 interrupt-names = "peripheral",
1060 "host",
1061 "otg";
1062 phys = <&usb2_phy2>;
1063 phy-names = "usb2-phy";
1064 maximum-speed = "high-speed";
1065 dr_mode = "otg";
1066 status = "disabled";
1067 snps,dis_u3_susphy_quirk;
1068 snps,dis_u2_susphy_quirk;
1069 };
1070 };
1071
1072 qspi: qspi@47900000 {
1073 compatible = "ti,am4372-qspi";
1074 reg = <0x47900000 0x100>,
1075 <0x30000000 0x4000000>;
1076 reg-names = "qspi_base", "qspi_mmap";
1077 #address-cells = <1>;
1078 #size-cells = <0>;
1079 ti,hwmods = "qspi";
1080 interrupts = <0 138 0x4>;
1081 num-cs = <4>;
1082 status = "disabled";
1083 };
1084
1085 hdq: hdq@48347000 {
1086 compatible = "ti,am4372-hdq";
1087 reg = <0x48347000 0x1000>;
1088 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
1089 clocks = <&func_12m_clk>;
1090 clock-names = "fck";
1091 ti,hwmods = "hdq1w";
1092 status = "disabled";
1093 };
1094
1095 dss: dss@4832a000 {
1096 compatible = "ti,omap3-dss";
1097 reg = <0x4832a000 0x200>;
1098 status = "disabled";
1099 ti,hwmods = "dss_core";
1100 clocks = <&disp_clk>;
1101 clock-names = "fck";
1102 #address-cells = <1>;
1103 #size-cells = <1>;
1104 ranges;
1105
1106 dispc: dispc@4832a400 {
1107 compatible = "ti,omap3-dispc";
1108 reg = <0x4832a400 0x400>;
1109 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1110 ti,hwmods = "dss_dispc";
1111 clocks = <&disp_clk>;
1112 clock-names = "fck";
1113 };
1114
1115 rfbi: rfbi@4832a800 {
1116 compatible = "ti,omap3-rfbi";
1117 reg = <0x4832a800 0x100>;
1118 ti,hwmods = "dss_rfbi";
1119 clocks = <&disp_clk>;
1120 clock-names = "fck";
1121 status = "disabled";
1122 };
1123 };
1124
1125 ocmcram: ocmcram@40300000 {
1126 compatible = "mmio-sram";
1127 reg = <0x40300000 0x40000>; /* 256k */
1128 };
1129
1130 dcan0: can@481cc000 {
1131 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1132 ti,hwmods = "d_can0";
1133 clocks = <&dcan0_fck>;
1134 clock-names = "fck";
1135 reg = <0x481cc000 0x2000>;
1136 syscon-raminit = <&scm_conf 0x644 0>;
1137 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
1138 status = "disabled";
1139 };
1140
1141 dcan1: can@481d0000 {
1142 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1143 ti,hwmods = "d_can1";
1144 clocks = <&dcan1_fck>;
1145 clock-names = "fck";
1146 reg = <0x481d0000 0x2000>;
1147 syscon-raminit = <&scm_conf 0x644 1>;
1148 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
1149 status = "disabled";
1150 };
1151
1152 vpfe0: vpfe@48326000 {
1153 compatible = "ti,am437x-vpfe";
1154 reg = <0x48326000 0x2000>;
1155 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
1156 ti,hwmods = "vpfe0";
1157 status = "disabled";
1158 };
1159
1160 vpfe1: vpfe@48328000 {
1161 compatible = "ti,am437x-vpfe";
1162 reg = <0x48328000 0x2000>;
1163 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
1164 ti,hwmods = "vpfe1";
1165 status = "disabled";
1166 };
1167 };
1168 };
1169
1170 /include/ "am43xx-clocks.dtsi"
Linux kernel - Deliverables
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