fb: adv7393: off by one in probe function
[deliverable/linux.git] / arch / arm / boot / dts / imx6q-bx50v3.dtsi
1 /*
2 * Copyright 2015 Timesys Corporation.
3 * Copyright 2015 General Electric Company
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This file is distributed in the hope that it will be useful
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43 #include "imx6q-ba16.dtsi"
44
45 / {
46 clocks {
47 mclk: clock@0 {
48 compatible = "fixed-clock";
49 reg = <0>;
50 #clock-cells = <0>;
51 clock-frequency = <22000000>;
52 };
53 };
54
55 gpio-poweroff {
56 compatible = "gpio-poweroff";
57 gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
58 status = "okay";
59 };
60
61 reg_wl18xx_vmmc: regulator-wl18xx {
62 compatible = "regulator-fixed";
63 regulator-name = "vwl1807";
64 regulator-min-microvolt = <3300000>;
65 regulator-max-microvolt = <3300000>;
66 gpio = <&pca9539 3 GPIO_ACTIVE_HIGH>;
67 startup-delay-us = <70000>;
68 enable-active-high;
69 };
70
71 reg_wlan: regulator-wlan {
72 compatible = "regulator-fixed";
73 regulator-name = "3P3V_wlan";
74 regulator-min-microvolt = <3300000>;
75 regulator-max-microvolt = <3300000>;
76 regulator-always-on;
77 regulator-boot-on;
78 gpio = <&gpio6 14 GPIO_ACTIVE_HIGH>;
79 };
80
81 sound {
82 compatible = "fsl,imx6q-ba16-sgtl5000",
83 "fsl,imx-audio-sgtl5000";
84 model = "imx6q-ba16-sgtl5000";
85 ssi-controller = <&ssi1>;
86 audio-codec = <&sgtl5000>;
87 audio-routing =
88 "MIC_IN", "Mic Jack",
89 "Mic Jack", "Mic Bias",
90 "LINE_IN", "Line In Jack",
91 "Headphone Jack", "HP_OUT";
92 mux-int-port = <1>;
93 mux-ext-port = <4>;
94 };
95 };
96
97 &ecspi5 {
98 fsl,spi-num-chipselects = <1>;
99 cs-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
100 pinctrl-names = "default";
101 pinctrl-0 = <&pinctrl_ecspi5>;
102 status = "okay";
103
104 m25_eeprom: m25p80@0 {
105 compatible = "atmel,at25";
106 spi-max-frequency = <20000000>;
107 size = <0x8000>;
108 pagesize = <64>;
109 reg = <0>;
110 address-width = <16>;
111 };
112 };
113
114 &i2c1 {
115 pca9547: mux@70 {
116 compatible = "nxp,pca9547";
117 reg = <0x70>;
118 #address-cells = <1>;
119 #size-cells = <0>;
120
121 mux1_i2c1: i2c@0 {
122 #address-cells = <1>;
123 #size-cells = <0>;
124 reg = <0x0>;
125
126 ads7830: ads7830@48 {
127 compatible = "ti,ads7830";
128 reg = <0x48>;
129 };
130
131 mma8453: mma8453@1c {
132 compatible = "fsl,mma8453";
133 reg = <0x1c>;
134 };
135 };
136
137 mux1_i2c2: i2c@1 {
138 #address-cells = <1>;
139 #size-cells = <0>;
140 reg = <0x1>;
141
142 eeprom: eeprom@50 {
143 compatible = "atmel,24c08";
144 reg = <0x50>;
145 };
146
147 mpl3115: mpl3115@60 {
148 compatible = "fsl,mpl3115";
149 reg = <0x60>;
150 };
151 };
152
153 mux1_i2c3: i2c@2 {
154 #address-cells = <1>;
155 #size-cells = <0>;
156 reg = <0x2>;
157 };
158
159 mux1_i2c4: i2c@3 {
160 #address-cells = <1>;
161 #size-cells = <0>;
162 reg = <0x3>;
163
164 sgtl5000: codec@0a {
165 compatible = "fsl,sgtl5000";
166 reg = <0x0a>;
167 clocks = <&mclk>;
168 VDDA-supply = <&reg_1p8v>;
169 VDDIO-supply = <&reg_3p3v>;
170 };
171 };
172
173 mux1_i2c5: i2c@4 {
174 #address-cells = <1>;
175 #size-cells = <0>;
176 reg = <0x4>;
177
178 pca9539: pca9539@74 {
179 compatible = "nxp,pca9539";
180 reg = <0x74>;
181 gpio-controller;
182 #gpio-cells = <2>;
183 interrupt-controller;
184 interrupt-parent = <&gpio2>;
185 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
186 };
187 };
188
189 mux1_i2c6: i2c@5 {
190 #address-cells = <1>;
191 #size-cells = <0>;
192 reg = <0x5>;
193 };
194
195 mux1_i2c7: i2c@6 {
196 #address-cells = <1>;
197 #size-cells = <0>;
198 reg = <0x6>;
199 };
200
201 mux1_i2c8: i2c@7 {
202 #address-cells = <1>;
203 #size-cells = <0>;
204 reg = <0x7>;
205 };
206 };
207 };
208
209 &usdhc4 {
210 pinctrl-names = "default";
211 pinctrl-0 = <&pinctrl_usdhc4>;
212 bus-width = <4>;
213 vmmc-supply = <&reg_wl18xx_vmmc>;
214 no-1-8-v;
215 non-removable;
216 wakeup-source;
217 keep-power-in-suspend;
218 cap-power-off-card;
219 max-frequency = <25000000>;
220 #address-cells = <1>;
221 #size-cells = <0>;
222 status = "okay";
223
224 wlcore: wlcore@2 {
225 compatible = "ti,wl1837";
226 reg = <2>;
227 interrupt-parent = <&gpio2>;
228 interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
229 tcxo-clock-frequency = <26000000>;
230 };
231 };
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