arch/arm/boot/dts/imx6qdl-gw551x.dtsi

   1 /*
   2  * Copyright 2014 Gateworks Corporation
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of
  12  *     the License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  *     You should have received a copy of the GNU General Public
  20  *     License along with this file; if not, write to the Free
  21  *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  22  *     MA 02110-1301 USA
  23  *
  24  * Or, alternatively,
  25  *
  26  *  b) Permission is hereby granted, free of charge, to any person
  27  *     obtaining a copy of this software and associated documentation
  28  *     files (the "Software"), to deal in the Software without
  29  *     restriction, including without limitation the rights to use,
  30  *     copy, modify, merge, publish, distribute, sublicense, and/or
  31  *     sell copies of the Software, and to permit persons to whom the
  32  *     Software is furnished to do so, subject to the following
  33  *     conditions:
  34  *
  35  *     The above copyright notice and this permission notice shall be
  36  *     included in all copies or substantial portions of the Software.
  37  *
  38  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  39  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  40  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  41  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  42  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  43  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  44  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  45  *     OTHER DEALINGS IN THE SOFTWARE.
  46  */
  47
  48 #include <dt-bindings/gpio/gpio.h>
  49
  50 / {
  51         /* these are used by bootloader for disabling nodes */
  52         aliases {
  53                 led0 = &led0;
  54                 nand = &gpmi;
  55                 ssi0 = &ssi1;
  56                 usb0 = &usbh1;
  57                 usb1 = &usbotg;
  58         };
  59
  60         chosen {
  61                 bootargs = "console=ttymxc1,115200";
  62         };
  63
  64         leds {
  65                 compatible = "gpio-leds";
  66                 pinctrl-names = "default";
  67                 pinctrl-0 = <&pinctrl_gpio_leds>;
  68
  69                 led0: user1 {
  70                         label = "user1";
  71                         gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
  72                         default-state = "on";
  73                         linux,default-trigger = "heartbeat";
  74                 };
  75         };
  76
  77         memory {
  78                 reg = <0x10000000 0x20000000>;
  79         };
  80
  81         regulators {
  82                 compatible = "simple-bus";
  83                 #address-cells = <1>;
  84                 #size-cells = <0>;
  85
  86                 reg_5p0v: regulator@0 {
  87                         compatible = "regulator-fixed";
  88                         reg = <0>;
  89                         regulator-name = "5P0V";
  90                         regulator-min-microvolt = <5000000>;
  91                         regulator-max-microvolt = <5000000>;
  92                 };
  93
  94                 reg_usb_h1_vbus: regulator@1 {
  95                         compatible = "regulator-fixed";
  96                         reg = <1>;
  97                         regulator-name = "usb_h1_vbus";
  98                         regulator-min-microvolt = <5000000>;
  99                         regulator-max-microvolt = <5000000>;
 100                 };
 101
 102                 reg_usb_otg_vbus: regulator@2 {
 103                         compatible = "regulator-fixed";
 104                         reg = <2>;
 105                         regulator-name = "usb_otg_vbus";
 106                         regulator-min-microvolt = <5000000>;
 107                         regulator-max-microvolt = <5000000>;
 108                 };
 109         };
 110 };
 111
 112 &can1 {
 113         pinctrl-names = "default";
 114         pinctrl-0 = <&pinctrl_flexcan1>;
 115         status = "okay";
 116 };
 117
 118 &gpmi {
 119         pinctrl-names = "default";
 120         pinctrl-0 = <&pinctrl_gpmi_nand>;
 121         status = "okay";
 122 };
 123
 124 &hdmi {
 125         ddc-i2c-bus = <&i2c3>;
 126         status = "okay";
 127 };
 128
 129 &i2c1 {
 130         clock-frequency = <100000>;
 131         pinctrl-names = "default";
 132         pinctrl-0 = <&pinctrl_i2c1>;
 133         status = "okay";
 134
 135         eeprom1: eeprom@50 {
 136                 compatible = "atmel,24c02";
 137                 reg = <0x50>;
 138                 pagesize = <16>;
 139         };
 140
 141         eeprom2: eeprom@51 {
 142                 compatible = "atmel,24c02";
 143                 reg = <0x51>;
 144                 pagesize = <16>;
 145         };
 146
 147         eeprom3: eeprom@52 {
 148                 compatible = "atmel,24c02";
 149                 reg = <0x52>;
 150                 pagesize = <16>;
 151         };
 152
 153         eeprom4: eeprom@53 {
 154                 compatible = "atmel,24c02";
 155                 reg = <0x53>;
 156                 pagesize = <16>;
 157         };
 158
 159         gpio: pca9555@23 {
 160                 compatible = "nxp,pca9555";
 161                 reg = <0x23>;
 162                 gpio-controller;
 163                 #gpio-cells = <2>;
 164         };
 165
 166         rtc: ds1672@68 {
 167                 compatible = "dallas,ds1672";
 168                 reg = <0x68>;
 169         };
 170 };
 171
 172 &i2c2 {
 173         clock-frequency = <100000>;
 174         pinctrl-names = "default";
 175         pinctrl-0 = <&pinctrl_i2c2>;
 176         status = "okay";
 177 };
 178
 179 &i2c3 {
 180         clock-frequency = <100000>;
 181         pinctrl-names = "default";
 182         pinctrl-0 = <&pinctrl_i2c3>;
 183         status = "okay";
 184
 185         gpio_exp: pca9555@24 {
 186                 compatible = "nxp,pca9555";
 187                 reg = <0x24>;
 188                 gpio-controller;
 189                 #gpio-cells = <2>;
 190         };
 191
 192 };
 193
 194 &pcie {
 195         pinctrl-names = "default";
 196         pinctrl-0 = <&pinctrl_pcie>;
 197         reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
 198         status = "okay";
 199 };
 200
 201 &pwm2 {
 202         pinctrl-names = "default";
 203         pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
 204         status = "disabled";
 205 };
 206
 207 &pwm3 {
 208         pinctrl-names = "default";
 209         pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
 210         status = "disabled";
 211 };
 212
 213 &ssi1 {
 214         status = "okay";
 215 };
 216
 217 &uart2 {
 218         pinctrl-names = "default";
 219         pinctrl-0 = <&pinctrl_uart2>;
 220         status = "okay";
 221 };
 222
 223 &uart3 {
 224         pinctrl-names = "default";
 225         pinctrl-0 = <&pinctrl_uart3>;
 226         status = "okay";
 227 };
 228
 229 &usbotg {
 230         vbus-supply = <&reg_usb_otg_vbus>;
 231         pinctrl-names = "default";
 232         pinctrl-0 = <&pinctrl_usbotg>;
 233         disable-over-current;
 234         status = "okay";
 235 };
 236
 237 &usbh1 {
 238         vbus-supply = <&reg_usb_h1_vbus>;
 239         status = "okay";
 240 };
 241
 242 &wdog1 {
 243         pinctrl-names = "default";
 244         pinctrl-0 = <&pinctrl_wdog>;
 245         fsl,ext-reset-output;
 246 };
 247
 248 &iomuxc {
 249         imx6qdl-gw51xx {
 250                 pinctrl_flexcan1: flexcan1grp {
 251                         fsl,pins = <
 252                                 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x1b0b1
 253                                 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x1b0b1
 254                                 MX6QDL_PAD_GPIO_9__GPIO1_IO09           0x4001b0b0 /* CAN_STBY */
 255                         >;
 256                 };
 257
 258                 pinctrl_gpio_leds: gpioledsgrp {
 259                         fsl,pins = <
 260                                 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07   0x1b0b0
 261                         >;
 262                 };
 263
 264                 pinctrl_gpmi_nand: gpminandgrp {
 265                         fsl,pins = <
 266                                 MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
 267                                 MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
 268                                 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
 269                                 MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
 270                                 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
 271                                 MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
 272                                 MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
 273                                 MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
 274                                 MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
 275                                 MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
 276                                 MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
 277                                 MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
 278                                 MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
 279                                 MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
 280                                 MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
 281                         >;
 282                 };
 283
 284                 pinctrl_i2c1: i2c1grp {
 285                         fsl,pins = <
 286                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 287                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 288                         >;
 289                 };
 290
 291                 pinctrl_i2c2: i2c2grp {
 292                         fsl,pins = <
 293                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 294                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 295                         >;
 296                 };
 297
 298                 pinctrl_i2c3: i2c3grp {
 299                         fsl,pins = <
 300                                 MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
 301                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 302                         >;
 303                 };
 304
 305                 pinctrl_pcie: pciegrp {
 306                         fsl,pins = <
 307                                 MX6QDL_PAD_GPIO_0__GPIO1_IO00           0x1b0b0 /* PCIE RST */
 308                         >;
 309                 };
 310
 311                 pinctrl_pwm2: pwm2grp {
 312                         fsl,pins = <
 313                                 MX6QDL_PAD_SD1_DAT2__PWM2_OUT           0x1b0b1
 314                         >;
 315                 };
 316
 317                 pinctrl_pwm3: pwm3grp {
 318                         fsl,pins = <
 319                                 MX6QDL_PAD_SD1_DAT1__PWM3_OUT           0x1b0b1
 320                         >;
 321                 };
 322
 323                 pinctrl_uart2: uart2grp {
 324                         fsl,pins = <
 325                                 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
 326                                 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
 327                         >;
 328                 };
 329
 330                 pinctrl_uart3: uart3grp {
 331                         fsl,pins = <
 332                                 MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
 333                                 MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
 334                         >;
 335                 };
 336
 337                 pinctrl_usbotg: usbotggrp {
 338                         fsl,pins = <
 339                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 340                         >;
 341                 };
 342
 343                 pinctrl_wdog: wdoggrp {
 344                         fsl,pins = <
 345                                 MX6QDL_PAD_DISP0_DAT8__WDOG1_B          0x1b0b0
 346                         >;
 347                 };
 348         };
 349 };