2 * Device Tree Source for the r8a7794 SoC
4 * Copyright (C) 2014 Renesas Electronics Corporation
5 * Copyright (C) 2014 Ulrich Hecht
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
12 #include <dt-bindings/clock/r8a7794-clock.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/power/r8a7794-sysc.h>
18 compatible = "renesas,r8a7794";
19 interrupt-parent = <&gic>;
43 compatible = "arm,cortex-a7";
45 clock-frequency = <1000000000>;
46 power-domains = <&sysc R8A7794_PD_CA7_CPU0>;
47 next-level-cache = <&L2_CA7>;
52 compatible = "arm,cortex-a7";
54 clock-frequency = <1000000000>;
55 power-domains = <&sysc R8A7794_PD_CA7_CPU1>;
56 next-level-cache = <&L2_CA7>;
59 L2_CA7: cache-controller@0 {
62 power-domains = <&sysc R8A7794_PD_CA7_SCU>;
68 gic: interrupt-controller@f1001000 {
69 compatible = "arm,gic-400";
70 #interrupt-cells = <3>;
73 reg = <0 0xf1001000 0 0x1000>,
74 <0 0xf1002000 0 0x1000>,
75 <0 0xf1004000 0 0x2000>,
76 <0 0xf1006000 0 0x2000>;
77 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
80 gpio0: gpio@e6050000 {
81 compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
82 reg = <0 0xe6050000 0 0x50>;
83 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
86 gpio-ranges = <&pfc 0 0 32>;
87 #interrupt-cells = <2>;
89 clocks = <&mstp9_clks R8A7794_CLK_GPIO0>;
90 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
93 gpio1: gpio@e6051000 {
94 compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
95 reg = <0 0xe6051000 0 0x50>;
96 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
99 gpio-ranges = <&pfc 0 32 26>;
100 #interrupt-cells = <2>;
101 interrupt-controller;
102 clocks = <&mstp9_clks R8A7794_CLK_GPIO1>;
103 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
106 gpio2: gpio@e6052000 {
107 compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
108 reg = <0 0xe6052000 0 0x50>;
109 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
112 gpio-ranges = <&pfc 0 64 32>;
113 #interrupt-cells = <2>;
114 interrupt-controller;
115 clocks = <&mstp9_clks R8A7794_CLK_GPIO2>;
116 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
119 gpio3: gpio@e6053000 {
120 compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
121 reg = <0 0xe6053000 0 0x50>;
122 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
125 gpio-ranges = <&pfc 0 96 32>;
126 #interrupt-cells = <2>;
127 interrupt-controller;
128 clocks = <&mstp9_clks R8A7794_CLK_GPIO3>;
129 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
132 gpio4: gpio@e6054000 {
133 compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
134 reg = <0 0xe6054000 0 0x50>;
135 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
138 gpio-ranges = <&pfc 0 128 32>;
139 #interrupt-cells = <2>;
140 interrupt-controller;
141 clocks = <&mstp9_clks R8A7794_CLK_GPIO4>;
142 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
145 gpio5: gpio@e6055000 {
146 compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
147 reg = <0 0xe6055000 0 0x50>;
148 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
151 gpio-ranges = <&pfc 0 160 28>;
152 #interrupt-cells = <2>;
153 interrupt-controller;
154 clocks = <&mstp9_clks R8A7794_CLK_GPIO5>;
155 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
158 gpio6: gpio@e6055400 {
159 compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
160 reg = <0 0xe6055400 0 0x50>;
161 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
164 gpio-ranges = <&pfc 0 192 26>;
165 #interrupt-cells = <2>;
166 interrupt-controller;
167 clocks = <&mstp9_clks R8A7794_CLK_GPIO6>;
168 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
171 cmt0: timer@ffca0000 {
172 compatible = "renesas,cmt-48-gen2";
173 reg = <0 0xffca0000 0 0x1004>;
174 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
175 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
176 clocks = <&mstp1_clks R8A7794_CLK_CMT0>;
178 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
180 renesas,channels-mask = <0x60>;
185 cmt1: timer@e6130000 {
186 compatible = "renesas,cmt-48-gen2";
187 reg = <0 0xe6130000 0 0x1004>;
188 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
189 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
190 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
191 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
192 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
193 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
194 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
195 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
196 clocks = <&mstp3_clks R8A7794_CLK_CMT1>;
198 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
200 renesas,channels-mask = <0xff>;
206 compatible = "arm,armv7-timer";
207 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
208 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
209 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
210 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
213 irqc0: interrupt-controller@e61c0000 {
214 compatible = "renesas,irqc-r8a7794", "renesas,irqc";
215 #interrupt-cells = <2>;
216 interrupt-controller;
217 reg = <0 0xe61c0000 0 0x200>;
218 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
219 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
220 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
221 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
222 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
223 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
224 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
225 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
226 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
227 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
228 clocks = <&mstp4_clks R8A7794_CLK_IRQC>;
229 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
232 pfc: pin-controller@e6060000 {
233 compatible = "renesas,pfc-r8a7794";
234 reg = <0 0xe6060000 0 0x11c>;
237 dmac0: dma-controller@e6700000 {
238 compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
239 reg = <0 0xe6700000 0 0x20000>;
240 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
241 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
242 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
243 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
244 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
245 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
246 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
247 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
248 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
249 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
250 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
251 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
252 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
253 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
254 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
255 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
256 interrupt-names = "error",
257 "ch0", "ch1", "ch2", "ch3",
258 "ch4", "ch5", "ch6", "ch7",
259 "ch8", "ch9", "ch10", "ch11",
260 "ch12", "ch13", "ch14";
261 clocks = <&mstp2_clks R8A7794_CLK_SYS_DMAC0>;
263 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
268 dmac1: dma-controller@e6720000 {
269 compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
270 reg = <0 0xe6720000 0 0x20000>;
271 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
272 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
273 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
274 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
275 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
276 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
277 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
278 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
279 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
280 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
281 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
282 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
283 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
284 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
285 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
286 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
287 interrupt-names = "error",
288 "ch0", "ch1", "ch2", "ch3",
289 "ch4", "ch5", "ch6", "ch7",
290 "ch8", "ch9", "ch10", "ch11",
291 "ch12", "ch13", "ch14";
292 clocks = <&mstp2_clks R8A7794_CLK_SYS_DMAC1>;
294 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
299 audma0: dma-controller@ec700000 {
300 compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
301 reg = <0 0xec700000 0 0x10000>;
302 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
303 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
304 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
305 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
306 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
307 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
308 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
309 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
310 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
311 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
312 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
313 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
314 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
315 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
316 interrupt-names = "error",
317 "ch0", "ch1", "ch2", "ch3", "ch4", "ch5",
318 "ch6", "ch7", "ch8", "ch9", "ch10", "ch11",
320 clocks = <&mstp5_clks R8A7794_CLK_AUDIO_DMAC0>;
322 power-domains = <&cpg_clocks>;
327 scifa0: serial@e6c40000 {
328 compatible = "renesas,scifa-r8a7794",
329 "renesas,rcar-gen2-scifa", "renesas,scifa";
330 reg = <0 0xe6c40000 0 64>;
331 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
332 clocks = <&mstp2_clks R8A7794_CLK_SCIFA0>;
334 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
335 <&dmac1 0x21>, <&dmac1 0x22>;
336 dma-names = "tx", "rx", "tx", "rx";
337 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
341 scifa1: serial@e6c50000 {
342 compatible = "renesas,scifa-r8a7794",
343 "renesas,rcar-gen2-scifa", "renesas,scifa";
344 reg = <0 0xe6c50000 0 64>;
345 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
346 clocks = <&mstp2_clks R8A7794_CLK_SCIFA1>;
348 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
349 <&dmac1 0x25>, <&dmac1 0x26>;
350 dma-names = "tx", "rx", "tx", "rx";
351 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
355 scifa2: serial@e6c60000 {
356 compatible = "renesas,scifa-r8a7794",
357 "renesas,rcar-gen2-scifa", "renesas,scifa";
358 reg = <0 0xe6c60000 0 64>;
359 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
360 clocks = <&mstp2_clks R8A7794_CLK_SCIFA2>;
362 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
363 <&dmac1 0x27>, <&dmac1 0x28>;
364 dma-names = "tx", "rx", "tx", "rx";
365 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
369 scifa3: serial@e6c70000 {
370 compatible = "renesas,scifa-r8a7794",
371 "renesas,rcar-gen2-scifa", "renesas,scifa";
372 reg = <0 0xe6c70000 0 64>;
373 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
374 clocks = <&mstp11_clks R8A7794_CLK_SCIFA3>;
376 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
377 <&dmac1 0x1b>, <&dmac1 0x1c>;
378 dma-names = "tx", "rx", "tx", "rx";
379 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
383 scifa4: serial@e6c78000 {
384 compatible = "renesas,scifa-r8a7794",
385 "renesas,rcar-gen2-scifa", "renesas,scifa";
386 reg = <0 0xe6c78000 0 64>;
387 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
388 clocks = <&mstp11_clks R8A7794_CLK_SCIFA4>;
390 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
391 <&dmac1 0x1f>, <&dmac1 0x20>;
392 dma-names = "tx", "rx", "tx", "rx";
393 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
397 scifa5: serial@e6c80000 {
398 compatible = "renesas,scifa-r8a7794",
399 "renesas,rcar-gen2-scifa", "renesas,scifa";
400 reg = <0 0xe6c80000 0 64>;
401 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
402 clocks = <&mstp11_clks R8A7794_CLK_SCIFA5>;
404 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
405 <&dmac1 0x23>, <&dmac1 0x24>;
406 dma-names = "tx", "rx", "tx", "rx";
407 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
411 scifb0: serial@e6c20000 {
412 compatible = "renesas,scifb-r8a7794",
413 "renesas,rcar-gen2-scifb", "renesas,scifb";
414 reg = <0 0xe6c20000 0 64>;
415 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
416 clocks = <&mstp2_clks R8A7794_CLK_SCIFB0>;
418 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
419 <&dmac1 0x3d>, <&dmac1 0x3e>;
420 dma-names = "tx", "rx", "tx", "rx";
421 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
425 scifb1: serial@e6c30000 {
426 compatible = "renesas,scifb-r8a7794",
427 "renesas,rcar-gen2-scifb", "renesas,scifb";
428 reg = <0 0xe6c30000 0 64>;
429 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
430 clocks = <&mstp2_clks R8A7794_CLK_SCIFB1>;
432 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
433 <&dmac1 0x19>, <&dmac1 0x1a>;
434 dma-names = "tx", "rx", "tx", "rx";
435 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
439 scifb2: serial@e6ce0000 {
440 compatible = "renesas,scifb-r8a7794",
441 "renesas,rcar-gen2-scifb", "renesas,scifb";
442 reg = <0 0xe6ce0000 0 64>;
443 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
444 clocks = <&mstp2_clks R8A7794_CLK_SCIFB2>;
446 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
447 <&dmac1 0x1d>, <&dmac1 0x1e>;
448 dma-names = "tx", "rx", "tx", "rx";
449 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
453 scif0: serial@e6e60000 {
454 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
456 reg = <0 0xe6e60000 0 64>;
457 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
458 clocks = <&mstp7_clks R8A7794_CLK_SCIF0>, <&zs_clk>,
460 clock-names = "fck", "brg_int", "scif_clk";
461 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
462 <&dmac1 0x29>, <&dmac1 0x2a>;
463 dma-names = "tx", "rx", "tx", "rx";
464 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
468 scif1: serial@e6e68000 {
469 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
471 reg = <0 0xe6e68000 0 64>;
472 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
473 clocks = <&mstp7_clks R8A7794_CLK_SCIF1>, <&zs_clk>,
475 clock-names = "fck", "brg_int", "scif_clk";
476 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
477 <&dmac1 0x2d>, <&dmac1 0x2e>;
478 dma-names = "tx", "rx", "tx", "rx";
479 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
483 scif2: serial@e6e58000 {
484 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
486 reg = <0 0xe6e58000 0 64>;
487 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
488 clocks = <&mstp7_clks R8A7794_CLK_SCIF2>, <&zs_clk>,
490 clock-names = "fck", "brg_int", "scif_clk";
491 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
492 <&dmac1 0x2b>, <&dmac1 0x2c>;
493 dma-names = "tx", "rx", "tx", "rx";
494 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
498 scif3: serial@e6ea8000 {
499 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
501 reg = <0 0xe6ea8000 0 64>;
502 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
503 clocks = <&mstp7_clks R8A7794_CLK_SCIF3>, <&zs_clk>,
505 clock-names = "fck", "brg_int", "scif_clk";
506 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
507 <&dmac1 0x2f>, <&dmac1 0x30>;
508 dma-names = "tx", "rx", "tx", "rx";
509 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
513 scif4: serial@e6ee0000 {
514 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
516 reg = <0 0xe6ee0000 0 64>;
517 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
518 clocks = <&mstp7_clks R8A7794_CLK_SCIF4>, <&zs_clk>,
520 clock-names = "fck", "brg_int", "scif_clk";
521 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
522 <&dmac1 0xfb>, <&dmac1 0xfc>;
523 dma-names = "tx", "rx", "tx", "rx";
524 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
528 scif5: serial@e6ee8000 {
529 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
531 reg = <0 0xe6ee8000 0 64>;
532 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
533 clocks = <&mstp7_clks R8A7794_CLK_SCIF5>, <&zs_clk>,
535 clock-names = "fck", "brg_int", "scif_clk";
536 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
537 <&dmac1 0xfd>, <&dmac1 0xfe>;
538 dma-names = "tx", "rx", "tx", "rx";
539 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
543 hscif0: serial@e62c0000 {
544 compatible = "renesas,hscif-r8a7794",
545 "renesas,rcar-gen2-hscif", "renesas,hscif";
546 reg = <0 0xe62c0000 0 96>;
547 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
548 clocks = <&mstp7_clks R8A7794_CLK_HSCIF0>, <&zs_clk>,
550 clock-names = "fck", "brg_int", "scif_clk";
551 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
552 <&dmac1 0x39>, <&dmac1 0x3a>;
553 dma-names = "tx", "rx", "tx", "rx";
554 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
558 hscif1: serial@e62c8000 {
559 compatible = "renesas,hscif-r8a7794",
560 "renesas,rcar-gen2-hscif", "renesas,hscif";
561 reg = <0 0xe62c8000 0 96>;
562 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
563 clocks = <&mstp7_clks R8A7794_CLK_HSCIF1>, <&zs_clk>,
565 clock-names = "fck", "brg_int", "scif_clk";
566 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
567 <&dmac1 0x4d>, <&dmac1 0x4e>;
568 dma-names = "tx", "rx", "tx", "rx";
569 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
573 hscif2: serial@e62d0000 {
574 compatible = "renesas,hscif-r8a7794",
575 "renesas,rcar-gen2-hscif", "renesas,hscif";
576 reg = <0 0xe62d0000 0 96>;
577 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
578 clocks = <&mstp7_clks R8A7794_CLK_HSCIF2>, <&zs_clk>,
580 clock-names = "fck", "brg_int", "scif_clk";
581 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
582 <&dmac1 0x3b>, <&dmac1 0x3c>;
583 dma-names = "tx", "rx", "tx", "rx";
584 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
588 ether: ethernet@ee700000 {
589 compatible = "renesas,ether-r8a7794";
590 reg = <0 0xee700000 0 0x400>;
591 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
592 clocks = <&mstp8_clks R8A7794_CLK_ETHER>;
593 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
595 #address-cells = <1>;
600 avb: ethernet@e6800000 {
601 compatible = "renesas,etheravb-r8a7794",
602 "renesas,etheravb-rcar-gen2";
603 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
604 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
605 clocks = <&mstp8_clks R8A7794_CLK_ETHERAVB>;
606 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
607 #address-cells = <1>;
612 /* The memory map in the User's Manual maps the cores to bus numbers */
614 compatible = "renesas,i2c-r8a7794";
615 reg = <0 0xe6508000 0 0x40>;
616 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
617 clocks = <&mstp9_clks R8A7794_CLK_I2C0>;
618 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
619 #address-cells = <1>;
621 i2c-scl-internal-delay-ns = <6>;
626 compatible = "renesas,i2c-r8a7794";
627 reg = <0 0xe6518000 0 0x40>;
628 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
629 clocks = <&mstp9_clks R8A7794_CLK_I2C1>;
630 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
631 #address-cells = <1>;
633 i2c-scl-internal-delay-ns = <6>;
638 compatible = "renesas,i2c-r8a7794";
639 reg = <0 0xe6530000 0 0x40>;
640 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
641 clocks = <&mstp9_clks R8A7794_CLK_I2C2>;
642 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
643 #address-cells = <1>;
645 i2c-scl-internal-delay-ns = <6>;
650 compatible = "renesas,i2c-r8a7794";
651 reg = <0 0xe6540000 0 0x40>;
652 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
653 clocks = <&mstp9_clks R8A7794_CLK_I2C3>;
654 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
655 #address-cells = <1>;
657 i2c-scl-internal-delay-ns = <6>;
662 compatible = "renesas,i2c-r8a7794";
663 reg = <0 0xe6520000 0 0x40>;
664 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
665 clocks = <&mstp9_clks R8A7794_CLK_I2C4>;
666 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
667 #address-cells = <1>;
669 i2c-scl-internal-delay-ns = <6>;
674 compatible = "renesas,i2c-r8a7794";
675 reg = <0 0xe6528000 0 0x40>;
676 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
677 clocks = <&mstp9_clks R8A7794_CLK_I2C5>;
678 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
679 #address-cells = <1>;
681 i2c-scl-internal-delay-ns = <6>;
686 compatible = "renesas,iic-r8a7794", "renesas,rmobile-iic";
687 reg = <0 0xe6500000 0 0x425>;
688 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
689 clocks = <&mstp3_clks R8A7794_CLK_IIC0>;
690 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
691 <&dmac1 0x61>, <&dmac1 0x62>;
692 dma-names = "tx", "rx", "tx", "rx";
693 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
694 #address-cells = <1>;
700 compatible = "renesas,iic-r8a7794", "renesas,rmobile-iic";
701 reg = <0 0xe6510000 0 0x425>;
702 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
703 clocks = <&mstp3_clks R8A7794_CLK_IIC1>;
704 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
705 <&dmac1 0x65>, <&dmac1 0x66>;
706 dma-names = "tx", "rx", "tx", "rx";
707 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
708 #address-cells = <1>;
713 mmcif0: mmc@ee200000 {
714 compatible = "renesas,mmcif-r8a7794", "renesas,sh-mmcif";
715 reg = <0 0xee200000 0 0x80>;
716 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
717 clocks = <&mstp3_clks R8A7794_CLK_MMCIF0>;
718 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
719 <&dmac1 0xd1>, <&dmac1 0xd2>;
720 dma-names = "tx", "rx", "tx", "rx";
721 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
727 compatible = "renesas,sdhi-r8a7794";
728 reg = <0 0xee100000 0 0x328>;
729 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
730 clocks = <&mstp3_clks R8A7794_CLK_SDHI0>;
731 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
732 <&dmac1 0xcd>, <&dmac1 0xce>;
733 dma-names = "tx", "rx", "tx", "rx";
734 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
739 compatible = "renesas,sdhi-r8a7794";
740 reg = <0 0xee140000 0 0x100>;
741 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
742 clocks = <&mstp3_clks R8A7794_CLK_SDHI1>;
743 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
744 <&dmac1 0xc1>, <&dmac1 0xc2>;
745 dma-names = "tx", "rx", "tx", "rx";
746 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
751 compatible = "renesas,sdhi-r8a7794";
752 reg = <0 0xee160000 0 0x100>;
753 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
754 clocks = <&mstp3_clks R8A7794_CLK_SDHI2>;
755 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
756 <&dmac1 0xd3>, <&dmac1 0xd4>;
757 dma-names = "tx", "rx", "tx", "rx";
758 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
763 compatible = "renesas,qspi-r8a7794", "renesas,qspi";
764 reg = <0 0xe6b10000 0 0x2c>;
765 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
766 clocks = <&mstp9_clks R8A7794_CLK_QSPI_MOD>;
767 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
768 <&dmac1 0x17>, <&dmac1 0x18>;
769 dma-names = "tx", "rx", "tx", "rx";
770 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
772 #address-cells = <1>;
777 vin0: video@e6ef0000 {
778 compatible = "renesas,vin-r8a7794";
779 reg = <0 0xe6ef0000 0 0x1000>;
780 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
781 clocks = <&mstp8_clks R8A7794_CLK_VIN0>;
782 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
786 vin1: video@e6ef1000 {
787 compatible = "renesas,vin-r8a7794";
788 reg = <0 0xe6ef1000 0 0x1000>;
789 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
790 clocks = <&mstp8_clks R8A7794_CLK_VIN1>;
791 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
796 compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";
798 reg = <0 0xee090000 0 0xc00>,
799 <0 0xee080000 0 0x1100>;
800 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
801 clocks = <&mstp7_clks R8A7794_CLK_EHCI>;
802 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
806 #address-cells = <3>;
808 #interrupt-cells = <1>;
809 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
810 interrupt-map-mask = <0xff00 0 0 0x7>;
811 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
812 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
813 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
816 reg = <0x800 0 0 0 0>;
823 reg = <0x1000 0 0 0 0>;
831 compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";
833 reg = <0 0xee0d0000 0 0xc00>,
834 <0 0xee0c0000 0 0x1100>;
835 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
836 clocks = <&mstp7_clks R8A7794_CLK_EHCI>;
837 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
841 #address-cells = <3>;
843 #interrupt-cells = <1>;
844 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
845 interrupt-map-mask = <0xff00 0 0 0x7>;
846 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
847 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
848 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
851 reg = <0x800 0 0 0 0>;
858 reg = <0x1000 0 0 0 0>;
865 hsusb: usb@e6590000 {
866 compatible = "renesas,usbhs-r8a7794", "renesas,rcar-gen2-usbhs";
867 reg = <0 0xe6590000 0 0x100>;
868 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
869 clocks = <&mstp7_clks R8A7794_CLK_HSUSB>;
870 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
871 renesas,buswait = <4>;
877 usbphy: usb-phy@e6590100 {
878 compatible = "renesas,usb-phy-r8a7794";
879 reg = <0 0xe6590100 0 0x100>;
880 #address-cells = <1>;
882 clocks = <&mstp7_clks R8A7794_CLK_HSUSB>;
883 clock-names = "usbhs";
884 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
887 usb0: usb-channel@0 {
891 usb2: usb-channel@2 {
898 compatible = "renesas,vsp1";
899 reg = <0 0xfe928000 0 0x8000>;
900 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
901 clocks = <&mstp1_clks R8A7794_CLK_VSP1_S>;
902 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
906 compatible = "renesas,vsp1";
907 reg = <0 0xfe930000 0 0x8000>;
908 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
909 clocks = <&mstp1_clks R8A7794_CLK_VSP1_DU0>;
910 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
913 du: display@feb00000 {
914 compatible = "renesas,du-r8a7794";
915 reg = <0 0xfeb00000 0 0x40000>;
917 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
918 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
919 clocks = <&mstp7_clks R8A7794_CLK_DU0>,
920 <&mstp7_clks R8A7794_CLK_DU0>;
921 clock-names = "du.0", "du.1";
925 #address-cells = <1>;
930 du_out_rgb0: endpoint {
935 du_out_rgb1: endpoint {
942 compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
943 reg = <0 0xe6e80000 0 0x1000>;
944 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
945 clocks = <&mstp9_clks R8A7794_CLK_RCAN0>,
946 <&cpg_clocks R8A7794_CLK_RCAN>, <&can_clk>;
947 clock-names = "clkp1", "clkp2", "can_clk";
948 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
953 compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
954 reg = <0 0xe6e88000 0 0x1000>;
955 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
956 clocks = <&mstp9_clks R8A7794_CLK_RCAN1>,
957 <&cpg_clocks R8A7794_CLK_RCAN>, <&can_clk>;
958 clock-names = "clkp1", "clkp2", "can_clk";
959 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
964 #address-cells = <2>;
968 /* External root clock */
970 compatible = "fixed-clock";
972 /* This value must be overriden by the board. */
973 clock-frequency = <0>;
976 /* External USB clock - can be overridden by the board */
977 usb_extal_clk: usb_extal {
978 compatible = "fixed-clock";
980 clock-frequency = <48000000>;
983 /* External CAN clock */
985 compatible = "fixed-clock";
987 /* This value must be overridden by the board. */
988 clock-frequency = <0>;
991 /* External SCIF clock */
993 compatible = "fixed-clock";
995 /* This value must be overridden by the board. */
996 clock-frequency = <0>;
1000 * The external audio clocks are configured as 0 Hz fixed
1001 * frequency clocks by default. Boards that provide audio
1002 * clocks should override them.
1004 audio_clka: audio_clka {
1005 compatible = "fixed-clock";
1007 clock-frequency = <0>;
1009 audio_clkb: audio_clkb {
1010 compatible = "fixed-clock";
1012 clock-frequency = <0>;
1014 audio_clkc: audio_clkc {
1015 compatible = "fixed-clock";
1017 clock-frequency = <0>;
1020 /* Special CPG clocks */
1021 cpg_clocks: cpg_clocks@e6150000 {
1022 compatible = "renesas,r8a7794-cpg-clocks",
1023 "renesas,rcar-gen2-cpg-clocks";
1024 reg = <0 0xe6150000 0 0x1000>;
1025 clocks = <&extal_clk &usb_extal_clk>;
1027 clock-output-names = "main", "pll0", "pll1", "pll3",
1028 "lb", "qspi", "sdh", "sd0", "z",
1030 #power-domain-cells = <0>;
1032 /* Variable factor clocks */
1033 sd2_clk: sd2@e6150078 {
1034 compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock";
1035 reg = <0 0xe6150078 0 4>;
1036 clocks = <&pll1_div2_clk>;
1039 sd3_clk: sd3@e615026c {
1040 compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock";
1041 reg = <0 0xe615026c 0 4>;
1042 clocks = <&pll1_div2_clk>;
1045 mmc0_clk: mmc0@e6150240 {
1046 compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock";
1047 reg = <0 0xe6150240 0 4>;
1048 clocks = <&pll1_div2_clk>;
1052 /* Fixed factor clocks */
1053 pll1_div2_clk: pll1_div2 {
1054 compatible = "fixed-factor-clock";
1055 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1061 compatible = "fixed-factor-clock";
1062 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1068 compatible = "fixed-factor-clock";
1069 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1075 compatible = "fixed-factor-clock";
1076 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1082 compatible = "fixed-factor-clock";
1083 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1089 compatible = "fixed-factor-clock";
1090 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1096 compatible = "fixed-factor-clock";
1097 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1103 compatible = "fixed-factor-clock";
1104 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1110 compatible = "fixed-factor-clock";
1111 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1117 compatible = "fixed-factor-clock";
1118 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1124 compatible = "fixed-factor-clock";
1125 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1127 clock-div = <(48 * 1024)>;
1130 oscclk_clk: oscclk {
1131 compatible = "fixed-factor-clock";
1132 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1134 clock-div = <(12 * 1024)>;
1138 compatible = "fixed-factor-clock";
1139 clocks = <&cpg_clocks R8A7794_CLK_PLL3>;
1145 compatible = "fixed-factor-clock";
1146 clocks = <&cpg_clocks R8A7794_CLK_PLL3>;
1152 compatible = "fixed-factor-clock";
1153 clocks = <&cpg_clocks R8A7794_CLK_PLL3>;
1159 compatible = "fixed-factor-clock";
1160 clocks = <&pll1_div2_clk>;
1166 compatible = "fixed-factor-clock";
1167 clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
1174 compatible = "fixed-factor-clock";
1175 clocks = <&extal_clk>;
1182 mstp0_clks: mstp0_clks@e6150130 {
1183 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1184 reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>;
1187 clock-indices = <R8A7794_CLK_MSIOF0>;
1188 clock-output-names = "msiof0";
1190 mstp1_clks: mstp1_clks@e6150134 {
1191 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1192 reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
1193 clocks = <&zs_clk>, <&zs_clk>, <&p_clk>, <&zg_clk>, <&zs_clk>,
1194 <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, <&cp_clk>,
1195 <&zs_clk>, <&zs_clk>;
1198 R8A7794_CLK_VCP0 R8A7794_CLK_VPC0 R8A7794_CLK_TMU1
1199 R8A7794_CLK_3DG R8A7794_CLK_2DDMAC R8A7794_CLK_FDP1_0
1200 R8A7794_CLK_TMU3 R8A7794_CLK_TMU2 R8A7794_CLK_CMT0
1201 R8A7794_CLK_TMU0 R8A7794_CLK_VSP1_DU0 R8A7794_CLK_VSP1_S
1203 clock-output-names =
1204 "vcp0", "vpc0", "tmu1", "3dg", "2ddmac", "fdp1-0",
1205 "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du0", "vsps";
1207 mstp2_clks: mstp2_clks@e6150138 {
1208 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1209 reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
1210 clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
1211 <&mp_clk>, <&mp_clk>, <&mp_clk>,
1212 <&zs_clk>, <&zs_clk>;
1215 R8A7794_CLK_SCIFA2 R8A7794_CLK_SCIFA1 R8A7794_CLK_SCIFA0
1216 R8A7794_CLK_MSIOF2 R8A7794_CLK_SCIFB0 R8A7794_CLK_SCIFB1
1217 R8A7794_CLK_MSIOF1 R8A7794_CLK_SCIFB2
1218 R8A7794_CLK_SYS_DMAC1 R8A7794_CLK_SYS_DMAC0
1220 clock-output-names =
1221 "scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
1222 "scifb1", "msiof1", "scifb2",
1223 "sys-dmac1", "sys-dmac0";
1225 mstp3_clks: mstp3_clks@e615013c {
1226 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1227 reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
1228 clocks = <&sd3_clk>, <&sd2_clk>, <&cpg_clocks R8A7794_CLK_SD0>,
1229 <&mmc0_clk>, <&hp_clk>, <&hp_clk>, <&rclk_clk>,
1230 <&hp_clk>, <&hp_clk>;
1233 R8A7794_CLK_SDHI2 R8A7794_CLK_SDHI1 R8A7794_CLK_SDHI0
1234 R8A7794_CLK_MMCIF0 R8A7794_CLK_IIC0
1235 R8A7794_CLK_IIC1 R8A7794_CLK_CMT1
1236 R8A7794_CLK_USBDMAC0 R8A7794_CLK_USBDMAC1
1238 clock-output-names =
1239 "sdhi2", "sdhi1", "sdhi0",
1240 "mmcif0", "i2c6", "i2c7",
1241 "cmt1", "usbdmac0", "usbdmac1";
1243 mstp4_clks: mstp4_clks@e6150140 {
1244 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1245 reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
1248 clock-indices = <R8A7794_CLK_IRQC>;
1249 clock-output-names = "irqc";
1251 mstp5_clks: mstp5_clks@e6150144 {
1252 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1253 reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
1254 clocks = <&hp_clk>, <&p_clk>;
1256 clock-indices = <R8A7794_CLK_AUDIO_DMAC0
1258 clock-output-names = "audmac0", "pwm";
1260 mstp7_clks: mstp7_clks@e615014c {
1261 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1262 reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
1263 clocks = <&mp_clk>, <&mp_clk>,
1264 <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
1265 <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
1269 R8A7794_CLK_EHCI R8A7794_CLK_HSUSB
1270 R8A7794_CLK_HSCIF2 R8A7794_CLK_SCIF5
1271 R8A7794_CLK_SCIF4 R8A7794_CLK_HSCIF1 R8A7794_CLK_HSCIF0
1272 R8A7794_CLK_SCIF3 R8A7794_CLK_SCIF2 R8A7794_CLK_SCIF1
1273 R8A7794_CLK_SCIF0 R8A7794_CLK_DU0
1275 clock-output-names =
1277 "hscif2", "scif5", "scif4", "hscif1", "hscif0",
1278 "scif3", "scif2", "scif1", "scif0", "du0";
1280 mstp8_clks: mstp8_clks@e6150990 {
1281 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1282 reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
1283 clocks = <&zg_clk>, <&zg_clk>, <&hp_clk>, <&p_clk>;
1286 R8A7794_CLK_VIN1 R8A7794_CLK_VIN0
1287 R8A7794_CLK_ETHERAVB R8A7794_CLK_ETHER
1289 clock-output-names =
1290 "vin1", "vin0", "etheravb", "ether";
1292 mstp9_clks: mstp9_clks@e6150994 {
1293 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1294 reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
1295 clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
1296 <&cp_clk>, <&cp_clk>, <&cp_clk>, <&p_clk>,
1297 <&p_clk>, <&cpg_clocks R8A7794_CLK_QSPI>,
1298 <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>,
1299 <&hp_clk>, <&hp_clk>;
1301 clock-indices = <R8A7794_CLK_GPIO6 R8A7794_CLK_GPIO5
1302 R8A7794_CLK_GPIO4 R8A7794_CLK_GPIO3
1303 R8A7794_CLK_GPIO2 R8A7794_CLK_GPIO1
1304 R8A7794_CLK_GPIO0 R8A7794_CLK_RCAN1
1305 R8A7794_CLK_RCAN0 R8A7794_CLK_QSPI_MOD
1306 R8A7794_CLK_I2C5 R8A7794_CLK_I2C4
1307 R8A7794_CLK_I2C3 R8A7794_CLK_I2C2
1308 R8A7794_CLK_I2C1 R8A7794_CLK_I2C0>;
1309 clock-output-names =
1310 "gpio6", "gpio5", "gpio4", "gpio3", "gpio2",
1311 "gpio1", "gpio0", "rcan1", "rcan0", "qspi_mod",
1312 "i2c5", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0";
1314 mstp10_clks: mstp10_clks@e6150998 {
1315 compatible = "renesas,r8a7794-mstp-clocks",
1316 "renesas,cpg-mstp-clocks";
1317 reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
1319 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1320 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1321 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1322 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1323 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1324 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1325 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1326 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1327 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1328 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1330 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1331 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1332 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1333 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1334 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1335 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1336 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1337 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1338 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1339 <&mstp10_clks R8A7794_CLK_SCU_ALL>;
1341 clock-indices = <R8A7794_CLK_SSI_ALL
1342 R8A7794_CLK_SSI9 R8A7794_CLK_SSI8
1343 R8A7794_CLK_SSI7 R8A7794_CLK_SSI6
1344 R8A7794_CLK_SSI5 R8A7794_CLK_SSI4
1345 R8A7794_CLK_SSI3 R8A7794_CLK_SSI2
1346 R8A7794_CLK_SSI1 R8A7794_CLK_SSI0
1348 R8A7794_CLK_SCU_DVC1
1349 R8A7794_CLK_SCU_DVC0
1350 R8A7794_CLK_SCU_CTU1_MIX1
1351 R8A7794_CLK_SCU_CTU0_MIX0
1352 R8A7794_CLK_SCU_SRC6
1353 R8A7794_CLK_SCU_SRC5
1354 R8A7794_CLK_SCU_SRC4
1355 R8A7794_CLK_SCU_SRC3
1356 R8A7794_CLK_SCU_SRC2
1357 R8A7794_CLK_SCU_SRC1>;
1358 clock-output-names = "ssi-all", "ssi9", "ssi8", "ssi7",
1359 "ssi6", "ssi5", "ssi4", "ssi3",
1360 "ssi2", "ssi1", "ssi0",
1361 "scu-all", "scu-dvc1", "scu-dvc0",
1362 "scu-ctu1-mix1", "scu-ctu0-mix0",
1363 "scu-src6", "scu-src5", "scu-src4",
1364 "scu-src3", "scu-src2", "scu-src1";
1366 mstp11_clks: mstp11_clks@e615099c {
1367 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1368 reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;
1369 clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>;
1372 R8A7794_CLK_SCIFA3 R8A7794_CLK_SCIFA4 R8A7794_CLK_SCIFA5
1374 clock-output-names = "scifa3", "scifa4", "scifa5";
1378 sysc: system-controller@e6180000 {
1379 compatible = "renesas,r8a7794-sysc";
1380 reg = <0 0xe6180000 0 0x0200>;
1381 #power-domain-cells = <1>;
1384 ipmmu_sy0: mmu@e6280000 {
1385 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1386 reg = <0 0xe6280000 0 0x1000>;
1387 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1388 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1390 status = "disabled";
1393 ipmmu_sy1: mmu@e6290000 {
1394 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1395 reg = <0 0xe6290000 0 0x1000>;
1396 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1398 status = "disabled";
1401 ipmmu_ds: mmu@e6740000 {
1402 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1403 reg = <0 0xe6740000 0 0x1000>;
1404 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1405 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1407 status = "disabled";
1410 ipmmu_mp: mmu@ec680000 {
1411 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1412 reg = <0 0xec680000 0 0x1000>;
1413 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1415 status = "disabled";
1418 ipmmu_mx: mmu@fe951000 {
1419 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1420 reg = <0 0xfe951000 0 0x1000>;
1421 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1422 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1424 status = "disabled";
1427 ipmmu_gp: mmu@e62a0000 {
1428 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1429 reg = <0 0xe62a0000 0 0x1000>;
1430 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
1431 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
1433 status = "disabled";
1436 rcar_sound: sound@ec500000 {
1438 * #sound-dai-cells is required
1440 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1441 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1443 compatible = "renesas,rcar_sound-r8a7794",
1444 "renesas,rcar_sound-gen2";
1445 reg = <0 0xec500000 0 0x1000>, /* SCU */
1446 <0 0xec5a0000 0 0x100>, /* ADG */
1447 <0 0xec540000 0 0x1000>, /* SSIU */
1448 <0 0xec541000 0 0x280>, /* SSI */
1449 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
1450 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1452 clocks = <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1453 <&mstp10_clks R8A7794_CLK_SSI9>,
1454 <&mstp10_clks R8A7794_CLK_SSI8>,
1455 <&mstp10_clks R8A7794_CLK_SSI7>,
1456 <&mstp10_clks R8A7794_CLK_SSI6>,
1457 <&mstp10_clks R8A7794_CLK_SSI5>,
1458 <&mstp10_clks R8A7794_CLK_SSI4>,
1459 <&mstp10_clks R8A7794_CLK_SSI3>,
1460 <&mstp10_clks R8A7794_CLK_SSI2>,
1461 <&mstp10_clks R8A7794_CLK_SSI1>,
1462 <&mstp10_clks R8A7794_CLK_SSI0>,
1463 <&mstp10_clks R8A7794_CLK_SCU_SRC6>,
1464 <&mstp10_clks R8A7794_CLK_SCU_SRC5>,
1465 <&mstp10_clks R8A7794_CLK_SCU_SRC4>,
1466 <&mstp10_clks R8A7794_CLK_SCU_SRC3>,
1467 <&mstp10_clks R8A7794_CLK_SCU_SRC2>,
1468 <&mstp10_clks R8A7794_CLK_SCU_SRC1>,
1469 <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
1470 <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
1471 <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
1472 <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
1473 <&mstp10_clks R8A7794_CLK_SCU_DVC0>,
1474 <&mstp10_clks R8A7794_CLK_SCU_DVC1>,
1475 <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
1477 clock-names = "ssi-all",
1478 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1479 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1480 "src.6", "src.5", "src.4", "src.3", "src.2",
1485 "clk_a", "clk_b", "clk_c", "clk_i";
1486 power-domains = <&cpg_clocks>;
1488 status = "disabled";
1492 dmas = <&audma0 0xbc>;
1496 dmas = <&audma0 0xbe>;
1519 status = "disabled";
1522 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1523 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1524 dma-names = "rx", "tx";
1527 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1528 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1529 dma-names = "rx", "tx";
1532 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1533 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1534 dma-names = "rx", "tx";
1537 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1538 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1539 dma-names = "rx", "tx";
1542 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1543 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1544 dma-names = "rx", "tx";
1547 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1548 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1549 dma-names = "rx", "tx";
1555 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1556 dmas = <&audma0 0x01>, <&audma0 0x02>,
1557 <&audma0 0x15>, <&audma0 0x16>;
1558 dma-names = "rx", "tx", "rxu", "txu";
1561 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1562 dmas = <&audma0 0x03>, <&audma0 0x04>,
1563 <&audma0 0x49>, <&audma0 0x4a>;
1564 dma-names = "rx", "tx", "rxu", "txu";
1567 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1568 dmas = <&audma0 0x05>, <&audma0 0x06>,
1569 <&audma0 0x63>, <&audma0 0x64>;
1570 dma-names = "rx", "tx", "rxu", "txu";
1573 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1574 dmas = <&audma0 0x07>, <&audma0 0x08>,
1575 <&audma0 0x6f>, <&audma0 0x70>;
1576 dma-names = "rx", "tx", "rxu", "txu";
1579 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1580 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1581 <&audma0 0x71>, <&audma0 0x72>;
1582 dma-names = "rx", "tx", "rxu", "txu";
1585 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1586 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1587 <&audma0 0x73>, <&audma0 0x74>;
1588 dma-names = "rx", "tx", "rxu", "txu";
1591 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1592 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1593 <&audma0 0x75>, <&audma0 0x76>;
1594 dma-names = "rx", "tx", "rxu", "txu";
1597 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1598 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1599 <&audma0 0x79>, <&audma0 0x7a>;
1600 dma-names = "rx", "tx", "rxu", "txu";
1603 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1604 dmas = <&audma0 0x11>, <&audma0 0x12>,
1605 <&audma0 0x7b>, <&audma0 0x7c>;
1606 dma-names = "rx", "tx", "rxu", "txu";
1609 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1610 dmas = <&audma0 0x13>, <&audma0 0x14>,
1611 <&audma0 0x7d>, <&audma0 0x7e>;
1612 dma-names = "rx", "tx", "rxu", "txu";