arch/arm/boot/dts/stih410.dtsi

   1 /*
   2  * Copyright (C) 2014 STMicroelectronics Limited.
   3  * Author: Peter Griffin <peter.griffin@linaro.org>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * publishhed by the Free Software Foundation.
   8  */
   9 #include "stih410-clock.dtsi"
  10 #include "stih407-family.dtsi"
  11 #include "stih410-pinctrl.dtsi"
  12 / {
  13         aliases {
  14                 bdisp0 = &bdisp0;
  15         };
  16
  17         soc {
  18                 usb2_picophy1: phy2 {
  19                         compatible = "st,stih407-usb2-phy";
  20                         #phy-cells = <0>;
  21                         st,syscfg = <&syscfg_core 0xf8 0xf4>;
  22                         resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
  23                                  <&picophyreset STIH407_PICOPHY0_RESET>;
  24                         reset-names = "global", "port";
  25
  26                         status = "disabled";
  27                 };
  28
  29                 usb2_picophy2: phy3 {
  30                         compatible = "st,stih407-usb2-phy";
  31                         #phy-cells = <0>;
  32                         st,syscfg = <&syscfg_core 0xfc 0xf4>;
  33                         resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
  34                                  <&picophyreset STIH407_PICOPHY1_RESET>;
  35                         reset-names = "global", "port";
  36
  37                         status = "disabled";
  38                 };
  39
  40                 ohci0: usb@9a03c00 {
  41                         compatible = "st,st-ohci-300x";
  42                         reg = <0x9a03c00 0x100>;
  43                         interrupts = <GIC_SPI 180 IRQ_TYPE_NONE>;
  44                         clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>;
  45                         resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>,
  46                                  <&softreset STIH407_USB2_PORT0_SOFTRESET>;
  47                         reset-names = "power", "softreset";
  48                         phys = <&usb2_picophy1>;
  49                         phy-names = "usb";
  50
  51                         status = "disabled";
  52                 };
  53
  54                 ehci0: usb@9a03e00 {
  55                         compatible = "st,st-ehci-300x";
  56                         reg = <0x9a03e00 0x100>;
  57                         interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
  58                         pinctrl-names = "default";
  59                         pinctrl-0 = <&pinctrl_usb0>;
  60                         clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>;
  61                         resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>,
  62                                  <&softreset STIH407_USB2_PORT0_SOFTRESET>;
  63                         reset-names = "power", "softreset";
  64                         phys = <&usb2_picophy1>;
  65                         phy-names = "usb";
  66
  67                         status = "disabled";
  68                 };
  69
  70                 ohci1: usb@9a83c00 {
  71                         compatible = "st,st-ohci-300x";
  72                         reg = <0x9a83c00 0x100>;
  73                         interrupts = <GIC_SPI 181 IRQ_TYPE_NONE>;
  74                         clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>;
  75                         resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>,
  76                                  <&softreset STIH407_USB2_PORT1_SOFTRESET>;
  77                         reset-names = "power", "softreset";
  78                         phys = <&usb2_picophy2>;
  79                         phy-names = "usb";
  80
  81                         status = "disabled";
  82                 };
  83
  84                 ehci1: usb@9a83e00 {
  85                         compatible = "st,st-ehci-300x";
  86                         reg = <0x9a83e00 0x100>;
  87                         interrupts = <GIC_SPI 153 IRQ_TYPE_NONE>;
  88                         pinctrl-names = "default";
  89                         pinctrl-0 = <&pinctrl_usb1>;
  90                         clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>;
  91                         resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>,
  92                                  <&softreset STIH407_USB2_PORT1_SOFTRESET>;
  93                         reset-names = "power", "softreset";
  94                         phys = <&usb2_picophy2>;
  95                         phy-names = "usb";
  96
  97                         status = "disabled";
  98                 };
  99
 100                 sti-display-subsystem {
 101                         compatible = "st,sti-display-subsystem";
 102                         #address-cells = <1>;
 103                         #size-cells = <1>;
 104
 105                         assigned-clocks = <&clk_s_d2_quadfs 0>,
 106                                           <&clk_s_d2_quadfs 0>,
 107                                           <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>,
 108                                           <&clk_s_d2_flexgen CLK_PIX_AUX_DISP>,
 109                                           <&clk_s_d2_flexgen CLK_PIX_GDP1>,
 110                                           <&clk_s_d2_flexgen CLK_PIX_GDP2>,
 111                                           <&clk_s_d2_flexgen CLK_PIX_GDP3>,
 112                                           <&clk_s_d2_flexgen CLK_PIX_GDP4>;
 113
 114                         assigned-clock-parents = <0>,
 115                                                  <0>,
 116                                                  <&clk_s_d2_quadfs 0>,
 117                                                  <&clk_s_d2_quadfs 0>,
 118                                                  <&clk_s_d2_quadfs 0>,
 119                                                  <&clk_s_d2_quadfs 0>,
 120                                                  <&clk_s_d2_quadfs 0>,
 121                                                  <&clk_s_d2_quadfs 0>;
 122
 123                         assigned-clock-rates = <297000000>, <297000000>;
 124
 125                         ranges;
 126
 127                         sti-compositor@9d11000 {
 128                                 compatible = "st,stih407-compositor";
 129                                 reg = <0x9d11000 0x1000>;
 130
 131                                 clock-names = "compo_main",
 132                                               "compo_aux",
 133                                               "pix_main",
 134                                               "pix_aux",
 135                                               "pix_gdp1",
 136                                               "pix_gdp2",
 137                                               "pix_gdp3",
 138                                               "pix_gdp4",
 139                                               "main_parent",
 140                                               "aux_parent";
 141
 142                                 clocks = <&clk_s_c0_flexgen CLK_COMPO_DVP>,
 143                                          <&clk_s_c0_flexgen CLK_COMPO_DVP>,
 144                                          <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>,
 145                                          <&clk_s_d2_flexgen CLK_PIX_AUX_DISP>,
 146                                          <&clk_s_d2_flexgen CLK_PIX_GDP1>,
 147                                          <&clk_s_d2_flexgen CLK_PIX_GDP2>,
 148                                          <&clk_s_d2_flexgen CLK_PIX_GDP3>,
 149                                          <&clk_s_d2_flexgen CLK_PIX_GDP4>,
 150                                          <&clk_s_d2_quadfs 0>,
 151                                          <&clk_s_d2_quadfs 1>;
 152
 153                                 reset-names = "compo-main", "compo-aux";
 154                                 resets = <&softreset STIH407_COMPO_SOFTRESET>,
 155                                          <&softreset STIH407_COMPO_SOFTRESET>;
 156                                 st,vtg = <&vtg_main>, <&vtg_aux>;
 157                         };
 158
 159                         sti-tvout@8d08000 {
 160                                 compatible = "st,stih407-tvout";
 161                                 reg = <0x8d08000 0x1000>;
 162                                 reg-names = "tvout-reg";
 163                                 reset-names = "tvout";
 164                                 resets = <&softreset STIH407_HDTVOUT_SOFTRESET>;
 165                                 #address-cells = <1>;
 166                                 #size-cells = <1>;
 167                                 assigned-clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>,
 168                                                   <&clk_s_d2_flexgen CLK_TMDS_HDMI>,
 169                                                   <&clk_s_d2_flexgen CLK_REF_HDMIPHY>,
 170                                                   <&clk_s_d0_flexgen CLK_PCM_0>,
 171                                                   <&clk_s_d2_flexgen CLK_PIX_HDDAC>,
 172                                                   <&clk_s_d2_flexgen CLK_HDDAC>;
 173
 174                                 assigned-clock-parents = <&clk_s_d2_quadfs 0>,
 175                                                          <&clk_tmdsout_hdmi>,
 176                                                          <&clk_s_d2_quadfs 0>,
 177                                                          <&clk_s_d0_quadfs 0>,
 178                                                          <&clk_s_d2_quadfs 0>,
 179                                                          <&clk_s_d2_quadfs 0>;
 180                         };
 181
 182                         sti-hdmi@8d04000 {
 183                                 compatible = "st,stih407-hdmi";
 184                                 reg = <0x8d04000 0x1000>;
 185                                 reg-names = "hdmi-reg";
 186                                 interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>;
 187                                 interrupt-names = "irq";
 188                                 clock-names = "pix",
 189                                               "tmds",
 190                                               "phy",
 191                                               "audio",
 192                                               "main_parent",
 193                                               "aux_parent";
 194
 195                                 clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>,
 196                                          <&clk_s_d2_flexgen CLK_TMDS_HDMI>,
 197                                          <&clk_s_d2_flexgen CLK_REF_HDMIPHY>,
 198                                          <&clk_s_d0_flexgen CLK_PCM_0>,
 199                                          <&clk_s_d2_quadfs 0>,
 200                                          <&clk_s_d2_quadfs 1>;
 201
 202                                 hdmi,hpd-gpio = <&pio5 3>;
 203                                 reset-names = "hdmi";
 204                                 resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>;
 205                                 ddc = <&hdmiddc>;
 206                         };
 207
 208                         sti-hda@8d02000 {
 209                                 compatible = "st,stih407-hda";
 210                                 reg = <0x8d02000 0x400>, <0x92b0120 0x4>;
 211                                 reg-names = "hda-reg", "video-dacs-ctrl";
 212                                 clock-names = "pix",
 213                                               "hddac",
 214                                               "main_parent",
 215                                               "aux_parent";
 216                                 clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>,
 217                                          <&clk_s_d2_flexgen CLK_HDDAC>,
 218                                          <&clk_s_d2_quadfs 0>,
 219                                          <&clk_s_d2_quadfs 1>;
 220                         };
 221                 };
 222
 223                 bdisp0:bdisp@9f10000 {
 224                         compatible = "st,stih407-bdisp";
 225                         reg = <0x9f10000 0x1000>;
 226                         interrupts = <GIC_SPI 38 IRQ_TYPE_NONE>;
 227                         clock-names = "bdisp";
 228                         clocks = <&clk_s_c0_flexgen CLK_IC_BDISP_0>;
 229                 };
 230         };
 231 };