arch/arm/boot/dts/uniphier-ph1-pro4.dtsi

   1 /*
   2  * Device Tree Source for UniPhier PH1-Pro4 SoC
   3  *
   4  * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
   5  *
   6  * This file is dual-licensed: you can use it either under the terms
   7  * of the GPL or the X11 license, at your option. Note that this dual
   8  * licensing only applies to this file, and not this project as a
   9  * whole.
  10  *
  11  *  a) This file is free software; you can redistribute it and/or
  12  *     modify it under the terms of the GNU General Public License as
  13  *     published by the Free Software Foundation; either version 2 of the
  14  *     License, or (at your option) any later version.
  15  *
  16  *     This file is distributed in the hope that it will be useful,
  17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *     GNU General Public License for more details.
  20  *
  21  * Or, alternatively,
  22  *
  23  *  b) Permission is hereby granted, free of charge, to any person
  24  *     obtaining a copy of this software and associated documentation
  25  *     files (the "Software"), to deal in the Software without
  26  *     restriction, including without limitation the rights to use,
  27  *     copy, modify, merge, publish, distribute, sublicense, and/or
  28  *     sell copies of the Software, and to permit persons to whom the
  29  *     Software is furnished to do so, subject to the following
  30  *     conditions:
  31  *
  32  *     The above copyright notice and this permission notice shall be
  33  *     included in all copies or substantial portions of the Software.
  34  *
  35  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  42  *     OTHER DEALINGS IN THE SOFTWARE.
  43  */
  44
  45 /include/ "uniphier-common32.dtsi"
  46
  47 / {
  48         compatible = "socionext,ph1-pro4";
  49
  50         cpus {
  51                 #address-cells = <1>;
  52                 #size-cells = <0>;
  53                 enable-method = "socionext,uniphier-smp";
  54
  55                 cpu@0 {
  56                         device_type = "cpu";
  57                         compatible = "arm,cortex-a9";
  58                         reg = <0>;
  59                         next-level-cache = <&l2>;
  60                 };
  61
  62                 cpu@1 {
  63                         device_type = "cpu";
  64                         compatible = "arm,cortex-a9";
  65                         reg = <1>;
  66                         next-level-cache = <&l2>;
  67                 };
  68         };
  69
  70         clocks {
  71                 arm_timer_clk: arm_timer_clk {
  72                         #clock-cells = <0>;
  73                         compatible = "fixed-clock";
  74                         clock-frequency = <50000000>;
  75                 };
  76
  77                 uart_clk: uart_clk {
  78                         #clock-cells = <0>;
  79                         compatible = "fixed-clock";
  80                         clock-frequency = <73728000>;
  81                 };
  82
  83                 i2c_clk: i2c_clk {
  84                         #clock-cells = <0>;
  85                         compatible = "fixed-clock";
  86                         clock-frequency = <50000000>;
  87                 };
  88         };
  89 };
  90
  91 &soc {
  92         l2: l2-cache@500c0000 {
  93                 compatible = "socionext,uniphier-system-cache";
  94                 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>;
  95                 interrupts = <0 174 4>, <0 175 4>;
  96                 cache-unified;
  97                 cache-size = <(768 * 1024)>;
  98                 cache-sets = <256>;
  99                 cache-line-size = <128>;
 100                 cache-level = <2>;
 101         };
 102
 103         i2c0: i2c@58780000 {
 104                 compatible = "socionext,uniphier-fi2c";
 105                 status = "disabled";
 106                 reg = <0x58780000 0x80>;
 107                 #address-cells = <1>;
 108                 #size-cells = <0>;
 109                 interrupts = <0 41 4>;
 110                 pinctrl-names = "default";
 111                 pinctrl-0 = <&pinctrl_i2c0>;
 112                 clocks = <&i2c_clk>;
 113                 clock-frequency = <100000>;
 114         };
 115
 116         i2c1: i2c@58781000 {
 117                 compatible = "socionext,uniphier-fi2c";
 118                 status = "disabled";
 119                 reg = <0x58781000 0x80>;
 120                 #address-cells = <1>;
 121                 #size-cells = <0>;
 122                 interrupts = <0 42 4>;
 123                 pinctrl-names = "default";
 124                 pinctrl-0 = <&pinctrl_i2c1>;
 125                 clocks = <&i2c_clk>;
 126                 clock-frequency = <100000>;
 127         };
 128
 129         i2c2: i2c@58782000 {
 130                 compatible = "socionext,uniphier-fi2c";
 131                 status = "disabled";
 132                 reg = <0x58782000 0x80>;
 133                 #address-cells = <1>;
 134                 #size-cells = <0>;
 135                 interrupts = <0 43 4>;
 136                 pinctrl-names = "default";
 137                 pinctrl-0 = <&pinctrl_i2c2>;
 138                 clocks = <&i2c_clk>;
 139                 clock-frequency = <100000>;
 140         };
 141
 142         i2c3: i2c@58783000 {
 143                 compatible = "socionext,uniphier-fi2c";
 144                 status = "disabled";
 145                 reg = <0x58783000 0x80>;
 146                 #address-cells = <1>;
 147                 #size-cells = <0>;
 148                 interrupts = <0 44 4>;
 149                 pinctrl-names = "default";
 150                 pinctrl-0 = <&pinctrl_i2c3>;
 151                 clocks = <&i2c_clk>;
 152                 clock-frequency = <100000>;
 153         };
 154
 155         /* i2c4 does not exist */
 156
 157         /* chip-internal connection for DMD */
 158         i2c5: i2c@58785000 {
 159                 compatible = "socionext,uniphier-fi2c";
 160                 reg = <0x58785000 0x80>;
 161                 #address-cells = <1>;
 162                 #size-cells = <0>;
 163                 interrupts = <0 25 4>;
 164                 clocks = <&i2c_clk>;
 165                 clock-frequency = <400000>;
 166         };
 167
 168         /* chip-internal connection for HDMI */
 169         i2c6: i2c@58786000 {
 170                 compatible = "socionext,uniphier-fi2c";
 171                 reg = <0x58786000 0x80>;
 172                 #address-cells = <1>;
 173                 #size-cells = <0>;
 174                 interrupts = <0 26 4>;
 175                 clocks = <&i2c_clk>;
 176                 clock-frequency = <400000>;
 177         };
 178
 179         usb2: usb@5a800100 {
 180                 compatible = "socionext,uniphier-ehci", "generic-ehci";
 181                 status = "disabled";
 182                 reg = <0x5a800100 0x100>;
 183                 interrupts = <0 80 4>;
 184                 pinctrl-names = "default";
 185                 pinctrl-0 = <&pinctrl_usb2>;
 186         };
 187
 188         usb3: usb@5a810100 {
 189                 compatible = "socionext,uniphier-ehci", "generic-ehci";
 190                 status = "disabled";
 191                 reg = <0x5a810100 0x100>;
 192                 interrupts = <0 81 4>;
 193                 pinctrl-names = "default";
 194                 pinctrl-0 = <&pinctrl_usb3>;
 195         };
 196 };
 197
 198 &refclk {
 199         clock-frequency = <25000000>;
 200 };
 201
 202 &pinctrl {
 203         compatible = "socionext,ph1-pro4-pinctrl", "syscon";
 204 };