arch/arm/mach-imx/hardware.h

   1 /*
   2  * Copyright 2004-2007, 2014 Freescale Semiconductor, Inc. All Rights Reserved.
   3  * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License
   7  * as published by the Free Software Foundation; either version 2
   8  * of the License, or (at your option) any later version.
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  17  * MA  02110-1301, USA.
  18  */
  19
  20 #ifndef __ASM_ARCH_MXC_HARDWARE_H__
  21 #define __ASM_ARCH_MXC_HARDWARE_H__
  22
  23 #ifndef __ASSEMBLY__
  24 #include <asm/io.h>
  25 #include <soc/imx/revision.h>
  26 #endif
  27 #include <asm/sizes.h>
  28
  29 #define addr_in_module(addr, mod) \
  30         ((unsigned long)(addr) - mod ## _BASE_ADDR < mod ## _SIZE)
  31
  32 #define IMX_IO_P2V_MODULE(addr, module)                                 \
  33         (((addr) - module ## _BASE_ADDR) < module ## _SIZE ?            \
  34          (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0)
  35
  36 /*
  37  * This is rather complicated for humans and ugly to verify, but for a machine
  38  * it's OK.  Still more as it is usually only applied to constants.  The upsides
  39  * on using this approach are:
  40  *
  41  *  - same mapping on all i.MX machines
  42  *  - works for assembler, too
  43  *  - no need to nurture #defines for virtual addresses
  44  *
  45  * The downside it, it's hard to verify (but I have a script for that).
  46  *
  47  * Obviously this needs to be injective for each SoC.  In general it maps the
  48  * whole address space to [0xf4000000, 0xf5ffffff].  So [0xf6000000,0xfeffffff]
  49  * is free for per-machine use (e.g. KZM_ARM11_01 uses 64MiB there).
  50  *
  51  * It applies the following mappings for the different SoCs:
  52  *
  53  * mx1:
  54  *      IO      0x00200000+0x100000     ->      0xf4000000+0x100000
  55  * mx21:
  56  *      AIPI    0x10000000+0x100000     ->      0xf4400000+0x100000
  57  *      SAHB1   0x80000000+0x100000     ->      0xf5000000+0x100000
  58  *      X_MEMC  0xdf000000+0x004000     ->      0xf5f00000+0x004000
  59  * mx25:
  60  *      AIPS1   0x43f00000+0x100000     ->      0xf5300000+0x100000
  61  *      AIPS2   0x53f00000+0x100000     ->      0xf5700000+0x100000
  62  *      AVIC    0x68000000+0x100000     ->      0xf5800000+0x100000
  63  * mx27:
  64  *      AIPI    0x10000000+0x100000     ->      0xf4400000+0x100000
  65  *      SAHB1   0x80000000+0x100000     ->      0xf5000000+0x100000
  66  *      X_MEMC  0xd8000000+0x100000     ->      0xf5c00000+0x100000
  67  * mx31:
  68  *      AIPS1   0x43f00000+0x100000     ->      0xf5300000+0x100000
  69  *      AIPS2   0x53f00000+0x100000     ->      0xf5700000+0x100000
  70  *      AVIC    0x68000000+0x100000     ->      0xf5800000+0x100000
  71  *      X_MEMC  0xb8000000+0x010000     ->      0xf5c00000+0x010000
  72  *      SPBA0   0x50000000+0x100000     ->      0xf5400000+0x100000
  73  * mx35:
  74  *      AIPS1   0x43f00000+0x100000     ->      0xf5300000+0x100000
  75  *      AIPS2   0x53f00000+0x100000     ->      0xf5700000+0x100000
  76  *      AVIC    0x68000000+0x100000     ->      0xf5800000+0x100000
  77  *      X_MEMC  0xb8000000+0x010000     ->      0xf5c00000+0x010000
  78  *      SPBA0   0x50000000+0x100000     ->      0xf5400000+0x100000
  79  * mx51:
  80  *      TZIC    0x0fffc000+0x004000     ->      0xf4bfc000+0x004000
  81  *      IRAM    0x1ffe0000+0x020000     ->      0xf4fe0000+0x020000
  82  *      DEBUG   0x60000000+0x100000     ->      0xf5000000+0x100000
  83  *      SPBA0   0x70000000+0x100000     ->      0xf5400000+0x100000
  84  *      AIPS1   0x73f00000+0x100000     ->      0xf5700000+0x100000
  85  *      AIPS2   0x83f00000+0x100000     ->      0xf5300000+0x100000
  86  * mx53:
  87  *      TZIC    0x0fffc000+0x004000     ->      0xf4bfc000+0x004000
  88  *      DEBUG   0x40000000+0x100000     ->      0xf5000000+0x100000
  89  *      SPBA0   0x50000000+0x100000     ->      0xf5400000+0x100000
  90  *      AIPS1   0x53f00000+0x100000     ->      0xf5700000+0x100000
  91  *      AIPS2   0x63f00000+0x100000     ->      0xf5300000+0x100000
  92  * mx6q:
  93  *      SCU     0x00a00000+0x004000     ->      0xf4000000+0x004000
  94  *      CCM     0x020c4000+0x004000     ->      0xf42c4000+0x004000
  95  *      ANATOP  0x020c8000+0x004000     ->      0xf42c8000+0x004000
  96  *      UART4   0x021f0000+0x004000     ->      0xf42f0000+0x004000
  97  */
  98 #define IMX_IO_P2V(x)   (                                               \
  99                         (((x) & 0x80000000) >> 7) |                     \
 100                         (0xf4000000 +                                   \
 101                         (((x) & 0x50000000) >> 6) +                     \
 102                         (((x) & 0x0b000000) >> 4) +                     \
 103                         (((x) & 0x000fffff))))
 104
 105 #define IMX_IO_ADDRESS(x)       IOMEM(IMX_IO_P2V(x))
 106
 107 #include "mxc.h"
 108
 109 #include "mx3x.h"
 110 #include "mx31.h"
 111 #include "mx35.h"
 112 #include "mx2x.h"
 113 #include "mx21.h"
 114 #include "mx27.h"
 115
 116 #define imx_map_entry(soc, name, _type) {                               \
 117         .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR),      \
 118         .pfn = __phys_to_pfn(soc ## _ ## name ## _BASE_ADDR),           \
 119         .length = soc ## _ ## name ## _SIZE,                            \
 120         .type = _type,                                                  \
 121 }
 122
 123 /* There's an off-by-one between the gpio bank number and the gpiochip */
 124 /* range e.g. GPIO_1_5 is gpio 5 under linux */
 125 #define IMX_GPIO_NR(bank, nr)           (((bank) - 1) * 32 + (nr))
 126
 127 #endif /* __ASM_ARCH_MXC_HARDWARE_H__ */