Linux 4.0-rc3
[deliverable/linux.git] / arch / arm / mach-msm / include / mach / dma.h
1 /* linux/include/asm-arm/arch-msm/dma.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16 #ifndef __ASM_ARCH_MSM_DMA_H
17
18 #include <linux/list.h>
19
20 struct msm_dmov_errdata {
21 uint32_t flush[6];
22 };
23
24 struct msm_dmov_cmd {
25 struct list_head list;
26 unsigned int cmdptr;
27 void (*complete_func)(struct msm_dmov_cmd *cmd,
28 unsigned int result,
29 struct msm_dmov_errdata *err);
30 void (*execute_func)(struct msm_dmov_cmd *cmd);
31 void *data;
32 };
33
34 #ifndef CONFIG_ARCH_MSM8X60
35 void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd);
36 void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful);
37 int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr);
38 #else
39 static inline
40 void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd) { }
41 static inline
42 void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful) { }
43 static inline
44 int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr) { return -EIO; }
45 #endif
46
47 #define DMOV_CMD_LIST (0 << 29) /* does not work */
48 #define DMOV_CMD_PTR_LIST (1 << 29) /* works */
49 #define DMOV_CMD_INPUT_CFG (2 << 29) /* untested */
50 #define DMOV_CMD_OUTPUT_CFG (3 << 29) /* untested */
51 #define DMOV_CMD_ADDR(addr) ((addr) >> 3)
52
53 #define DMOV_RSLT_VALID (1 << 31) /* 0 == host has empties result fifo */
54 #define DMOV_RSLT_ERROR (1 << 3)
55 #define DMOV_RSLT_FLUSH (1 << 2)
56 #define DMOV_RSLT_DONE (1 << 1) /* top pointer done */
57 #define DMOV_RSLT_USER (1 << 0) /* command with FR force result */
58
59 #define DMOV_STATUS_RSLT_COUNT(n) (((n) >> 29))
60 #define DMOV_STATUS_CMD_COUNT(n) (((n) >> 27) & 3)
61 #define DMOV_STATUS_RSLT_VALID (1 << 1)
62 #define DMOV_STATUS_CMD_PTR_RDY (1 << 0)
63
64 #define DMOV_CONFIG_FORCE_TOP_PTR_RSLT (1 << 2)
65 #define DMOV_CONFIG_FORCE_FLUSH_RSLT (1 << 1)
66 #define DMOV_CONFIG_IRQ_EN (1 << 0)
67
68 /* channel assignments */
69
70 #define DMOV_NAND_CHAN 7
71 #define DMOV_NAND_CRCI_CMD 5
72 #define DMOV_NAND_CRCI_DATA 4
73
74 #define DMOV_SDC1_CHAN 8
75 #define DMOV_SDC1_CRCI 6
76
77 #define DMOV_SDC2_CHAN 8
78 #define DMOV_SDC2_CRCI 7
79
80 #define DMOV_TSIF_CHAN 10
81 #define DMOV_TSIF_CRCI 10
82
83 #define DMOV_USB_CHAN 11
84
85 /* no client rate control ifc (eg, ram) */
86 #define DMOV_NONE_CRCI 0
87
88
89 /* If the CMD_PTR register has CMD_PTR_LIST selected, the data mover
90 * is going to walk a list of 32bit pointers as described below. Each
91 * pointer points to a *array* of dmov_s, etc structs. The last pointer
92 * in the list is marked with CMD_PTR_LP. The last struct in each array
93 * is marked with CMD_LC (see below).
94 */
95 #define CMD_PTR_ADDR(addr) ((addr) >> 3)
96 #define CMD_PTR_LP (1 << 31) /* last pointer */
97 #define CMD_PTR_PT (3 << 29) /* ? */
98
99 /* Single Item Mode */
100 typedef struct {
101 unsigned cmd;
102 unsigned src;
103 unsigned dst;
104 unsigned len;
105 } dmov_s;
106
107 /* Scatter/Gather Mode */
108 typedef struct {
109 unsigned cmd;
110 unsigned src_dscr;
111 unsigned dst_dscr;
112 unsigned _reserved;
113 } dmov_sg;
114
115 /* Box mode */
116 typedef struct {
117 uint32_t cmd;
118 uint32_t src_row_addr;
119 uint32_t dst_row_addr;
120 uint32_t src_dst_len;
121 uint32_t num_rows;
122 uint32_t row_offset;
123 } dmov_box;
124
125 /* bits for the cmd field of the above structures */
126
127 #define CMD_LC (1 << 31) /* last command */
128 #define CMD_FR (1 << 22) /* force result -- does not work? */
129 #define CMD_OCU (1 << 21) /* other channel unblock */
130 #define CMD_OCB (1 << 20) /* other channel block */
131 #define CMD_TCB (1 << 19) /* ? */
132 #define CMD_DAH (1 << 18) /* destination address hold -- does not work?*/
133 #define CMD_SAH (1 << 17) /* source address hold -- does not work? */
134
135 #define CMD_MODE_SINGLE (0 << 0) /* dmov_s structure used */
136 #define CMD_MODE_SG (1 << 0) /* untested */
137 #define CMD_MODE_IND_SG (2 << 0) /* untested */
138 #define CMD_MODE_BOX (3 << 0) /* untested */
139
140 #define CMD_DST_SWAP_BYTES (1 << 14) /* exchange each byte n with byte n+1 */
141 #define CMD_DST_SWAP_SHORTS (1 << 15) /* exchange each short n with short n+1 */
142 #define CMD_DST_SWAP_WORDS (1 << 16) /* exchange each word n with word n+1 */
143
144 #define CMD_SRC_SWAP_BYTES (1 << 11) /* exchange each byte n with byte n+1 */
145 #define CMD_SRC_SWAP_SHORTS (1 << 12) /* exchange each short n with short n+1 */
146 #define CMD_SRC_SWAP_WORDS (1 << 13) /* exchange each word n with word n+1 */
147
148 #define CMD_DST_CRCI(n) (((n) & 15) << 7)
149 #define CMD_SRC_CRCI(n) (((n) & 15) << 3)
150
151 #endif
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