Merge remote-tracking branch 'iommu/next'
[deliverable/linux.git] / arch / arm / mach-omap2 / omap_hwmod.c
1 /*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
6 *
7 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
27 *
28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | ({read,write}l_relaxed, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128 #undef DEBUG
129
130 #include <linux/kernel.h>
131 #include <linux/errno.h>
132 #include <linux/io.h>
133 #include <linux/clk.h>
134 #include <linux/clk-provider.h>
135 #include <linux/delay.h>
136 #include <linux/err.h>
137 #include <linux/list.h>
138 #include <linux/mutex.h>
139 #include <linux/spinlock.h>
140 #include <linux/slab.h>
141 #include <linux/bootmem.h>
142 #include <linux/cpu.h>
143 #include <linux/of.h>
144 #include <linux/of_address.h>
145
146 #include <asm/system_misc.h>
147
148 #include "clock.h"
149 #include "omap_hwmod.h"
150
151 #include "soc.h"
152 #include "common.h"
153 #include "clockdomain.h"
154 #include "powerdomain.h"
155 #include "cm2xxx.h"
156 #include "cm3xxx.h"
157 #include "cm33xx.h"
158 #include "prm.h"
159 #include "prm3xxx.h"
160 #include "prm44xx.h"
161 #include "prm33xx.h"
162 #include "prminst44xx.h"
163 #include "mux.h"
164 #include "pm.h"
165
166 /* Name of the OMAP hwmod for the MPU */
167 #define MPU_INITIATOR_NAME "mpu"
168
169 /*
170 * Number of struct omap_hwmod_link records per struct
171 * omap_hwmod_ocp_if record (master->slave and slave->master)
172 */
173 #define LINKS_PER_OCP_IF 2
174
175 /*
176 * Address offset (in bytes) between the reset control and the reset
177 * status registers: 4 bytes on OMAP4
178 */
179 #define OMAP4_RST_CTRL_ST_OFFSET 4
180
181 /*
182 * Maximum length for module clock handle names
183 */
184 #define MOD_CLK_MAX_NAME_LEN 32
185
186 /**
187 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
188 * @enable_module: function to enable a module (via MODULEMODE)
189 * @disable_module: function to disable a module (via MODULEMODE)
190 *
191 * XXX Eventually this functionality will be hidden inside the PRM/CM
192 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
193 * conditionals in this code.
194 */
195 struct omap_hwmod_soc_ops {
196 void (*enable_module)(struct omap_hwmod *oh);
197 int (*disable_module)(struct omap_hwmod *oh);
198 int (*wait_target_ready)(struct omap_hwmod *oh);
199 int (*assert_hardreset)(struct omap_hwmod *oh,
200 struct omap_hwmod_rst_info *ohri);
201 int (*deassert_hardreset)(struct omap_hwmod *oh,
202 struct omap_hwmod_rst_info *ohri);
203 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
204 struct omap_hwmod_rst_info *ohri);
205 int (*init_clkdm)(struct omap_hwmod *oh);
206 void (*update_context_lost)(struct omap_hwmod *oh);
207 int (*get_context_lost)(struct omap_hwmod *oh);
208 int (*disable_direct_prcm)(struct omap_hwmod *oh);
209 };
210
211 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
212 static struct omap_hwmod_soc_ops soc_ops;
213
214 /* omap_hwmod_list contains all registered struct omap_hwmods */
215 static LIST_HEAD(omap_hwmod_list);
216
217 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
218 static struct omap_hwmod *mpu_oh;
219
220 /* io_chain_lock: used to serialize reconfigurations of the I/O chain */
221 static DEFINE_SPINLOCK(io_chain_lock);
222
223 /*
224 * linkspace: ptr to a buffer that struct omap_hwmod_link records are
225 * allocated from - used to reduce the number of small memory
226 * allocations, which has a significant impact on performance
227 */
228 static struct omap_hwmod_link *linkspace;
229
230 /*
231 * free_ls, max_ls: array indexes into linkspace; representing the
232 * next free struct omap_hwmod_link index, and the maximum number of
233 * struct omap_hwmod_link records allocated (respectively)
234 */
235 static unsigned short free_ls, max_ls, ls_supp;
236
237 /* inited: set to true once the hwmod code is initialized */
238 static bool inited;
239
240 /* Private functions */
241
242 /**
243 * _fetch_next_ocp_if - return the next OCP interface in a list
244 * @p: ptr to a ptr to the list_head inside the ocp_if to return
245 * @i: pointer to the index of the element pointed to by @p in the list
246 *
247 * Return a pointer to the struct omap_hwmod_ocp_if record
248 * containing the struct list_head pointed to by @p, and increment
249 * @p such that a future call to this routine will return the next
250 * record.
251 */
252 static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
253 int *i)
254 {
255 struct omap_hwmod_ocp_if *oi;
256
257 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
258 *p = (*p)->next;
259
260 *i = *i + 1;
261
262 return oi;
263 }
264
265 /**
266 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
267 * @oh: struct omap_hwmod *
268 *
269 * Load the current value of the hwmod OCP_SYSCONFIG register into the
270 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
271 * OCP_SYSCONFIG register or 0 upon success.
272 */
273 static int _update_sysc_cache(struct omap_hwmod *oh)
274 {
275 if (!oh->class->sysc) {
276 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
277 return -EINVAL;
278 }
279
280 /* XXX ensure module interface clock is up */
281
282 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
283
284 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
285 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
286
287 return 0;
288 }
289
290 /**
291 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
292 * @v: OCP_SYSCONFIG value to write
293 * @oh: struct omap_hwmod *
294 *
295 * Write @v into the module class' OCP_SYSCONFIG register, if it has
296 * one. No return value.
297 */
298 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
299 {
300 if (!oh->class->sysc) {
301 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
302 return;
303 }
304
305 /* XXX ensure module interface clock is up */
306
307 /* Module might have lost context, always update cache and register */
308 oh->_sysc_cache = v;
309
310 /*
311 * Some IP blocks (such as RTC) require unlocking of IP before
312 * accessing its registers. If a function pointer is present
313 * to unlock, then call it before accessing sysconfig and
314 * call lock after writing sysconfig.
315 */
316 if (oh->class->unlock)
317 oh->class->unlock(oh);
318
319 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
320
321 if (oh->class->lock)
322 oh->class->lock(oh);
323 }
324
325 /**
326 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
327 * @oh: struct omap_hwmod *
328 * @standbymode: MIDLEMODE field bits
329 * @v: pointer to register contents to modify
330 *
331 * Update the master standby mode bits in @v to be @standbymode for
332 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
333 * upon error or 0 upon success.
334 */
335 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
336 u32 *v)
337 {
338 u32 mstandby_mask;
339 u8 mstandby_shift;
340
341 if (!oh->class->sysc ||
342 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
343 return -EINVAL;
344
345 if (!oh->class->sysc->sysc_fields) {
346 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
347 return -EINVAL;
348 }
349
350 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
351 mstandby_mask = (0x3 << mstandby_shift);
352
353 *v &= ~mstandby_mask;
354 *v |= __ffs(standbymode) << mstandby_shift;
355
356 return 0;
357 }
358
359 /**
360 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
361 * @oh: struct omap_hwmod *
362 * @idlemode: SIDLEMODE field bits
363 * @v: pointer to register contents to modify
364 *
365 * Update the slave idle mode bits in @v to be @idlemode for the @oh
366 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
367 * or 0 upon success.
368 */
369 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
370 {
371 u32 sidle_mask;
372 u8 sidle_shift;
373
374 if (!oh->class->sysc ||
375 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
376 return -EINVAL;
377
378 if (!oh->class->sysc->sysc_fields) {
379 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
380 return -EINVAL;
381 }
382
383 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
384 sidle_mask = (0x3 << sidle_shift);
385
386 *v &= ~sidle_mask;
387 *v |= __ffs(idlemode) << sidle_shift;
388
389 return 0;
390 }
391
392 /**
393 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
394 * @oh: struct omap_hwmod *
395 * @clockact: CLOCKACTIVITY field bits
396 * @v: pointer to register contents to modify
397 *
398 * Update the clockactivity mode bits in @v to be @clockact for the
399 * @oh hwmod. Used for additional powersaving on some modules. Does
400 * not write to the hardware. Returns -EINVAL upon error or 0 upon
401 * success.
402 */
403 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
404 {
405 u32 clkact_mask;
406 u8 clkact_shift;
407
408 if (!oh->class->sysc ||
409 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
410 return -EINVAL;
411
412 if (!oh->class->sysc->sysc_fields) {
413 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
414 return -EINVAL;
415 }
416
417 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
418 clkact_mask = (0x3 << clkact_shift);
419
420 *v &= ~clkact_mask;
421 *v |= clockact << clkact_shift;
422
423 return 0;
424 }
425
426 /**
427 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
428 * @oh: struct omap_hwmod *
429 * @v: pointer to register contents to modify
430 *
431 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
432 * error or 0 upon success.
433 */
434 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
435 {
436 u32 softrst_mask;
437
438 if (!oh->class->sysc ||
439 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
440 return -EINVAL;
441
442 if (!oh->class->sysc->sysc_fields) {
443 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
444 return -EINVAL;
445 }
446
447 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
448
449 *v |= softrst_mask;
450
451 return 0;
452 }
453
454 /**
455 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
456 * @oh: struct omap_hwmod *
457 * @v: pointer to register contents to modify
458 *
459 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
460 * error or 0 upon success.
461 */
462 static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
463 {
464 u32 softrst_mask;
465
466 if (!oh->class->sysc ||
467 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
468 return -EINVAL;
469
470 if (!oh->class->sysc->sysc_fields) {
471 WARN(1,
472 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
473 oh->name);
474 return -EINVAL;
475 }
476
477 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
478
479 *v &= ~softrst_mask;
480
481 return 0;
482 }
483
484 /**
485 * _wait_softreset_complete - wait for an OCP softreset to complete
486 * @oh: struct omap_hwmod * to wait on
487 *
488 * Wait until the IP block represented by @oh reports that its OCP
489 * softreset is complete. This can be triggered by software (see
490 * _ocp_softreset()) or by hardware upon returning from off-mode (one
491 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
492 * microseconds. Returns the number of microseconds waited.
493 */
494 static int _wait_softreset_complete(struct omap_hwmod *oh)
495 {
496 struct omap_hwmod_class_sysconfig *sysc;
497 u32 softrst_mask;
498 int c = 0;
499
500 sysc = oh->class->sysc;
501
502 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
503 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
504 & SYSS_RESETDONE_MASK),
505 MAX_MODULE_SOFTRESET_WAIT, c);
506 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
507 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
508 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
509 & softrst_mask),
510 MAX_MODULE_SOFTRESET_WAIT, c);
511 }
512
513 return c;
514 }
515
516 /**
517 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
518 * @oh: struct omap_hwmod *
519 *
520 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
521 * of some modules. When the DMA must perform read/write accesses, the
522 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
523 * for power management, software must set the DMADISABLE bit back to 1.
524 *
525 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
526 * error or 0 upon success.
527 */
528 static int _set_dmadisable(struct omap_hwmod *oh)
529 {
530 u32 v;
531 u32 dmadisable_mask;
532
533 if (!oh->class->sysc ||
534 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
535 return -EINVAL;
536
537 if (!oh->class->sysc->sysc_fields) {
538 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
539 return -EINVAL;
540 }
541
542 /* clocks must be on for this operation */
543 if (oh->_state != _HWMOD_STATE_ENABLED) {
544 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
545 return -EINVAL;
546 }
547
548 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
549
550 v = oh->_sysc_cache;
551 dmadisable_mask =
552 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
553 v |= dmadisable_mask;
554 _write_sysconfig(v, oh);
555
556 return 0;
557 }
558
559 /**
560 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
561 * @oh: struct omap_hwmod *
562 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
563 * @v: pointer to register contents to modify
564 *
565 * Update the module autoidle bit in @v to be @autoidle for the @oh
566 * hwmod. The autoidle bit controls whether the module can gate
567 * internal clocks automatically when it isn't doing anything; the
568 * exact function of this bit varies on a per-module basis. This
569 * function does not write to the hardware. Returns -EINVAL upon
570 * error or 0 upon success.
571 */
572 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
573 u32 *v)
574 {
575 u32 autoidle_mask;
576 u8 autoidle_shift;
577
578 if (!oh->class->sysc ||
579 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
580 return -EINVAL;
581
582 if (!oh->class->sysc->sysc_fields) {
583 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
584 return -EINVAL;
585 }
586
587 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
588 autoidle_mask = (0x1 << autoidle_shift);
589
590 *v &= ~autoidle_mask;
591 *v |= autoidle << autoidle_shift;
592
593 return 0;
594 }
595
596 /**
597 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
598 * @oh: struct omap_hwmod *
599 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
600 *
601 * Set or clear the I/O pad wakeup flag in the mux entries for the
602 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
603 * in memory. If the hwmod is currently idled, and the new idle
604 * values don't match the previous ones, this function will also
605 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
606 * currently idled, this function won't touch the hardware: the new
607 * mux settings are written to the SCM PADCTRL registers when the
608 * hwmod is idled. No return value.
609 */
610 static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
611 {
612 struct omap_device_pad *pad;
613 bool change = false;
614 u16 prev_idle;
615 int j;
616
617 if (!oh->mux || !oh->mux->enabled)
618 return;
619
620 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
621 pad = oh->mux->pads_dynamic[j];
622
623 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
624 continue;
625
626 prev_idle = pad->idle;
627
628 if (set_wake)
629 pad->idle |= OMAP_WAKEUP_EN;
630 else
631 pad->idle &= ~OMAP_WAKEUP_EN;
632
633 if (prev_idle != pad->idle)
634 change = true;
635 }
636
637 if (change && oh->_state == _HWMOD_STATE_IDLE)
638 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
639 }
640
641 /**
642 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
643 * @oh: struct omap_hwmod *
644 *
645 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
646 * upon error or 0 upon success.
647 */
648 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
649 {
650 if (!oh->class->sysc ||
651 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
652 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
653 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
654 return -EINVAL;
655
656 if (!oh->class->sysc->sysc_fields) {
657 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
658 return -EINVAL;
659 }
660
661 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
662 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
663
664 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
665 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
666 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
667 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
668
669 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
670
671 return 0;
672 }
673
674 /**
675 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
676 * @oh: struct omap_hwmod *
677 *
678 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
679 * upon error or 0 upon success.
680 */
681 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
682 {
683 if (!oh->class->sysc ||
684 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
685 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
686 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
687 return -EINVAL;
688
689 if (!oh->class->sysc->sysc_fields) {
690 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
691 return -EINVAL;
692 }
693
694 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
695 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
696
697 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
698 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
699 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
700 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
701
702 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
703
704 return 0;
705 }
706
707 static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
708 {
709 struct clk_hw_omap *clk;
710
711 if (oh->clkdm) {
712 return oh->clkdm;
713 } else if (oh->_clk) {
714 if (__clk_get_flags(oh->_clk) & CLK_IS_BASIC)
715 return NULL;
716 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
717 return clk->clkdm;
718 }
719 return NULL;
720 }
721
722 /**
723 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
724 * @oh: struct omap_hwmod *
725 *
726 * Prevent the hardware module @oh from entering idle while the
727 * hardare module initiator @init_oh is active. Useful when a module
728 * will be accessed by a particular initiator (e.g., if a module will
729 * be accessed by the IVA, there should be a sleepdep between the IVA
730 * initiator and the module). Only applies to modules in smart-idle
731 * mode. If the clockdomain is marked as not needing autodeps, return
732 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
733 * passes along clkdm_add_sleepdep() value upon success.
734 */
735 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
736 {
737 struct clockdomain *clkdm, *init_clkdm;
738
739 clkdm = _get_clkdm(oh);
740 init_clkdm = _get_clkdm(init_oh);
741
742 if (!clkdm || !init_clkdm)
743 return -EINVAL;
744
745 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
746 return 0;
747
748 return clkdm_add_sleepdep(clkdm, init_clkdm);
749 }
750
751 /**
752 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
753 * @oh: struct omap_hwmod *
754 *
755 * Allow the hardware module @oh to enter idle while the hardare
756 * module initiator @init_oh is active. Useful when a module will not
757 * be accessed by a particular initiator (e.g., if a module will not
758 * be accessed by the IVA, there should be no sleepdep between the IVA
759 * initiator and the module). Only applies to modules in smart-idle
760 * mode. If the clockdomain is marked as not needing autodeps, return
761 * 0 without doing anything. Returns -EINVAL upon error or passes
762 * along clkdm_del_sleepdep() value upon success.
763 */
764 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
765 {
766 struct clockdomain *clkdm, *init_clkdm;
767
768 clkdm = _get_clkdm(oh);
769 init_clkdm = _get_clkdm(init_oh);
770
771 if (!clkdm || !init_clkdm)
772 return -EINVAL;
773
774 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
775 return 0;
776
777 return clkdm_del_sleepdep(clkdm, init_clkdm);
778 }
779
780 /**
781 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
782 * @oh: struct omap_hwmod *
783 *
784 * Called from _init_clocks(). Populates the @oh _clk (main
785 * functional clock pointer) if a clock matching the hwmod name is found,
786 * or a main_clk is present. Returns 0 on success or -EINVAL on error.
787 */
788 static int _init_main_clk(struct omap_hwmod *oh)
789 {
790 int ret = 0;
791 char name[MOD_CLK_MAX_NAME_LEN];
792 struct clk *clk;
793
794 /* +7 magic comes from '_mod_ck' suffix */
795 if (strlen(oh->name) + 7 > MOD_CLK_MAX_NAME_LEN)
796 pr_warn("%s: warning: cropping name for %s\n", __func__,
797 oh->name);
798
799 strncpy(name, oh->name, MOD_CLK_MAX_NAME_LEN - 7);
800 strcat(name, "_mod_ck");
801
802 clk = clk_get(NULL, name);
803 if (!IS_ERR(clk)) {
804 oh->_clk = clk;
805 soc_ops.disable_direct_prcm(oh);
806 oh->main_clk = kstrdup(name, GFP_KERNEL);
807 } else {
808 if (!oh->main_clk)
809 return 0;
810
811 oh->_clk = clk_get(NULL, oh->main_clk);
812 }
813
814 if (IS_ERR(oh->_clk)) {
815 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
816 oh->name, oh->main_clk);
817 return -EINVAL;
818 }
819 /*
820 * HACK: This needs a re-visit once clk_prepare() is implemented
821 * to do something meaningful. Today its just a no-op.
822 * If clk_prepare() is used at some point to do things like
823 * voltage scaling etc, then this would have to be moved to
824 * some point where subsystems like i2c and pmic become
825 * available.
826 */
827 clk_prepare(oh->_clk);
828
829 if (!_get_clkdm(oh))
830 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
831 oh->name, oh->main_clk);
832
833 return ret;
834 }
835
836 /**
837 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
838 * @oh: struct omap_hwmod *
839 *
840 * Called from _init_clocks(). Populates the @oh OCP slave interface
841 * clock pointers. Returns 0 on success or -EINVAL on error.
842 */
843 static int _init_interface_clks(struct omap_hwmod *oh)
844 {
845 struct omap_hwmod_ocp_if *os;
846 struct list_head *p;
847 struct clk *c;
848 int i = 0;
849 int ret = 0;
850
851 p = oh->slave_ports.next;
852
853 while (i < oh->slaves_cnt) {
854 os = _fetch_next_ocp_if(&p, &i);
855 if (!os->clk)
856 continue;
857
858 c = clk_get(NULL, os->clk);
859 if (IS_ERR(c)) {
860 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
861 oh->name, os->clk);
862 ret = -EINVAL;
863 continue;
864 }
865 os->_clk = c;
866 /*
867 * HACK: This needs a re-visit once clk_prepare() is implemented
868 * to do something meaningful. Today its just a no-op.
869 * If clk_prepare() is used at some point to do things like
870 * voltage scaling etc, then this would have to be moved to
871 * some point where subsystems like i2c and pmic become
872 * available.
873 */
874 clk_prepare(os->_clk);
875 }
876
877 return ret;
878 }
879
880 /**
881 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
882 * @oh: struct omap_hwmod *
883 *
884 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
885 * clock pointers. Returns 0 on success or -EINVAL on error.
886 */
887 static int _init_opt_clks(struct omap_hwmod *oh)
888 {
889 struct omap_hwmod_opt_clk *oc;
890 struct clk *c;
891 int i;
892 int ret = 0;
893
894 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
895 c = clk_get(NULL, oc->clk);
896 if (IS_ERR(c)) {
897 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
898 oh->name, oc->clk);
899 ret = -EINVAL;
900 continue;
901 }
902 oc->_clk = c;
903 /*
904 * HACK: This needs a re-visit once clk_prepare() is implemented
905 * to do something meaningful. Today its just a no-op.
906 * If clk_prepare() is used at some point to do things like
907 * voltage scaling etc, then this would have to be moved to
908 * some point where subsystems like i2c and pmic become
909 * available.
910 */
911 clk_prepare(oc->_clk);
912 }
913
914 return ret;
915 }
916
917 static void _enable_optional_clocks(struct omap_hwmod *oh)
918 {
919 struct omap_hwmod_opt_clk *oc;
920 int i;
921
922 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
923
924 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
925 if (oc->_clk) {
926 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
927 __clk_get_name(oc->_clk));
928 clk_enable(oc->_clk);
929 }
930 }
931
932 static void _disable_optional_clocks(struct omap_hwmod *oh)
933 {
934 struct omap_hwmod_opt_clk *oc;
935 int i;
936
937 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
938
939 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
940 if (oc->_clk) {
941 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
942 __clk_get_name(oc->_clk));
943 clk_disable(oc->_clk);
944 }
945 }
946
947 /**
948 * _enable_clocks - enable hwmod main clock and interface clocks
949 * @oh: struct omap_hwmod *
950 *
951 * Enables all clocks necessary for register reads and writes to succeed
952 * on the hwmod @oh. Returns 0.
953 */
954 static int _enable_clocks(struct omap_hwmod *oh)
955 {
956 struct omap_hwmod_ocp_if *os;
957 struct list_head *p;
958 int i = 0;
959
960 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
961
962 if (oh->_clk)
963 clk_enable(oh->_clk);
964
965 p = oh->slave_ports.next;
966
967 while (i < oh->slaves_cnt) {
968 os = _fetch_next_ocp_if(&p, &i);
969
970 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
971 clk_enable(os->_clk);
972 }
973
974 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
975 _enable_optional_clocks(oh);
976
977 /* The opt clocks are controlled by the device driver. */
978
979 return 0;
980 }
981
982 /**
983 * _disable_clocks - disable hwmod main clock and interface clocks
984 * @oh: struct omap_hwmod *
985 *
986 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
987 */
988 static int _disable_clocks(struct omap_hwmod *oh)
989 {
990 struct omap_hwmod_ocp_if *os;
991 struct list_head *p;
992 int i = 0;
993
994 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
995
996 if (oh->_clk)
997 clk_disable(oh->_clk);
998
999 p = oh->slave_ports.next;
1000
1001 while (i < oh->slaves_cnt) {
1002 os = _fetch_next_ocp_if(&p, &i);
1003
1004 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
1005 clk_disable(os->_clk);
1006 }
1007
1008 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
1009 _disable_optional_clocks(oh);
1010
1011 /* The opt clocks are controlled by the device driver. */
1012
1013 return 0;
1014 }
1015
1016 /**
1017 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
1018 * @oh: struct omap_hwmod *
1019 *
1020 * Enables the PRCM module mode related to the hwmod @oh.
1021 * No return value.
1022 */
1023 static void _omap4_enable_module(struct omap_hwmod *oh)
1024 {
1025 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1026 return;
1027
1028 pr_debug("omap_hwmod: %s: %s: %d\n",
1029 oh->name, __func__, oh->prcm.omap4.modulemode);
1030
1031 omap_cm_module_enable(oh->prcm.omap4.modulemode,
1032 oh->clkdm->prcm_partition,
1033 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
1034 }
1035
1036 /**
1037 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
1038 * @oh: struct omap_hwmod *
1039 *
1040 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1041 * does not have an IDLEST bit or if the module successfully enters
1042 * slave idle; otherwise, pass along the return value of the
1043 * appropriate *_cm*_wait_module_idle() function.
1044 */
1045 static int _omap4_wait_target_disable(struct omap_hwmod *oh)
1046 {
1047 if (!oh)
1048 return -EINVAL;
1049
1050 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
1051 return 0;
1052
1053 if (oh->flags & HWMOD_NO_IDLEST)
1054 return 0;
1055
1056 if (!oh->prcm.omap4.clkctrl_offs &&
1057 !(oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET))
1058 return 0;
1059
1060 return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
1061 oh->clkdm->cm_inst,
1062 oh->prcm.omap4.clkctrl_offs, 0);
1063 }
1064
1065 /**
1066 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
1067 * @oh: struct omap_hwmod *oh
1068 *
1069 * Count and return the number of MPU IRQs associated with the hwmod
1070 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
1071 * NULL.
1072 */
1073 static int _count_mpu_irqs(struct omap_hwmod *oh)
1074 {
1075 struct omap_hwmod_irq_info *ohii;
1076 int i = 0;
1077
1078 if (!oh || !oh->mpu_irqs)
1079 return 0;
1080
1081 do {
1082 ohii = &oh->mpu_irqs[i++];
1083 } while (ohii->irq != -1);
1084
1085 return i-1;
1086 }
1087
1088 /**
1089 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
1090 * @oh: struct omap_hwmod *oh
1091 *
1092 * Count and return the number of SDMA request lines associated with
1093 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1094 * if @oh is NULL.
1095 */
1096 static int _count_sdma_reqs(struct omap_hwmod *oh)
1097 {
1098 struct omap_hwmod_dma_info *ohdi;
1099 int i = 0;
1100
1101 if (!oh || !oh->sdma_reqs)
1102 return 0;
1103
1104 do {
1105 ohdi = &oh->sdma_reqs[i++];
1106 } while (ohdi->dma_req != -1);
1107
1108 return i-1;
1109 }
1110
1111 /**
1112 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
1113 * @oh: struct omap_hwmod *oh
1114 *
1115 * Count and return the number of address space ranges associated with
1116 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1117 * if @oh is NULL.
1118 */
1119 static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
1120 {
1121 struct omap_hwmod_addr_space *mem;
1122 int i = 0;
1123
1124 if (!os || !os->addr)
1125 return 0;
1126
1127 do {
1128 mem = &os->addr[i++];
1129 } while (mem->pa_start != mem->pa_end);
1130
1131 return i-1;
1132 }
1133
1134 /**
1135 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
1136 * @oh: struct omap_hwmod * to operate on
1137 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
1138 * @irq: pointer to an unsigned int to store the MPU IRQ number to
1139 *
1140 * Retrieve a MPU hardware IRQ line number named by @name associated
1141 * with the IP block pointed to by @oh. The IRQ number will be filled
1142 * into the address pointed to by @dma. When @name is non-null, the
1143 * IRQ line number associated with the named entry will be returned.
1144 * If @name is null, the first matching entry will be returned. Data
1145 * order is not meaningful in hwmod data, so callers are strongly
1146 * encouraged to use a non-null @name whenever possible to avoid
1147 * unpredictable effects if hwmod data is later added that causes data
1148 * ordering to change. Returns 0 upon success or a negative error
1149 * code upon error.
1150 */
1151 static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
1152 unsigned int *irq)
1153 {
1154 int i;
1155 bool found = false;
1156
1157 if (!oh->mpu_irqs)
1158 return -ENOENT;
1159
1160 i = 0;
1161 while (oh->mpu_irqs[i].irq != -1) {
1162 if (name == oh->mpu_irqs[i].name ||
1163 !strcmp(name, oh->mpu_irqs[i].name)) {
1164 found = true;
1165 break;
1166 }
1167 i++;
1168 }
1169
1170 if (!found)
1171 return -ENOENT;
1172
1173 *irq = oh->mpu_irqs[i].irq;
1174
1175 return 0;
1176 }
1177
1178 /**
1179 * _get_sdma_req_by_name - fetch SDMA request line ID by name
1180 * @oh: struct omap_hwmod * to operate on
1181 * @name: pointer to the name of the SDMA request line to fetch (optional)
1182 * @dma: pointer to an unsigned int to store the request line ID to
1183 *
1184 * Retrieve an SDMA request line ID named by @name on the IP block
1185 * pointed to by @oh. The ID will be filled into the address pointed
1186 * to by @dma. When @name is non-null, the request line ID associated
1187 * with the named entry will be returned. If @name is null, the first
1188 * matching entry will be returned. Data order is not meaningful in
1189 * hwmod data, so callers are strongly encouraged to use a non-null
1190 * @name whenever possible to avoid unpredictable effects if hwmod
1191 * data is later added that causes data ordering to change. Returns 0
1192 * upon success or a negative error code upon error.
1193 */
1194 static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
1195 unsigned int *dma)
1196 {
1197 int i;
1198 bool found = false;
1199
1200 if (!oh->sdma_reqs)
1201 return -ENOENT;
1202
1203 i = 0;
1204 while (oh->sdma_reqs[i].dma_req != -1) {
1205 if (name == oh->sdma_reqs[i].name ||
1206 !strcmp(name, oh->sdma_reqs[i].name)) {
1207 found = true;
1208 break;
1209 }
1210 i++;
1211 }
1212
1213 if (!found)
1214 return -ENOENT;
1215
1216 *dma = oh->sdma_reqs[i].dma_req;
1217
1218 return 0;
1219 }
1220
1221 /**
1222 * _get_addr_space_by_name - fetch address space start & end by name
1223 * @oh: struct omap_hwmod * to operate on
1224 * @name: pointer to the name of the address space to fetch (optional)
1225 * @pa_start: pointer to a u32 to store the starting address to
1226 * @pa_end: pointer to a u32 to store the ending address to
1227 *
1228 * Retrieve address space start and end addresses for the IP block
1229 * pointed to by @oh. The data will be filled into the addresses
1230 * pointed to by @pa_start and @pa_end. When @name is non-null, the
1231 * address space data associated with the named entry will be
1232 * returned. If @name is null, the first matching entry will be
1233 * returned. Data order is not meaningful in hwmod data, so callers
1234 * are strongly encouraged to use a non-null @name whenever possible
1235 * to avoid unpredictable effects if hwmod data is later added that
1236 * causes data ordering to change. Returns 0 upon success or a
1237 * negative error code upon error.
1238 */
1239 static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
1240 u32 *pa_start, u32 *pa_end)
1241 {
1242 int i, j;
1243 struct omap_hwmod_ocp_if *os;
1244 struct list_head *p = NULL;
1245 bool found = false;
1246
1247 p = oh->slave_ports.next;
1248
1249 i = 0;
1250 while (i < oh->slaves_cnt) {
1251 os = _fetch_next_ocp_if(&p, &i);
1252
1253 if (!os->addr)
1254 return -ENOENT;
1255
1256 j = 0;
1257 while (os->addr[j].pa_start != os->addr[j].pa_end) {
1258 if (name == os->addr[j].name ||
1259 !strcmp(name, os->addr[j].name)) {
1260 found = true;
1261 break;
1262 }
1263 j++;
1264 }
1265
1266 if (found)
1267 break;
1268 }
1269
1270 if (!found)
1271 return -ENOENT;
1272
1273 *pa_start = os->addr[j].pa_start;
1274 *pa_end = os->addr[j].pa_end;
1275
1276 return 0;
1277 }
1278
1279 /**
1280 * _save_mpu_port_index - find and save the index to @oh's MPU port
1281 * @oh: struct omap_hwmod *
1282 *
1283 * Determines the array index of the OCP slave port that the MPU uses
1284 * to address the device, and saves it into the struct omap_hwmod.
1285 * Intended to be called during hwmod registration only. No return
1286 * value.
1287 */
1288 static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1289 {
1290 struct omap_hwmod_ocp_if *os = NULL;
1291 struct list_head *p;
1292 int i = 0;
1293
1294 if (!oh)
1295 return;
1296
1297 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1298
1299 p = oh->slave_ports.next;
1300
1301 while (i < oh->slaves_cnt) {
1302 os = _fetch_next_ocp_if(&p, &i);
1303 if (os->user & OCP_USER_MPU) {
1304 oh->_mpu_port = os;
1305 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1306 break;
1307 }
1308 }
1309
1310 return;
1311 }
1312
1313 /**
1314 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1315 * @oh: struct omap_hwmod *
1316 *
1317 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1318 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1319 * communicate with the IP block. This interface need not be directly
1320 * connected to the MPU (and almost certainly is not), but is directly
1321 * connected to the IP block represented by @oh. Returns a pointer
1322 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1323 * error or if there does not appear to be a path from the MPU to this
1324 * IP block.
1325 */
1326 static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1327 {
1328 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1329 return NULL;
1330
1331 return oh->_mpu_port;
1332 };
1333
1334 /**
1335 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
1336 * @oh: struct omap_hwmod *
1337 *
1338 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1339 * the register target MPU address space; or returns NULL upon error.
1340 */
1341 static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
1342 {
1343 struct omap_hwmod_ocp_if *os;
1344 struct omap_hwmod_addr_space *mem;
1345 int found = 0, i = 0;
1346
1347 os = _find_mpu_rt_port(oh);
1348 if (!os || !os->addr)
1349 return NULL;
1350
1351 do {
1352 mem = &os->addr[i++];
1353 if (mem->flags & ADDR_TYPE_RT)
1354 found = 1;
1355 } while (!found && mem->pa_start != mem->pa_end);
1356
1357 return (found) ? mem : NULL;
1358 }
1359
1360 /**
1361 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1362 * @oh: struct omap_hwmod *
1363 *
1364 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1365 * by @oh is set to indicate to the PRCM that the IP block is active.
1366 * Usually this means placing the module into smart-idle mode and
1367 * smart-standby, but if there is a bug in the automatic idle handling
1368 * for the IP block, it may need to be placed into the force-idle or
1369 * no-idle variants of these modes. No return value.
1370 */
1371 static void _enable_sysc(struct omap_hwmod *oh)
1372 {
1373 u8 idlemode, sf;
1374 u32 v;
1375 bool clkdm_act;
1376 struct clockdomain *clkdm;
1377
1378 if (!oh->class->sysc)
1379 return;
1380
1381 /*
1382 * Wait until reset has completed, this is needed as the IP
1383 * block is reset automatically by hardware in some cases
1384 * (off-mode for example), and the drivers require the
1385 * IP to be ready when they access it
1386 */
1387 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1388 _enable_optional_clocks(oh);
1389 _wait_softreset_complete(oh);
1390 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1391 _disable_optional_clocks(oh);
1392
1393 v = oh->_sysc_cache;
1394 sf = oh->class->sysc->sysc_flags;
1395
1396 clkdm = _get_clkdm(oh);
1397 if (sf & SYSC_HAS_SIDLEMODE) {
1398 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1399 oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
1400 idlemode = HWMOD_IDLEMODE_NO;
1401 } else {
1402 if (sf & SYSC_HAS_ENAWAKEUP)
1403 _enable_wakeup(oh, &v);
1404 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1405 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1406 else
1407 idlemode = HWMOD_IDLEMODE_SMART;
1408 }
1409
1410 /*
1411 * This is special handling for some IPs like
1412 * 32k sync timer. Force them to idle!
1413 */
1414 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1415 if (clkdm_act && !(oh->class->sysc->idlemodes &
1416 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1417 idlemode = HWMOD_IDLEMODE_FORCE;
1418
1419 _set_slave_idlemode(oh, idlemode, &v);
1420 }
1421
1422 if (sf & SYSC_HAS_MIDLEMODE) {
1423 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1424 idlemode = HWMOD_IDLEMODE_FORCE;
1425 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1426 idlemode = HWMOD_IDLEMODE_NO;
1427 } else {
1428 if (sf & SYSC_HAS_ENAWAKEUP)
1429 _enable_wakeup(oh, &v);
1430 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1431 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1432 else
1433 idlemode = HWMOD_IDLEMODE_SMART;
1434 }
1435 _set_master_standbymode(oh, idlemode, &v);
1436 }
1437
1438 /*
1439 * XXX The clock framework should handle this, by
1440 * calling into this code. But this must wait until the
1441 * clock structures are tagged with omap_hwmod entries
1442 */
1443 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1444 (sf & SYSC_HAS_CLOCKACTIVITY))
1445 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
1446
1447 _write_sysconfig(v, oh);
1448
1449 /*
1450 * Set the autoidle bit only after setting the smartidle bit
1451 * Setting this will not have any impact on the other modules.
1452 */
1453 if (sf & SYSC_HAS_AUTOIDLE) {
1454 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1455 0 : 1;
1456 _set_module_autoidle(oh, idlemode, &v);
1457 _write_sysconfig(v, oh);
1458 }
1459 }
1460
1461 /**
1462 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1463 * @oh: struct omap_hwmod *
1464 *
1465 * If module is marked as SWSUP_SIDLE, force the module into slave
1466 * idle; otherwise, configure it for smart-idle. If module is marked
1467 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1468 * configure it for smart-standby. No return value.
1469 */
1470 static void _idle_sysc(struct omap_hwmod *oh)
1471 {
1472 u8 idlemode, sf;
1473 u32 v;
1474
1475 if (!oh->class->sysc)
1476 return;
1477
1478 v = oh->_sysc_cache;
1479 sf = oh->class->sysc->sysc_flags;
1480
1481 if (sf & SYSC_HAS_SIDLEMODE) {
1482 if (oh->flags & HWMOD_SWSUP_SIDLE) {
1483 idlemode = HWMOD_IDLEMODE_FORCE;
1484 } else {
1485 if (sf & SYSC_HAS_ENAWAKEUP)
1486 _enable_wakeup(oh, &v);
1487 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1488 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1489 else
1490 idlemode = HWMOD_IDLEMODE_SMART;
1491 }
1492 _set_slave_idlemode(oh, idlemode, &v);
1493 }
1494
1495 if (sf & SYSC_HAS_MIDLEMODE) {
1496 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1497 (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1498 idlemode = HWMOD_IDLEMODE_FORCE;
1499 } else {
1500 if (sf & SYSC_HAS_ENAWAKEUP)
1501 _enable_wakeup(oh, &v);
1502 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1503 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1504 else
1505 idlemode = HWMOD_IDLEMODE_SMART;
1506 }
1507 _set_master_standbymode(oh, idlemode, &v);
1508 }
1509
1510 /* If the cached value is the same as the new value, skip the write */
1511 if (oh->_sysc_cache != v)
1512 _write_sysconfig(v, oh);
1513 }
1514
1515 /**
1516 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1517 * @oh: struct omap_hwmod *
1518 *
1519 * Force the module into slave idle and master suspend. No return
1520 * value.
1521 */
1522 static void _shutdown_sysc(struct omap_hwmod *oh)
1523 {
1524 u32 v;
1525 u8 sf;
1526
1527 if (!oh->class->sysc)
1528 return;
1529
1530 v = oh->_sysc_cache;
1531 sf = oh->class->sysc->sysc_flags;
1532
1533 if (sf & SYSC_HAS_SIDLEMODE)
1534 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1535
1536 if (sf & SYSC_HAS_MIDLEMODE)
1537 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1538
1539 if (sf & SYSC_HAS_AUTOIDLE)
1540 _set_module_autoidle(oh, 1, &v);
1541
1542 _write_sysconfig(v, oh);
1543 }
1544
1545 /**
1546 * _lookup - find an omap_hwmod by name
1547 * @name: find an omap_hwmod by name
1548 *
1549 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1550 */
1551 static struct omap_hwmod *_lookup(const char *name)
1552 {
1553 struct omap_hwmod *oh, *temp_oh;
1554
1555 oh = NULL;
1556
1557 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1558 if (!strcmp(name, temp_oh->name)) {
1559 oh = temp_oh;
1560 break;
1561 }
1562 }
1563
1564 return oh;
1565 }
1566
1567 /**
1568 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1569 * @oh: struct omap_hwmod *
1570 *
1571 * Convert a clockdomain name stored in a struct omap_hwmod into a
1572 * clockdomain pointer, and save it into the struct omap_hwmod.
1573 * Return -EINVAL if the clkdm_name lookup failed.
1574 */
1575 static int _init_clkdm(struct omap_hwmod *oh)
1576 {
1577 if (!oh->clkdm_name) {
1578 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1579 return 0;
1580 }
1581
1582 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1583 if (!oh->clkdm) {
1584 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
1585 oh->name, oh->clkdm_name);
1586 return 0;
1587 }
1588
1589 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1590 oh->name, oh->clkdm_name);
1591
1592 return 0;
1593 }
1594
1595 /**
1596 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1597 * well the clockdomain.
1598 * @oh: struct omap_hwmod *
1599 * @data: not used; pass NULL
1600 *
1601 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1602 * Resolves all clock names embedded in the hwmod. Returns 0 on
1603 * success, or a negative error code on failure.
1604 */
1605 static int _init_clocks(struct omap_hwmod *oh, void *data)
1606 {
1607 int ret = 0;
1608
1609 if (oh->_state != _HWMOD_STATE_REGISTERED)
1610 return 0;
1611
1612 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1613
1614 if (soc_ops.init_clkdm)
1615 ret |= soc_ops.init_clkdm(oh);
1616
1617 ret |= _init_main_clk(oh);
1618 ret |= _init_interface_clks(oh);
1619 ret |= _init_opt_clks(oh);
1620
1621 if (!ret)
1622 oh->_state = _HWMOD_STATE_CLKS_INITED;
1623 else
1624 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1625
1626 return ret;
1627 }
1628
1629 /**
1630 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1631 * @oh: struct omap_hwmod *
1632 * @name: name of the reset line in the context of this hwmod
1633 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1634 *
1635 * Return the bit position of the reset line that match the
1636 * input name. Return -ENOENT if not found.
1637 */
1638 static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1639 struct omap_hwmod_rst_info *ohri)
1640 {
1641 int i;
1642
1643 for (i = 0; i < oh->rst_lines_cnt; i++) {
1644 const char *rst_line = oh->rst_lines[i].name;
1645 if (!strcmp(rst_line, name)) {
1646 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1647 ohri->st_shift = oh->rst_lines[i].st_shift;
1648 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1649 oh->name, __func__, rst_line, ohri->rst_shift,
1650 ohri->st_shift);
1651
1652 return 0;
1653 }
1654 }
1655
1656 return -ENOENT;
1657 }
1658
1659 /**
1660 * _assert_hardreset - assert the HW reset line of submodules
1661 * contained in the hwmod module.
1662 * @oh: struct omap_hwmod *
1663 * @name: name of the reset line to lookup and assert
1664 *
1665 * Some IP like dsp, ipu or iva contain processor that require an HW
1666 * reset line to be assert / deassert in order to enable fully the IP.
1667 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1668 * asserting the hardreset line on the currently-booted SoC, or passes
1669 * along the return value from _lookup_hardreset() or the SoC's
1670 * assert_hardreset code.
1671 */
1672 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1673 {
1674 struct omap_hwmod_rst_info ohri;
1675 int ret = -EINVAL;
1676
1677 if (!oh)
1678 return -EINVAL;
1679
1680 if (!soc_ops.assert_hardreset)
1681 return -ENOSYS;
1682
1683 ret = _lookup_hardreset(oh, name, &ohri);
1684 if (ret < 0)
1685 return ret;
1686
1687 ret = soc_ops.assert_hardreset(oh, &ohri);
1688
1689 return ret;
1690 }
1691
1692 /**
1693 * _deassert_hardreset - deassert the HW reset line of submodules contained
1694 * in the hwmod module.
1695 * @oh: struct omap_hwmod *
1696 * @name: name of the reset line to look up and deassert
1697 *
1698 * Some IP like dsp, ipu or iva contain processor that require an HW
1699 * reset line to be assert / deassert in order to enable fully the IP.
1700 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1701 * deasserting the hardreset line on the currently-booted SoC, or passes
1702 * along the return value from _lookup_hardreset() or the SoC's
1703 * deassert_hardreset code.
1704 */
1705 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1706 {
1707 struct omap_hwmod_rst_info ohri;
1708 int ret = -EINVAL;
1709
1710 if (!oh)
1711 return -EINVAL;
1712
1713 if (!soc_ops.deassert_hardreset)
1714 return -ENOSYS;
1715
1716 ret = _lookup_hardreset(oh, name, &ohri);
1717 if (ret < 0)
1718 return ret;
1719
1720 if (oh->clkdm) {
1721 /*
1722 * A clockdomain must be in SW_SUP otherwise reset
1723 * might not be completed. The clockdomain can be set
1724 * in HW_AUTO only when the module become ready.
1725 */
1726 clkdm_deny_idle(oh->clkdm);
1727 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1728 if (ret) {
1729 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1730 oh->name, oh->clkdm->name, ret);
1731 return ret;
1732 }
1733 }
1734
1735 _enable_clocks(oh);
1736 if (soc_ops.enable_module)
1737 soc_ops.enable_module(oh);
1738
1739 ret = soc_ops.deassert_hardreset(oh, &ohri);
1740
1741 if (soc_ops.disable_module)
1742 soc_ops.disable_module(oh);
1743 _disable_clocks(oh);
1744
1745 if (ret == -EBUSY)
1746 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
1747
1748 if (oh->clkdm) {
1749 /*
1750 * Set the clockdomain to HW_AUTO, assuming that the
1751 * previous state was HW_AUTO.
1752 */
1753 clkdm_allow_idle(oh->clkdm);
1754
1755 clkdm_hwmod_disable(oh->clkdm, oh);
1756 }
1757
1758 return ret;
1759 }
1760
1761 /**
1762 * _read_hardreset - read the HW reset line state of submodules
1763 * contained in the hwmod module
1764 * @oh: struct omap_hwmod *
1765 * @name: name of the reset line to look up and read
1766 *
1767 * Return the state of the reset line. Returns -EINVAL if @oh is
1768 * null, -ENOSYS if we have no way of reading the hardreset line
1769 * status on the currently-booted SoC, or passes along the return
1770 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1771 * code.
1772 */
1773 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1774 {
1775 struct omap_hwmod_rst_info ohri;
1776 int ret = -EINVAL;
1777
1778 if (!oh)
1779 return -EINVAL;
1780
1781 if (!soc_ops.is_hardreset_asserted)
1782 return -ENOSYS;
1783
1784 ret = _lookup_hardreset(oh, name, &ohri);
1785 if (ret < 0)
1786 return ret;
1787
1788 return soc_ops.is_hardreset_asserted(oh, &ohri);
1789 }
1790
1791 /**
1792 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1793 * @oh: struct omap_hwmod *
1794 *
1795 * If all hardreset lines associated with @oh are asserted, then return true.
1796 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1797 * associated with @oh are asserted, then return false.
1798 * This function is used to avoid executing some parts of the IP block
1799 * enable/disable sequence if its hardreset line is set.
1800 */
1801 static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1802 {
1803 int i, rst_cnt = 0;
1804
1805 if (oh->rst_lines_cnt == 0)
1806 return false;
1807
1808 for (i = 0; i < oh->rst_lines_cnt; i++)
1809 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1810 rst_cnt++;
1811
1812 if (oh->rst_lines_cnt == rst_cnt)
1813 return true;
1814
1815 return false;
1816 }
1817
1818 /**
1819 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1820 * hard-reset
1821 * @oh: struct omap_hwmod *
1822 *
1823 * If any hardreset lines associated with @oh are asserted, then
1824 * return true. Otherwise, if no hardreset lines associated with @oh
1825 * are asserted, or if @oh has no hardreset lines, then return false.
1826 * This function is used to avoid executing some parts of the IP block
1827 * enable/disable sequence if any hardreset line is set.
1828 */
1829 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1830 {
1831 int rst_cnt = 0;
1832 int i;
1833
1834 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1835 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1836 rst_cnt++;
1837
1838 return (rst_cnt) ? true : false;
1839 }
1840
1841 /**
1842 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1843 * @oh: struct omap_hwmod *
1844 *
1845 * Disable the PRCM module mode related to the hwmod @oh.
1846 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1847 */
1848 static int _omap4_disable_module(struct omap_hwmod *oh)
1849 {
1850 int v;
1851
1852 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1853 return -EINVAL;
1854
1855 /*
1856 * Since integration code might still be doing something, only
1857 * disable if all lines are under hardreset.
1858 */
1859 if (_are_any_hardreset_lines_asserted(oh))
1860 return 0;
1861
1862 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1863
1864 omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst,
1865 oh->prcm.omap4.clkctrl_offs);
1866
1867 v = _omap4_wait_target_disable(oh);
1868 if (v)
1869 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1870 oh->name);
1871
1872 return 0;
1873 }
1874
1875 /**
1876 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1877 * @oh: struct omap_hwmod *
1878 *
1879 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1880 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1881 * reset this way, -EINVAL if the hwmod is in the wrong state,
1882 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1883 *
1884 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1885 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1886 * use the SYSCONFIG softreset bit to provide the status.
1887 *
1888 * Note that some IP like McBSP do have reset control but don't have
1889 * reset status.
1890 */
1891 static int _ocp_softreset(struct omap_hwmod *oh)
1892 {
1893 u32 v;
1894 int c = 0;
1895 int ret = 0;
1896
1897 if (!oh->class->sysc ||
1898 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1899 return -ENOENT;
1900
1901 /* clocks must be on for this operation */
1902 if (oh->_state != _HWMOD_STATE_ENABLED) {
1903 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1904 oh->name);
1905 return -EINVAL;
1906 }
1907
1908 /* For some modules, all optionnal clocks need to be enabled as well */
1909 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1910 _enable_optional_clocks(oh);
1911
1912 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1913
1914 v = oh->_sysc_cache;
1915 ret = _set_softreset(oh, &v);
1916 if (ret)
1917 goto dis_opt_clks;
1918
1919 _write_sysconfig(v, oh);
1920
1921 if (oh->class->sysc->srst_udelay)
1922 udelay(oh->class->sysc->srst_udelay);
1923
1924 c = _wait_softreset_complete(oh);
1925 if (c == MAX_MODULE_SOFTRESET_WAIT) {
1926 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1927 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1928 ret = -ETIMEDOUT;
1929 goto dis_opt_clks;
1930 } else {
1931 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1932 }
1933
1934 ret = _clear_softreset(oh, &v);
1935 if (ret)
1936 goto dis_opt_clks;
1937
1938 _write_sysconfig(v, oh);
1939
1940 /*
1941 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1942 * _wait_target_ready() or _reset()
1943 */
1944
1945 dis_opt_clks:
1946 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1947 _disable_optional_clocks(oh);
1948
1949 return ret;
1950 }
1951
1952 /**
1953 * _reset - reset an omap_hwmod
1954 * @oh: struct omap_hwmod *
1955 *
1956 * Resets an omap_hwmod @oh. If the module has a custom reset
1957 * function pointer defined, then call it to reset the IP block, and
1958 * pass along its return value to the caller. Otherwise, if the IP
1959 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1960 * associated with it, call a function to reset the IP block via that
1961 * method, and pass along the return value to the caller. Finally, if
1962 * the IP block has some hardreset lines associated with it, assert
1963 * all of those, but do _not_ deassert them. (This is because driver
1964 * authors have expressed an apparent requirement to control the
1965 * deassertion of the hardreset lines themselves.)
1966 *
1967 * The default software reset mechanism for most OMAP IP blocks is
1968 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1969 * hwmods cannot be reset via this method. Some are not targets and
1970 * therefore have no OCP header registers to access. Others (like the
1971 * IVA) have idiosyncratic reset sequences. So for these relatively
1972 * rare cases, custom reset code can be supplied in the struct
1973 * omap_hwmod_class .reset function pointer.
1974 *
1975 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1976 * does not prevent idling of the system. This is necessary for cases
1977 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1978 * kernel without disabling dma.
1979 *
1980 * Passes along the return value from either _ocp_softreset() or the
1981 * custom reset function - these must return -EINVAL if the hwmod
1982 * cannot be reset this way or if the hwmod is in the wrong state,
1983 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1984 */
1985 static int _reset(struct omap_hwmod *oh)
1986 {
1987 int i, r;
1988
1989 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1990
1991 if (oh->class->reset) {
1992 r = oh->class->reset(oh);
1993 } else {
1994 if (oh->rst_lines_cnt > 0) {
1995 for (i = 0; i < oh->rst_lines_cnt; i++)
1996 _assert_hardreset(oh, oh->rst_lines[i].name);
1997 return 0;
1998 } else {
1999 r = _ocp_softreset(oh);
2000 if (r == -ENOENT)
2001 r = 0;
2002 }
2003 }
2004
2005 _set_dmadisable(oh);
2006
2007 /*
2008 * OCP_SYSCONFIG bits need to be reprogrammed after a
2009 * softreset. The _enable() function should be split to avoid
2010 * the rewrite of the OCP_SYSCONFIG register.
2011 */
2012 if (oh->class->sysc) {
2013 _update_sysc_cache(oh);
2014 _enable_sysc(oh);
2015 }
2016
2017 return r;
2018 }
2019
2020 /**
2021 * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
2022 *
2023 * Call the appropriate PRM function to clear any logged I/O chain
2024 * wakeups and to reconfigure the chain. This apparently needs to be
2025 * done upon every mux change. Since hwmods can be concurrently
2026 * enabled and idled, hold a spinlock around the I/O chain
2027 * reconfiguration sequence. No return value.
2028 *
2029 * XXX When the PRM code is moved to drivers, this function can be removed,
2030 * as the PRM infrastructure should abstract this.
2031 */
2032 static void _reconfigure_io_chain(void)
2033 {
2034 unsigned long flags;
2035
2036 spin_lock_irqsave(&io_chain_lock, flags);
2037
2038 omap_prm_reconfigure_io_chain();
2039
2040 spin_unlock_irqrestore(&io_chain_lock, flags);
2041 }
2042
2043 /**
2044 * _omap4_update_context_lost - increment hwmod context loss counter if
2045 * hwmod context was lost, and clear hardware context loss reg
2046 * @oh: hwmod to check for context loss
2047 *
2048 * If the PRCM indicates that the hwmod @oh lost context, increment
2049 * our in-memory context loss counter, and clear the RM_*_CONTEXT
2050 * bits. No return value.
2051 */
2052 static void _omap4_update_context_lost(struct omap_hwmod *oh)
2053 {
2054 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
2055 return;
2056
2057 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
2058 oh->clkdm->pwrdm.ptr->prcm_offs,
2059 oh->prcm.omap4.context_offs))
2060 return;
2061
2062 oh->prcm.omap4.context_lost_counter++;
2063 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
2064 oh->clkdm->pwrdm.ptr->prcm_offs,
2065 oh->prcm.omap4.context_offs);
2066 }
2067
2068 /**
2069 * _omap4_get_context_lost - get context loss counter for a hwmod
2070 * @oh: hwmod to get context loss counter for
2071 *
2072 * Returns the in-memory context loss counter for a hwmod.
2073 */
2074 static int _omap4_get_context_lost(struct omap_hwmod *oh)
2075 {
2076 return oh->prcm.omap4.context_lost_counter;
2077 }
2078
2079 /**
2080 * _enable_preprogram - Pre-program an IP block during the _enable() process
2081 * @oh: struct omap_hwmod *
2082 *
2083 * Some IP blocks (such as AESS) require some additional programming
2084 * after enable before they can enter idle. If a function pointer to
2085 * do so is present in the hwmod data, then call it and pass along the
2086 * return value; otherwise, return 0.
2087 */
2088 static int _enable_preprogram(struct omap_hwmod *oh)
2089 {
2090 if (!oh->class->enable_preprogram)
2091 return 0;
2092
2093 return oh->class->enable_preprogram(oh);
2094 }
2095
2096 /**
2097 * _enable - enable an omap_hwmod
2098 * @oh: struct omap_hwmod *
2099 *
2100 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
2101 * register target. Returns -EINVAL if the hwmod is in the wrong
2102 * state or passes along the return value of _wait_target_ready().
2103 */
2104 static int _enable(struct omap_hwmod *oh)
2105 {
2106 int r;
2107
2108 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
2109
2110 /*
2111 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
2112 * state at init. Now that someone is really trying to enable
2113 * them, just ensure that the hwmod mux is set.
2114 */
2115 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
2116 /*
2117 * If the caller has mux data populated, do the mux'ing
2118 * which wouldn't have been done as part of the _enable()
2119 * done during setup.
2120 */
2121 if (oh->mux)
2122 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
2123
2124 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
2125 return 0;
2126 }
2127
2128 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
2129 oh->_state != _HWMOD_STATE_IDLE &&
2130 oh->_state != _HWMOD_STATE_DISABLED) {
2131 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
2132 oh->name);
2133 return -EINVAL;
2134 }
2135
2136 /*
2137 * If an IP block contains HW reset lines and all of them are
2138 * asserted, we let integration code associated with that
2139 * block handle the enable. We've received very little
2140 * information on what those driver authors need, and until
2141 * detailed information is provided and the driver code is
2142 * posted to the public lists, this is probably the best we
2143 * can do.
2144 */
2145 if (_are_all_hardreset_lines_asserted(oh))
2146 return 0;
2147
2148 /* Mux pins for device runtime if populated */
2149 if (oh->mux && (!oh->mux->enabled ||
2150 ((oh->_state == _HWMOD_STATE_IDLE) &&
2151 oh->mux->pads_dynamic))) {
2152 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
2153 _reconfigure_io_chain();
2154 } else if (oh->flags & HWMOD_RECONFIG_IO_CHAIN) {
2155 _reconfigure_io_chain();
2156 }
2157
2158 _add_initiator_dep(oh, mpu_oh);
2159
2160 if (oh->clkdm) {
2161 /*
2162 * A clockdomain must be in SW_SUP before enabling
2163 * completely the module. The clockdomain can be set
2164 * in HW_AUTO only when the module become ready.
2165 */
2166 clkdm_deny_idle(oh->clkdm);
2167 r = clkdm_hwmod_enable(oh->clkdm, oh);
2168 if (r) {
2169 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
2170 oh->name, oh->clkdm->name, r);
2171 return r;
2172 }
2173 }
2174
2175 _enable_clocks(oh);
2176 if (soc_ops.enable_module)
2177 soc_ops.enable_module(oh);
2178 if (oh->flags & HWMOD_BLOCK_WFI)
2179 cpu_idle_poll_ctrl(true);
2180
2181 if (soc_ops.update_context_lost)
2182 soc_ops.update_context_lost(oh);
2183
2184 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
2185 -EINVAL;
2186 if (oh->clkdm)
2187 clkdm_allow_idle(oh->clkdm);
2188
2189 if (!r) {
2190 oh->_state = _HWMOD_STATE_ENABLED;
2191
2192 /* Access the sysconfig only if the target is ready */
2193 if (oh->class->sysc) {
2194 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
2195 _update_sysc_cache(oh);
2196 _enable_sysc(oh);
2197 }
2198 r = _enable_preprogram(oh);
2199 } else {
2200 if (soc_ops.disable_module)
2201 soc_ops.disable_module(oh);
2202 _disable_clocks(oh);
2203 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n",
2204 oh->name, r);
2205
2206 if (oh->clkdm)
2207 clkdm_hwmod_disable(oh->clkdm, oh);
2208 }
2209
2210 return r;
2211 }
2212
2213 /**
2214 * _idle - idle an omap_hwmod
2215 * @oh: struct omap_hwmod *
2216 *
2217 * Idles an omap_hwmod @oh. This should be called once the hwmod has
2218 * no further work. Returns -EINVAL if the hwmod is in the wrong
2219 * state or returns 0.
2220 */
2221 static int _idle(struct omap_hwmod *oh)
2222 {
2223 if (oh->flags & HWMOD_NO_IDLE) {
2224 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2225 return 0;
2226 }
2227
2228 pr_debug("omap_hwmod: %s: idling\n", oh->name);
2229
2230 if (_are_all_hardreset_lines_asserted(oh))
2231 return 0;
2232
2233 if (oh->_state != _HWMOD_STATE_ENABLED) {
2234 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
2235 oh->name);
2236 return -EINVAL;
2237 }
2238
2239 if (oh->class->sysc)
2240 _idle_sysc(oh);
2241 _del_initiator_dep(oh, mpu_oh);
2242
2243 if (oh->clkdm)
2244 clkdm_deny_idle(oh->clkdm);
2245
2246 if (oh->flags & HWMOD_BLOCK_WFI)
2247 cpu_idle_poll_ctrl(false);
2248 if (soc_ops.disable_module)
2249 soc_ops.disable_module(oh);
2250
2251 /*
2252 * The module must be in idle mode before disabling any parents
2253 * clocks. Otherwise, the parent clock might be disabled before
2254 * the module transition is done, and thus will prevent the
2255 * transition to complete properly.
2256 */
2257 _disable_clocks(oh);
2258 if (oh->clkdm) {
2259 clkdm_allow_idle(oh->clkdm);
2260 clkdm_hwmod_disable(oh->clkdm, oh);
2261 }
2262
2263 /* Mux pins for device idle if populated */
2264 if (oh->mux && oh->mux->pads_dynamic) {
2265 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
2266 _reconfigure_io_chain();
2267 } else if (oh->flags & HWMOD_RECONFIG_IO_CHAIN) {
2268 _reconfigure_io_chain();
2269 }
2270
2271 oh->_state = _HWMOD_STATE_IDLE;
2272
2273 return 0;
2274 }
2275
2276 /**
2277 * _shutdown - shutdown an omap_hwmod
2278 * @oh: struct omap_hwmod *
2279 *
2280 * Shut down an omap_hwmod @oh. This should be called when the driver
2281 * used for the hwmod is removed or unloaded or if the driver is not
2282 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2283 * state or returns 0.
2284 */
2285 static int _shutdown(struct omap_hwmod *oh)
2286 {
2287 int ret, i;
2288 u8 prev_state;
2289
2290 if (_are_all_hardreset_lines_asserted(oh))
2291 return 0;
2292
2293 if (oh->_state != _HWMOD_STATE_IDLE &&
2294 oh->_state != _HWMOD_STATE_ENABLED) {
2295 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2296 oh->name);
2297 return -EINVAL;
2298 }
2299
2300 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2301
2302 if (oh->class->pre_shutdown) {
2303 prev_state = oh->_state;
2304 if (oh->_state == _HWMOD_STATE_IDLE)
2305 _enable(oh);
2306 ret = oh->class->pre_shutdown(oh);
2307 if (ret) {
2308 if (prev_state == _HWMOD_STATE_IDLE)
2309 _idle(oh);
2310 return ret;
2311 }
2312 }
2313
2314 if (oh->class->sysc) {
2315 if (oh->_state == _HWMOD_STATE_IDLE)
2316 _enable(oh);
2317 _shutdown_sysc(oh);
2318 }
2319
2320 /* clocks and deps are already disabled in idle */
2321 if (oh->_state == _HWMOD_STATE_ENABLED) {
2322 _del_initiator_dep(oh, mpu_oh);
2323 /* XXX what about the other system initiators here? dma, dsp */
2324 if (oh->flags & HWMOD_BLOCK_WFI)
2325 cpu_idle_poll_ctrl(false);
2326 if (soc_ops.disable_module)
2327 soc_ops.disable_module(oh);
2328 _disable_clocks(oh);
2329 if (oh->clkdm)
2330 clkdm_hwmod_disable(oh->clkdm, oh);
2331 }
2332 /* XXX Should this code also force-disable the optional clocks? */
2333
2334 for (i = 0; i < oh->rst_lines_cnt; i++)
2335 _assert_hardreset(oh, oh->rst_lines[i].name);
2336
2337 /* Mux pins to safe mode or use populated off mode values */
2338 if (oh->mux)
2339 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
2340
2341 oh->_state = _HWMOD_STATE_DISABLED;
2342
2343 return 0;
2344 }
2345
2346 static int of_dev_find_hwmod(struct device_node *np,
2347 struct omap_hwmod *oh)
2348 {
2349 int count, i, res;
2350 const char *p;
2351
2352 count = of_property_count_strings(np, "ti,hwmods");
2353 if (count < 1)
2354 return -ENODEV;
2355
2356 for (i = 0; i < count; i++) {
2357 res = of_property_read_string_index(np, "ti,hwmods",
2358 i, &p);
2359 if (res)
2360 continue;
2361 if (!strcmp(p, oh->name)) {
2362 pr_debug("omap_hwmod: dt %s[%i] uses hwmod %s\n",
2363 np->name, i, oh->name);
2364 return i;
2365 }
2366 }
2367
2368 return -ENODEV;
2369 }
2370
2371 /**
2372 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2373 * @np: struct device_node *
2374 * @oh: struct omap_hwmod *
2375 * @index: index of the entry found
2376 * @found: struct device_node * found or NULL
2377 *
2378 * Parse the dt blob and find out needed hwmod. Recursive function is
2379 * implemented to take care hierarchical dt blob parsing.
2380 * Return: Returns 0 on success, -ENODEV when not found.
2381 */
2382 static int of_dev_hwmod_lookup(struct device_node *np,
2383 struct omap_hwmod *oh,
2384 int *index,
2385 struct device_node **found)
2386 {
2387 struct device_node *np0 = NULL;
2388 int res;
2389
2390 res = of_dev_find_hwmod(np, oh);
2391 if (res >= 0) {
2392 *found = np;
2393 *index = res;
2394 return 0;
2395 }
2396
2397 for_each_child_of_node(np, np0) {
2398 struct device_node *fc;
2399 int i;
2400
2401 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2402 if (res == 0) {
2403 *found = fc;
2404 *index = i;
2405 return 0;
2406 }
2407 }
2408
2409 *found = NULL;
2410 *index = 0;
2411
2412 return -ENODEV;
2413 }
2414
2415 /**
2416 * _init_mpu_rt_base - populate the virtual address for a hwmod
2417 * @oh: struct omap_hwmod * to locate the virtual address
2418 * @data: (unused, caller should pass NULL)
2419 * @index: index of the reg entry iospace in device tree
2420 * @np: struct device_node * of the IP block's device node in the DT data
2421 *
2422 * Cache the virtual address used by the MPU to access this IP block's
2423 * registers. This address is needed early so the OCP registers that
2424 * are part of the device's address space can be ioremapped properly.
2425 *
2426 * If SYSC access is not needed, the registers will not be remapped
2427 * and non-availability of MPU access is not treated as an error.
2428 *
2429 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2430 * -ENXIO on absent or invalid register target address space.
2431 */
2432 static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2433 int index, struct device_node *np)
2434 {
2435 struct omap_hwmod_addr_space *mem;
2436 void __iomem *va_start = NULL;
2437
2438 if (!oh)
2439 return -EINVAL;
2440
2441 _save_mpu_port_index(oh);
2442
2443 /* if we don't need sysc access we don't need to ioremap */
2444 if (!oh->class->sysc)
2445 return 0;
2446
2447 /* we can't continue without MPU PORT if we need sysc access */
2448 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2449 return -ENXIO;
2450
2451 mem = _find_mpu_rt_addr_space(oh);
2452 if (!mem) {
2453 pr_debug("omap_hwmod: %s: no MPU register target found\n",
2454 oh->name);
2455
2456 /* Extract the IO space from device tree blob */
2457 if (!np) {
2458 pr_err("omap_hwmod: %s: no dt node\n", oh->name);
2459 return -ENXIO;
2460 }
2461
2462 va_start = of_iomap(np, index + oh->mpu_rt_idx);
2463 } else {
2464 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
2465 }
2466
2467 if (!va_start) {
2468 if (mem)
2469 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2470 else
2471 pr_err("omap_hwmod: %s: Missing dt reg%i for %s\n",
2472 oh->name, index, np->full_name);
2473 return -ENXIO;
2474 }
2475
2476 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2477 oh->name, va_start);
2478
2479 oh->_mpu_rt_va = va_start;
2480 return 0;
2481 }
2482
2483 /**
2484 * _init - initialize internal data for the hwmod @oh
2485 * @oh: struct omap_hwmod *
2486 * @n: (unused)
2487 *
2488 * Look up the clocks and the address space used by the MPU to access
2489 * registers belonging to the hwmod @oh. @oh must already be
2490 * registered at this point. This is the first of two phases for
2491 * hwmod initialization. Code called here does not touch any hardware
2492 * registers, it simply prepares internal data structures. Returns 0
2493 * upon success or if the hwmod isn't registered or if the hwmod's
2494 * address space is not defined, or -EINVAL upon failure.
2495 */
2496 static int __init _init(struct omap_hwmod *oh, void *data)
2497 {
2498 int r, index;
2499 struct device_node *np = NULL;
2500
2501 if (oh->_state != _HWMOD_STATE_REGISTERED)
2502 return 0;
2503
2504 if (of_have_populated_dt()) {
2505 struct device_node *bus;
2506
2507 bus = of_find_node_by_name(NULL, "ocp");
2508 if (!bus)
2509 return -ENODEV;
2510
2511 r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2512 if (r)
2513 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2514 else if (np && index)
2515 pr_warn("omap_hwmod: %s using broken dt data from %s\n",
2516 oh->name, np->name);
2517 }
2518
2519 r = _init_mpu_rt_base(oh, NULL, index, np);
2520 if (r < 0) {
2521 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2522 oh->name);
2523 return 0;
2524 }
2525
2526 r = _init_clocks(oh, NULL);
2527 if (r < 0) {
2528 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2529 return -EINVAL;
2530 }
2531
2532 if (np) {
2533 if (of_find_property(np, "ti,no-reset-on-init", NULL))
2534 oh->flags |= HWMOD_INIT_NO_RESET;
2535 if (of_find_property(np, "ti,no-idle-on-init", NULL))
2536 oh->flags |= HWMOD_INIT_NO_IDLE;
2537 if (of_find_property(np, "ti,no-idle", NULL))
2538 oh->flags |= HWMOD_NO_IDLE;
2539 }
2540
2541 oh->_state = _HWMOD_STATE_INITIALIZED;
2542
2543 return 0;
2544 }
2545
2546 /**
2547 * _setup_iclk_autoidle - configure an IP block's interface clocks
2548 * @oh: struct omap_hwmod *
2549 *
2550 * Set up the module's interface clocks. XXX This function is still mostly
2551 * a stub; implementing this properly requires iclk autoidle usecounting in
2552 * the clock code. No return value.
2553 */
2554 static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
2555 {
2556 struct omap_hwmod_ocp_if *os;
2557 struct list_head *p;
2558 int i = 0;
2559 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2560 return;
2561
2562 p = oh->slave_ports.next;
2563
2564 while (i < oh->slaves_cnt) {
2565 os = _fetch_next_ocp_if(&p, &i);
2566 if (!os->_clk)
2567 continue;
2568
2569 if (os->flags & OCPIF_SWSUP_IDLE) {
2570 /* XXX omap_iclk_deny_idle(c); */
2571 } else {
2572 /* XXX omap_iclk_allow_idle(c); */
2573 clk_enable(os->_clk);
2574 }
2575 }
2576
2577 return;
2578 }
2579
2580 /**
2581 * _setup_reset - reset an IP block during the setup process
2582 * @oh: struct omap_hwmod *
2583 *
2584 * Reset the IP block corresponding to the hwmod @oh during the setup
2585 * process. The IP block is first enabled so it can be successfully
2586 * reset. Returns 0 upon success or a negative error code upon
2587 * failure.
2588 */
2589 static int __init _setup_reset(struct omap_hwmod *oh)
2590 {
2591 int r;
2592
2593 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2594 return -EINVAL;
2595
2596 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2597 return -EPERM;
2598
2599 if (oh->rst_lines_cnt == 0) {
2600 r = _enable(oh);
2601 if (r) {
2602 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2603 oh->name, oh->_state);
2604 return -EINVAL;
2605 }
2606 }
2607
2608 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2609 r = _reset(oh);
2610
2611 return r;
2612 }
2613
2614 /**
2615 * _setup_postsetup - transition to the appropriate state after _setup
2616 * @oh: struct omap_hwmod *
2617 *
2618 * Place an IP block represented by @oh into a "post-setup" state --
2619 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2620 * this function is called at the end of _setup().) The postsetup
2621 * state for an IP block can be changed by calling
2622 * omap_hwmod_enter_postsetup_state() early in the boot process,
2623 * before one of the omap_hwmod_setup*() functions are called for the
2624 * IP block.
2625 *
2626 * The IP block stays in this state until a PM runtime-based driver is
2627 * loaded for that IP block. A post-setup state of IDLE is
2628 * appropriate for almost all IP blocks with runtime PM-enabled
2629 * drivers, since those drivers are able to enable the IP block. A
2630 * post-setup state of ENABLED is appropriate for kernels with PM
2631 * runtime disabled. The DISABLED state is appropriate for unusual IP
2632 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2633 * included, since the WDTIMER starts running on reset and will reset
2634 * the MPU if left active.
2635 *
2636 * This post-setup mechanism is deprecated. Once all of the OMAP
2637 * drivers have been converted to use PM runtime, and all of the IP
2638 * block data and interconnect data is available to the hwmod code, it
2639 * should be possible to replace this mechanism with a "lazy reset"
2640 * arrangement. In a "lazy reset" setup, each IP block is enabled
2641 * when the driver first probes, then all remaining IP blocks without
2642 * drivers are either shut down or enabled after the drivers have
2643 * loaded. However, this cannot take place until the above
2644 * preconditions have been met, since otherwise the late reset code
2645 * has no way of knowing which IP blocks are in use by drivers, and
2646 * which ones are unused.
2647 *
2648 * No return value.
2649 */
2650 static void __init _setup_postsetup(struct omap_hwmod *oh)
2651 {
2652 u8 postsetup_state;
2653
2654 if (oh->rst_lines_cnt > 0)
2655 return;
2656
2657 postsetup_state = oh->_postsetup_state;
2658 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2659 postsetup_state = _HWMOD_STATE_ENABLED;
2660
2661 /*
2662 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2663 * it should be set by the core code as a runtime flag during startup
2664 */
2665 if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) &&
2666 (postsetup_state == _HWMOD_STATE_IDLE)) {
2667 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2668 postsetup_state = _HWMOD_STATE_ENABLED;
2669 }
2670
2671 if (postsetup_state == _HWMOD_STATE_IDLE)
2672 _idle(oh);
2673 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2674 _shutdown(oh);
2675 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2676 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2677 oh->name, postsetup_state);
2678
2679 return;
2680 }
2681
2682 /**
2683 * _setup - prepare IP block hardware for use
2684 * @oh: struct omap_hwmod *
2685 * @n: (unused, pass NULL)
2686 *
2687 * Configure the IP block represented by @oh. This may include
2688 * enabling the IP block, resetting it, and placing it into a
2689 * post-setup state, depending on the type of IP block and applicable
2690 * flags. IP blocks are reset to prevent any previous configuration
2691 * by the bootloader or previous operating system from interfering
2692 * with power management or other parts of the system. The reset can
2693 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2694 * two phases for hwmod initialization. Code called here generally
2695 * affects the IP block hardware, or system integration hardware
2696 * associated with the IP block. Returns 0.
2697 */
2698 static int __init _setup(struct omap_hwmod *oh, void *data)
2699 {
2700 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2701 return 0;
2702
2703 if (oh->parent_hwmod) {
2704 int r;
2705
2706 r = _enable(oh->parent_hwmod);
2707 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n",
2708 oh->name, oh->parent_hwmod->name);
2709 }
2710
2711 _setup_iclk_autoidle(oh);
2712
2713 if (!_setup_reset(oh))
2714 _setup_postsetup(oh);
2715
2716 if (oh->parent_hwmod) {
2717 u8 postsetup_state;
2718
2719 postsetup_state = oh->parent_hwmod->_postsetup_state;
2720
2721 if (postsetup_state == _HWMOD_STATE_IDLE)
2722 _idle(oh->parent_hwmod);
2723 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2724 _shutdown(oh->parent_hwmod);
2725 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2726 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2727 oh->parent_hwmod->name, postsetup_state);
2728 }
2729
2730 return 0;
2731 }
2732
2733 /**
2734 * _register - register a struct omap_hwmod
2735 * @oh: struct omap_hwmod *
2736 *
2737 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2738 * already has been registered by the same name; -EINVAL if the
2739 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2740 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2741 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2742 * success.
2743 *
2744 * XXX The data should be copied into bootmem, so the original data
2745 * should be marked __initdata and freed after init. This would allow
2746 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2747 * that the copy process would be relatively complex due to the large number
2748 * of substructures.
2749 */
2750 static int __init _register(struct omap_hwmod *oh)
2751 {
2752 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2753 (oh->_state != _HWMOD_STATE_UNKNOWN))
2754 return -EINVAL;
2755
2756 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2757
2758 if (_lookup(oh->name))
2759 return -EEXIST;
2760
2761 list_add_tail(&oh->node, &omap_hwmod_list);
2762
2763 INIT_LIST_HEAD(&oh->master_ports);
2764 INIT_LIST_HEAD(&oh->slave_ports);
2765 spin_lock_init(&oh->_lock);
2766 lockdep_set_class(&oh->_lock, &oh->hwmod_key);
2767
2768 oh->_state = _HWMOD_STATE_REGISTERED;
2769
2770 /*
2771 * XXX Rather than doing a strcmp(), this should test a flag
2772 * set in the hwmod data, inserted by the autogenerator code.
2773 */
2774 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2775 mpu_oh = oh;
2776
2777 return 0;
2778 }
2779
2780 /**
2781 * _alloc_links - return allocated memory for hwmod links
2782 * @ml: pointer to a struct omap_hwmod_link * for the master link
2783 * @sl: pointer to a struct omap_hwmod_link * for the slave link
2784 *
2785 * Return pointers to two struct omap_hwmod_link records, via the
2786 * addresses pointed to by @ml and @sl. Will first attempt to return
2787 * memory allocated as part of a large initial block, but if that has
2788 * been exhausted, will allocate memory itself. Since ideally this
2789 * second allocation path will never occur, the number of these
2790 * 'supplemental' allocations will be logged when debugging is
2791 * enabled. Returns 0.
2792 */
2793 static int __init _alloc_links(struct omap_hwmod_link **ml,
2794 struct omap_hwmod_link **sl)
2795 {
2796 unsigned int sz;
2797
2798 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
2799 *ml = &linkspace[free_ls++];
2800 *sl = &linkspace[free_ls++];
2801 return 0;
2802 }
2803
2804 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
2805
2806 *sl = NULL;
2807 *ml = memblock_virt_alloc(sz, 0);
2808
2809 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
2810
2811 ls_supp++;
2812 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
2813 ls_supp * LINKS_PER_OCP_IF);
2814
2815 return 0;
2816 };
2817
2818 /**
2819 * _add_link - add an interconnect between two IP blocks
2820 * @oi: pointer to a struct omap_hwmod_ocp_if record
2821 *
2822 * Add struct omap_hwmod_link records connecting the master IP block
2823 * specified in @oi->master to @oi, and connecting the slave IP block
2824 * specified in @oi->slave to @oi. This code is assumed to run before
2825 * preemption or SMP has been enabled, thus avoiding the need for
2826 * locking in this code. Changes to this assumption will require
2827 * additional locking. Returns 0.
2828 */
2829 static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2830 {
2831 struct omap_hwmod_link *ml, *sl;
2832
2833 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2834 oi->slave->name);
2835
2836 _alloc_links(&ml, &sl);
2837
2838 ml->ocp_if = oi;
2839 list_add(&ml->node, &oi->master->master_ports);
2840 oi->master->masters_cnt++;
2841
2842 sl->ocp_if = oi;
2843 list_add(&sl->node, &oi->slave->slave_ports);
2844 oi->slave->slaves_cnt++;
2845
2846 return 0;
2847 }
2848
2849 /**
2850 * _register_link - register a struct omap_hwmod_ocp_if
2851 * @oi: struct omap_hwmod_ocp_if *
2852 *
2853 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2854 * has already been registered; -EINVAL if @oi is NULL or if the
2855 * record pointed to by @oi is missing required fields; or 0 upon
2856 * success.
2857 *
2858 * XXX The data should be copied into bootmem, so the original data
2859 * should be marked __initdata and freed after init. This would allow
2860 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2861 */
2862 static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2863 {
2864 if (!oi || !oi->master || !oi->slave || !oi->user)
2865 return -EINVAL;
2866
2867 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2868 return -EEXIST;
2869
2870 pr_debug("omap_hwmod: registering link from %s to %s\n",
2871 oi->master->name, oi->slave->name);
2872
2873 /*
2874 * Register the connected hwmods, if they haven't been
2875 * registered already
2876 */
2877 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2878 _register(oi->master);
2879
2880 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2881 _register(oi->slave);
2882
2883 _add_link(oi);
2884
2885 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2886
2887 return 0;
2888 }
2889
2890 /**
2891 * _alloc_linkspace - allocate large block of hwmod links
2892 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
2893 *
2894 * Allocate a large block of struct omap_hwmod_link records. This
2895 * improves boot time significantly by avoiding the need to allocate
2896 * individual records one by one. If the number of records to
2897 * allocate in the block hasn't been manually specified, this function
2898 * will count the number of struct omap_hwmod_ocp_if records in @ois
2899 * and use that to determine the allocation size. For SoC families
2900 * that require multiple list registrations, such as OMAP3xxx, this
2901 * estimation process isn't optimal, so manual estimation is advised
2902 * in those cases. Returns -EEXIST if the allocation has already occurred
2903 * or 0 upon success.
2904 */
2905 static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2906 {
2907 unsigned int i = 0;
2908 unsigned int sz;
2909
2910 if (linkspace) {
2911 WARN(1, "linkspace already allocated\n");
2912 return -EEXIST;
2913 }
2914
2915 if (max_ls == 0)
2916 while (ois[i++])
2917 max_ls += LINKS_PER_OCP_IF;
2918
2919 sz = sizeof(struct omap_hwmod_link) * max_ls;
2920
2921 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
2922 __func__, sz, max_ls);
2923
2924 linkspace = memblock_virt_alloc(sz, 0);
2925
2926 return 0;
2927 }
2928
2929 /* Static functions intended only for use in soc_ops field function pointers */
2930
2931 /**
2932 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
2933 * @oh: struct omap_hwmod *
2934 *
2935 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2936 * does not have an IDLEST bit or if the module successfully leaves
2937 * slave idle; otherwise, pass along the return value of the
2938 * appropriate *_cm*_wait_module_ready() function.
2939 */
2940 static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
2941 {
2942 if (!oh)
2943 return -EINVAL;
2944
2945 if (oh->flags & HWMOD_NO_IDLEST)
2946 return 0;
2947
2948 if (!_find_mpu_rt_port(oh))
2949 return 0;
2950
2951 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2952
2953 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
2954 oh->prcm.omap2.idlest_reg_id,
2955 oh->prcm.omap2.idlest_idle_bit);
2956 }
2957
2958 /**
2959 * _omap4_wait_target_ready - wait for a module to leave slave idle
2960 * @oh: struct omap_hwmod *
2961 *
2962 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2963 * does not have an IDLEST bit or if the module successfully leaves
2964 * slave idle; otherwise, pass along the return value of the
2965 * appropriate *_cm*_wait_module_ready() function.
2966 */
2967 static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2968 {
2969 if (!oh)
2970 return -EINVAL;
2971
2972 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2973 return 0;
2974
2975 if (!_find_mpu_rt_port(oh))
2976 return 0;
2977
2978 if (!oh->prcm.omap4.clkctrl_offs &&
2979 !(oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET))
2980 return 0;
2981
2982 /* XXX check module SIDLEMODE, hardreset status */
2983
2984 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
2985 oh->clkdm->cm_inst,
2986 oh->prcm.omap4.clkctrl_offs, 0);
2987 }
2988
2989 /**
2990 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2991 * @oh: struct omap_hwmod * to assert hardreset
2992 * @ohri: hardreset line data
2993 *
2994 * Call omap2_prm_assert_hardreset() with parameters extracted from
2995 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2996 * use as an soc_ops function pointer. Passes along the return value
2997 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2998 * for removal when the PRM code is moved into drivers/.
2999 */
3000 static int _omap2_assert_hardreset(struct omap_hwmod *oh,
3001 struct omap_hwmod_rst_info *ohri)
3002 {
3003 return omap_prm_assert_hardreset(ohri->rst_shift, 0,
3004 oh->prcm.omap2.module_offs, 0);
3005 }
3006
3007 /**
3008 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
3009 * @oh: struct omap_hwmod * to deassert hardreset
3010 * @ohri: hardreset line data
3011 *
3012 * Call omap2_prm_deassert_hardreset() with parameters extracted from
3013 * the hwmod @oh and the hardreset line data @ohri. Only intended for
3014 * use as an soc_ops function pointer. Passes along the return value
3015 * from omap2_prm_deassert_hardreset(). XXX This function is
3016 * scheduled for removal when the PRM code is moved into drivers/.
3017 */
3018 static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
3019 struct omap_hwmod_rst_info *ohri)
3020 {
3021 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
3022 oh->prcm.omap2.module_offs, 0, 0);
3023 }
3024
3025 /**
3026 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
3027 * @oh: struct omap_hwmod * to test hardreset
3028 * @ohri: hardreset line data
3029 *
3030 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
3031 * from the hwmod @oh and the hardreset line data @ohri. Only
3032 * intended for use as an soc_ops function pointer. Passes along the
3033 * return value from omap2_prm_is_hardreset_asserted(). XXX This
3034 * function is scheduled for removal when the PRM code is moved into
3035 * drivers/.
3036 */
3037 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
3038 struct omap_hwmod_rst_info *ohri)
3039 {
3040 return omap_prm_is_hardreset_asserted(ohri->st_shift, 0,
3041 oh->prcm.omap2.module_offs, 0);
3042 }
3043
3044 /**
3045 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
3046 * @oh: struct omap_hwmod * to assert hardreset
3047 * @ohri: hardreset line data
3048 *
3049 * Call omap4_prminst_assert_hardreset() with parameters extracted
3050 * from the hwmod @oh and the hardreset line data @ohri. Only
3051 * intended for use as an soc_ops function pointer. Passes along the
3052 * return value from omap4_prminst_assert_hardreset(). XXX This
3053 * function is scheduled for removal when the PRM code is moved into
3054 * drivers/.
3055 */
3056 static int _omap4_assert_hardreset(struct omap_hwmod *oh,
3057 struct omap_hwmod_rst_info *ohri)
3058 {
3059 if (!oh->clkdm)
3060 return -EINVAL;
3061
3062 return omap_prm_assert_hardreset(ohri->rst_shift,
3063 oh->clkdm->pwrdm.ptr->prcm_partition,
3064 oh->clkdm->pwrdm.ptr->prcm_offs,
3065 oh->prcm.omap4.rstctrl_offs);
3066 }
3067
3068 /**
3069 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
3070 * @oh: struct omap_hwmod * to deassert hardreset
3071 * @ohri: hardreset line data
3072 *
3073 * Call omap4_prminst_deassert_hardreset() with parameters extracted
3074 * from the hwmod @oh and the hardreset line data @ohri. Only
3075 * intended for use as an soc_ops function pointer. Passes along the
3076 * return value from omap4_prminst_deassert_hardreset(). XXX This
3077 * function is scheduled for removal when the PRM code is moved into
3078 * drivers/.
3079 */
3080 static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
3081 struct omap_hwmod_rst_info *ohri)
3082 {
3083 if (!oh->clkdm)
3084 return -EINVAL;
3085
3086 if (ohri->st_shift)
3087 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
3088 oh->name, ohri->name);
3089 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
3090 oh->clkdm->pwrdm.ptr->prcm_partition,
3091 oh->clkdm->pwrdm.ptr->prcm_offs,
3092 oh->prcm.omap4.rstctrl_offs,
3093 oh->prcm.omap4.rstctrl_offs +
3094 OMAP4_RST_CTRL_ST_OFFSET);
3095 }
3096
3097 /**
3098 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
3099 * @oh: struct omap_hwmod * to test hardreset
3100 * @ohri: hardreset line data
3101 *
3102 * Call omap4_prminst_is_hardreset_asserted() with parameters
3103 * extracted from the hwmod @oh and the hardreset line data @ohri.
3104 * Only intended for use as an soc_ops function pointer. Passes along
3105 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
3106 * This function is scheduled for removal when the PRM code is moved
3107 * into drivers/.
3108 */
3109 static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
3110 struct omap_hwmod_rst_info *ohri)
3111 {
3112 if (!oh->clkdm)
3113 return -EINVAL;
3114
3115 return omap_prm_is_hardreset_asserted(ohri->rst_shift,
3116 oh->clkdm->pwrdm.ptr->
3117 prcm_partition,
3118 oh->clkdm->pwrdm.ptr->prcm_offs,
3119 oh->prcm.omap4.rstctrl_offs);
3120 }
3121
3122 /**
3123 * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod
3124 * @oh: struct omap_hwmod * to disable control for
3125 *
3126 * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod
3127 * will be using its main_clk to enable/disable the module. Returns
3128 * 0 if successful.
3129 */
3130 static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
3131 {
3132 if (!oh)
3133 return -EINVAL;
3134
3135 oh->prcm.omap4.clkctrl_offs = 0;
3136 oh->prcm.omap4.modulemode = 0;
3137
3138 return 0;
3139 }
3140
3141 /**
3142 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
3143 * @oh: struct omap_hwmod * to deassert hardreset
3144 * @ohri: hardreset line data
3145 *
3146 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
3147 * from the hwmod @oh and the hardreset line data @ohri. Only
3148 * intended for use as an soc_ops function pointer. Passes along the
3149 * return value from am33xx_prminst_deassert_hardreset(). XXX This
3150 * function is scheduled for removal when the PRM code is moved into
3151 * drivers/.
3152 */
3153 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
3154 struct omap_hwmod_rst_info *ohri)
3155 {
3156 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift,
3157 oh->clkdm->pwrdm.ptr->prcm_partition,
3158 oh->clkdm->pwrdm.ptr->prcm_offs,
3159 oh->prcm.omap4.rstctrl_offs,
3160 oh->prcm.omap4.rstst_offs);
3161 }
3162
3163 /* Public functions */
3164
3165 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
3166 {
3167 if (oh->flags & HWMOD_16BIT_REG)
3168 return readw_relaxed(oh->_mpu_rt_va + reg_offs);
3169 else
3170 return readl_relaxed(oh->_mpu_rt_va + reg_offs);
3171 }
3172
3173 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
3174 {
3175 if (oh->flags & HWMOD_16BIT_REG)
3176 writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
3177 else
3178 writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
3179 }
3180
3181 /**
3182 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
3183 * @oh: struct omap_hwmod *
3184 *
3185 * This is a public function exposed to drivers. Some drivers may need to do
3186 * some settings before and after resetting the device. Those drivers after
3187 * doing the necessary settings could use this function to start a reset by
3188 * setting the SYSCONFIG.SOFTRESET bit.
3189 */
3190 int omap_hwmod_softreset(struct omap_hwmod *oh)
3191 {
3192 u32 v;
3193 int ret;
3194
3195 if (!oh || !(oh->_sysc_cache))
3196 return -EINVAL;
3197
3198 v = oh->_sysc_cache;
3199 ret = _set_softreset(oh, &v);
3200 if (ret)
3201 goto error;
3202 _write_sysconfig(v, oh);
3203
3204 ret = _clear_softreset(oh, &v);
3205 if (ret)
3206 goto error;
3207 _write_sysconfig(v, oh);
3208
3209 error:
3210 return ret;
3211 }
3212
3213 /**
3214 * omap_hwmod_lookup - look up a registered omap_hwmod by name
3215 * @name: name of the omap_hwmod to look up
3216 *
3217 * Given a @name of an omap_hwmod, return a pointer to the registered
3218 * struct omap_hwmod *, or NULL upon error.
3219 */
3220 struct omap_hwmod *omap_hwmod_lookup(const char *name)
3221 {
3222 struct omap_hwmod *oh;
3223
3224 if (!name)
3225 return NULL;
3226
3227 oh = _lookup(name);
3228
3229 return oh;
3230 }
3231
3232 /**
3233 * omap_hwmod_for_each - call function for each registered omap_hwmod
3234 * @fn: pointer to a callback function
3235 * @data: void * data to pass to callback function
3236 *
3237 * Call @fn for each registered omap_hwmod, passing @data to each
3238 * function. @fn must return 0 for success or any other value for
3239 * failure. If @fn returns non-zero, the iteration across omap_hwmods
3240 * will stop and the non-zero return value will be passed to the
3241 * caller of omap_hwmod_for_each(). @fn is called with
3242 * omap_hwmod_for_each() held.
3243 */
3244 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3245 void *data)
3246 {
3247 struct omap_hwmod *temp_oh;
3248 int ret = 0;
3249
3250 if (!fn)
3251 return -EINVAL;
3252
3253 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3254 ret = (*fn)(temp_oh, data);
3255 if (ret)
3256 break;
3257 }
3258
3259 return ret;
3260 }
3261
3262 /**
3263 * omap_hwmod_register_links - register an array of hwmod links
3264 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3265 *
3266 * Intended to be called early in boot before the clock framework is
3267 * initialized. If @ois is not null, will register all omap_hwmods
3268 * listed in @ois that are valid for this chip. Returns -EINVAL if
3269 * omap_hwmod_init() hasn't been called before calling this function,
3270 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3271 * success.
3272 */
3273 int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3274 {
3275 int r, i;
3276
3277 if (!inited)
3278 return -EINVAL;
3279
3280 if (!ois)
3281 return 0;
3282
3283 if (ois[0] == NULL) /* Empty list */
3284 return 0;
3285
3286 if (!linkspace) {
3287 if (_alloc_linkspace(ois)) {
3288 pr_err("omap_hwmod: could not allocate link space\n");
3289 return -ENOMEM;
3290 }
3291 }
3292
3293 i = 0;
3294 do {
3295 r = _register_link(ois[i]);
3296 WARN(r && r != -EEXIST,
3297 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3298 ois[i]->master->name, ois[i]->slave->name, r);
3299 } while (ois[++i]);
3300
3301 return 0;
3302 }
3303
3304 /**
3305 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3306 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3307 *
3308 * If the hwmod data corresponding to the MPU subsystem IP block
3309 * hasn't been initialized and set up yet, do so now. This must be
3310 * done first since sleep dependencies may be added from other hwmods
3311 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3312 * return value.
3313 */
3314 static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3315 {
3316 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3317 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3318 __func__, MPU_INITIATOR_NAME);
3319 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3320 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3321 }
3322
3323 /**
3324 * omap_hwmod_setup_one - set up a single hwmod
3325 * @oh_name: const char * name of the already-registered hwmod to set up
3326 *
3327 * Initialize and set up a single hwmod. Intended to be used for a
3328 * small number of early devices, such as the timer IP blocks used for
3329 * the scheduler clock. Must be called after omap2_clk_init().
3330 * Resolves the struct clk names to struct clk pointers for each
3331 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3332 * -EINVAL upon error or 0 upon success.
3333 */
3334 int __init omap_hwmod_setup_one(const char *oh_name)
3335 {
3336 struct omap_hwmod *oh;
3337
3338 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3339
3340 oh = _lookup(oh_name);
3341 if (!oh) {
3342 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3343 return -EINVAL;
3344 }
3345
3346 _ensure_mpu_hwmod_is_setup(oh);
3347
3348 _init(oh, NULL);
3349 _setup(oh, NULL);
3350
3351 return 0;
3352 }
3353
3354 /**
3355 * omap_hwmod_setup_all - set up all registered IP blocks
3356 *
3357 * Initialize and set up all IP blocks registered with the hwmod code.
3358 * Must be called after omap2_clk_init(). Resolves the struct clk
3359 * names to struct clk pointers for each registered omap_hwmod. Also
3360 * calls _setup() on each hwmod. Returns 0 upon success.
3361 */
3362 static int __init omap_hwmod_setup_all(void)
3363 {
3364 _ensure_mpu_hwmod_is_setup(NULL);
3365
3366 omap_hwmod_for_each(_init, NULL);
3367 omap_hwmod_for_each(_setup, NULL);
3368
3369 return 0;
3370 }
3371 omap_postcore_initcall(omap_hwmod_setup_all);
3372
3373 /**
3374 * omap_hwmod_enable - enable an omap_hwmod
3375 * @oh: struct omap_hwmod *
3376 *
3377 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3378 * Returns -EINVAL on error or passes along the return value from _enable().
3379 */
3380 int omap_hwmod_enable(struct omap_hwmod *oh)
3381 {
3382 int r;
3383 unsigned long flags;
3384
3385 if (!oh)
3386 return -EINVAL;
3387
3388 spin_lock_irqsave(&oh->_lock, flags);
3389 r = _enable(oh);
3390 spin_unlock_irqrestore(&oh->_lock, flags);
3391
3392 return r;
3393 }
3394
3395 /**
3396 * omap_hwmod_idle - idle an omap_hwmod
3397 * @oh: struct omap_hwmod *
3398 *
3399 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3400 * Returns -EINVAL on error or passes along the return value from _idle().
3401 */
3402 int omap_hwmod_idle(struct omap_hwmod *oh)
3403 {
3404 int r;
3405 unsigned long flags;
3406
3407 if (!oh)
3408 return -EINVAL;
3409
3410 spin_lock_irqsave(&oh->_lock, flags);
3411 r = _idle(oh);
3412 spin_unlock_irqrestore(&oh->_lock, flags);
3413
3414 return r;
3415 }
3416
3417 /**
3418 * omap_hwmod_shutdown - shutdown an omap_hwmod
3419 * @oh: struct omap_hwmod *
3420 *
3421 * Shutdown an omap_hwmod @oh. Intended to be called by
3422 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3423 * the return value from _shutdown().
3424 */
3425 int omap_hwmod_shutdown(struct omap_hwmod *oh)
3426 {
3427 int r;
3428 unsigned long flags;
3429
3430 if (!oh)
3431 return -EINVAL;
3432
3433 spin_lock_irqsave(&oh->_lock, flags);
3434 r = _shutdown(oh);
3435 spin_unlock_irqrestore(&oh->_lock, flags);
3436
3437 return r;
3438 }
3439
3440 /*
3441 * IP block data retrieval functions
3442 */
3443
3444 /**
3445 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
3446 * @oh: struct omap_hwmod *
3447 * @flags: Type of resources to include when counting (IRQ/DMA/MEM)
3448 *
3449 * Count the number of struct resource array elements necessary to
3450 * contain omap_hwmod @oh resources. Intended to be called by code
3451 * that registers omap_devices. Intended to be used to determine the
3452 * size of a dynamically-allocated struct resource array, before
3453 * calling omap_hwmod_fill_resources(). Returns the number of struct
3454 * resource array elements needed.
3455 *
3456 * XXX This code is not optimized. It could attempt to merge adjacent
3457 * resource IDs.
3458 *
3459 */
3460 int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags)
3461 {
3462 int ret = 0;
3463
3464 if (flags & IORESOURCE_IRQ)
3465 ret += _count_mpu_irqs(oh);
3466
3467 if (flags & IORESOURCE_DMA)
3468 ret += _count_sdma_reqs(oh);
3469
3470 if (flags & IORESOURCE_MEM) {
3471 int i = 0;
3472 struct omap_hwmod_ocp_if *os;
3473 struct list_head *p = oh->slave_ports.next;
3474
3475 while (i < oh->slaves_cnt) {
3476 os = _fetch_next_ocp_if(&p, &i);
3477 ret += _count_ocp_if_addr_spaces(os);
3478 }
3479 }
3480
3481 return ret;
3482 }
3483
3484 /**
3485 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
3486 * @oh: struct omap_hwmod *
3487 * @res: pointer to the first element of an array of struct resource to fill
3488 *
3489 * Fill the struct resource array @res with resource data from the
3490 * omap_hwmod @oh. Intended to be called by code that registers
3491 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3492 * number of array elements filled.
3493 */
3494 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
3495 {
3496 struct omap_hwmod_ocp_if *os;
3497 struct list_head *p;
3498 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
3499 int r = 0;
3500
3501 /* For each IRQ, DMA, memory area, fill in array.*/
3502
3503 mpu_irqs_cnt = _count_mpu_irqs(oh);
3504 for (i = 0; i < mpu_irqs_cnt; i++) {
3505 unsigned int irq;
3506
3507 if (oh->xlate_irq)
3508 irq = oh->xlate_irq((oh->mpu_irqs + i)->irq);
3509 else
3510 irq = (oh->mpu_irqs + i)->irq;
3511 (res + r)->name = (oh->mpu_irqs + i)->name;
3512 (res + r)->start = irq;
3513 (res + r)->end = irq;
3514 (res + r)->flags = IORESOURCE_IRQ;
3515 r++;
3516 }
3517
3518 sdma_reqs_cnt = _count_sdma_reqs(oh);
3519 for (i = 0; i < sdma_reqs_cnt; i++) {
3520 (res + r)->name = (oh->sdma_reqs + i)->name;
3521 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3522 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
3523 (res + r)->flags = IORESOURCE_DMA;
3524 r++;
3525 }
3526
3527 p = oh->slave_ports.next;
3528
3529 i = 0;
3530 while (i < oh->slaves_cnt) {
3531 os = _fetch_next_ocp_if(&p, &i);
3532 addr_cnt = _count_ocp_if_addr_spaces(os);
3533
3534 for (j = 0; j < addr_cnt; j++) {
3535 (res + r)->name = (os->addr + j)->name;
3536 (res + r)->start = (os->addr + j)->pa_start;
3537 (res + r)->end = (os->addr + j)->pa_end;
3538 (res + r)->flags = IORESOURCE_MEM;
3539 r++;
3540 }
3541 }
3542
3543 return r;
3544 }
3545
3546 /**
3547 * omap_hwmod_fill_dma_resources - fill struct resource array with dma data
3548 * @oh: struct omap_hwmod *
3549 * @res: pointer to the array of struct resource to fill
3550 *
3551 * Fill the struct resource array @res with dma resource data from the
3552 * omap_hwmod @oh. Intended to be called by code that registers
3553 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3554 * number of array elements filled.
3555 */
3556 int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
3557 {
3558 int i, sdma_reqs_cnt;
3559 int r = 0;
3560
3561 sdma_reqs_cnt = _count_sdma_reqs(oh);
3562 for (i = 0; i < sdma_reqs_cnt; i++) {
3563 (res + r)->name = (oh->sdma_reqs + i)->name;
3564 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3565 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
3566 (res + r)->flags = IORESOURCE_DMA;
3567 r++;
3568 }
3569
3570 return r;
3571 }
3572
3573 /**
3574 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
3575 * @oh: struct omap_hwmod * to operate on
3576 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
3577 * @name: pointer to the name of the data to fetch (optional)
3578 * @rsrc: pointer to a struct resource, allocated by the caller
3579 *
3580 * Retrieve MPU IRQ, SDMA request line, or address space start/end
3581 * data for the IP block pointed to by @oh. The data will be filled
3582 * into a struct resource record pointed to by @rsrc. The struct
3583 * resource must be allocated by the caller. When @name is non-null,
3584 * the data associated with the matching entry in the IRQ/SDMA/address
3585 * space hwmod data arrays will be returned. If @name is null, the
3586 * first array entry will be returned. Data order is not meaningful
3587 * in hwmod data, so callers are strongly encouraged to use a non-null
3588 * @name whenever possible to avoid unpredictable effects if hwmod
3589 * data is later added that causes data ordering to change. This
3590 * function is only intended for use by OMAP core code. Device
3591 * drivers should not call this function - the appropriate bus-related
3592 * data accessor functions should be used instead. Returns 0 upon
3593 * success or a negative error code upon error.
3594 */
3595 int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
3596 const char *name, struct resource *rsrc)
3597 {
3598 int r;
3599 unsigned int irq, dma;
3600 u32 pa_start, pa_end;
3601
3602 if (!oh || !rsrc)
3603 return -EINVAL;
3604
3605 if (type == IORESOURCE_IRQ) {
3606 r = _get_mpu_irq_by_name(oh, name, &irq);
3607 if (r)
3608 return r;
3609
3610 rsrc->start = irq;
3611 rsrc->end = irq;
3612 } else if (type == IORESOURCE_DMA) {
3613 r = _get_sdma_req_by_name(oh, name, &dma);
3614 if (r)
3615 return r;
3616
3617 rsrc->start = dma;
3618 rsrc->end = dma;
3619 } else if (type == IORESOURCE_MEM) {
3620 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
3621 if (r)
3622 return r;
3623
3624 rsrc->start = pa_start;
3625 rsrc->end = pa_end;
3626 } else {
3627 return -EINVAL;
3628 }
3629
3630 rsrc->flags = type;
3631 rsrc->name = name;
3632
3633 return 0;
3634 }
3635
3636 /**
3637 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3638 * @oh: struct omap_hwmod *
3639 *
3640 * Return the powerdomain pointer associated with the OMAP module
3641 * @oh's main clock. If @oh does not have a main clk, return the
3642 * powerdomain associated with the interface clock associated with the
3643 * module's MPU port. (XXX Perhaps this should use the SDMA port
3644 * instead?) Returns NULL on error, or a struct powerdomain * on
3645 * success.
3646 */
3647 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3648 {
3649 struct clk *c;
3650 struct omap_hwmod_ocp_if *oi;
3651 struct clockdomain *clkdm;
3652 struct clk_hw_omap *clk;
3653
3654 if (!oh)
3655 return NULL;
3656
3657 if (oh->clkdm)
3658 return oh->clkdm->pwrdm.ptr;
3659
3660 if (oh->_clk) {
3661 c = oh->_clk;
3662 } else {
3663 oi = _find_mpu_rt_port(oh);
3664 if (!oi)
3665 return NULL;
3666 c = oi->_clk;
3667 }
3668
3669 clk = to_clk_hw_omap(__clk_get_hw(c));
3670 clkdm = clk->clkdm;
3671 if (!clkdm)
3672 return NULL;
3673
3674 return clkdm->pwrdm.ptr;
3675 }
3676
3677 /**
3678 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3679 * @oh: struct omap_hwmod *
3680 *
3681 * Returns the virtual address corresponding to the beginning of the
3682 * module's register target, in the address range that is intended to
3683 * be used by the MPU. Returns the virtual address upon success or NULL
3684 * upon error.
3685 */
3686 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3687 {
3688 if (!oh)
3689 return NULL;
3690
3691 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3692 return NULL;
3693
3694 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3695 return NULL;
3696
3697 return oh->_mpu_rt_va;
3698 }
3699
3700 /*
3701 * XXX what about functions for drivers to save/restore ocp_sysconfig
3702 * for context save/restore operations?
3703 */
3704
3705 /**
3706 * omap_hwmod_enable_wakeup - allow device to wake up the system
3707 * @oh: struct omap_hwmod *
3708 *
3709 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
3710 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3711 * this IP block if it has dynamic mux entries. Eventually this
3712 * should set PRCM wakeup registers to cause the PRCM to receive
3713 * wakeup events from the module. Does not set any wakeup routing
3714 * registers beyond this point - if the module is to wake up any other
3715 * module or subsystem, that must be set separately. Called by
3716 * omap_device code. Returns -EINVAL on error or 0 upon success.
3717 */
3718 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3719 {
3720 unsigned long flags;
3721 u32 v;
3722
3723 spin_lock_irqsave(&oh->_lock, flags);
3724
3725 if (oh->class->sysc &&
3726 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3727 v = oh->_sysc_cache;
3728 _enable_wakeup(oh, &v);
3729 _write_sysconfig(v, oh);
3730 }
3731
3732 _set_idle_ioring_wakeup(oh, true);
3733 spin_unlock_irqrestore(&oh->_lock, flags);
3734
3735 return 0;
3736 }
3737
3738 /**
3739 * omap_hwmod_disable_wakeup - prevent device from waking the system
3740 * @oh: struct omap_hwmod *
3741 *
3742 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
3743 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3744 * events for this IP block if it has dynamic mux entries. Eventually
3745 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3746 * wakeup events from the module. Does not set any wakeup routing
3747 * registers beyond this point - if the module is to wake up any other
3748 * module or subsystem, that must be set separately. Called by
3749 * omap_device code. Returns -EINVAL on error or 0 upon success.
3750 */
3751 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3752 {
3753 unsigned long flags;
3754 u32 v;
3755
3756 spin_lock_irqsave(&oh->_lock, flags);
3757
3758 if (oh->class->sysc &&
3759 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3760 v = oh->_sysc_cache;
3761 _disable_wakeup(oh, &v);
3762 _write_sysconfig(v, oh);
3763 }
3764
3765 _set_idle_ioring_wakeup(oh, false);
3766 spin_unlock_irqrestore(&oh->_lock, flags);
3767
3768 return 0;
3769 }
3770
3771 /**
3772 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3773 * contained in the hwmod module.
3774 * @oh: struct omap_hwmod *
3775 * @name: name of the reset line to lookup and assert
3776 *
3777 * Some IP like dsp, ipu or iva contain processor that require
3778 * an HW reset line to be assert / deassert in order to enable fully
3779 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3780 * yet supported on this OMAP; otherwise, passes along the return value
3781 * from _assert_hardreset().
3782 */
3783 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3784 {
3785 int ret;
3786 unsigned long flags;
3787
3788 if (!oh)
3789 return -EINVAL;
3790
3791 spin_lock_irqsave(&oh->_lock, flags);
3792 ret = _assert_hardreset(oh, name);
3793 spin_unlock_irqrestore(&oh->_lock, flags);
3794
3795 return ret;
3796 }
3797
3798 /**
3799 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3800 * contained in the hwmod module.
3801 * @oh: struct omap_hwmod *
3802 * @name: name of the reset line to look up and deassert
3803 *
3804 * Some IP like dsp, ipu or iva contain processor that require
3805 * an HW reset line to be assert / deassert in order to enable fully
3806 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3807 * yet supported on this OMAP; otherwise, passes along the return value
3808 * from _deassert_hardreset().
3809 */
3810 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3811 {
3812 int ret;
3813 unsigned long flags;
3814
3815 if (!oh)
3816 return -EINVAL;
3817
3818 spin_lock_irqsave(&oh->_lock, flags);
3819 ret = _deassert_hardreset(oh, name);
3820 spin_unlock_irqrestore(&oh->_lock, flags);
3821
3822 return ret;
3823 }
3824
3825 /**
3826 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3827 * @classname: struct omap_hwmod_class name to search for
3828 * @fn: callback function pointer to call for each hwmod in class @classname
3829 * @user: arbitrary context data to pass to the callback function
3830 *
3831 * For each omap_hwmod of class @classname, call @fn.
3832 * If the callback function returns something other than
3833 * zero, the iterator is terminated, and the callback function's return
3834 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3835 * if @classname or @fn are NULL, or passes back the error code from @fn.
3836 */
3837 int omap_hwmod_for_each_by_class(const char *classname,
3838 int (*fn)(struct omap_hwmod *oh,
3839 void *user),
3840 void *user)
3841 {
3842 struct omap_hwmod *temp_oh;
3843 int ret = 0;
3844
3845 if (!classname || !fn)
3846 return -EINVAL;
3847
3848 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3849 __func__, classname);
3850
3851 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3852 if (!strcmp(temp_oh->class->name, classname)) {
3853 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3854 __func__, temp_oh->name);
3855 ret = (*fn)(temp_oh, user);
3856 if (ret)
3857 break;
3858 }
3859 }
3860
3861 if (ret)
3862 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3863 __func__, ret);
3864
3865 return ret;
3866 }
3867
3868 /**
3869 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3870 * @oh: struct omap_hwmod *
3871 * @state: state that _setup() should leave the hwmod in
3872 *
3873 * Sets the hwmod state that @oh will enter at the end of _setup()
3874 * (called by omap_hwmod_setup_*()). See also the documentation
3875 * for _setup_postsetup(), above. Returns 0 upon success or
3876 * -EINVAL if there is a problem with the arguments or if the hwmod is
3877 * in the wrong state.
3878 */
3879 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3880 {
3881 int ret;
3882 unsigned long flags;
3883
3884 if (!oh)
3885 return -EINVAL;
3886
3887 if (state != _HWMOD_STATE_DISABLED &&
3888 state != _HWMOD_STATE_ENABLED &&
3889 state != _HWMOD_STATE_IDLE)
3890 return -EINVAL;
3891
3892 spin_lock_irqsave(&oh->_lock, flags);
3893
3894 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3895 ret = -EINVAL;
3896 goto ohsps_unlock;
3897 }
3898
3899 oh->_postsetup_state = state;
3900 ret = 0;
3901
3902 ohsps_unlock:
3903 spin_unlock_irqrestore(&oh->_lock, flags);
3904
3905 return ret;
3906 }
3907
3908 /**
3909 * omap_hwmod_get_context_loss_count - get lost context count
3910 * @oh: struct omap_hwmod *
3911 *
3912 * Returns the context loss count of associated @oh
3913 * upon success, or zero if no context loss data is available.
3914 *
3915 * On OMAP4, this queries the per-hwmod context loss register,
3916 * assuming one exists. If not, or on OMAP2/3, this queries the
3917 * enclosing powerdomain context loss count.
3918 */
3919 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
3920 {
3921 struct powerdomain *pwrdm;
3922 int ret = 0;
3923
3924 if (soc_ops.get_context_lost)
3925 return soc_ops.get_context_lost(oh);
3926
3927 pwrdm = omap_hwmod_get_pwrdm(oh);
3928 if (pwrdm)
3929 ret = pwrdm_get_context_loss_count(pwrdm);
3930
3931 return ret;
3932 }
3933
3934 /**
3935 * omap_hwmod_init - initialize the hwmod code
3936 *
3937 * Sets up some function pointers needed by the hwmod code to operate on the
3938 * currently-booted SoC. Intended to be called once during kernel init
3939 * before any hwmods are registered. No return value.
3940 */
3941 void __init omap_hwmod_init(void)
3942 {
3943 if (cpu_is_omap24xx()) {
3944 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
3945 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3946 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3947 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
3948 } else if (cpu_is_omap34xx()) {
3949 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
3950 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3951 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3952 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
3953 soc_ops.init_clkdm = _init_clkdm;
3954 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
3955 soc_ops.enable_module = _omap4_enable_module;
3956 soc_ops.disable_module = _omap4_disable_module;
3957 soc_ops.wait_target_ready = _omap4_wait_target_ready;
3958 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3959 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
3960 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
3961 soc_ops.init_clkdm = _init_clkdm;
3962 soc_ops.update_context_lost = _omap4_update_context_lost;
3963 soc_ops.get_context_lost = _omap4_get_context_lost;
3964 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
3965 } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
3966 soc_is_am43xx()) {
3967 soc_ops.enable_module = _omap4_enable_module;
3968 soc_ops.disable_module = _omap4_disable_module;
3969 soc_ops.wait_target_ready = _omap4_wait_target_ready;
3970 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3971 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
3972 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
3973 soc_ops.init_clkdm = _init_clkdm;
3974 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
3975 } else {
3976 WARN(1, "omap_hwmod: unknown SoC type\n");
3977 }
3978
3979 inited = true;
3980 }
3981
3982 /**
3983 * omap_hwmod_get_main_clk - get pointer to main clock name
3984 * @oh: struct omap_hwmod *
3985 *
3986 * Returns the main clock name assocated with @oh upon success,
3987 * or NULL if @oh is NULL.
3988 */
3989 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
3990 {
3991 if (!oh)
3992 return NULL;
3993
3994 return oh->main_clk;
3995 }
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