arch/arm/mach-omap2/omap_hwmod.h

   1 /*
   2  * omap_hwmod macros, structures
   3  *
   4  * Copyright (C) 2009-2011 Nokia Corporation
   5  * Copyright (C) 2011-2012 Texas Instruments, Inc.
   6  * Paul Walmsley
   7  *
   8  * Created in collaboration with (alphabetical order): Benoît Cousson,
   9  * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari
  10  * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  *
  16  * These headers and macros are used to define OMAP on-chip module
  17  * data and their integration with other OMAP modules and Linux.
  18  * Copious documentation and references can also be found in the
  19  * omap_hwmod code, in arch/arm/mach-omap2/omap_hwmod.c (as of this
  20  * writing).
  21  *
  22  * To do:
  23  * - add interconnect error log structures
  24  * - add pinmuxing
  25  * - init_conn_id_bit (CONNID_BIT_VECTOR)
  26  * - implement default hwmod SMS/SDRC flags?
  27  * - move Linux-specific data ("non-ROM data") out
  28  *
  29  */
  30 #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
  31 #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
  32
  33 #include <linux/kernel.h>
  34 #include <linux/init.h>
  35 #include <linux/list.h>
  36 #include <linux/ioport.h>
  37 #include <linux/spinlock.h>
  38
  39 struct omap_device;
  40
  41 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1;
  42 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
  43 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3;
  44
  45 /*
  46  * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant
  47  * with the original PRCM protocol defined for OMAP2420
  48  */
  49 #define SYSC_TYPE1_MIDLEMODE_SHIFT      12
  50 #define SYSC_TYPE1_MIDLEMODE_MASK       (0x3 << SYSC_TYPE1_MIDLEMODE_SHIFT)
  51 #define SYSC_TYPE1_CLOCKACTIVITY_SHIFT  8
  52 #define SYSC_TYPE1_CLOCKACTIVITY_MASK   (0x3 << SYSC_TYPE1_CLOCKACTIVITY_SHIFT)
  53 #define SYSC_TYPE1_SIDLEMODE_SHIFT      3
  54 #define SYSC_TYPE1_SIDLEMODE_MASK       (0x3 << SYSC_TYPE1_SIDLEMODE_SHIFT)
  55 #define SYSC_TYPE1_ENAWAKEUP_SHIFT      2
  56 #define SYSC_TYPE1_ENAWAKEUP_MASK       (1 << SYSC_TYPE1_ENAWAKEUP_SHIFT)
  57 #define SYSC_TYPE1_SOFTRESET_SHIFT      1
  58 #define SYSC_TYPE1_SOFTRESET_MASK       (1 << SYSC_TYPE1_SOFTRESET_SHIFT)
  59 #define SYSC_TYPE1_AUTOIDLE_SHIFT       0
  60 #define SYSC_TYPE1_AUTOIDLE_MASK        (1 << SYSC_TYPE1_AUTOIDLE_SHIFT)
  61
  62 /*
  63  * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant
  64  * with the new PRCM protocol defined for new OMAP4 IPs.
  65  */
  66 #define SYSC_TYPE2_SOFTRESET_SHIFT      0
  67 #define SYSC_TYPE2_SOFTRESET_MASK       (1 << SYSC_TYPE2_SOFTRESET_SHIFT)
  68 #define SYSC_TYPE2_SIDLEMODE_SHIFT      2
  69 #define SYSC_TYPE2_SIDLEMODE_MASK       (0x3 << SYSC_TYPE2_SIDLEMODE_SHIFT)
  70 #define SYSC_TYPE2_MIDLEMODE_SHIFT      4
  71 #define SYSC_TYPE2_MIDLEMODE_MASK       (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT)
  72 #define SYSC_TYPE2_DMADISABLE_SHIFT     16
  73 #define SYSC_TYPE2_DMADISABLE_MASK      (0x1 << SYSC_TYPE2_DMADISABLE_SHIFT)
  74
  75 /*
  76  * OCP SYSCONFIG bit shifts/masks TYPE3.
  77  * This is applicable for some IPs present in AM33XX
  78  */
  79 #define SYSC_TYPE3_SIDLEMODE_SHIFT      0
  80 #define SYSC_TYPE3_SIDLEMODE_MASK       (0x3 << SYSC_TYPE3_SIDLEMODE_SHIFT)
  81 #define SYSC_TYPE3_MIDLEMODE_SHIFT      2
  82 #define SYSC_TYPE3_MIDLEMODE_MASK       (0x3 << SYSC_TYPE3_MIDLEMODE_SHIFT)
  83
  84 /* OCP SYSSTATUS bit shifts/masks */
  85 #define SYSS_RESETDONE_SHIFT            0
  86 #define SYSS_RESETDONE_MASK             (1 << SYSS_RESETDONE_SHIFT)
  87
  88 /* Master standby/slave idle mode flags */
  89 #define HWMOD_IDLEMODE_FORCE            (1 << 0)
  90 #define HWMOD_IDLEMODE_NO               (1 << 1)
  91 #define HWMOD_IDLEMODE_SMART            (1 << 2)
  92 #define HWMOD_IDLEMODE_SMART_WKUP       (1 << 3)
  93
  94 /* modulemode control type (SW or HW) */
  95 #define MODULEMODE_HWCTRL               1
  96 #define MODULEMODE_SWCTRL               2
  97
  98 #define DEBUG_OMAP2UART1_FLAGS  0
  99 #define DEBUG_OMAP2UART2_FLAGS  0
 100 #define DEBUG_OMAP2UART3_FLAGS  0
 101 #define DEBUG_OMAP3UART3_FLAGS  0
 102 #define DEBUG_OMAP3UART4_FLAGS  0
 103 #define DEBUG_OMAP4UART3_FLAGS  0
 104 #define DEBUG_OMAP4UART4_FLAGS  0
 105 #define DEBUG_TI81XXUART1_FLAGS 0
 106 #define DEBUG_TI81XXUART2_FLAGS 0
 107 #define DEBUG_TI81XXUART3_FLAGS 0
 108 #define DEBUG_AM33XXUART1_FLAGS 0
 109
 110 #define DEBUG_OMAPUART_FLAGS    (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET)
 111
 112 #ifdef CONFIG_OMAP_GPMC_DEBUG
 113 #define DEBUG_OMAP_GPMC_HWMOD_FLAGS     HWMOD_INIT_NO_RESET
 114 #else
 115 #define DEBUG_OMAP_GPMC_HWMOD_FLAGS     0
 116 #endif
 117
 118 #if defined(CONFIG_DEBUG_OMAP2UART1)
 119 #undef DEBUG_OMAP2UART1_FLAGS
 120 #define DEBUG_OMAP2UART1_FLAGS DEBUG_OMAPUART_FLAGS
 121 #elif defined(CONFIG_DEBUG_OMAP2UART2)
 122 #undef DEBUG_OMAP2UART2_FLAGS
 123 #define DEBUG_OMAP2UART2_FLAGS DEBUG_OMAPUART_FLAGS
 124 #elif defined(CONFIG_DEBUG_OMAP2UART3)
 125 #undef DEBUG_OMAP2UART3_FLAGS
 126 #define DEBUG_OMAP2UART3_FLAGS DEBUG_OMAPUART_FLAGS
 127 #elif defined(CONFIG_DEBUG_OMAP3UART3)
 128 #undef DEBUG_OMAP3UART3_FLAGS
 129 #define DEBUG_OMAP3UART3_FLAGS DEBUG_OMAPUART_FLAGS
 130 #elif defined(CONFIG_DEBUG_OMAP3UART4)
 131 #undef DEBUG_OMAP3UART4_FLAGS
 132 #define DEBUG_OMAP3UART4_FLAGS DEBUG_OMAPUART_FLAGS
 133 #elif defined(CONFIG_DEBUG_OMAP4UART3)
 134 #undef DEBUG_OMAP4UART3_FLAGS
 135 #define DEBUG_OMAP4UART3_FLAGS DEBUG_OMAPUART_FLAGS
 136 #elif defined(CONFIG_DEBUG_OMAP4UART4)
 137 #undef DEBUG_OMAP4UART4_FLAGS
 138 #define DEBUG_OMAP4UART4_FLAGS DEBUG_OMAPUART_FLAGS
 139 #elif defined(CONFIG_DEBUG_TI81XXUART1)
 140 #undef DEBUG_TI81XXUART1_FLAGS
 141 #define DEBUG_TI81XXUART1_FLAGS DEBUG_OMAPUART_FLAGS
 142 #elif defined(CONFIG_DEBUG_TI81XXUART2)
 143 #undef DEBUG_TI81XXUART2_FLAGS
 144 #define DEBUG_TI81XXUART2_FLAGS DEBUG_OMAPUART_FLAGS
 145 #elif defined(CONFIG_DEBUG_TI81XXUART3)
 146 #undef DEBUG_TI81XXUART3_FLAGS
 147 #define DEBUG_TI81XXUART3_FLAGS DEBUG_OMAPUART_FLAGS
 148 #elif defined(CONFIG_DEBUG_AM33XXUART1)
 149 #undef DEBUG_AM33XXUART1_FLAGS
 150 #define DEBUG_AM33XXUART1_FLAGS DEBUG_OMAPUART_FLAGS
 151 #endif
 152
 153 /**
 154  * struct omap_hwmod_mux_info - hwmod specific mux configuration
 155  * @pads:              array of omap_device_pad entries
 156  * @nr_pads:           number of omap_device_pad entries
 157  *
 158  * Note that this is currently built during init as needed.
 159  */
 160 struct omap_hwmod_mux_info {
 161         int                             nr_pads;
 162         struct omap_device_pad          *pads;
 163         int                             nr_pads_dynamic;
 164         struct omap_device_pad          **pads_dynamic;
 165         int                             *irqs;
 166         bool                            enabled;
 167 };
 168
 169 /**
 170  * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod
 171  * @name: name of the IRQ channel (module local name)
 172  * @irq: IRQ channel ID (should be non-negative except -1 = terminator)
 173  *
 174  * @name should be something short, e.g., "tx" or "rx".  It is for use
 175  * by platform_get_resource_byname().  It is defined locally to the
 176  * hwmod.
 177  */
 178 struct omap_hwmod_irq_info {
 179         const char      *name;
 180         s16             irq;
 181 };
 182
 183 /**
 184  * struct omap_hwmod_dma_info - DMA channels used by the hwmod
 185  * @name: name of the DMA channel (module local name)
 186  * @dma_req: DMA request ID (should be non-negative except -1 = terminator)
 187  *
 188  * @name should be something short, e.g., "tx" or "rx".  It is for use
 189  * by platform_get_resource_byname().  It is defined locally to the
 190  * hwmod.
 191  */
 192 struct omap_hwmod_dma_info {
 193         const char      *name;
 194         s16             dma_req;
 195 };
 196
 197 /**
 198  * struct omap_hwmod_rst_info - IPs reset lines use by hwmod
 199  * @name: name of the reset line (module local name)
 200  * @rst_shift: Offset of the reset bit
 201  * @st_shift: Offset of the reset status bit (OMAP2/3 only)
 202  *
 203  * @name should be something short, e.g., "cpu0" or "rst". It is defined
 204  * locally to the hwmod.
 205  */
 206 struct omap_hwmod_rst_info {
 207         const char      *name;
 208         u8              rst_shift;
 209         u8              st_shift;
 210 };
 211
 212 /**
 213  * struct omap_hwmod_opt_clk - optional clocks used by this hwmod
 214  * @role: "sys", "32k", "tv", etc -- for use in clk_get()
 215  * @clk: opt clock: OMAP clock name
 216  * @_clk: pointer to the struct clk (filled in at runtime)
 217  *
 218  * The module's interface clock and main functional clock should not
 219  * be added as optional clocks.
 220  */
 221 struct omap_hwmod_opt_clk {
 222         const char      *role;
 223         const char      *clk;
 224         struct clk      *_clk;
 225 };
 226
 227
 228 /* omap_hwmod_omap2_firewall.flags bits */
 229 #define OMAP_FIREWALL_L3                (1 << 0)
 230 #define OMAP_FIREWALL_L4                (1 << 1)
 231
 232 /**
 233  * struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data
 234  * @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_*
 235  * @l4_fw_region: L4 firewall region ID
 236  * @l4_prot_group: L4 protection group ID
 237  * @flags: (see omap_hwmod_omap2_firewall.flags macros above)
 238  */
 239 struct omap_hwmod_omap2_firewall {
 240         u8 l3_perm_bit;
 241         u8 l4_fw_region;
 242         u8 l4_prot_group;
 243         u8 flags;
 244 };
 245
 246
 247 /*
 248  * omap_hwmod_addr_space.flags bits
 249  *
 250  * ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init.
 251  * ADDR_TYPE_RT: Address space contains module register target data.
 252  */
 253 #define ADDR_MAP_ON_INIT        (1 << 0)        /* XXX does not belong */
 254 #define ADDR_TYPE_RT            (1 << 1)
 255
 256 /**
 257  * struct omap_hwmod_addr_space - address space handled by the hwmod
 258  * @name: name of the address space
 259  * @pa_start: starting physical address
 260  * @pa_end: ending physical address
 261  * @flags: (see omap_hwmod_addr_space.flags macros above)
 262  *
 263  * Address space doesn't necessarily follow physical interconnect
 264  * structure.  GPMC is one example.
 265  */
 266 struct omap_hwmod_addr_space {
 267         const char *name;
 268         u32 pa_start;
 269         u32 pa_end;
 270         u8 flags;
 271 };
 272
 273
 274 /*
 275  * omap_hwmod_ocp_if.user bits: these indicate the initiators that use this
 276  * interface to interact with the hwmod.  Used to add sleep dependencies
 277  * when the module is enabled or disabled.
 278  */
 279 #define OCP_USER_MPU                    (1 << 0)
 280 #define OCP_USER_SDMA                   (1 << 1)
 281 #define OCP_USER_DSP                    (1 << 2)
 282 #define OCP_USER_IVA                    (1 << 3)
 283
 284 /* omap_hwmod_ocp_if.flags bits */
 285 #define OCPIF_SWSUP_IDLE                (1 << 0)
 286 #define OCPIF_CAN_BURST                 (1 << 1)
 287
 288 /* omap_hwmod_ocp_if._int_flags possibilities */
 289 #define _OCPIF_INT_FLAGS_REGISTERED     (1 << 0)
 290
 291
 292 /**
 293  * struct omap_hwmod_ocp_if - OCP interface data
 294  * @master: struct omap_hwmod that initiates OCP transactions on this link
 295  * @slave: struct omap_hwmod that responds to OCP transactions on this link
 296  * @addr: address space associated with this link
 297  * @clk: interface clock: OMAP clock name
 298  * @_clk: pointer to the interface struct clk (filled in at runtime)
 299  * @fw: interface firewall data
 300  * @width: OCP data width
 301  * @user: initiators using this interface (see OCP_USER_* macros above)
 302  * @flags: OCP interface flags (see OCPIF_* macros above)
 303  * @_int_flags: internal flags (see _OCPIF_INT_FLAGS* macros above)
 304  *
 305  * It may also be useful to add a tag_cnt field for OCP2.x devices.
 306  *
 307  * Parameter names beginning with an underscore are managed internally by
 308  * the omap_hwmod code and should not be set during initialization.
 309  */
 310 struct omap_hwmod_ocp_if {
 311         struct omap_hwmod               *master;
 312         struct omap_hwmod               *slave;
 313         struct omap_hwmod_addr_space    *addr;
 314         const char                      *clk;
 315         struct clk                      *_clk;
 316         union {
 317                 struct omap_hwmod_omap2_firewall omap2;
 318         }                               fw;
 319         u8                              width;
 320         u8                              user;
 321         u8                              flags;
 322         u8                              _int_flags;
 323 };
 324
 325
 326 /* Macros for use in struct omap_hwmod_sysconfig */
 327
 328 /* Flags for use in omap_hwmod_sysconfig.idlemodes */
 329 #define MASTER_STANDBY_SHIFT    4
 330 #define SLAVE_IDLE_SHIFT        0
 331 #define SIDLE_FORCE             (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT)
 332 #define SIDLE_NO                (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT)
 333 #define SIDLE_SMART             (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT)
 334 #define SIDLE_SMART_WKUP        (HWMOD_IDLEMODE_SMART_WKUP << SLAVE_IDLE_SHIFT)
 335 #define MSTANDBY_FORCE          (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT)
 336 #define MSTANDBY_NO             (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT)
 337 #define MSTANDBY_SMART          (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT)
 338 #define MSTANDBY_SMART_WKUP     (HWMOD_IDLEMODE_SMART_WKUP << MASTER_STANDBY_SHIFT)
 339
 340 /* omap_hwmod_sysconfig.sysc_flags capability flags */
 341 #define SYSC_HAS_AUTOIDLE       (1 << 0)
 342 #define SYSC_HAS_SOFTRESET      (1 << 1)
 343 #define SYSC_HAS_ENAWAKEUP      (1 << 2)
 344 #define SYSC_HAS_EMUFREE        (1 << 3)
 345 #define SYSC_HAS_CLOCKACTIVITY  (1 << 4)
 346 #define SYSC_HAS_SIDLEMODE      (1 << 5)
 347 #define SYSC_HAS_MIDLEMODE      (1 << 6)
 348 #define SYSS_HAS_RESET_STATUS   (1 << 7)
 349 #define SYSC_NO_CACHE           (1 << 8)  /* XXX SW flag, belongs elsewhere */
 350 #define SYSC_HAS_RESET_STATUS   (1 << 9)
 351 #define SYSC_HAS_DMADISABLE     (1 << 10)
 352
 353 /* omap_hwmod_sysconfig.clockact flags */
 354 #define CLOCKACT_TEST_BOTH      0x0
 355 #define CLOCKACT_TEST_MAIN      0x1
 356 #define CLOCKACT_TEST_ICLK      0x2
 357 #define CLOCKACT_TEST_NONE      0x3
 358
 359 /**
 360  * struct omap_hwmod_sysc_fields - hwmod OCP_SYSCONFIG register field offsets.
 361  * @midle_shift: Offset of the midle bit
 362  * @clkact_shift: Offset of the clockactivity bit
 363  * @sidle_shift: Offset of the sidle bit
 364  * @enwkup_shift: Offset of the enawakeup bit
 365  * @srst_shift: Offset of the softreset bit
 366  * @autoidle_shift: Offset of the autoidle bit
 367  * @dmadisable_shift: Offset of the dmadisable bit
 368  */
 369 struct omap_hwmod_sysc_fields {
 370         u8 midle_shift;
 371         u8 clkact_shift;
 372         u8 sidle_shift;
 373         u8 enwkup_shift;
 374         u8 srst_shift;
 375         u8 autoidle_shift;
 376         u8 dmadisable_shift;
 377 };
 378
 379 /**
 380  * struct omap_hwmod_class_sysconfig - hwmod class OCP_SYS* data
 381  * @rev_offs: IP block revision register offset (from module base addr)
 382  * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
 383  * @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
 384  * @srst_udelay: Delay needed after doing a softreset in usecs
 385  * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
 386  * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
 387  * @clockact: the default value of the module CLOCKACTIVITY bits
 388  *
 389  * @clockact describes to the module which clocks are likely to be
 390  * disabled when the PRCM issues its idle request to the module.  Some
 391  * modules have separate clockdomains for the interface clock and main
 392  * functional clock, and can check whether they should acknowledge the
 393  * idle request based on the internal module functionality that has
 394  * been associated with the clocks marked in @clockact.  This field is
 395  * only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below)
 396  *
 397  * @sysc_fields: structure containing the offset positions of various bits in
 398  * SYSCONFIG register. This can be populated using omap_hwmod_sysc_type1 or
 399  * omap_hwmod_sysc_type2 defined in omap_hwmod_common_data.c depending on
 400  * whether the device ip is compliant with the original PRCM protocol
 401  * defined for OMAP2420 or the new PRCM protocol for new OMAP4 IPs.
 402  * If the device follows a different scheme for the sysconfig register ,
 403  * then this field has to be populated with the correct offset structure.
 404  */
 405 struct omap_hwmod_class_sysconfig {
 406         u32 rev_offs;
 407         u32 sysc_offs;
 408         u32 syss_offs;
 409         u16 sysc_flags;
 410         struct omap_hwmod_sysc_fields *sysc_fields;
 411         u8 srst_udelay;
 412         u8 idlemodes;
 413         u8 clockact;
 414 };
 415
 416 /**
 417  * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data
 418  * @module_offs: PRCM submodule offset from the start of the PRM/CM
 419  * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3)
 420  * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs
 421  * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3)
 422  * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit
 423  * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit
 424  *
 425  * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST,
 426  * WKEN, GRPSEL registers.  In an ideal world, no extra information
 427  * would be needed for IDLEST information, but alas, there are some
 428  * exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit
 429  * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST)
 430  */
 431 struct omap_hwmod_omap2_prcm {
 432         s16 module_offs;
 433         u8 prcm_reg_id;
 434         u8 module_bit;
 435         u8 idlest_reg_id;
 436         u8 idlest_idle_bit;
 437         u8 idlest_stdby_bit;
 438 };
 439
 440 /*
 441  * Possible values for struct omap_hwmod_omap4_prcm.flags
 442  *
 443  * HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT: Some IP blocks don't have a PRCM
 444  *     module-level context loss register associated with them; this
 445  *     flag bit should be set in those cases
 446  */
 447 #define HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT         (1 << 0)
 448
 449 /**
 450  * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
 451  * @clkctrl_offs: offset of the PRCM clock control register
 452  * @rstctrl_offs: offset of the XXX_RSTCTRL register located in the PRM
 453  * @context_offs: offset of the RM_*_CONTEXT register
 454  * @lostcontext_mask: bitmask for selecting bits from RM_*_CONTEXT register
 455  * @rstst_reg: (AM33XX only) address of the XXX_RSTST register in the PRM
 456  * @submodule_wkdep_bit: bit shift of the WKDEP range
 457  * @flags: PRCM register capabilities for this IP block
 458  * @modulemode: allowable modulemodes
 459  * @context_lost_counter: Count of module level context lost
 460  *
 461  * If @lostcontext_mask is not defined, context loss check code uses
 462  * whole register without masking. @lostcontext_mask should only be
 463  * defined in cases where @context_offs register is shared by two or
 464  * more hwmods.
 465  */
 466 struct omap_hwmod_omap4_prcm {
 467         u16             clkctrl_offs;
 468         u16             rstctrl_offs;
 469         u16             rstst_offs;
 470         u16             context_offs;
 471         u32             lostcontext_mask;
 472         u8              submodule_wkdep_bit;
 473         u8              modulemode;
 474         u8              flags;
 475         int             context_lost_counter;
 476 };
 477
 478
 479 /*
 480  * omap_hwmod.flags definitions
 481  *
 482  * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
 483  *     of idle, rather than relying on module smart-idle
 484  * HWMOD_SWSUP_MSTANDBY: omap_hwmod code should manually bring module in and
 485  *     out of standby, rather than relying on module smart-standby
 486  * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
 487  *     SDRAM controller, etc. XXX probably belongs outside the main hwmod file
 488  *     XXX Should be HWMOD_SETUP_NO_RESET
 489  * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM
 490  *     controller, etc. XXX probably belongs outside the main hwmod file
 491  *     XXX Should be HWMOD_SETUP_NO_IDLE
 492  * HWMOD_NO_OCP_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE)
 493  *     when module is enabled, rather than the default, which is to
 494  *     enable autoidle
 495  * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
 496  * HWMOD_NO_IDLEST: this module does not have idle status - this is the case
 497  *     only for few initiator modules on OMAP2 & 3.
 498  * HWMOD_CONTROL_OPT_CLKS_IN_RESET: Enable all optional clocks during reset.
 499  *     This is needed for devices like DSS that require optional clocks enabled
 500  *     in order to complete the reset. Optional clocks will be disabled
 501  *     again after the reset.
 502  * HWMOD_16BIT_REG: Module has 16bit registers
 503  * HWMOD_EXT_OPT_MAIN_CLK: The only main functional clock source for
 504  *     this IP block comes from an off-chip source and is not always
 505  *     enabled.  This prevents the hwmod code from being able to
 506  *     enable and reset the IP block early.  XXX Eventually it should
 507  *     be possible to query the clock framework for this information.
 508  * HWMOD_BLOCK_WFI: Some OMAP peripherals apparently don't work
 509  *     correctly if the MPU is allowed to go idle while the
 510  *     peripherals are active.  This is apparently true for the I2C on
 511  *     OMAP2420, and also the EMAC on AM3517/3505.  It's unlikely that
 512  *     this is really true -- we're probably not configuring something
 513  *     correctly, or this is being abused to deal with some PM latency
 514  *     issues -- but we're currently suffering from a shortage of
 515  *     folks who are able to track these issues down properly.
 516  * HWMOD_FORCE_MSTANDBY: Always keep MIDLEMODE bits cleared so that device
 517  *     is kept in force-standby mode. Failing to do so causes PM problems
 518  *     with musb on OMAP3630 at least. Note that musb has a dedicated register
 519  *     to control MSTANDBY signal when MIDLEMODE is set to force-standby.
 520  * HWMOD_SWSUP_SIDLE_ACT: omap_hwmod code should manually bring the module
 521  *     out of idle, but rely on smart-idle to the put it back in idle,
 522  *     so the wakeups are still functional (Only known case for now is UART)
 523  * HWMOD_RECONFIG_IO_CHAIN: omap_hwmod code needs to reconfigure wake-up
 524  *     events by calling _reconfigure_io_chain() when a device is enabled
 525  *     or idled.
 526  * HWMOD_OPT_CLKS_NEEDED: The optional clocks are needed for the module to
 527  *     operate and they need to be handled at the same time as the main_clk.
 528  */
 529 #define HWMOD_SWSUP_SIDLE                       (1 << 0)
 530 #define HWMOD_SWSUP_MSTANDBY                    (1 << 1)
 531 #define HWMOD_INIT_NO_RESET                     (1 << 2)
 532 #define HWMOD_INIT_NO_IDLE                      (1 << 3)
 533 #define HWMOD_NO_OCP_AUTOIDLE                   (1 << 4)
 534 #define HWMOD_SET_DEFAULT_CLOCKACT              (1 << 5)
 535 #define HWMOD_NO_IDLEST                         (1 << 6)
 536 #define HWMOD_CONTROL_OPT_CLKS_IN_RESET         (1 << 7)
 537 #define HWMOD_16BIT_REG                         (1 << 8)
 538 #define HWMOD_EXT_OPT_MAIN_CLK                  (1 << 9)
 539 #define HWMOD_BLOCK_WFI                         (1 << 10)
 540 #define HWMOD_FORCE_MSTANDBY                    (1 << 11)
 541 #define HWMOD_SWSUP_SIDLE_ACT                   (1 << 12)
 542 #define HWMOD_RECONFIG_IO_CHAIN                 (1 << 13)
 543 #define HWMOD_OPT_CLKS_NEEDED                   (1 << 14)
 544
 545 /*
 546  * omap_hwmod._int_flags definitions
 547  * These are for internal use only and are managed by the omap_hwmod code.
 548  *
 549  * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
 550  * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
 551  * _HWMOD_SKIP_ENABLE: set if hwmod enabled during init (HWMOD_INIT_NO_IDLE) -
 552  *     causes the first call to _enable() to only update the pinmux
 553  */
 554 #define _HWMOD_NO_MPU_PORT                      (1 << 0)
 555 #define _HWMOD_SYSCONFIG_LOADED                 (1 << 1)
 556 #define _HWMOD_SKIP_ENABLE                      (1 << 2)
 557
 558 /*
 559  * omap_hwmod._state definitions
 560  *
 561  * INITIALIZED: reset (optionally), initialized, enabled, disabled
 562  *              (optionally)
 563  *
 564  *
 565  */
 566 #define _HWMOD_STATE_UNKNOWN                    0
 567 #define _HWMOD_STATE_REGISTERED                 1
 568 #define _HWMOD_STATE_CLKS_INITED                2
 569 #define _HWMOD_STATE_INITIALIZED                3
 570 #define _HWMOD_STATE_ENABLED                    4
 571 #define _HWMOD_STATE_IDLE                       5
 572 #define _HWMOD_STATE_DISABLED                   6
 573
 574 /**
 575  * struct omap_hwmod_class - the type of an IP block
 576  * @name: name of the hwmod_class
 577  * @sysc: device SYSCONFIG/SYSSTATUS register data
 578  * @rev: revision of the IP class
 579  * @pre_shutdown: ptr to fn to be executed immediately prior to device shutdown
 580  * @reset: ptr to fn to be executed in place of the standard hwmod reset fn
 581  * @enable_preprogram:  ptr to fn to be executed during device enable
 582  * @lock: ptr to fn to be executed to lock IP registers
 583  * @unlock: ptr to fn to be executed to unlock IP registers
 584  *
 585  * Represent the class of a OMAP hardware "modules" (e.g. timer,
 586  * smartreflex, gpio, uart...)
 587  *
 588  * @pre_shutdown is a function that will be run immediately before
 589  * hwmod clocks are disabled, etc.  It is intended for use for hwmods
 590  * like the MPU watchdog, which cannot be disabled with the standard
 591  * omap_hwmod_shutdown().  The function should return 0 upon success,
 592  * or some negative error upon failure.  Returning an error will cause
 593  * omap_hwmod_shutdown() to abort the device shutdown and return an
 594  * error.
 595  *
 596  * If @reset is defined, then the function it points to will be
 597  * executed in place of the standard hwmod _reset() code in
 598  * mach-omap2/omap_hwmod.c.  This is needed for IP blocks which have
 599  * unusual reset sequences - usually processor IP blocks like the IVA.
 600  */
 601 struct omap_hwmod_class {
 602         const char                              *name;
 603         struct omap_hwmod_class_sysconfig       *sysc;
 604         u32                                     rev;
 605         int                                     (*pre_shutdown)(struct omap_hwmod *oh);
 606         int                                     (*reset)(struct omap_hwmod *oh);
 607         int                                     (*enable_preprogram)(struct omap_hwmod *oh);
 608         void                                    (*lock)(struct omap_hwmod *oh);
 609         void                                    (*unlock)(struct omap_hwmod *oh);
 610 };
 611
 612 /**
 613  * struct omap_hwmod_link - internal structure linking hwmods with ocp_ifs
 614  * @ocp_if: OCP interface structure record pointer
 615  * @node: list_head pointing to next struct omap_hwmod_link in a list
 616  */
 617 struct omap_hwmod_link {
 618         struct omap_hwmod_ocp_if        *ocp_if;
 619         struct list_head                node;
 620 };
 621
 622 /**
 623  * struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks)
 624  * @name: name of the hwmod
 625  * @class: struct omap_hwmod_class * to the class of this hwmod
 626  * @od: struct omap_device currently associated with this hwmod (internal use)
 627  * @mpu_irqs: ptr to an array of MPU IRQs
 628  * @sdma_reqs: ptr to an array of System DMA request IDs
 629  * @prcm: PRCM data pertaining to this hwmod
 630  * @main_clk: main clock: OMAP clock name
 631  * @_clk: pointer to the main struct clk (filled in at runtime)
 632  * @opt_clks: other device clocks that drivers can request (0..*)
 633  * @voltdm: pointer to voltage domain (filled in at runtime)
 634  * @dev_attr: arbitrary device attributes that can be passed to the driver
 635  * @_sysc_cache: internal-use hwmod flags
 636  * @mpu_rt_idx: index of device address space for register target (for DT boot)
 637  * @_mpu_rt_va: cached register target start address (internal use)
 638  * @_mpu_port: cached MPU register target slave (internal use)
 639  * @opt_clks_cnt: number of @opt_clks
 640  * @master_cnt: number of @master entries
 641  * @slaves_cnt: number of @slave entries
 642  * @response_lat: device OCP response latency (in interface clock cycles)
 643  * @_int_flags: internal-use hwmod flags
 644  * @_state: internal-use hwmod state
 645  * @_postsetup_state: internal-use state to leave the hwmod in after _setup()
 646  * @flags: hwmod flags (documented below)
 647  * @_lock: spinlock serializing operations on this hwmod
 648  * @node: list node for hwmod list (internal use)
 649  * @parent_hwmod: (temporary) a pointer to the hierarchical parent of this hwmod
 650  *
 651  * @main_clk refers to this module's "main clock," which for our
 652  * purposes is defined as "the functional clock needed for register
 653  * accesses to complete."  Modules may not have a main clock if the
 654  * interface clock also serves as a main clock.
 655  *
 656  * Parameter names beginning with an underscore are managed internally by
 657  * the omap_hwmod code and should not be set during initialization.
 658  *
 659  * @masters and @slaves are now deprecated.
 660  *
 661  * @parent_hwmod is temporary; there should be no need for it, as this
 662  * information should already be expressed in the OCP interface
 663  * structures.  @parent_hwmod is present as a workaround until we improve
 664  * handling for hwmods with multiple parents (e.g., OMAP4+ DSS with
 665  * multiple register targets across different interconnects).
 666  */
 667 struct omap_hwmod {
 668         const char                      *name;
 669         struct omap_hwmod_class         *class;
 670         struct omap_device              *od;
 671         struct omap_hwmod_mux_info      *mux;
 672         struct omap_hwmod_irq_info      *mpu_irqs;
 673         struct omap_hwmod_dma_info      *sdma_reqs;
 674         struct omap_hwmod_rst_info      *rst_lines;
 675         union {
 676                 struct omap_hwmod_omap2_prcm omap2;
 677                 struct omap_hwmod_omap4_prcm omap4;
 678         }                               prcm;
 679         const char                      *main_clk;
 680         struct clk                      *_clk;
 681         struct omap_hwmod_opt_clk       *opt_clks;
 682         char                            *clkdm_name;
 683         struct clockdomain              *clkdm;
 684         struct list_head                master_ports; /* connect to *_IA */
 685         struct list_head                slave_ports; /* connect to *_TA */
 686         void                            *dev_attr;
 687         u32                             _sysc_cache;
 688         void __iomem                    *_mpu_rt_va;
 689         spinlock_t                      _lock;
 690         struct lock_class_key           hwmod_key; /* unique lock class */
 691         struct list_head                node;
 692         struct omap_hwmod_ocp_if        *_mpu_port;
 693         unsigned int                    (*xlate_irq)(unsigned int);
 694         u16                             flags;
 695         u8                              mpu_rt_idx;
 696         u8                              response_lat;
 697         u8                              rst_lines_cnt;
 698         u8                              opt_clks_cnt;
 699         u8                              masters_cnt;
 700         u8                              slaves_cnt;
 701         u8                              hwmods_cnt;
 702         u8                              _int_flags;
 703         u8                              _state;
 704         u8                              _postsetup_state;
 705         struct omap_hwmod               *parent_hwmod;
 706 };
 707
 708 struct omap_hwmod *omap_hwmod_lookup(const char *name);
 709 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
 710                         void *data);
 711
 712 int __init omap_hwmod_setup_one(const char *name);
 713
 714 int omap_hwmod_enable(struct omap_hwmod *oh);
 715 int omap_hwmod_idle(struct omap_hwmod *oh);
 716 int omap_hwmod_shutdown(struct omap_hwmod *oh);
 717
 718 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name);
 719 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name);
 720
 721 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs);
 722 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs);
 723 int omap_hwmod_softreset(struct omap_hwmod *oh);
 724
 725 int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags);
 726 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
 727 int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res);
 728 int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
 729                                    const char *name, struct resource *res);
 730
 731 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh);
 732 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh);
 733
 734 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh);
 735 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh);
 736
 737 int omap_hwmod_for_each_by_class(const char *classname,
 738                                  int (*fn)(struct omap_hwmod *oh,
 739                                            void *user),
 740                                  void *user);
 741
 742 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state);
 743 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh);
 744
 745 extern void __init omap_hwmod_init(void);
 746
 747 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh);
 748
 749 /*
 750  *
 751  */
 752
 753 extern int omap_hwmod_aess_preprogram(struct omap_hwmod *oh);
 754
 755 /*
 756  * Chip variant-specific hwmod init routines - XXX should be converted
 757  * to use initcalls once the initial boot ordering is straightened out
 758  */
 759 extern int omap2420_hwmod_init(void);
 760 extern int omap2430_hwmod_init(void);
 761 extern int omap3xxx_hwmod_init(void);
 762 extern int omap44xx_hwmod_init(void);
 763 extern int omap54xx_hwmod_init(void);
 764 extern int am33xx_hwmod_init(void);
 765 extern int dm814x_hwmod_init(void);
 766 extern int dm816x_hwmod_init(void);
 767 extern int dra7xx_hwmod_init(void);
 768 int am43xx_hwmod_init(void);
 769
 770 extern int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois);
 771
 772 #endif