Merge tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
[deliverable/linux.git] / arch / arm / mach-realview / core.c
1 /*
2 * linux/arch/arm/mach-realview/core.c
3 *
4 * Copyright (C) 1999 - 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21 #include <linux/init.h>
22 #include <linux/platform_device.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/device.h>
25 #include <linux/interrupt.h>
26 #include <linux/amba/bus.h>
27 #include <linux/amba/clcd.h>
28 #include <linux/platform_data/video-clcd-versatile.h>
29 #include <linux/io.h>
30 #include <linux/smsc911x.h>
31 #include <linux/smc91x.h>
32 #include <linux/ata_platform.h>
33 #include <linux/amba/mmci.h>
34 #include <linux/gfp.h>
35 #include <linux/mtd/physmap.h>
36 #include <linux/memblock.h>
37
38 #include <clocksource/timer-sp804.h>
39 #include "hardware.h"
40 #include <asm/irq.h>
41 #include <asm/mach-types.h>
42 #include <asm/hardware/icst.h>
43
44 #include <asm/mach/arch.h>
45 #include <asm/mach/irq.h>
46 #include <asm/mach/map.h>
47
48 #include "platform.h"
49
50 #include <plat/sched_clock.h>
51
52 #include "core.h"
53
54 #define REALVIEW_FLASHCTRL (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET)
55
56 static void realview_flash_set_vpp(struct platform_device *pdev, int on)
57 {
58 u32 val;
59
60 val = __raw_readl(REALVIEW_FLASHCTRL);
61 if (on)
62 val |= REALVIEW_FLASHPROG_FLVPPEN;
63 else
64 val &= ~REALVIEW_FLASHPROG_FLVPPEN;
65 __raw_writel(val, REALVIEW_FLASHCTRL);
66 }
67
68 static struct physmap_flash_data realview_flash_data = {
69 .width = 4,
70 .set_vpp = realview_flash_set_vpp,
71 };
72
73 struct platform_device realview_flash_device = {
74 .name = "physmap-flash",
75 .id = 0,
76 .dev = {
77 .platform_data = &realview_flash_data,
78 },
79 };
80
81 int realview_flash_register(struct resource *res, u32 num)
82 {
83 realview_flash_device.resource = res;
84 realview_flash_device.num_resources = num;
85 return platform_device_register(&realview_flash_device);
86 }
87
88 static struct smsc911x_platform_config smsc911x_config = {
89 .flags = SMSC911X_USE_32BIT,
90 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
91 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
92 .phy_interface = PHY_INTERFACE_MODE_MII,
93 };
94
95 static struct smc91x_platdata smc91x_platdata = {
96 .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
97 SMC91X_NOWAIT,
98 };
99
100 static struct platform_device realview_eth_device = {
101 .name = "smsc911x",
102 .id = 0,
103 .num_resources = 2,
104 };
105
106 int realview_eth_register(const char *name, struct resource *res)
107 {
108 if (name)
109 realview_eth_device.name = name;
110 realview_eth_device.resource = res;
111 if (strcmp(realview_eth_device.name, "smsc911x") == 0)
112 realview_eth_device.dev.platform_data = &smsc911x_config;
113 else
114 realview_eth_device.dev.platform_data = &smc91x_platdata;
115
116 return platform_device_register(&realview_eth_device);
117 }
118
119 struct platform_device realview_usb_device = {
120 .name = "isp1760",
121 .num_resources = 2,
122 };
123
124 int realview_usb_register(struct resource *res)
125 {
126 realview_usb_device.resource = res;
127 return platform_device_register(&realview_usb_device);
128 }
129
130 static struct pata_platform_info pata_platform_data = {
131 .ioport_shift = 1,
132 };
133
134 static struct resource pata_resources[] = {
135 [0] = {
136 .start = REALVIEW_CF_BASE,
137 .end = REALVIEW_CF_BASE + 0xff,
138 .flags = IORESOURCE_MEM,
139 },
140 [1] = {
141 .start = REALVIEW_CF_BASE + 0x100,
142 .end = REALVIEW_CF_BASE + SZ_4K - 1,
143 .flags = IORESOURCE_MEM,
144 },
145 };
146
147 struct platform_device realview_cf_device = {
148 .name = "pata_platform",
149 .id = -1,
150 .num_resources = ARRAY_SIZE(pata_resources),
151 .resource = pata_resources,
152 .dev = {
153 .platform_data = &pata_platform_data,
154 },
155 };
156
157 static struct resource realview_leds_resources[] = {
158 {
159 .start = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET,
160 .end = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET + 4,
161 .flags = IORESOURCE_MEM,
162 },
163 };
164
165 struct platform_device realview_leds_device = {
166 .name = "versatile-leds",
167 .id = -1,
168 .num_resources = ARRAY_SIZE(realview_leds_resources),
169 .resource = realview_leds_resources,
170 };
171
172 static struct resource realview_i2c_resource = {
173 .start = REALVIEW_I2C_BASE,
174 .end = REALVIEW_I2C_BASE + SZ_4K - 1,
175 .flags = IORESOURCE_MEM,
176 };
177
178 struct platform_device realview_i2c_device = {
179 .name = "versatile-i2c",
180 .id = 0,
181 .num_resources = 1,
182 .resource = &realview_i2c_resource,
183 };
184
185 static struct i2c_board_info realview_i2c_board_info[] = {
186 {
187 I2C_BOARD_INFO("ds1338", 0xd0 >> 1),
188 },
189 };
190
191 static int __init realview_i2c_init(void)
192 {
193 return i2c_register_board_info(0, realview_i2c_board_info,
194 ARRAY_SIZE(realview_i2c_board_info));
195 }
196 arch_initcall(realview_i2c_init);
197
198 #define REALVIEW_SYSMCI (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET)
199
200 /*
201 * This is only used if GPIOLIB support is disabled
202 */
203 static unsigned int realview_mmc_status(struct device *dev)
204 {
205 struct amba_device *adev = container_of(dev, struct amba_device, dev);
206 u32 mask;
207
208 if (machine_is_realview_pb1176()) {
209 static bool inserted = false;
210
211 /*
212 * The PB1176 does not have the status register,
213 * assume it is inserted at startup, then invert
214 * for each call so card insertion/removal will
215 * be detected anyway. This will not be called if
216 * GPIO on PL061 is active, which is the proper
217 * way to do this on the PB1176.
218 */
219 inserted = !inserted;
220 return inserted ? 0 : 1;
221 }
222
223 if (adev->res.start == REALVIEW_MMCI0_BASE)
224 mask = 1;
225 else
226 mask = 2;
227
228 return readl(REALVIEW_SYSMCI) & mask;
229 }
230
231 struct mmci_platform_data realview_mmc0_plat_data = {
232 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
233 .status = realview_mmc_status,
234 .gpio_wp = 17,
235 .gpio_cd = 16,
236 .cd_invert = true,
237 };
238
239 struct mmci_platform_data realview_mmc1_plat_data = {
240 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
241 .status = realview_mmc_status,
242 .gpio_wp = 19,
243 .gpio_cd = 18,
244 .cd_invert = true,
245 };
246
247 void __init realview_init_early(void)
248 {
249 void __iomem *sys = __io_address(REALVIEW_SYS_BASE);
250
251 versatile_sched_clock_init(sys + REALVIEW_SYS_24MHz_OFFSET, 24000000);
252 }
253
254 /*
255 * CLCD support.
256 */
257 #define SYS_CLCD_NLCDIOON (1 << 2)
258 #define SYS_CLCD_VDDPOSSWITCH (1 << 3)
259 #define SYS_CLCD_PWR3V5SWITCH (1 << 4)
260 #define SYS_CLCD_ID_MASK (0x1f << 8)
261 #define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8)
262 #define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8)
263 #define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8)
264 #define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
265 #define SYS_CLCD_ID_VGA (0x1f << 8)
266
267 /*
268 * Disable all display connectors on the interface module.
269 */
270 static void realview_clcd_disable(struct clcd_fb *fb)
271 {
272 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
273 u32 val;
274
275 val = readl(sys_clcd);
276 val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
277 writel(val, sys_clcd);
278 }
279
280 /*
281 * Enable the relevant connector on the interface module.
282 */
283 static void realview_clcd_enable(struct clcd_fb *fb)
284 {
285 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
286 u32 val;
287
288 /*
289 * Enable the PSUs
290 */
291 val = readl(sys_clcd);
292 val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
293 writel(val, sys_clcd);
294 }
295
296 /*
297 * Detect which LCD panel is connected, and return the appropriate
298 * clcd_panel structure. Note: we do not have any information on
299 * the required timings for the 8.4in panel, so we presently assume
300 * VGA timings.
301 */
302 static int realview_clcd_setup(struct clcd_fb *fb)
303 {
304 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
305 const char *panel_name, *vga_panel_name;
306 unsigned long framesize;
307 u32 val;
308
309 if (machine_is_realview_eb()) {
310 /* VGA, 16bpp */
311 framesize = 640 * 480 * 2;
312 vga_panel_name = "VGA";
313 } else {
314 /* XVGA, 16bpp */
315 framesize = 1024 * 768 * 2;
316 vga_panel_name = "XVGA";
317 }
318
319 val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
320 if (val == SYS_CLCD_ID_SANYO_3_8)
321 panel_name = "Sanyo TM38QV67A02A";
322 else if (val == SYS_CLCD_ID_SANYO_2_5)
323 panel_name = "Sanyo QVGA Portrait";
324 else if (val == SYS_CLCD_ID_EPSON_2_2)
325 panel_name = "Epson L2F50113T00";
326 else if (val == SYS_CLCD_ID_VGA)
327 panel_name = vga_panel_name;
328 else {
329 pr_err("CLCD: unknown LCD panel ID 0x%08x, using VGA\n", val);
330 panel_name = vga_panel_name;
331 }
332
333 fb->panel = versatile_clcd_get_panel(panel_name);
334 if (!fb->panel)
335 return -EINVAL;
336
337 return versatile_clcd_setup_dma(fb, framesize);
338 }
339
340 struct clcd_board clcd_plat_data = {
341 .name = "RealView",
342 .caps = CLCD_CAP_ALL,
343 .check = clcdfb_check,
344 .decode = clcdfb_decode,
345 .disable = realview_clcd_disable,
346 .enable = realview_clcd_enable,
347 .setup = realview_clcd_setup,
348 .mmap = versatile_clcd_mmap_dma,
349 .remove = versatile_clcd_remove_dma,
350 };
351
352 /*
353 * Where is the timer (VA)?
354 */
355 void __iomem *timer0_va_base;
356 void __iomem *timer1_va_base;
357 void __iomem *timer2_va_base;
358 void __iomem *timer3_va_base;
359
360 /*
361 * Set up the clock source and clock events devices
362 */
363 void __init realview_timer_init(unsigned int timer_irq)
364 {
365 u32 val;
366
367 /*
368 * set clock frequency:
369 * REALVIEW_REFCLK is 32KHz
370 * REALVIEW_TIMCLK is 1MHz
371 */
372 val = readl(__io_address(REALVIEW_SCTL_BASE));
373 writel((REALVIEW_TIMCLK << REALVIEW_TIMER1_EnSel) |
374 (REALVIEW_TIMCLK << REALVIEW_TIMER2_EnSel) |
375 (REALVIEW_TIMCLK << REALVIEW_TIMER3_EnSel) |
376 (REALVIEW_TIMCLK << REALVIEW_TIMER4_EnSel) | val,
377 __io_address(REALVIEW_SCTL_BASE));
378
379 /*
380 * Initialise to a known state (all timers off)
381 */
382 sp804_timer_disable(timer0_va_base);
383 sp804_timer_disable(timer1_va_base);
384 sp804_timer_disable(timer2_va_base);
385 sp804_timer_disable(timer3_va_base);
386
387 sp804_clocksource_init(timer3_va_base, "timer3");
388 sp804_clockevents_init(timer0_va_base, timer_irq, "timer0");
389 }
390
391 /*
392 * Setup the memory banks.
393 */
394 void realview_fixup(struct tag *tags, char **from)
395 {
396 /*
397 * Most RealView platforms have 512MB contiguous RAM at 0x70000000.
398 * Half of this is mirrored at 0.
399 */
400 #ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
401 memblock_add(0x70000000, SZ_512M);
402 #else
403 memblock_add(0, SZ_256M);
404 #endif
405 }
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