lightnvm: NVM should depend on HAS_DMA
[deliverable/linux.git] / arch / arm / mach-realview / platform.h
1 /*
2 * Copyright (c) ARM Limited 2003. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19 #ifndef __ASM_ARCH_PLATFORM_H
20 #define __ASM_ARCH_PLATFORM_H
21
22 /*
23 * Memory definitions
24 */
25 #define REALVIEW_BOOT_ROM_LO 0x30000000 /* DoC Base (64Mb)...*/
26 #define REALVIEW_BOOT_ROM_HI 0x30000000
27 #define REALVIEW_BOOT_ROM_BASE REALVIEW_BOOT_ROM_HI /* Normal position */
28 #define REALVIEW_BOOT_ROM_SIZE SZ_64M
29
30 #define REALVIEW_SSRAM_BASE /* REALVIEW_SSMC_BASE ? */
31 #define REALVIEW_SSRAM_SIZE SZ_2M
32
33 /*
34 * SDRAM
35 */
36 #define REALVIEW_SDRAM_BASE 0x00000000
37
38 /*
39 * Logic expansion modules
40 *
41 */
42
43
44 /* ------------------------------------------------------------------------
45 * RealView Registers
46 * ------------------------------------------------------------------------
47 *
48 */
49 #define REALVIEW_SYS_ID_OFFSET 0x00
50 #define REALVIEW_SYS_SW_OFFSET 0x04
51 #define REALVIEW_SYS_LED_OFFSET 0x08
52 #define REALVIEW_SYS_OSC0_OFFSET 0x0C
53
54 #define REALVIEW_SYS_OSC1_OFFSET 0x10
55 #define REALVIEW_SYS_OSC2_OFFSET 0x14
56 #define REALVIEW_SYS_OSC3_OFFSET 0x18
57 #define REALVIEW_SYS_OSC4_OFFSET 0x1C /* OSC1 for RealView/AB */
58
59 #define REALVIEW_SYS_LOCK_OFFSET 0x20
60 #define REALVIEW_SYS_100HZ_OFFSET 0x24
61 #define REALVIEW_SYS_CFGDATA1_OFFSET 0x28
62 #define REALVIEW_SYS_CFGDATA2_OFFSET 0x2C
63 #define REALVIEW_SYS_FLAGS_OFFSET 0x30
64 #define REALVIEW_SYS_FLAGSSET_OFFSET 0x30
65 #define REALVIEW_SYS_FLAGSCLR_OFFSET 0x34
66 #define REALVIEW_SYS_NVFLAGS_OFFSET 0x38
67 #define REALVIEW_SYS_NVFLAGSSET_OFFSET 0x38
68 #define REALVIEW_SYS_NVFLAGSCLR_OFFSET 0x3C
69 #define REALVIEW_SYS_RESETCTL_OFFSET 0x40
70 #define REALVIEW_SYS_PCICTL_OFFSET 0x44
71 #define REALVIEW_SYS_MCI_OFFSET 0x48
72 #define REALVIEW_SYS_FLASH_OFFSET 0x4C
73 #define REALVIEW_SYS_CLCD_OFFSET 0x50
74 #define REALVIEW_SYS_CLCDSER_OFFSET 0x54
75 #define REALVIEW_SYS_BOOTCS_OFFSET 0x58
76 #define REALVIEW_SYS_24MHz_OFFSET 0x5C
77 #define REALVIEW_SYS_MISC_OFFSET 0x60
78 #define REALVIEW_SYS_IOSEL_OFFSET 0x70
79 #define REALVIEW_SYS_PROCID_OFFSET 0x84
80 #define REALVIEW_SYS_TEST_OSC0_OFFSET 0xC0
81 #define REALVIEW_SYS_TEST_OSC1_OFFSET 0xC4
82 #define REALVIEW_SYS_TEST_OSC2_OFFSET 0xC8
83 #define REALVIEW_SYS_TEST_OSC3_OFFSET 0xCC
84 #define REALVIEW_SYS_TEST_OSC4_OFFSET 0xD0
85
86 #define REALVIEW_SYS_BASE 0x10000000
87 #define REALVIEW_SYS_ID (REALVIEW_SYS_BASE + REALVIEW_SYS_ID_OFFSET)
88 #define REALVIEW_SYS_SW (REALVIEW_SYS_BASE + REALVIEW_SYS_SW_OFFSET)
89 #define REALVIEW_SYS_LED (REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET)
90 #define REALVIEW_SYS_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC0_OFFSET)
91 #define REALVIEW_SYS_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC1_OFFSET)
92
93 #define REALVIEW_SYS_LOCK (REALVIEW_SYS_BASE + REALVIEW_SYS_LOCK_OFFSET)
94 #define REALVIEW_SYS_100HZ (REALVIEW_SYS_BASE + REALVIEW_SYS_100HZ_OFFSET)
95 #define REALVIEW_SYS_CFGDATA1 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA1_OFFSET)
96 #define REALVIEW_SYS_CFGDATA2 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA2_OFFSET)
97 #define REALVIEW_SYS_FLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGS_OFFSET)
98 #define REALVIEW_SYS_FLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSSET_OFFSET)
99 #define REALVIEW_SYS_FLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSCLR_OFFSET)
100 #define REALVIEW_SYS_NVFLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGS_OFFSET)
101 #define REALVIEW_SYS_NVFLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSSET_OFFSET)
102 #define REALVIEW_SYS_NVFLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSCLR_OFFSET)
103 #define REALVIEW_SYS_RESETCTL (REALVIEW_SYS_BASE + REALVIEW_SYS_RESETCTL_OFFSET)
104 #define REALVIEW_SYS_PCICTL (REALVIEW_SYS_BASE + REALVIEW_SYS_PCICTL_OFFSET)
105 #define REALVIEW_SYS_MCI (REALVIEW_SYS_BASE + REALVIEW_SYS_MCI_OFFSET)
106 #define REALVIEW_SYS_FLASH (REALVIEW_SYS_BASE + REALVIEW_SYS_FLASH_OFFSET)
107 #define REALVIEW_SYS_CLCD (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCD_OFFSET)
108 #define REALVIEW_SYS_CLCDSER (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCDSER_OFFSET)
109 #define REALVIEW_SYS_BOOTCS (REALVIEW_SYS_BASE + REALVIEW_SYS_BOOTCS_OFFSET)
110 #define REALVIEW_SYS_24MHz (REALVIEW_SYS_BASE + REALVIEW_SYS_24MHz_OFFSET)
111 #define REALVIEW_SYS_MISC (REALVIEW_SYS_BASE + REALVIEW_SYS_MISC_OFFSET)
112 #define REALVIEW_SYS_IOSEL (REALVIEW_SYS_BASE + REALVIEW_SYS_IOSEL_OFFSET)
113 #define REALVIEW_SYS_PROCID (REALVIEW_SYS_BASE + REALVIEW_SYS_PROCID_OFFSET)
114 #define REALVIEW_SYS_TEST_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC0_OFFSET)
115 #define REALVIEW_SYS_TEST_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC1_OFFSET)
116 #define REALVIEW_SYS_TEST_OSC2 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC2_OFFSET)
117 #define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET)
118 #define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET)
119
120 /* ------------------------------------------------------------------------
121 * RealView control registers
122 * ------------------------------------------------------------------------
123 */
124
125 /*
126 * REALVIEW_IDFIELD
127 *
128 * 31:24 = manufacturer (0x41 = ARM)
129 * 23:16 = architecture (0x08 = AHB system bus, ASB processor bus)
130 * 15:12 = FPGA (0x3 = XVC600 or XVC600E)
131 * 11:4 = build value
132 * 3:0 = revision number (0x1 = rev B (AHB))
133 */
134
135 /*
136 * REALVIEW_SYS_LOCK
137 * control access to SYS_OSCx, SYS_CFGDATAx, SYS_RESETCTL,
138 * SYS_CLD, SYS_BOOTCS
139 */
140 #define REALVIEW_SYS_LOCK_LOCKED (1 << 16)
141 #define REALVIEW_SYS_LOCK_VAL 0xA05F /* Enable write access */
142
143 /*
144 * REALVIEW_SYS_FLASH
145 */
146 #define REALVIEW_FLASHPROG_FLVPPEN (1 << 0) /* Enable writing to flash */
147
148 /*
149 * REALVIEW_INTREG
150 * - used to acknowledge and control MMCI and UART interrupts
151 */
152 #define REALVIEW_INTREG_WPROT 0x00 /* MMC protection status (no interrupt generated) */
153 #define REALVIEW_INTREG_RI0 0x01 /* Ring indicator UART0 is asserted, */
154 #define REALVIEW_INTREG_CARDIN 0x08 /* MMCI card in detect */
155 /* write 1 to acknowledge and clear */
156 #define REALVIEW_INTREG_RI1 0x02 /* Ring indicator UART1 is asserted, */
157 #define REALVIEW_INTREG_CARDINSERT 0x03 /* Signal insertion of MMC card */
158
159 /*
160 * RealView common peripheral addresses
161 */
162 #define REALVIEW_SCTL_BASE 0x10001000 /* System controller */
163 #define REALVIEW_I2C_BASE 0x10002000 /* I2C control */
164 #define REALVIEW_AACI_BASE 0x10004000 /* Audio */
165 #define REALVIEW_MMCI0_BASE 0x10005000 /* MMC interface */
166 #define REALVIEW_KMI0_BASE 0x10006000 /* KMI interface */
167 #define REALVIEW_KMI1_BASE 0x10007000 /* KMI 2nd interface */
168 #define REALVIEW_CHAR_LCD_BASE 0x10008000 /* Character LCD */
169 #define REALVIEW_SCI_BASE 0x1000E000 /* Smart card controller */
170 #define REALVIEW_GPIO1_BASE 0x10014000 /* GPIO port 1 */
171 #define REALVIEW_GPIO2_BASE 0x10015000 /* GPIO port 2 */
172 #define REALVIEW_DMC_BASE 0x10018000 /* DMC configuration */
173 #define REALVIEW_DMAC_BASE 0x10030000 /* DMA controller */
174
175 /* PCI space */
176 #define REALVIEW_PCI_BASE 0x41000000 /* PCI Interface */
177 #define REALVIEW_PCI_CFG_BASE 0x42000000
178 #define REALVIEW_PCI_MEM_BASE0 0x44000000
179 #define REALVIEW_PCI_MEM_BASE1 0x50000000
180 #define REALVIEW_PCI_MEM_BASE2 0x60000000
181 /* Sizes of above maps */
182 #define REALVIEW_PCI_BASE_SIZE 0x01000000
183 #define REALVIEW_PCI_CFG_BASE_SIZE 0x02000000
184 #define REALVIEW_PCI_MEM_BASE0_SIZE 0x0c000000 /* 32Mb */
185 #define REALVIEW_PCI_MEM_BASE1_SIZE 0x10000000 /* 256Mb */
186 #define REALVIEW_PCI_MEM_BASE2_SIZE 0x10000000 /* 256Mb */
187
188 #define REALVIEW_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */
189 #define REALVIEW_LT_BASE 0x80000000 /* Logic Tile expansion */
190
191 /*
192 * CompactFlash
193 */
194 #define REALVIEW_CF_BASE 0x18000000 /* CompactFlash */
195 #define REALVIEW_CF_MEM_BASE 0x18003000 /* SMC for CompactFlash */
196
197 /*
198 * Disk on Chip
199 */
200 #define REALVIEW_DOC_BASE 0x2C000000
201 #define REALVIEW_DOC_SIZE (16 << 20)
202 #define REALVIEW_DOC_PAGE_SIZE 512
203 #define REALVIEW_DOC_TOTAL_PAGES (DOC_SIZE / PAGE_SIZE)
204
205 #define ERASE_UNIT_PAGES 32
206 #define START_PAGE 0x80
207
208 /*
209 * LED settings, bits [7:0]
210 */
211 #define REALVIEW_SYS_LED0 (1 << 0)
212 #define REALVIEW_SYS_LED1 (1 << 1)
213 #define REALVIEW_SYS_LED2 (1 << 2)
214 #define REALVIEW_SYS_LED3 (1 << 3)
215 #define REALVIEW_SYS_LED4 (1 << 4)
216 #define REALVIEW_SYS_LED5 (1 << 5)
217 #define REALVIEW_SYS_LED6 (1 << 6)
218 #define REALVIEW_SYS_LED7 (1 << 7)
219
220 #define ALL_LEDS 0xFF
221
222 #define LED_BANK REALVIEW_SYS_LED
223
224 /*
225 * Control registers
226 */
227 #define REALVIEW_IDFIELD_OFFSET 0x0 /* RealView build information */
228 #define REALVIEW_FLASHPROG_OFFSET 0x4 /* Flash devices */
229 #define REALVIEW_INTREG_OFFSET 0x8 /* Interrupt control */
230 #define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */
231
232 /*
233 * System controller bit assignment
234 */
235 #define REALVIEW_REFCLK 0
236 #define REALVIEW_TIMCLK 1
237
238 #define REALVIEW_TIMER1_EnSel 15
239 #define REALVIEW_TIMER2_EnSel 17
240 #define REALVIEW_TIMER3_EnSel 19
241 #define REALVIEW_TIMER4_EnSel 21
242
243
244 #define REALVIEW_CSR_BASE 0x10000000
245 #define REALVIEW_CSR_SIZE 0x10000000
246
247 #endif /* __ASM_ARCH_PLATFORM_H */
This page took 0.036995 seconds and 5 git commands to generate.