arch/arm64/boot/dts/broadcom/ns2-svk.dts

   1 /*
   2  *  BSD LICENSE
   3  *
   4  *  Copyright(c) 2015 Broadcom Corporation.  All rights reserved.
   5  *
   6  *  Redistribution and use in source and binary forms, with or without
   7  *  modification, are permitted provided that the following conditions
   8  *  are met:
   9  *
  10  *    * Redistributions of source code must retain the above copyright
  11  *      notice, this list of conditions and the following disclaimer.
  12  *    * Redistributions in binary form must reproduce the above copyright
  13  *      notice, this list of conditions and the following disclaimer in
  14  *      the documentation and/or other materials provided with the
  15  *      distribution.
  16  *    * Neither the name of Broadcom Corporation nor the names of its
  17  *      contributors may be used to endorse or promote products derived
  18  *      from this software without specific prior written permission.
  19  *
  20  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 /dts-v1/;
  34
  35 #include "ns2.dtsi"
  36
  37 / {
  38         model = "Broadcom NS2 SVK";
  39         compatible = "brcm,ns2-svk", "brcm,ns2";
  40
  41         aliases {
  42                 serial0 = &uart3;
  43                 serial1 = &uart0;
  44                 serial2 = &uart1;
  45                 serial3 = &uart2;
  46         };
  47
  48         chosen {
  49                 stdout-path = "serial0:115200n8";
  50                 bootargs = "earlycon=uart8250,mmio32,0x66130000";
  51         };
  52
  53         memory {
  54                 device_type = "memory";
  55                 reg = <0x000000000 0x80000000 0x00000000 0x40000000>;
  56         };
  57 };
  58
  59 &pcie0 {
  60         status = "ok";
  61 };
  62
  63 &pcie4 {
  64         status = "ok";
  65 };
  66
  67 &i2c0 {
  68         status = "ok";
  69 };
  70
  71 &i2c1 {
  72         status = "ok";
  73 };
  74
  75 &uart0 {
  76         status = "ok";
  77 };
  78
  79 &uart1 {
  80         status = "ok";
  81 };
  82
  83 &uart2 {
  84         status = "ok";
  85 };
  86
  87 &uart3 {
  88         status = "ok";
  89 };
  90
  91 &ssp0 {
  92         status = "ok";
  93
  94         slic@0 {
  95                 compatible = "silabs,si3226x";
  96                 reg = <0>;
  97                 spi-max-frequency = <5000000>;
  98                 spi-cpha = <1>;
  99                 spi-cpol = <1>;
 100                 pl022,hierarchy = <0>;
 101                 pl022,interface = <0>;
 102                 pl022,slave-tx-disable = <0>;
 103                 pl022,com-mode = <0>;
 104                 pl022,rx-level-trig = <1>;
 105                 pl022,tx-level-trig = <1>;
 106                 pl022,ctrl-len = <11>;
 107                 pl022,wait-state = <0>;
 108                 pl022,duplex = <0>;
 109         };
 110 };
 111
 112 &ssp1 {
 113         status = "ok";
 114
 115         at25@0 {
 116                 compatible = "atmel,at25";
 117                 reg = <0>;
 118                 spi-max-frequency = <5000000>;
 119                 at25,byte-len = <0x8000>;
 120                 at25,addr-mode = <2>;
 121                 at25,page-size = <64>;
 122                 spi-cpha = <1>;
 123                 spi-cpol = <1>;
 124                 pl022,hierarchy = <0>;
 125                 pl022,interface = <0>;
 126                 pl022,slave-tx-disable = <0>;
 127                 pl022,com-mode = <0>;
 128                 pl022,rx-level-trig = <1>;
 129                 pl022,tx-level-trig = <1>;
 130                 pl022,ctrl-len = <11>;
 131                 pl022,wait-state = <0>;
 132                 pl022,duplex = <0>;
 133         };
 134 };
 135
 136 &sata_phy0 {
 137         status = "ok";
 138 };
 139
 140 &sata_phy1 {
 141         status = "ok";
 142 };
 143
 144 &sata {
 145         status = "ok";
 146 };
 147
 148 &sdio0 {
 149         status = "ok";
 150 };
 151
 152 &nand {
 153         nandcs@0 {
 154                 compatible = "brcm,nandcs";
 155                 reg = <0>;
 156                 nand-ecc-mode = "hw";
 157                 nand-ecc-strength = <8>;
 158                 nand-ecc-step-size = <512>;
 159                 #address-cells = <1>;
 160                 #size-cells = <1>;
 161         };
 162 };
 163
 164 &pinctrl {
 165         pinctrl-names = "default";
 166         pinctrl-0 = <&nand_sel>;
 167         nand_sel: nand_sel {
 168                 function = "nand";
 169                 groups = "nand_grp";
 170         };
 171 };