arch/arm64/include/asm/arch_timer.h

   1 /*
   2  * arch/arm64/include/asm/arch_timer.h
   3  *
   4  * Copyright (C) 2012 ARM Ltd.
   5  * Author: Marc Zyngier <marc.zyngier@arm.com>
   6  *
   7  * This program is free software: you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #ifndef __ASM_ARCH_TIMER_H
  20 #define __ASM_ARCH_TIMER_H
  21
  22 #include <asm/barrier.h>
  23 #include <asm/sysreg.h>
  24
  25 #include <linux/bug.h>
  26 #include <linux/init.h>
  27 #include <linux/types.h>
  28
  29 #include <clocksource/arm_arch_timer.h>
  30
  31 /*
  32  * These register accessors are marked inline so the compiler can
  33  * nicely work out which register we want, and chuck away the rest of
  34  * the code.
  35  */
  36 static __always_inline
  37 void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val)
  38 {
  39         if (access == ARCH_TIMER_PHYS_ACCESS) {
  40                 switch (reg) {
  41                 case ARCH_TIMER_REG_CTRL:
  42                         write_sysreg(val, cntp_ctl_el0);
  43                         break;
  44                 case ARCH_TIMER_REG_TVAL:
  45                         write_sysreg(val, cntp_tval_el0);
  46                         break;
  47                 }
  48         } else if (access == ARCH_TIMER_VIRT_ACCESS) {
  49                 switch (reg) {
  50                 case ARCH_TIMER_REG_CTRL:
  51                         write_sysreg(val, cntv_ctl_el0);
  52                         break;
  53                 case ARCH_TIMER_REG_TVAL:
  54                         write_sysreg(val, cntv_tval_el0);
  55                         break;
  56                 }
  57         }
  58
  59         isb();
  60 }
  61
  62 static __always_inline
  63 u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg)
  64 {
  65         if (access == ARCH_TIMER_PHYS_ACCESS) {
  66                 switch (reg) {
  67                 case ARCH_TIMER_REG_CTRL:
  68                         return read_sysreg(cntp_ctl_el0);
  69                 case ARCH_TIMER_REG_TVAL:
  70                         return read_sysreg(cntp_tval_el0);
  71                 }
  72         } else if (access == ARCH_TIMER_VIRT_ACCESS) {
  73                 switch (reg) {
  74                 case ARCH_TIMER_REG_CTRL:
  75                         return read_sysreg(cntv_ctl_el0);
  76                 case ARCH_TIMER_REG_TVAL:
  77                         return read_sysreg(cntv_tval_el0);
  78                 }
  79         }
  80
  81         BUG();
  82 }
  83
  84 static inline u32 arch_timer_get_cntfrq(void)
  85 {
  86         return read_sysreg(cntfrq_el0);
  87 }
  88
  89 static inline u32 arch_timer_get_cntkctl(void)
  90 {
  91         return read_sysreg(cntkctl_el1);
  92 }
  93
  94 static inline void arch_timer_set_cntkctl(u32 cntkctl)
  95 {
  96         write_sysreg(cntkctl, cntkctl_el1);
  97 }
  98
  99 static inline u64 arch_counter_get_cntpct(void)
 100 {
 101         /*
 102          * AArch64 kernel and user space mandate the use of CNTVCT.
 103          */
 104         BUG();
 105         return 0;
 106 }
 107
 108 static inline u64 arch_counter_get_cntvct(void)
 109 {
 110         isb();
 111         return read_sysreg(cntvct_el0);
 112 }
 113
 114 static inline int arch_timer_arch_init(void)
 115 {
 116         return 0;
 117 }
 118
 119 #endif