arch/arm64/include/asm/pgtable.h

   1 /*
   2  * Copyright (C) 2012 ARM Ltd.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License
  14  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  15  */
  16 #ifndef __ASM_PGTABLE_H
  17 #define __ASM_PGTABLE_H
  18
  19 #include <asm/bug.h>
  20 #include <asm/proc-fns.h>
  21
  22 #include <asm/memory.h>
  23 #include <asm/pgtable-hwdef.h>
  24 #include <asm/pgtable-prot.h>
  25
  26 /*
  27  * VMALLOC range.
  28  *
  29  * VMALLOC_START: beginning of the kernel vmalloc space
  30  * VMALLOC_END: extends to the available space below vmmemmap, PCI I/O space
  31  *      and fixed mappings
  32  */
  33 #define VMALLOC_START           (MODULES_END)
  34 #define VMALLOC_END             (PAGE_OFFSET - PUD_SIZE - VMEMMAP_SIZE - SZ_64K)
  35
  36 #define vmemmap                 ((struct page *)VMEMMAP_START - (memstart_addr >> PAGE_SHIFT))
  37
  38 #define FIRST_USER_ADDRESS      0UL
  39
  40 #ifndef __ASSEMBLY__
  41
  42 #include <asm/fixmap.h>
  43 #include <linux/mmdebug.h>
  44
  45 extern void __pte_error(const char *file, int line, unsigned long val);
  46 extern void __pmd_error(const char *file, int line, unsigned long val);
  47 extern void __pud_error(const char *file, int line, unsigned long val);
  48 extern void __pgd_error(const char *file, int line, unsigned long val);
  49
  50 /*
  51  * ZERO_PAGE is a global shared page that is always zero: used
  52  * for zero-mapped memory areas etc..
  53  */
  54 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
  55 #define ZERO_PAGE(vaddr)        pfn_to_page(PHYS_PFN(__pa(empty_zero_page)))
  56
  57 #define pte_ERROR(pte)          __pte_error(__FILE__, __LINE__, pte_val(pte))
  58
  59 #define pte_pfn(pte)            ((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT)
  60
  61 #define pfn_pte(pfn,prot)       (__pte(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
  62
  63 #define pte_none(pte)           (!pte_val(pte))
  64 #define pte_clear(mm,addr,ptep) set_pte(ptep, __pte(0))
  65 #define pte_page(pte)           (pfn_to_page(pte_pfn(pte)))
  66
  67 /*
  68  * The following only work if pte_present(). Undefined behaviour otherwise.
  69  */
  70 #define pte_present(pte)        (!!(pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)))
  71 #define pte_young(pte)          (!!(pte_val(pte) & PTE_AF))
  72 #define pte_special(pte)        (!!(pte_val(pte) & PTE_SPECIAL))
  73 #define pte_write(pte)          (!!(pte_val(pte) & PTE_WRITE))
  74 #define pte_exec(pte)           (!(pte_val(pte) & PTE_UXN))
  75 #define pte_cont(pte)           (!!(pte_val(pte) & PTE_CONT))
  76 #define pte_ng(pte)             (!!(pte_val(pte) & PTE_NG))
  77
  78 #ifdef CONFIG_ARM64_HW_AFDBM
  79 #define pte_hw_dirty(pte)       (pte_write(pte) && !(pte_val(pte) & PTE_RDONLY))
  80 #else
  81 #define pte_hw_dirty(pte)       (0)
  82 #endif
  83 #define pte_sw_dirty(pte)       (!!(pte_val(pte) & PTE_DIRTY))
  84 #define pte_dirty(pte)          (pte_sw_dirty(pte) || pte_hw_dirty(pte))
  85
  86 #define pte_valid(pte)          (!!(pte_val(pte) & PTE_VALID))
  87 #define pte_valid_global(pte) \
  88         ((pte_val(pte) & (PTE_VALID | PTE_NG)) == PTE_VALID)
  89 #define pte_valid_young(pte) \
  90         ((pte_val(pte) & (PTE_VALID | PTE_AF)) == (PTE_VALID | PTE_AF))
  91
  92 /*
  93  * Could the pte be present in the TLB? We must check mm_tlb_flush_pending
  94  * so that we don't erroneously return false for pages that have been
  95  * remapped as PROT_NONE but are yet to be flushed from the TLB.
  96  */
  97 #define pte_accessible(mm, pte) \
  98         (mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid_young(pte))
  99
 100 static inline pte_t clear_pte_bit(pte_t pte, pgprot_t prot)
 101 {
 102         pte_val(pte) &= ~pgprot_val(prot);
 103         return pte;
 104 }
 105
 106 static inline pte_t set_pte_bit(pte_t pte, pgprot_t prot)
 107 {
 108         pte_val(pte) |= pgprot_val(prot);
 109         return pte;
 110 }
 111
 112 static inline pte_t pte_wrprotect(pte_t pte)
 113 {
 114         return clear_pte_bit(pte, __pgprot(PTE_WRITE));
 115 }
 116
 117 static inline pte_t pte_mkwrite(pte_t pte)
 118 {
 119         return set_pte_bit(pte, __pgprot(PTE_WRITE));
 120 }
 121
 122 static inline pte_t pte_mkclean(pte_t pte)
 123 {
 124         return clear_pte_bit(pte, __pgprot(PTE_DIRTY));
 125 }
 126
 127 static inline pte_t pte_mkdirty(pte_t pte)
 128 {
 129         return set_pte_bit(pte, __pgprot(PTE_DIRTY));
 130 }
 131
 132 static inline pte_t pte_mkold(pte_t pte)
 133 {
 134         return clear_pte_bit(pte, __pgprot(PTE_AF));
 135 }
 136
 137 static inline pte_t pte_mkyoung(pte_t pte)
 138 {
 139         return set_pte_bit(pte, __pgprot(PTE_AF));
 140 }
 141
 142 static inline pte_t pte_mkspecial(pte_t pte)
 143 {
 144         return set_pte_bit(pte, __pgprot(PTE_SPECIAL));
 145 }
 146
 147 static inline pte_t pte_mkcont(pte_t pte)
 148 {
 149         pte = set_pte_bit(pte, __pgprot(PTE_CONT));
 150         return set_pte_bit(pte, __pgprot(PTE_TYPE_PAGE));
 151 }
 152
 153 static inline pte_t pte_mknoncont(pte_t pte)
 154 {
 155         return clear_pte_bit(pte, __pgprot(PTE_CONT));
 156 }
 157
 158 static inline pte_t pte_clear_rdonly(pte_t pte)
 159 {
 160         return clear_pte_bit(pte, __pgprot(PTE_RDONLY));
 161 }
 162
 163 static inline pte_t pte_mkpresent(pte_t pte)
 164 {
 165         return set_pte_bit(pte, __pgprot(PTE_VALID));
 166 }
 167
 168 static inline pmd_t pmd_mkcont(pmd_t pmd)
 169 {
 170         return __pmd(pmd_val(pmd) | PMD_SECT_CONT);
 171 }
 172
 173 static inline void set_pte(pte_t *ptep, pte_t pte)
 174 {
 175         *ptep = pte;
 176
 177         /*
 178          * Only if the new pte is valid and kernel, otherwise TLB maintenance
 179          * or update_mmu_cache() have the necessary barriers.
 180          */
 181         if (pte_valid_global(pte)) {
 182                 dsb(ishst);
 183                 isb();
 184         }
 185 }
 186
 187 struct mm_struct;
 188 struct vm_area_struct;
 189
 190 extern void __sync_icache_dcache(pte_t pteval, unsigned long addr);
 191
 192 /*
 193  * PTE bits configuration in the presence of hardware Dirty Bit Management
 194  * (PTE_WRITE == PTE_DBM):
 195  *
 196  * Dirty  Writable | PTE_RDONLY  PTE_WRITE  PTE_DIRTY (sw)
 197  *   0      0      |   1           0          0
 198  *   0      1      |   1           1          0
 199  *   1      0      |   1           0          1
 200  *   1      1      |   0           1          x
 201  *
 202  * When hardware DBM is not present, the sofware PTE_DIRTY bit is updated via
 203  * the page fault mechanism. Checking the dirty status of a pte becomes:
 204  *
 205  *   PTE_DIRTY || (PTE_WRITE && !PTE_RDONLY)
 206  */
 207 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
 208                               pte_t *ptep, pte_t pte)
 209 {
 210         if (pte_present(pte)) {
 211                 if (pte_sw_dirty(pte) && pte_write(pte))
 212                         pte_val(pte) &= ~PTE_RDONLY;
 213                 else
 214                         pte_val(pte) |= PTE_RDONLY;
 215                 if (pte_ng(pte) && pte_exec(pte) && !pte_special(pte))
 216                         __sync_icache_dcache(pte, addr);
 217         }
 218
 219         /*
 220          * If the existing pte is valid, check for potential race with
 221          * hardware updates of the pte (ptep_set_access_flags safely changes
 222          * valid ptes without going through an invalid entry).
 223          */
 224         if (IS_ENABLED(CONFIG_ARM64_HW_AFDBM) &&
 225             pte_valid(*ptep) && pte_valid(pte)) {
 226                 VM_WARN_ONCE(!pte_young(pte),
 227                              "%s: racy access flag clearing: 0x%016llx -> 0x%016llx",
 228                              __func__, pte_val(*ptep), pte_val(pte));
 229                 VM_WARN_ONCE(pte_write(*ptep) && !pte_dirty(pte),
 230                              "%s: racy dirty state clearing: 0x%016llx -> 0x%016llx",
 231                              __func__, pte_val(*ptep), pte_val(pte));
 232         }
 233
 234         set_pte(ptep, pte);
 235 }
 236
 237 #define __HAVE_ARCH_PTE_SAME
 238 static inline int pte_same(pte_t pte_a, pte_t pte_b)
 239 {
 240         pteval_t lhs, rhs;
 241
 242         lhs = pte_val(pte_a);
 243         rhs = pte_val(pte_b);
 244
 245         if (pte_present(pte_a))
 246                 lhs &= ~PTE_RDONLY;
 247
 248         if (pte_present(pte_b))
 249                 rhs &= ~PTE_RDONLY;
 250
 251         return (lhs == rhs);
 252 }
 253
 254 /*
 255  * Huge pte definitions.
 256  */
 257 #define pte_huge(pte)           (!(pte_val(pte) & PTE_TABLE_BIT))
 258 #define pte_mkhuge(pte)         (__pte(pte_val(pte) & ~PTE_TABLE_BIT))
 259
 260 /*
 261  * Hugetlb definitions.
 262  */
 263 #define HUGE_MAX_HSTATE         4
 264 #define HPAGE_SHIFT             PMD_SHIFT
 265 #define HPAGE_SIZE              (_AC(1, UL) << HPAGE_SHIFT)
 266 #define HPAGE_MASK              (~(HPAGE_SIZE - 1))
 267 #define HUGETLB_PAGE_ORDER      (HPAGE_SHIFT - PAGE_SHIFT)
 268
 269 #define __HAVE_ARCH_PTE_SPECIAL
 270
 271 static inline pte_t pud_pte(pud_t pud)
 272 {
 273         return __pte(pud_val(pud));
 274 }
 275
 276 static inline pmd_t pud_pmd(pud_t pud)
 277 {
 278         return __pmd(pud_val(pud));
 279 }
 280
 281 static inline pte_t pmd_pte(pmd_t pmd)
 282 {
 283         return __pte(pmd_val(pmd));
 284 }
 285
 286 static inline pmd_t pte_pmd(pte_t pte)
 287 {
 288         return __pmd(pte_val(pte));
 289 }
 290
 291 static inline pgprot_t mk_sect_prot(pgprot_t prot)
 292 {
 293         return __pgprot(pgprot_val(prot) & ~PTE_TABLE_BIT);
 294 }
 295
 296 #ifdef CONFIG_NUMA_BALANCING
 297 /*
 298  * See the comment in include/asm-generic/pgtable.h
 299  */
 300 static inline int pte_protnone(pte_t pte)
 301 {
 302         return (pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)) == PTE_PROT_NONE;
 303 }
 304
 305 static inline int pmd_protnone(pmd_t pmd)
 306 {
 307         return pte_protnone(pmd_pte(pmd));
 308 }
 309 #endif
 310
 311 /*
 312  * THP definitions.
 313  */
 314
 315 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 316 #define pmd_trans_huge(pmd)     (pmd_val(pmd) && !(pmd_val(pmd) & PMD_TABLE_BIT))
 317 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 318
 319 #define pmd_present(pmd)        pte_present(pmd_pte(pmd))
 320 #define pmd_dirty(pmd)          pte_dirty(pmd_pte(pmd))
 321 #define pmd_young(pmd)          pte_young(pmd_pte(pmd))
 322 #define pmd_wrprotect(pmd)      pte_pmd(pte_wrprotect(pmd_pte(pmd)))
 323 #define pmd_mkold(pmd)          pte_pmd(pte_mkold(pmd_pte(pmd)))
 324 #define pmd_mkwrite(pmd)        pte_pmd(pte_mkwrite(pmd_pte(pmd)))
 325 #define pmd_mkclean(pmd)        pte_pmd(pte_mkclean(pmd_pte(pmd)))
 326 #define pmd_mkdirty(pmd)        pte_pmd(pte_mkdirty(pmd_pte(pmd)))
 327 #define pmd_mkyoung(pmd)        pte_pmd(pte_mkyoung(pmd_pte(pmd)))
 328 #define pmd_mknotpresent(pmd)   (__pmd(pmd_val(pmd) & ~PMD_SECT_VALID))
 329
 330 #define pmd_thp_or_huge(pmd)    (pmd_huge(pmd) || pmd_trans_huge(pmd))
 331
 332 #define __HAVE_ARCH_PMD_WRITE
 333 #define pmd_write(pmd)          pte_write(pmd_pte(pmd))
 334
 335 #define pmd_mkhuge(pmd)         (__pmd(pmd_val(pmd) & ~PMD_TABLE_BIT))
 336
 337 #define pmd_pfn(pmd)            (((pmd_val(pmd) & PMD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
 338 #define pfn_pmd(pfn,prot)       (__pmd(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
 339 #define mk_pmd(page,prot)       pfn_pmd(page_to_pfn(page),prot)
 340
 341 #define pud_write(pud)          pte_write(pud_pte(pud))
 342 #define pud_pfn(pud)            (((pud_val(pud) & PUD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
 343
 344 #define set_pmd_at(mm, addr, pmdp, pmd) set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd))
 345
 346 #define __pgprot_modify(prot,mask,bits) \
 347         __pgprot((pgprot_val(prot) & ~(mask)) | (bits))
 348
 349 /*
 350  * Mark the prot value as uncacheable and unbufferable.
 351  */
 352 #define pgprot_noncached(prot) \
 353         __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE) | PTE_PXN | PTE_UXN)
 354 #define pgprot_writecombine(prot) \
 355         __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN)
 356 #define pgprot_device(prot) \
 357         __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_PXN | PTE_UXN)
 358 #define __HAVE_PHYS_MEM_ACCESS_PROT
 359 struct file;
 360 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
 361                                      unsigned long size, pgprot_t vma_prot);
 362
 363 #define pmd_none(pmd)           (!pmd_val(pmd))
 364
 365 #define pmd_bad(pmd)            (!(pmd_val(pmd) & PMD_TABLE_BIT))
 366
 367 #define pmd_table(pmd)          ((pmd_val(pmd) & PMD_TYPE_MASK) == \
 368                                  PMD_TYPE_TABLE)
 369 #define pmd_sect(pmd)           ((pmd_val(pmd) & PMD_TYPE_MASK) == \
 370                                  PMD_TYPE_SECT)
 371
 372 #if defined(CONFIG_ARM64_64K_PAGES) || CONFIG_PGTABLE_LEVELS < 3
 373 #define pud_sect(pud)           (0)
 374 #define pud_table(pud)          (1)
 375 #else
 376 #define pud_sect(pud)           ((pud_val(pud) & PUD_TYPE_MASK) == \
 377                                  PUD_TYPE_SECT)
 378 #define pud_table(pud)          ((pud_val(pud) & PUD_TYPE_MASK) == \
 379                                  PUD_TYPE_TABLE)
 380 #endif
 381
 382 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
 383 {
 384         *pmdp = pmd;
 385         dsb(ishst);
 386         isb();
 387 }
 388
 389 static inline void pmd_clear(pmd_t *pmdp)
 390 {
 391         set_pmd(pmdp, __pmd(0));
 392 }
 393
 394 static inline phys_addr_t pmd_page_paddr(pmd_t pmd)
 395 {
 396         return pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK;
 397 }
 398
 399 /* Find an entry in the third-level page table. */
 400 #define pte_index(addr)         (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
 401
 402 #define pte_offset_phys(dir,addr)       (pmd_page_paddr(*(dir)) + pte_index(addr) * sizeof(pte_t))
 403 #define pte_offset_kernel(dir,addr)     ((pte_t *)__va(pte_offset_phys((dir), (addr))))
 404
 405 #define pte_offset_map(dir,addr)        pte_offset_kernel((dir), (addr))
 406 #define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
 407 #define pte_unmap(pte)                  do { } while (0)
 408 #define pte_unmap_nested(pte)           do { } while (0)
 409
 410 #define pte_set_fixmap(addr)            ((pte_t *)set_fixmap_offset(FIX_PTE, addr))
 411 #define pte_set_fixmap_offset(pmd, addr)        pte_set_fixmap(pte_offset_phys(pmd, addr))
 412 #define pte_clear_fixmap()              clear_fixmap(FIX_PTE)
 413
 414 #define pmd_page(pmd)           pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
 415
 416 /* use ONLY for statically allocated translation tables */
 417 #define pte_offset_kimg(dir,addr)       ((pte_t *)__phys_to_kimg(pte_offset_phys((dir), (addr))))
 418
 419 /*
 420  * Conversion functions: convert a page and protection to a page entry,
 421  * and a page entry and page directory to the page they refer to.
 422  */
 423 #define mk_pte(page,prot)       pfn_pte(page_to_pfn(page),prot)
 424
 425 #if CONFIG_PGTABLE_LEVELS > 2
 426
 427 #define pmd_ERROR(pmd)          __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
 428
 429 #define pud_none(pud)           (!pud_val(pud))
 430 #define pud_bad(pud)            (!(pud_val(pud) & PUD_TABLE_BIT))
 431 #define pud_present(pud)        (pud_val(pud))
 432
 433 static inline void set_pud(pud_t *pudp, pud_t pud)
 434 {
 435         *pudp = pud;
 436         dsb(ishst);
 437         isb();
 438 }
 439
 440 static inline void pud_clear(pud_t *pudp)
 441 {
 442         set_pud(pudp, __pud(0));
 443 }
 444
 445 static inline phys_addr_t pud_page_paddr(pud_t pud)
 446 {
 447         return pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK;
 448 }
 449
 450 /* Find an entry in the second-level page table. */
 451 #define pmd_index(addr)         (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
 452
 453 #define pmd_offset_phys(dir, addr)      (pud_page_paddr(*(dir)) + pmd_index(addr) * sizeof(pmd_t))
 454 #define pmd_offset(dir, addr)           ((pmd_t *)__va(pmd_offset_phys((dir), (addr))))
 455
 456 #define pmd_set_fixmap(addr)            ((pmd_t *)set_fixmap_offset(FIX_PMD, addr))
 457 #define pmd_set_fixmap_offset(pud, addr)        pmd_set_fixmap(pmd_offset_phys(pud, addr))
 458 #define pmd_clear_fixmap()              clear_fixmap(FIX_PMD)
 459
 460 #define pud_page(pud)           pfn_to_page(__phys_to_pfn(pud_val(pud) & PHYS_MASK))
 461
 462 /* use ONLY for statically allocated translation tables */
 463 #define pmd_offset_kimg(dir,addr)       ((pmd_t *)__phys_to_kimg(pmd_offset_phys((dir), (addr))))
 464
 465 #else
 466
 467 #define pud_page_paddr(pud)     ({ BUILD_BUG(); 0; })
 468
 469 /* Match pmd_offset folding in <asm/generic/pgtable-nopmd.h> */
 470 #define pmd_set_fixmap(addr)            NULL
 471 #define pmd_set_fixmap_offset(pudp, addr)       ((pmd_t *)pudp)
 472 #define pmd_clear_fixmap()
 473
 474 #define pmd_offset_kimg(dir,addr)       ((pmd_t *)dir)
 475
 476 #endif  /* CONFIG_PGTABLE_LEVELS > 2 */
 477
 478 #if CONFIG_PGTABLE_LEVELS > 3
 479
 480 #define pud_ERROR(pud)          __pud_error(__FILE__, __LINE__, pud_val(pud))
 481
 482 #define pgd_none(pgd)           (!pgd_val(pgd))
 483 #define pgd_bad(pgd)            (!(pgd_val(pgd) & 2))
 484 #define pgd_present(pgd)        (pgd_val(pgd))
 485
 486 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
 487 {
 488         *pgdp = pgd;
 489         dsb(ishst);
 490 }
 491
 492 static inline void pgd_clear(pgd_t *pgdp)
 493 {
 494         set_pgd(pgdp, __pgd(0));
 495 }
 496
 497 static inline phys_addr_t pgd_page_paddr(pgd_t pgd)
 498 {
 499         return pgd_val(pgd) & PHYS_MASK & (s32)PAGE_MASK;
 500 }
 501
 502 /* Find an entry in the frst-level page table. */
 503 #define pud_index(addr)         (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
 504
 505 #define pud_offset_phys(dir, addr)      (pgd_page_paddr(*(dir)) + pud_index(addr) * sizeof(pud_t))
 506 #define pud_offset(dir, addr)           ((pud_t *)__va(pud_offset_phys((dir), (addr))))
 507
 508 #define pud_set_fixmap(addr)            ((pud_t *)set_fixmap_offset(FIX_PUD, addr))
 509 #define pud_set_fixmap_offset(pgd, addr)        pud_set_fixmap(pud_offset_phys(pgd, addr))
 510 #define pud_clear_fixmap()              clear_fixmap(FIX_PUD)
 511
 512 #define pgd_page(pgd)           pfn_to_page(__phys_to_pfn(pgd_val(pgd) & PHYS_MASK))
 513
 514 /* use ONLY for statically allocated translation tables */
 515 #define pud_offset_kimg(dir,addr)       ((pud_t *)__phys_to_kimg(pud_offset_phys((dir), (addr))))
 516
 517 #else
 518
 519 #define pgd_page_paddr(pgd)     ({ BUILD_BUG(); 0;})
 520
 521 /* Match pud_offset folding in <asm/generic/pgtable-nopud.h> */
 522 #define pud_set_fixmap(addr)            NULL
 523 #define pud_set_fixmap_offset(pgdp, addr)       ((pud_t *)pgdp)
 524 #define pud_clear_fixmap()
 525
 526 #define pud_offset_kimg(dir,addr)       ((pud_t *)dir)
 527
 528 #endif  /* CONFIG_PGTABLE_LEVELS > 3 */
 529
 530 #define pgd_ERROR(pgd)          __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
 531
 532 /* to find an entry in a page-table-directory */
 533 #define pgd_index(addr)         (((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
 534
 535 #define pgd_offset_raw(pgd, addr)       ((pgd) + pgd_index(addr))
 536
 537 #define pgd_offset(mm, addr)    (pgd_offset_raw((mm)->pgd, (addr)))
 538
 539 /* to find an entry in a kernel page-table-directory */
 540 #define pgd_offset_k(addr)      pgd_offset(&init_mm, addr)
 541
 542 #define pgd_set_fixmap(addr)    ((pgd_t *)set_fixmap_offset(FIX_PGD, addr))
 543 #define pgd_clear_fixmap()      clear_fixmap(FIX_PGD)
 544
 545 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 546 {
 547         const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY |
 548                               PTE_PROT_NONE | PTE_VALID | PTE_WRITE;
 549         /* preserve the hardware dirty information */
 550         if (pte_hw_dirty(pte))
 551                 pte = pte_mkdirty(pte);
 552         pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
 553         return pte;
 554 }
 555
 556 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
 557 {
 558         return pte_pmd(pte_modify(pmd_pte(pmd), newprot));
 559 }
 560
 561 #ifdef CONFIG_ARM64_HW_AFDBM
 562 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
 563 extern int ptep_set_access_flags(struct vm_area_struct *vma,
 564                                  unsigned long address, pte_t *ptep,
 565                                  pte_t entry, int dirty);
 566
 567 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 568 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
 569 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
 570                                         unsigned long address, pmd_t *pmdp,
 571                                         pmd_t entry, int dirty)
 572 {
 573         return ptep_set_access_flags(vma, address, (pte_t *)pmdp, pmd_pte(entry), dirty);
 574 }
 575 #endif
 576
 577 /*
 578  * Atomic pte/pmd modifications.
 579  */
 580 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
 581 static inline int __ptep_test_and_clear_young(pte_t *ptep)
 582 {
 583         pteval_t pteval;
 584         unsigned int tmp, res;
 585
 586         asm volatile("//        __ptep_test_and_clear_young\n"
 587         "       prfm    pstl1strm, %2\n"
 588         "1:     ldxr    %0, %2\n"
 589         "       ubfx    %w3, %w0, %5, #1        // extract PTE_AF (young)\n"
 590         "       and     %0, %0, %4              // clear PTE_AF\n"
 591         "       stxr    %w1, %0, %2\n"
 592         "       cbnz    %w1, 1b\n"
 593         : "=&r" (pteval), "=&r" (tmp), "+Q" (pte_val(*ptep)), "=&r" (res)
 594         : "L" (~PTE_AF), "I" (ilog2(PTE_AF)));
 595
 596         return res;
 597 }
 598
 599 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
 600                                             unsigned long address,
 601                                             pte_t *ptep)
 602 {
 603         return __ptep_test_and_clear_young(ptep);
 604 }
 605
 606 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 607 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
 608 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
 609                                             unsigned long address,
 610                                             pmd_t *pmdp)
 611 {
 612         return ptep_test_and_clear_young(vma, address, (pte_t *)pmdp);
 613 }
 614 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 615
 616 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
 617 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
 618                                        unsigned long address, pte_t *ptep)
 619 {
 620         pteval_t old_pteval;
 621         unsigned int tmp;
 622
 623         asm volatile("//        ptep_get_and_clear\n"
 624         "       prfm    pstl1strm, %2\n"
 625         "1:     ldxr    %0, %2\n"
 626         "       stxr    %w1, xzr, %2\n"
 627         "       cbnz    %w1, 1b\n"
 628         : "=&r" (old_pteval), "=&r" (tmp), "+Q" (pte_val(*ptep)));
 629
 630         return __pte(old_pteval);
 631 }
 632
 633 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 634 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
 635 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
 636                                             unsigned long address, pmd_t *pmdp)
 637 {
 638         return pte_pmd(ptep_get_and_clear(mm, address, (pte_t *)pmdp));
 639 }
 640 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 641
 642 /*
 643  * ptep_set_wrprotect - mark read-only while trasferring potential hardware
 644  * dirty status (PTE_DBM && !PTE_RDONLY) to the software PTE_DIRTY bit.
 645  */
 646 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
 647 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
 648 {
 649         pteval_t pteval;
 650         unsigned long tmp;
 651
 652         asm volatile("//        ptep_set_wrprotect\n"
 653         "       prfm    pstl1strm, %2\n"
 654         "1:     ldxr    %0, %2\n"
 655         "       tst     %0, %4                  // check for hw dirty (!PTE_RDONLY)\n"
 656         "       csel    %1, %3, xzr, eq         // set PTE_DIRTY|PTE_RDONLY if dirty\n"
 657         "       orr     %0, %0, %1              // if !dirty, PTE_RDONLY is already set\n"
 658         "       and     %0, %0, %5              // clear PTE_WRITE/PTE_DBM\n"
 659         "       stxr    %w1, %0, %2\n"
 660         "       cbnz    %w1, 1b\n"
 661         : "=&r" (pteval), "=&r" (tmp), "+Q" (pte_val(*ptep))
 662         : "r" (PTE_DIRTY|PTE_RDONLY), "L" (PTE_RDONLY), "L" (~PTE_WRITE)
 663         : "cc");
 664 }
 665
 666 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 667 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
 668 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
 669                                       unsigned long address, pmd_t *pmdp)
 670 {
 671         ptep_set_wrprotect(mm, address, (pte_t *)pmdp);
 672 }
 673 #endif
 674 #endif  /* CONFIG_ARM64_HW_AFDBM */
 675
 676 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
 677 extern pgd_t idmap_pg_dir[PTRS_PER_PGD];
 678
 679 /*
 680  * Encode and decode a swap entry:
 681  *      bits 0-1:       present (must be zero)
 682  *      bits 2-7:       swap type
 683  *      bits 8-57:      swap offset
 684  *      bit  58:        PTE_PROT_NONE (must be zero)
 685  */
 686 #define __SWP_TYPE_SHIFT        2
 687 #define __SWP_TYPE_BITS         6
 688 #define __SWP_OFFSET_BITS       50
 689 #define __SWP_TYPE_MASK         ((1 << __SWP_TYPE_BITS) - 1)
 690 #define __SWP_OFFSET_SHIFT      (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
 691 #define __SWP_OFFSET_MASK       ((1UL << __SWP_OFFSET_BITS) - 1)
 692
 693 #define __swp_type(x)           (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
 694 #define __swp_offset(x)         (((x).val >> __SWP_OFFSET_SHIFT) & __SWP_OFFSET_MASK)
 695 #define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })
 696
 697 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
 698 #define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
 699
 700 /*
 701  * Ensure that there are not more swap files than can be encoded in the kernel
 702  * PTEs.
 703  */
 704 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
 705
 706 extern int kern_addr_valid(unsigned long addr);
 707
 708 #include <asm-generic/pgtable.h>
 709
 710 void pgd_cache_init(void);
 711 #define pgtable_cache_init      pgd_cache_init
 712
 713 /*
 714  * On AArch64, the cache coherency is handled via the set_pte_at() function.
 715  */
 716 static inline void update_mmu_cache(struct vm_area_struct *vma,
 717                                     unsigned long addr, pte_t *ptep)
 718 {
 719         /*
 720          * We don't do anything here, so there's a very small chance of
 721          * us retaking a user fault which we just fixed up. The alternative
 722          * is doing a dsb(ishst), but that penalises the fastpath.
 723          */
 724 }
 725
 726 #define update_mmu_cache_pmd(vma, address, pmd) do { } while (0)
 727
 728 #define kc_vaddr_to_offset(v)   ((v) & ~VA_START)
 729 #define kc_offset_to_vaddr(o)   ((o) | VA_START)
 730
 731 #endif /* !__ASSEMBLY__ */
 732
 733 #endif /* __ASM_PGTABLE_H */