arch/arm64/kernel/process.c

   1 /*
   2  * Based on arch/arm/kernel/process.c
   3  *
   4  * Original Copyright (C) 1995  Linus Torvalds
   5  * Copyright (C) 1996-2000 Russell King - Converted to ARM.
   6  * Copyright (C) 2012 ARM Ltd.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include <stdarg.h>
  22
  23 #include <linux/compat.h>
  24 #include <linux/efi.h>
  25 #include <linux/export.h>
  26 #include <linux/sched.h>
  27 #include <linux/kernel.h>
  28 #include <linux/mm.h>
  29 #include <linux/stddef.h>
  30 #include <linux/unistd.h>
  31 #include <linux/user.h>
  32 #include <linux/delay.h>
  33 #include <linux/reboot.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kallsyms.h>
  36 #include <linux/init.h>
  37 #include <linux/cpu.h>
  38 #include <linux/elfcore.h>
  39 #include <linux/pm.h>
  40 #include <linux/tick.h>
  41 #include <linux/utsname.h>
  42 #include <linux/uaccess.h>
  43 #include <linux/random.h>
  44 #include <linux/hw_breakpoint.h>
  45 #include <linux/personality.h>
  46 #include <linux/notifier.h>
  47 #include <trace/events/power.h>
  48
  49 #include <asm/alternative.h>
  50 #include <asm/compat.h>
  51 #include <asm/cacheflush.h>
  52 #include <asm/fpsimd.h>
  53 #include <asm/mmu_context.h>
  54 #include <asm/processor.h>
  55 #include <asm/stacktrace.h>
  56
  57 #ifdef CONFIG_CC_STACKPROTECTOR
  58 #include <linux/stackprotector.h>
  59 unsigned long __stack_chk_guard __read_mostly;
  60 EXPORT_SYMBOL(__stack_chk_guard);
  61 #endif
  62
  63 /*
  64  * Function pointers to optional machine specific functions
  65  */
  66 void (*pm_power_off)(void);
  67 EXPORT_SYMBOL_GPL(pm_power_off);
  68
  69 void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
  70
  71 /*
  72  * This is our default idle handler.
  73  */
  74 void arch_cpu_idle(void)
  75 {
  76         /*
  77          * This should do all the clock switching and wait for interrupt
  78          * tricks
  79          */
  80         trace_cpu_idle_rcuidle(1, smp_processor_id());
  81         cpu_do_idle();
  82         local_irq_enable();
  83         trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
  84 }
  85
  86 #ifdef CONFIG_HOTPLUG_CPU
  87 void arch_cpu_idle_dead(void)
  88 {
  89        cpu_die();
  90 }
  91 #endif
  92
  93 /*
  94  * Called by kexec, immediately prior to machine_kexec().
  95  *
  96  * This must completely disable all secondary CPUs; simply causing those CPUs
  97  * to execute e.g. a RAM-based pin loop is not sufficient. This allows the
  98  * kexec'd kernel to use any and all RAM as it sees fit, without having to
  99  * avoid any code or data used by any SW CPU pin loop. The CPU hotplug
 100  * functionality embodied in disable_nonboot_cpus() to achieve this.
 101  */
 102 void machine_shutdown(void)
 103 {
 104         disable_nonboot_cpus();
 105 }
 106
 107 /*
 108  * Halting simply requires that the secondary CPUs stop performing any
 109  * activity (executing tasks, handling interrupts). smp_send_stop()
 110  * achieves this.
 111  */
 112 void machine_halt(void)
 113 {
 114         local_irq_disable();
 115         smp_send_stop();
 116         while (1);
 117 }
 118
 119 /*
 120  * Power-off simply requires that the secondary CPUs stop performing any
 121  * activity (executing tasks, handling interrupts). smp_send_stop()
 122  * achieves this. When the system power is turned off, it will take all CPUs
 123  * with it.
 124  */
 125 void machine_power_off(void)
 126 {
 127         local_irq_disable();
 128         smp_send_stop();
 129         if (pm_power_off)
 130                 pm_power_off();
 131 }
 132
 133 /*
 134  * Restart requires that the secondary CPUs stop performing any activity
 135  * while the primary CPU resets the system. Systems with multiple CPUs must
 136  * provide a HW restart implementation, to ensure that all CPUs reset at once.
 137  * This is required so that any code running after reset on the primary CPU
 138  * doesn't have to co-ordinate with other CPUs to ensure they aren't still
 139  * executing pre-reset code, and using RAM that the primary CPU's code wishes
 140  * to use. Implementing such co-ordination would be essentially impossible.
 141  */
 142 void machine_restart(char *cmd)
 143 {
 144         /* Disable interrupts first */
 145         local_irq_disable();
 146         smp_send_stop();
 147
 148         /*
 149          * UpdateCapsule() depends on the system being reset via
 150          * ResetSystem().
 151          */
 152         if (efi_enabled(EFI_RUNTIME_SERVICES))
 153                 efi_reboot(reboot_mode, NULL);
 154
 155         /* Now call the architecture specific reboot code. */
 156         if (arm_pm_restart)
 157                 arm_pm_restart(reboot_mode, cmd);
 158         else
 159                 do_kernel_restart(cmd);
 160
 161         /*
 162          * Whoops - the architecture was unable to reboot.
 163          */
 164         printk("Reboot failed -- System halted\n");
 165         while (1);
 166 }
 167
 168 void __show_regs(struct pt_regs *regs)
 169 {
 170         int i, top_reg;
 171         u64 lr, sp;
 172
 173         if (compat_user_mode(regs)) {
 174                 lr = regs->compat_lr;
 175                 sp = regs->compat_sp;
 176                 top_reg = 12;
 177         } else {
 178                 lr = regs->regs[30];
 179                 sp = regs->sp;
 180                 top_reg = 29;
 181         }
 182
 183         show_regs_print_info(KERN_DEFAULT);
 184         print_symbol("PC is at %s\n", instruction_pointer(regs));
 185         print_symbol("LR is at %s\n", lr);
 186         printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n",
 187                regs->pc, lr, regs->pstate);
 188         printk("sp : %016llx\n", sp);
 189         for (i = top_reg; i >= 0; i--) {
 190                 printk("x%-2d: %016llx ", i, regs->regs[i]);
 191                 if (i % 2 == 0)
 192                         printk("\n");
 193         }
 194         printk("\n");
 195 }
 196
 197 void show_regs(struct pt_regs * regs)
 198 {
 199         printk("\n");
 200         __show_regs(regs);
 201 }
 202
 203 /*
 204  * Free current thread data structures etc..
 205  */
 206 void exit_thread(void)
 207 {
 208 }
 209
 210 static void tls_thread_flush(void)
 211 {
 212         asm ("msr tpidr_el0, xzr");
 213
 214         if (is_compat_task()) {
 215                 current->thread.tp_value = 0;
 216
 217                 /*
 218                  * We need to ensure ordering between the shadow state and the
 219                  * hardware state, so that we don't corrupt the hardware state
 220                  * with a stale shadow state during context switch.
 221                  */
 222                 barrier();
 223                 asm ("msr tpidrro_el0, xzr");
 224         }
 225 }
 226
 227 void flush_thread(void)
 228 {
 229         fpsimd_flush_thread();
 230         tls_thread_flush();
 231         flush_ptrace_hw_breakpoint(current);
 232 }
 233
 234 void release_thread(struct task_struct *dead_task)
 235 {
 236 }
 237
 238 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
 239 {
 240         if (current->mm)
 241                 fpsimd_preserve_current_state();
 242         *dst = *src;
 243         return 0;
 244 }
 245
 246 asmlinkage void ret_from_fork(void) asm("ret_from_fork");
 247
 248 int copy_thread(unsigned long clone_flags, unsigned long stack_start,
 249                 unsigned long stk_sz, struct task_struct *p)
 250 {
 251         struct pt_regs *childregs = task_pt_regs(p);
 252
 253         memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context));
 254
 255         if (likely(!(p->flags & PF_KTHREAD))) {
 256                 *childregs = *current_pt_regs();
 257                 childregs->regs[0] = 0;
 258
 259                 /*
 260                  * Read the current TLS pointer from tpidr_el0 as it may be
 261                  * out-of-sync with the saved value.
 262                  */
 263                 asm("mrs %0, tpidr_el0" : "=r" (*task_user_tls(p)));
 264
 265                 if (stack_start) {
 266                         if (is_compat_thread(task_thread_info(p)))
 267                                 childregs->compat_sp = stack_start;
 268                         /* 16-byte aligned stack mandatory on AArch64 */
 269                         else if (stack_start & 15)
 270                                 return -EINVAL;
 271                         else
 272                                 childregs->sp = stack_start;
 273                 }
 274
 275                 /*
 276                  * If a TLS pointer was passed to clone (4th argument), use it
 277                  * for the new thread.
 278                  */
 279                 if (clone_flags & CLONE_SETTLS)
 280                         p->thread.tp_value = childregs->regs[3];
 281         } else {
 282                 memset(childregs, 0, sizeof(struct pt_regs));
 283                 childregs->pstate = PSR_MODE_EL1h;
 284                 if (IS_ENABLED(CONFIG_ARM64_UAO) &&
 285                     cpus_have_cap(ARM64_HAS_UAO))
 286                         childregs->pstate |= PSR_UAO_BIT;
 287                 p->thread.cpu_context.x19 = stack_start;
 288                 p->thread.cpu_context.x20 = stk_sz;
 289         }
 290         p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
 291         p->thread.cpu_context.sp = (unsigned long)childregs;
 292
 293         ptrace_hw_copy_thread(p);
 294
 295         return 0;
 296 }
 297
 298 static void tls_thread_switch(struct task_struct *next)
 299 {
 300         unsigned long tpidr, tpidrro;
 301
 302         asm("mrs %0, tpidr_el0" : "=r" (tpidr));
 303         *task_user_tls(current) = tpidr;
 304
 305         tpidr = *task_user_tls(next);
 306         tpidrro = is_compat_thread(task_thread_info(next)) ?
 307                   next->thread.tp_value : 0;
 308
 309         asm(
 310         "       msr     tpidr_el0, %0\n"
 311         "       msr     tpidrro_el0, %1"
 312         : : "r" (tpidr), "r" (tpidrro));
 313 }
 314
 315 /* Restore the UAO state depending on next's addr_limit */
 316 static void uao_thread_switch(struct task_struct *next)
 317 {
 318         if (IS_ENABLED(CONFIG_ARM64_UAO)) {
 319                 if (task_thread_info(next)->addr_limit == KERNEL_DS)
 320                         asm(ALTERNATIVE("nop", SET_PSTATE_UAO(1), ARM64_HAS_UAO));
 321                 else
 322                         asm(ALTERNATIVE("nop", SET_PSTATE_UAO(0), ARM64_HAS_UAO));
 323         }
 324 }
 325
 326 /*
 327  * Thread switching.
 328  */
 329 struct task_struct *__switch_to(struct task_struct *prev,
 330                                 struct task_struct *next)
 331 {
 332         struct task_struct *last;
 333
 334         fpsimd_thread_switch(next);
 335         tls_thread_switch(next);
 336         hw_breakpoint_thread_switch(next);
 337         contextidr_thread_switch(next);
 338         uao_thread_switch(next);
 339
 340         /*
 341          * Complete any pending TLB or cache maintenance on this CPU in case
 342          * the thread migrates to a different CPU.
 343          */
 344         dsb(ish);
 345
 346         /* the actual thread switch */
 347         last = cpu_switch_to(prev, next);
 348
 349         return last;
 350 }
 351
 352 unsigned long get_wchan(struct task_struct *p)
 353 {
 354         struct stackframe frame;
 355         unsigned long stack_page;
 356         int count = 0;
 357         if (!p || p == current || p->state == TASK_RUNNING)
 358                 return 0;
 359
 360         frame.fp = thread_saved_fp(p);
 361         frame.sp = thread_saved_sp(p);
 362         frame.pc = thread_saved_pc(p);
 363 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
 364         frame.graph = p->curr_ret_stack;
 365 #endif
 366         stack_page = (unsigned long)task_stack_page(p);
 367         do {
 368                 if (frame.sp < stack_page ||
 369                     frame.sp >= stack_page + THREAD_SIZE ||
 370                     unwind_frame(p, &frame))
 371                         return 0;
 372                 if (!in_sched_functions(frame.pc))
 373                         return frame.pc;
 374         } while (count ++ < 16);
 375         return 0;
 376 }
 377
 378 unsigned long arch_align_stack(unsigned long sp)
 379 {
 380         if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
 381                 sp -= get_random_int() & ~PAGE_MASK;
 382         return sp & ~0xf;
 383 }
 384
 385 static unsigned long randomize_base(unsigned long base)
 386 {
 387         unsigned long range_end = base + (STACK_RND_MASK << PAGE_SHIFT) + 1;
 388         return randomize_range(base, range_end, 0) ? : base;
 389 }
 390
 391 unsigned long arch_randomize_brk(struct mm_struct *mm)
 392 {
 393         return randomize_base(mm->brk);
 394 }