h8300: Add <asm/hash.h>
[deliverable/linux.git] / arch / m68k / Kconfig.cpu
1 comment "Processor Type"
2
3 choice
4 prompt "CPU family support"
5 default M68KCLASSIC if MMU
6 default COLDFIRE if !MMU
7 help
8 The Freescale (was Motorola) M68K family of processors implements
9 the full 68000 processor instruction set.
10 The Freescale ColdFire family of processors is a modern derivative
11 of the 68000 processor family. They are mainly targeted at embedded
12 applications, and are all System-On-Chip (SOC) devices, as opposed
13 to stand alone CPUs. They implement a subset of the original 68000
14 processor instruction set.
15 If you anticipate running this kernel on a computer with a classic
16 MC68xxx processor, select M68KCLASSIC.
17 If you anticipate running this kernel on a computer with a ColdFire
18 processor, select COLDFIRE.
19
20 config M68KCLASSIC
21 bool "Classic M68K CPU family support"
22
23 config COLDFIRE
24 bool "Coldfire CPU family support"
25 select ARCH_REQUIRE_GPIOLIB
26 select ARCH_HAVE_CUSTOM_GPIO_H
27 select CPU_HAS_NO_BITFIELDS
28 select CPU_HAS_NO_MULDIV64
29 select GENERIC_CSUM
30 select HAVE_CLK
31
32 endchoice
33
34 if M68KCLASSIC
35
36 config M68000
37 bool "MC68000"
38 depends on !MMU
39 select CPU_HAS_NO_BITFIELDS
40 select CPU_HAS_NO_MULDIV64
41 select CPU_HAS_NO_UNALIGNED
42 select GENERIC_CSUM
43 select HAVE_ARCH_HASH
44 help
45 The Freescale (was Motorola) 68000 CPU is the first generation of
46 the well known M68K family of processors. The CPU core as well as
47 being available as a stand alone CPU was also used in many
48 System-On-Chip devices (eg 68328, 68302, etc). It does not contain
49 a paging MMU.
50
51 config MCPU32
52 bool
53 select CPU_HAS_NO_BITFIELDS
54 select CPU_HAS_NO_UNALIGNED
55 help
56 The Freescale (was then Motorola) CPU32 is a CPU core that is
57 based on the 68020 processor. For the most part it is used in
58 System-On-Chip parts, and does not contain a paging MMU.
59
60 config M68020
61 bool "68020 support"
62 depends on MMU
63 select CPU_HAS_ADDRESS_SPACES
64 help
65 If you anticipate running this kernel on a computer with a MC68020
66 processor, say Y. Otherwise, say N. Note that the 68020 requires a
67 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
68 Sun 3, which provides its own version.
69
70 config M68030
71 bool "68030 support"
72 depends on MMU && !MMU_SUN3
73 select CPU_HAS_ADDRESS_SPACES
74 help
75 If you anticipate running this kernel on a computer with a MC68030
76 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
77 work, as it does not include an MMU (Memory Management Unit).
78
79 config M68040
80 bool "68040 support"
81 depends on MMU && !MMU_SUN3
82 select CPU_HAS_ADDRESS_SPACES
83 help
84 If you anticipate running this kernel on a computer with a MC68LC040
85 or MC68040 processor, say Y. Otherwise, say N. Note that an
86 MC68EC040 will not work, as it does not include an MMU (Memory
87 Management Unit).
88
89 config M68060
90 bool "68060 support"
91 depends on MMU && !MMU_SUN3
92 select CPU_HAS_ADDRESS_SPACES
93 help
94 If you anticipate running this kernel on a computer with a MC68060
95 processor, say Y. Otherwise, say N.
96
97 config M68328
98 bool "MC68328"
99 depends on !MMU
100 select M68000
101 help
102 Motorola 68328 processor support.
103
104 config M68EZ328
105 bool "MC68EZ328"
106 depends on !MMU
107 select M68000
108 help
109 Motorola 68EX328 processor support.
110
111 config M68VZ328
112 bool "MC68VZ328"
113 depends on !MMU
114 select M68000
115 help
116 Motorola 68VZ328 processor support.
117
118 endif # M68KCLASSIC
119
120 if COLDFIRE
121
122 choice
123 prompt "ColdFire SoC type"
124 default M520x
125 help
126 Select the type of ColdFire System-on-Chip (SoC) that you want
127 to build for.
128
129 config M5206
130 bool "MCF5206"
131 depends on !MMU
132 select COLDFIRE_SW_A7
133 select HAVE_MBAR
134 help
135 Motorola ColdFire 5206 processor support.
136
137 config M5206e
138 bool "MCF5206e"
139 depends on !MMU
140 select COLDFIRE_SW_A7
141 select HAVE_MBAR
142 help
143 Motorola ColdFire 5206e processor support.
144
145 config M520x
146 bool "MCF520x"
147 depends on !MMU
148 select GENERIC_CLOCKEVENTS
149 select HAVE_CACHE_SPLIT
150 help
151 Freescale Coldfire 5207/5208 processor support.
152
153 config M523x
154 bool "MCF523x"
155 depends on !MMU
156 select GENERIC_CLOCKEVENTS
157 select HAVE_CACHE_SPLIT
158 select HAVE_IPSBAR
159 help
160 Freescale Coldfire 5230/1/2/4/5 processor support
161
162 config M5249
163 bool "MCF5249"
164 depends on !MMU
165 select COLDFIRE_SW_A7
166 select HAVE_MBAR
167 help
168 Motorola ColdFire 5249 processor support.
169
170 config M525x
171 bool "MCF525x"
172 depends on !MMU
173 select COLDFIRE_SW_A7
174 select HAVE_MBAR
175 help
176 Freescale (Motorola) Coldfire 5251/5253 processor support.
177
178 config M5271
179 bool "MCF5271"
180 depends on !MMU
181 select M527x
182 select HAVE_CACHE_SPLIT
183 select HAVE_IPSBAR
184 select GENERIC_CLOCKEVENTS
185 help
186 Freescale (Motorola) ColdFire 5270/5271 processor support.
187
188 config M5272
189 bool "MCF5272"
190 depends on !MMU
191 select COLDFIRE_SW_A7
192 select HAVE_MBAR
193 help
194 Motorola ColdFire 5272 processor support.
195
196 config M5275
197 bool "MCF5275"
198 depends on !MMU
199 select M527x
200 select HAVE_CACHE_SPLIT
201 select HAVE_IPSBAR
202 select GENERIC_CLOCKEVENTS
203 help
204 Freescale (Motorola) ColdFire 5274/5275 processor support.
205
206 config M528x
207 bool "MCF528x"
208 depends on !MMU
209 select GENERIC_CLOCKEVENTS
210 select HAVE_CACHE_SPLIT
211 select HAVE_IPSBAR
212 help
213 Motorola ColdFire 5280/5282 processor support.
214
215 config M5307
216 bool "MCF5307"
217 depends on !MMU
218 select COLDFIRE_SW_A7
219 select HAVE_CACHE_CB
220 select HAVE_MBAR
221 help
222 Motorola ColdFire 5307 processor support.
223
224 config M532x
225 bool "MCF532x"
226 depends on !MMU
227 select M53xx
228 select HAVE_CACHE_CB
229 help
230 Freescale (Motorola) ColdFire 532x processor support.
231
232 config M537x
233 bool "MCF537x"
234 depends on !MMU
235 select M53xx
236 select HAVE_CACHE_CB
237 help
238 Freescale ColdFire 537x processor support.
239
240 config M5407
241 bool "MCF5407"
242 depends on !MMU
243 select COLDFIRE_SW_A7
244 select HAVE_CACHE_CB
245 select HAVE_MBAR
246 help
247 Motorola ColdFire 5407 processor support.
248
249 config M547x
250 bool "MCF547x"
251 select M54xx
252 select MMU_COLDFIRE if MMU
253 select HAVE_CACHE_CB
254 select HAVE_MBAR
255 help
256 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
257
258 config M548x
259 bool "MCF548x"
260 select MMU_COLDFIRE if MMU
261 select M54xx
262 select HAVE_CACHE_CB
263 select HAVE_MBAR
264 help
265 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
266
267 config M5441x
268 bool "MCF5441x"
269 depends on !MMU
270 select GENERIC_CLOCKEVENTS
271 select HAVE_CACHE_CB
272 help
273 Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
274
275 endchoice
276
277 config M527x
278 bool
279
280 config M53xx
281 bool
282
283 config M54xx
284 bool
285
286 endif # COLDFIRE
287
288
289 comment "Processor Specific Options"
290
291 config M68KFPU_EMU
292 bool "Math emulation support"
293 depends on MMU
294 help
295 At some point in the future, this will cause floating-point math
296 instructions to be emulated by the kernel on machines that lack a
297 floating-point math coprocessor. Thrill-seekers and chronically
298 sleep-deprived psychotic hacker types can say Y now, everyone else
299 should probably wait a while.
300
301 config M68KFPU_EMU_EXTRAPREC
302 bool "Math emulation extra precision"
303 depends on M68KFPU_EMU
304 help
305 The fpu uses normally a few bit more during calculations for
306 correct rounding, the emulator can (often) do the same but this
307 extra calculation can cost quite some time, so you can disable
308 it here. The emulator will then "only" calculate with a 64 bit
309 mantissa and round slightly incorrect, what is more than enough
310 for normal usage.
311
312 config M68KFPU_EMU_ONLY
313 bool "Math emulation only kernel"
314 depends on M68KFPU_EMU
315 help
316 This option prevents any floating-point instructions from being
317 compiled into the kernel, thereby the kernel doesn't save any
318 floating point context anymore during task switches, so this
319 kernel will only be usable on machines without a floating-point
320 math coprocessor. This makes the kernel a bit faster as no tests
321 needs to be executed whether a floating-point instruction in the
322 kernel should be executed or not.
323
324 config ADVANCED
325 bool "Advanced configuration options"
326 depends on MMU
327 ---help---
328 This gives you access to some advanced options for the CPU. The
329 defaults should be fine for most users, but these options may make
330 it possible for you to improve performance somewhat if you know what
331 you are doing.
332
333 Note that the answer to this question won't directly affect the
334 kernel: saying N will just cause the configurator to skip all
335 the questions about these options.
336
337 Most users should say N to this question.
338
339 config RMW_INSNS
340 bool "Use read-modify-write instructions"
341 depends on ADVANCED
342 ---help---
343 This allows to use certain instructions that work with indivisible
344 read-modify-write bus cycles. While this is faster than the
345 workaround of disabling interrupts, it can conflict with DMA
346 ( = direct memory access) on many Amiga systems, and it is also said
347 to destabilize other machines. It is very likely that this will
348 cause serious problems on any Amiga or Atari Medusa if set. The only
349 configuration where it should work are 68030-based Ataris, where it
350 apparently improves performance. But you've been warned! Unless you
351 really know what you are doing, say N. Try Y only if you're quite
352 adventurous.
353
354 config SINGLE_MEMORY_CHUNK
355 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
356 depends on MMU
357 default y if SUN3
358 select NEED_MULTIPLE_NODES
359 help
360 Ignore all but the first contiguous chunk of physical memory for VM
361 purposes. This will save a few bytes kernel size and may speed up
362 some operations. Say N if not sure.
363
364 config ARCH_DISCONTIGMEM_ENABLE
365 def_bool MMU && !SINGLE_MEMORY_CHUNK
366
367 config 060_WRITETHROUGH
368 bool "Use write-through caching for 68060 supervisor accesses"
369 depends on ADVANCED && M68060
370 ---help---
371 The 68060 generally uses copyback caching of recently accessed data.
372 Copyback caching means that memory writes will be held in an on-chip
373 cache and only written back to memory some time later. Saying Y
374 here will force supervisor (kernel) accesses to use writethrough
375 caching. Writethrough caching means that data is written to memory
376 straight away, so that cache and memory data always agree.
377 Writethrough caching is less efficient, but is needed for some
378 drivers on 68060 based systems where the 68060 bus snooping signal
379 is hardwired on. The 53c710 SCSI driver is known to suffer from
380 this problem.
381
382 config M68K_L2_CACHE
383 bool
384 depends on MAC
385 default y
386
387 config NODES_SHIFT
388 int
389 default "3"
390 depends on !SINGLE_MEMORY_CHUNK
391
392 config CPU_HAS_NO_BITFIELDS
393 bool
394
395 config CPU_HAS_NO_MULDIV64
396 bool
397
398 config CPU_HAS_NO_UNALIGNED
399 bool
400
401 config CPU_HAS_ADDRESS_SPACES
402 bool
403
404 config FPU
405 bool
406
407 config COLDFIRE_SW_A7
408 bool
409
410 config HAVE_CACHE_SPLIT
411 bool
412
413 config HAVE_CACHE_CB
414 bool
415
416 config HAVE_MBAR
417 bool
418
419 config HAVE_IPSBAR
420 bool
421
422 config CLOCK_FREQ
423 int "Set the core clock frequency"
424 default "25000000" if M5206
425 default "54000000" if M5206e
426 default "166666666" if M520x
427 default "140000000" if M5249
428 default "150000000" if M527x || M523x
429 default "90000000" if M5307
430 default "50000000" if M5407
431 default "266000000" if M54xx
432 default "66666666"
433 depends on COLDFIRE
434 help
435 Define the CPU clock frequency in use. This is the core clock
436 frequency, it may or may not be the same as the external clock
437 crystal fitted to your board. Some processors have an internal
438 PLL and can have their frequency programmed at run time, others
439 use internal dividers. In general the kernel won't setup a PLL
440 if it is fitted (there are some exceptions). This value will be
441 specific to the exact CPU that you are using.
442
443 config OLDMASK
444 bool "Old mask 5307 (1H55J) silicon"
445 depends on M5307
446 help
447 Build support for the older revision ColdFire 5307 silicon.
448 Specifically this is the 1H55J mask revision.
449
450 if HAVE_CACHE_SPLIT
451 choice
452 prompt "Split Cache Configuration"
453 default CACHE_I
454
455 config CACHE_I
456 bool "Instruction"
457 help
458 Use all of the ColdFire CPU cache memory as an instruction cache.
459
460 config CACHE_D
461 bool "Data"
462 help
463 Use all of the ColdFire CPU cache memory as a data cache.
464
465 config CACHE_BOTH
466 bool "Both"
467 help
468 Split the ColdFire CPU cache, and use half as an instruction cache
469 and half as a data cache.
470 endchoice
471 endif
472
473 if HAVE_CACHE_CB
474 choice
475 prompt "Data cache mode"
476 default CACHE_WRITETHRU
477
478 config CACHE_WRITETHRU
479 bool "Write-through"
480 help
481 The ColdFire CPU cache is set into Write-through mode.
482
483 config CACHE_COPYBACK
484 bool "Copy-back"
485 help
486 The ColdFire CPU cache is set into Copy-back mode.
487 endchoice
488 endif
489
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