MIPS: KVM: Add KScratch registers
[deliverable/linux.git] / arch / mips / kvm / trap_emul.c
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * KVM/MIPS: Deliver/Emulate exceptions to the guest kernel
7 *
8 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
9 * Authors: Sanjay Lal <sanjayl@kymasys.com>
10 */
11
12 #include <linux/errno.h>
13 #include <linux/err.h>
14 #include <linux/module.h>
15 #include <linux/vmalloc.h>
16
17 #include <linux/kvm_host.h>
18
19 #include "interrupt.h"
20
21 static gpa_t kvm_trap_emul_gva_to_gpa_cb(gva_t gva)
22 {
23 gpa_t gpa;
24 gva_t kseg = KSEGX(gva);
25
26 if ((kseg == CKSEG0) || (kseg == CKSEG1))
27 gpa = CPHYSADDR(gva);
28 else {
29 kvm_err("%s: cannot find GPA for GVA: %#lx\n", __func__, gva);
30 kvm_mips_dump_host_tlbs();
31 gpa = KVM_INVALID_ADDR;
32 }
33
34 kvm_debug("%s: gva %#lx, gpa: %#llx\n", __func__, gva, gpa);
35
36 return gpa;
37 }
38
39 static int kvm_trap_emul_handle_cop_unusable(struct kvm_vcpu *vcpu)
40 {
41 struct mips_coproc *cop0 = vcpu->arch.cop0;
42 struct kvm_run *run = vcpu->run;
43 u32 __user *opc = (u32 __user *) vcpu->arch.pc;
44 u32 cause = vcpu->arch.host_cp0_cause;
45 enum emulation_result er = EMULATE_DONE;
46 int ret = RESUME_GUEST;
47
48 if (((cause & CAUSEF_CE) >> CAUSEB_CE) == 1) {
49 /* FPU Unusable */
50 if (!kvm_mips_guest_has_fpu(&vcpu->arch) ||
51 (kvm_read_c0_guest_status(cop0) & ST0_CU1) == 0) {
52 /*
53 * Unusable/no FPU in guest:
54 * deliver guest COP1 Unusable Exception
55 */
56 er = kvm_mips_emulate_fpu_exc(cause, opc, run, vcpu);
57 } else {
58 /* Restore FPU state */
59 kvm_own_fpu(vcpu);
60 er = EMULATE_DONE;
61 }
62 } else {
63 er = kvm_mips_emulate_inst(cause, opc, run, vcpu);
64 }
65
66 switch (er) {
67 case EMULATE_DONE:
68 ret = RESUME_GUEST;
69 break;
70
71 case EMULATE_FAIL:
72 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
73 ret = RESUME_HOST;
74 break;
75
76 case EMULATE_WAIT:
77 run->exit_reason = KVM_EXIT_INTR;
78 ret = RESUME_HOST;
79 break;
80
81 default:
82 BUG();
83 }
84 return ret;
85 }
86
87 static int kvm_trap_emul_handle_tlb_mod(struct kvm_vcpu *vcpu)
88 {
89 struct kvm_run *run = vcpu->run;
90 u32 __user *opc = (u32 __user *) vcpu->arch.pc;
91 unsigned long badvaddr = vcpu->arch.host_cp0_badvaddr;
92 u32 cause = vcpu->arch.host_cp0_cause;
93 enum emulation_result er = EMULATE_DONE;
94 int ret = RESUME_GUEST;
95
96 if (KVM_GUEST_KSEGX(badvaddr) < KVM_GUEST_KSEG0
97 || KVM_GUEST_KSEGX(badvaddr) == KVM_GUEST_KSEG23) {
98 kvm_debug("USER/KSEG23 ADDR TLB MOD fault: cause %#x, PC: %p, BadVaddr: %#lx\n",
99 cause, opc, badvaddr);
100 er = kvm_mips_handle_tlbmod(cause, opc, run, vcpu);
101
102 if (er == EMULATE_DONE)
103 ret = RESUME_GUEST;
104 else {
105 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
106 ret = RESUME_HOST;
107 }
108 } else if (KVM_GUEST_KSEGX(badvaddr) == KVM_GUEST_KSEG0) {
109 /*
110 * XXXKYMA: The guest kernel does not expect to get this fault
111 * when we are not using HIGHMEM. Need to address this in a
112 * HIGHMEM kernel
113 */
114 kvm_err("TLB MOD fault not handled, cause %#x, PC: %p, BadVaddr: %#lx\n",
115 cause, opc, badvaddr);
116 kvm_mips_dump_host_tlbs();
117 kvm_arch_vcpu_dump_regs(vcpu);
118 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
119 ret = RESUME_HOST;
120 } else {
121 kvm_err("Illegal TLB Mod fault address , cause %#x, PC: %p, BadVaddr: %#lx\n",
122 cause, opc, badvaddr);
123 kvm_mips_dump_host_tlbs();
124 kvm_arch_vcpu_dump_regs(vcpu);
125 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
126 ret = RESUME_HOST;
127 }
128 return ret;
129 }
130
131 static int kvm_trap_emul_handle_tlb_miss(struct kvm_vcpu *vcpu, bool store)
132 {
133 struct kvm_run *run = vcpu->run;
134 u32 __user *opc = (u32 __user *) vcpu->arch.pc;
135 unsigned long badvaddr = vcpu->arch.host_cp0_badvaddr;
136 u32 cause = vcpu->arch.host_cp0_cause;
137 enum emulation_result er = EMULATE_DONE;
138 int ret = RESUME_GUEST;
139
140 if (((badvaddr & PAGE_MASK) == KVM_GUEST_COMMPAGE_ADDR)
141 && KVM_GUEST_KERNEL_MODE(vcpu)) {
142 if (kvm_mips_handle_commpage_tlb_fault(badvaddr, vcpu) < 0) {
143 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
144 ret = RESUME_HOST;
145 }
146 } else if (KVM_GUEST_KSEGX(badvaddr) < KVM_GUEST_KSEG0
147 || KVM_GUEST_KSEGX(badvaddr) == KVM_GUEST_KSEG23) {
148 kvm_debug("USER ADDR TLB %s fault: cause %#x, PC: %p, BadVaddr: %#lx\n",
149 store ? "ST" : "LD", cause, opc, badvaddr);
150
151 /*
152 * User Address (UA) fault, this could happen if
153 * (1) TLB entry not present/valid in both Guest and shadow host
154 * TLBs, in this case we pass on the fault to the guest
155 * kernel and let it handle it.
156 * (2) TLB entry is present in the Guest TLB but not in the
157 * shadow, in this case we inject the TLB from the Guest TLB
158 * into the shadow host TLB
159 */
160
161 er = kvm_mips_handle_tlbmiss(cause, opc, run, vcpu);
162 if (er == EMULATE_DONE)
163 ret = RESUME_GUEST;
164 else {
165 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
166 ret = RESUME_HOST;
167 }
168 } else if (KVM_GUEST_KSEGX(badvaddr) == KVM_GUEST_KSEG0) {
169 /*
170 * All KSEG0 faults are handled by KVM, as the guest kernel does
171 * not expect to ever get them
172 */
173 if (kvm_mips_handle_kseg0_tlb_fault
174 (vcpu->arch.host_cp0_badvaddr, vcpu) < 0) {
175 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
176 ret = RESUME_HOST;
177 }
178 } else {
179 kvm_err("Illegal TLB %s fault address , cause %#x, PC: %p, BadVaddr: %#lx\n",
180 store ? "ST" : "LD", cause, opc, badvaddr);
181 kvm_mips_dump_host_tlbs();
182 kvm_arch_vcpu_dump_regs(vcpu);
183 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
184 ret = RESUME_HOST;
185 }
186 return ret;
187 }
188
189 static int kvm_trap_emul_handle_tlb_st_miss(struct kvm_vcpu *vcpu)
190 {
191 return kvm_trap_emul_handle_tlb_miss(vcpu, true);
192 }
193
194 static int kvm_trap_emul_handle_tlb_ld_miss(struct kvm_vcpu *vcpu)
195 {
196 return kvm_trap_emul_handle_tlb_miss(vcpu, false);
197 }
198
199 static int kvm_trap_emul_handle_addr_err_st(struct kvm_vcpu *vcpu)
200 {
201 struct kvm_run *run = vcpu->run;
202 u32 __user *opc = (u32 __user *) vcpu->arch.pc;
203 unsigned long badvaddr = vcpu->arch.host_cp0_badvaddr;
204 u32 cause = vcpu->arch.host_cp0_cause;
205 enum emulation_result er = EMULATE_DONE;
206 int ret = RESUME_GUEST;
207
208 if (KVM_GUEST_KERNEL_MODE(vcpu)
209 && (KSEGX(badvaddr) == CKSEG0 || KSEGX(badvaddr) == CKSEG1)) {
210 kvm_debug("Emulate Store to MMIO space\n");
211 er = kvm_mips_emulate_inst(cause, opc, run, vcpu);
212 if (er == EMULATE_FAIL) {
213 kvm_err("Emulate Store to MMIO space failed\n");
214 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
215 ret = RESUME_HOST;
216 } else {
217 run->exit_reason = KVM_EXIT_MMIO;
218 ret = RESUME_HOST;
219 }
220 } else {
221 kvm_err("Address Error (STORE): cause %#x, PC: %p, BadVaddr: %#lx\n",
222 cause, opc, badvaddr);
223 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
224 ret = RESUME_HOST;
225 }
226 return ret;
227 }
228
229 static int kvm_trap_emul_handle_addr_err_ld(struct kvm_vcpu *vcpu)
230 {
231 struct kvm_run *run = vcpu->run;
232 u32 __user *opc = (u32 __user *) vcpu->arch.pc;
233 unsigned long badvaddr = vcpu->arch.host_cp0_badvaddr;
234 u32 cause = vcpu->arch.host_cp0_cause;
235 enum emulation_result er = EMULATE_DONE;
236 int ret = RESUME_GUEST;
237
238 if (KSEGX(badvaddr) == CKSEG0 || KSEGX(badvaddr) == CKSEG1) {
239 kvm_debug("Emulate Load from MMIO space @ %#lx\n", badvaddr);
240 er = kvm_mips_emulate_inst(cause, opc, run, vcpu);
241 if (er == EMULATE_FAIL) {
242 kvm_err("Emulate Load from MMIO space failed\n");
243 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
244 ret = RESUME_HOST;
245 } else {
246 run->exit_reason = KVM_EXIT_MMIO;
247 ret = RESUME_HOST;
248 }
249 } else {
250 kvm_err("Address Error (LOAD): cause %#x, PC: %p, BadVaddr: %#lx\n",
251 cause, opc, badvaddr);
252 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
253 ret = RESUME_HOST;
254 er = EMULATE_FAIL;
255 }
256 return ret;
257 }
258
259 static int kvm_trap_emul_handle_syscall(struct kvm_vcpu *vcpu)
260 {
261 struct kvm_run *run = vcpu->run;
262 u32 __user *opc = (u32 __user *) vcpu->arch.pc;
263 u32 cause = vcpu->arch.host_cp0_cause;
264 enum emulation_result er = EMULATE_DONE;
265 int ret = RESUME_GUEST;
266
267 er = kvm_mips_emulate_syscall(cause, opc, run, vcpu);
268 if (er == EMULATE_DONE)
269 ret = RESUME_GUEST;
270 else {
271 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
272 ret = RESUME_HOST;
273 }
274 return ret;
275 }
276
277 static int kvm_trap_emul_handle_res_inst(struct kvm_vcpu *vcpu)
278 {
279 struct kvm_run *run = vcpu->run;
280 u32 __user *opc = (u32 __user *) vcpu->arch.pc;
281 u32 cause = vcpu->arch.host_cp0_cause;
282 enum emulation_result er = EMULATE_DONE;
283 int ret = RESUME_GUEST;
284
285 er = kvm_mips_handle_ri(cause, opc, run, vcpu);
286 if (er == EMULATE_DONE)
287 ret = RESUME_GUEST;
288 else {
289 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
290 ret = RESUME_HOST;
291 }
292 return ret;
293 }
294
295 static int kvm_trap_emul_handle_break(struct kvm_vcpu *vcpu)
296 {
297 struct kvm_run *run = vcpu->run;
298 u32 __user *opc = (u32 __user *) vcpu->arch.pc;
299 u32 cause = vcpu->arch.host_cp0_cause;
300 enum emulation_result er = EMULATE_DONE;
301 int ret = RESUME_GUEST;
302
303 er = kvm_mips_emulate_bp_exc(cause, opc, run, vcpu);
304 if (er == EMULATE_DONE)
305 ret = RESUME_GUEST;
306 else {
307 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
308 ret = RESUME_HOST;
309 }
310 return ret;
311 }
312
313 static int kvm_trap_emul_handle_trap(struct kvm_vcpu *vcpu)
314 {
315 struct kvm_run *run = vcpu->run;
316 u32 __user *opc = (u32 __user *)vcpu->arch.pc;
317 u32 cause = vcpu->arch.host_cp0_cause;
318 enum emulation_result er = EMULATE_DONE;
319 int ret = RESUME_GUEST;
320
321 er = kvm_mips_emulate_trap_exc(cause, opc, run, vcpu);
322 if (er == EMULATE_DONE) {
323 ret = RESUME_GUEST;
324 } else {
325 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
326 ret = RESUME_HOST;
327 }
328 return ret;
329 }
330
331 static int kvm_trap_emul_handle_msa_fpe(struct kvm_vcpu *vcpu)
332 {
333 struct kvm_run *run = vcpu->run;
334 u32 __user *opc = (u32 __user *)vcpu->arch.pc;
335 u32 cause = vcpu->arch.host_cp0_cause;
336 enum emulation_result er = EMULATE_DONE;
337 int ret = RESUME_GUEST;
338
339 er = kvm_mips_emulate_msafpe_exc(cause, opc, run, vcpu);
340 if (er == EMULATE_DONE) {
341 ret = RESUME_GUEST;
342 } else {
343 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
344 ret = RESUME_HOST;
345 }
346 return ret;
347 }
348
349 static int kvm_trap_emul_handle_fpe(struct kvm_vcpu *vcpu)
350 {
351 struct kvm_run *run = vcpu->run;
352 u32 __user *opc = (u32 __user *)vcpu->arch.pc;
353 u32 cause = vcpu->arch.host_cp0_cause;
354 enum emulation_result er = EMULATE_DONE;
355 int ret = RESUME_GUEST;
356
357 er = kvm_mips_emulate_fpe_exc(cause, opc, run, vcpu);
358 if (er == EMULATE_DONE) {
359 ret = RESUME_GUEST;
360 } else {
361 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
362 ret = RESUME_HOST;
363 }
364 return ret;
365 }
366
367 /**
368 * kvm_trap_emul_handle_msa_disabled() - Guest used MSA while disabled in root.
369 * @vcpu: Virtual CPU context.
370 *
371 * Handle when the guest attempts to use MSA when it is disabled.
372 */
373 static int kvm_trap_emul_handle_msa_disabled(struct kvm_vcpu *vcpu)
374 {
375 struct mips_coproc *cop0 = vcpu->arch.cop0;
376 struct kvm_run *run = vcpu->run;
377 u32 __user *opc = (u32 __user *) vcpu->arch.pc;
378 u32 cause = vcpu->arch.host_cp0_cause;
379 enum emulation_result er = EMULATE_DONE;
380 int ret = RESUME_GUEST;
381
382 if (!kvm_mips_guest_has_msa(&vcpu->arch) ||
383 (kvm_read_c0_guest_status(cop0) & (ST0_CU1 | ST0_FR)) == ST0_CU1) {
384 /*
385 * No MSA in guest, or FPU enabled and not in FR=1 mode,
386 * guest reserved instruction exception
387 */
388 er = kvm_mips_emulate_ri_exc(cause, opc, run, vcpu);
389 } else if (!(kvm_read_c0_guest_config5(cop0) & MIPS_CONF5_MSAEN)) {
390 /* MSA disabled by guest, guest MSA disabled exception */
391 er = kvm_mips_emulate_msadis_exc(cause, opc, run, vcpu);
392 } else {
393 /* Restore MSA/FPU state */
394 kvm_own_msa(vcpu);
395 er = EMULATE_DONE;
396 }
397
398 switch (er) {
399 case EMULATE_DONE:
400 ret = RESUME_GUEST;
401 break;
402
403 case EMULATE_FAIL:
404 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
405 ret = RESUME_HOST;
406 break;
407
408 default:
409 BUG();
410 }
411 return ret;
412 }
413
414 static int kvm_trap_emul_vm_init(struct kvm *kvm)
415 {
416 return 0;
417 }
418
419 static int kvm_trap_emul_vcpu_init(struct kvm_vcpu *vcpu)
420 {
421 vcpu->arch.kscratch_enabled = 0xfc;
422
423 return 0;
424 }
425
426 static int kvm_trap_emul_vcpu_setup(struct kvm_vcpu *vcpu)
427 {
428 struct mips_coproc *cop0 = vcpu->arch.cop0;
429 u32 config1;
430 int vcpu_id = vcpu->vcpu_id;
431
432 /*
433 * Arch specific stuff, set up config registers properly so that the
434 * guest will come up as expected, for now we simulate a MIPS 24kc
435 */
436 kvm_write_c0_guest_prid(cop0, 0x00019300);
437 /* Have config1, Cacheable, noncoherent, write-back, write allocate */
438 kvm_write_c0_guest_config(cop0, MIPS_CONF_M | (0x3 << CP0C0_K0) |
439 (0x1 << CP0C0_AR) |
440 (MMU_TYPE_R4000 << CP0C0_MT));
441
442 /* Read the cache characteristics from the host Config1 Register */
443 config1 = (read_c0_config1() & ~0x7f);
444
445 /* Set up MMU size */
446 config1 &= ~(0x3f << 25);
447 config1 |= ((KVM_MIPS_GUEST_TLB_SIZE - 1) << 25);
448
449 /* We unset some bits that we aren't emulating */
450 config1 &=
451 ~((1 << CP0C1_C2) | (1 << CP0C1_MD) | (1 << CP0C1_PC) |
452 (1 << CP0C1_WR) | (1 << CP0C1_CA));
453 kvm_write_c0_guest_config1(cop0, config1);
454
455 /* Have config3, no tertiary/secondary caches implemented */
456 kvm_write_c0_guest_config2(cop0, MIPS_CONF_M);
457 /* MIPS_CONF_M | (read_c0_config2() & 0xfff) */
458
459 /* Have config4, UserLocal */
460 kvm_write_c0_guest_config3(cop0, MIPS_CONF_M | MIPS_CONF3_ULRI);
461
462 /* Have config5 */
463 kvm_write_c0_guest_config4(cop0, MIPS_CONF_M);
464
465 /* No config6 */
466 kvm_write_c0_guest_config5(cop0, 0);
467
468 /* Set Wait IE/IXMT Ignore in Config7, IAR, AR */
469 kvm_write_c0_guest_config7(cop0, (MIPS_CONF7_WII) | (1 << 10));
470
471 /*
472 * Setup IntCtl defaults, compatibility mode for timer interrupts (HW5)
473 */
474 kvm_write_c0_guest_intctl(cop0, 0xFC000000);
475
476 /* Put in vcpu id as CPUNum into Ebase Reg to handle SMP Guests */
477 kvm_write_c0_guest_ebase(cop0, KVM_GUEST_KSEG0 |
478 (vcpu_id & MIPS_EBASE_CPUNUM));
479
480 return 0;
481 }
482
483 static unsigned long kvm_trap_emul_num_regs(struct kvm_vcpu *vcpu)
484 {
485 return 0;
486 }
487
488 static int kvm_trap_emul_copy_reg_indices(struct kvm_vcpu *vcpu,
489 u64 __user *indices)
490 {
491 return 0;
492 }
493
494 static int kvm_trap_emul_get_one_reg(struct kvm_vcpu *vcpu,
495 const struct kvm_one_reg *reg,
496 s64 *v)
497 {
498 switch (reg->id) {
499 case KVM_REG_MIPS_CP0_COUNT:
500 *v = kvm_mips_read_count(vcpu);
501 break;
502 case KVM_REG_MIPS_COUNT_CTL:
503 *v = vcpu->arch.count_ctl;
504 break;
505 case KVM_REG_MIPS_COUNT_RESUME:
506 *v = ktime_to_ns(vcpu->arch.count_resume);
507 break;
508 case KVM_REG_MIPS_COUNT_HZ:
509 *v = vcpu->arch.count_hz;
510 break;
511 default:
512 return -EINVAL;
513 }
514 return 0;
515 }
516
517 static int kvm_trap_emul_set_one_reg(struct kvm_vcpu *vcpu,
518 const struct kvm_one_reg *reg,
519 s64 v)
520 {
521 struct mips_coproc *cop0 = vcpu->arch.cop0;
522 int ret = 0;
523 unsigned int cur, change;
524
525 switch (reg->id) {
526 case KVM_REG_MIPS_CP0_COUNT:
527 kvm_mips_write_count(vcpu, v);
528 break;
529 case KVM_REG_MIPS_CP0_COMPARE:
530 kvm_mips_write_compare(vcpu, v, false);
531 break;
532 case KVM_REG_MIPS_CP0_CAUSE:
533 /*
534 * If the timer is stopped or started (DC bit) it must look
535 * atomic with changes to the interrupt pending bits (TI, IRQ5).
536 * A timer interrupt should not happen in between.
537 */
538 if ((kvm_read_c0_guest_cause(cop0) ^ v) & CAUSEF_DC) {
539 if (v & CAUSEF_DC) {
540 /* disable timer first */
541 kvm_mips_count_disable_cause(vcpu);
542 kvm_change_c0_guest_cause(cop0, ~CAUSEF_DC, v);
543 } else {
544 /* enable timer last */
545 kvm_change_c0_guest_cause(cop0, ~CAUSEF_DC, v);
546 kvm_mips_count_enable_cause(vcpu);
547 }
548 } else {
549 kvm_write_c0_guest_cause(cop0, v);
550 }
551 break;
552 case KVM_REG_MIPS_CP0_CONFIG:
553 /* read-only for now */
554 break;
555 case KVM_REG_MIPS_CP0_CONFIG1:
556 cur = kvm_read_c0_guest_config1(cop0);
557 change = (cur ^ v) & kvm_mips_config1_wrmask(vcpu);
558 if (change) {
559 v = cur ^ change;
560 kvm_write_c0_guest_config1(cop0, v);
561 }
562 break;
563 case KVM_REG_MIPS_CP0_CONFIG2:
564 /* read-only for now */
565 break;
566 case KVM_REG_MIPS_CP0_CONFIG3:
567 cur = kvm_read_c0_guest_config3(cop0);
568 change = (cur ^ v) & kvm_mips_config3_wrmask(vcpu);
569 if (change) {
570 v = cur ^ change;
571 kvm_write_c0_guest_config3(cop0, v);
572 }
573 break;
574 case KVM_REG_MIPS_CP0_CONFIG4:
575 cur = kvm_read_c0_guest_config4(cop0);
576 change = (cur ^ v) & kvm_mips_config4_wrmask(vcpu);
577 if (change) {
578 v = cur ^ change;
579 kvm_write_c0_guest_config4(cop0, v);
580 }
581 break;
582 case KVM_REG_MIPS_CP0_CONFIG5:
583 cur = kvm_read_c0_guest_config5(cop0);
584 change = (cur ^ v) & kvm_mips_config5_wrmask(vcpu);
585 if (change) {
586 v = cur ^ change;
587 kvm_write_c0_guest_config5(cop0, v);
588 }
589 break;
590 case KVM_REG_MIPS_COUNT_CTL:
591 ret = kvm_mips_set_count_ctl(vcpu, v);
592 break;
593 case KVM_REG_MIPS_COUNT_RESUME:
594 ret = kvm_mips_set_count_resume(vcpu, v);
595 break;
596 case KVM_REG_MIPS_COUNT_HZ:
597 ret = kvm_mips_set_count_hz(vcpu, v);
598 break;
599 default:
600 return -EINVAL;
601 }
602 return ret;
603 }
604
605 static int kvm_trap_emul_vcpu_get_regs(struct kvm_vcpu *vcpu)
606 {
607 kvm_lose_fpu(vcpu);
608
609 return 0;
610 }
611
612 static int kvm_trap_emul_vcpu_set_regs(struct kvm_vcpu *vcpu)
613 {
614 return 0;
615 }
616
617 static struct kvm_mips_callbacks kvm_trap_emul_callbacks = {
618 /* exit handlers */
619 .handle_cop_unusable = kvm_trap_emul_handle_cop_unusable,
620 .handle_tlb_mod = kvm_trap_emul_handle_tlb_mod,
621 .handle_tlb_st_miss = kvm_trap_emul_handle_tlb_st_miss,
622 .handle_tlb_ld_miss = kvm_trap_emul_handle_tlb_ld_miss,
623 .handle_addr_err_st = kvm_trap_emul_handle_addr_err_st,
624 .handle_addr_err_ld = kvm_trap_emul_handle_addr_err_ld,
625 .handle_syscall = kvm_trap_emul_handle_syscall,
626 .handle_res_inst = kvm_trap_emul_handle_res_inst,
627 .handle_break = kvm_trap_emul_handle_break,
628 .handle_trap = kvm_trap_emul_handle_trap,
629 .handle_msa_fpe = kvm_trap_emul_handle_msa_fpe,
630 .handle_fpe = kvm_trap_emul_handle_fpe,
631 .handle_msa_disabled = kvm_trap_emul_handle_msa_disabled,
632
633 .vm_init = kvm_trap_emul_vm_init,
634 .vcpu_init = kvm_trap_emul_vcpu_init,
635 .vcpu_setup = kvm_trap_emul_vcpu_setup,
636 .gva_to_gpa = kvm_trap_emul_gva_to_gpa_cb,
637 .queue_timer_int = kvm_mips_queue_timer_int_cb,
638 .dequeue_timer_int = kvm_mips_dequeue_timer_int_cb,
639 .queue_io_int = kvm_mips_queue_io_int_cb,
640 .dequeue_io_int = kvm_mips_dequeue_io_int_cb,
641 .irq_deliver = kvm_mips_irq_deliver_cb,
642 .irq_clear = kvm_mips_irq_clear_cb,
643 .num_regs = kvm_trap_emul_num_regs,
644 .copy_reg_indices = kvm_trap_emul_copy_reg_indices,
645 .get_one_reg = kvm_trap_emul_get_one_reg,
646 .set_one_reg = kvm_trap_emul_set_one_reg,
647 .vcpu_get_regs = kvm_trap_emul_vcpu_get_regs,
648 .vcpu_set_regs = kvm_trap_emul_vcpu_set_regs,
649 };
650
651 int kvm_mips_emulation_init(struct kvm_mips_callbacks **install_callbacks)
652 {
653 *install_callbacks = &kvm_trap_emul_callbacks;
654 return 0;
655 }
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