arch/powerpc/include/asm/paca.h

   1 /*
   2  * This control block defines the PACA which defines the processor
   3  * specific data for each logical processor on the system.
   4  * There are some pointers defined that are utilized by PLIC.
   5  *
   6  * C 2001 PPC 64 Team, IBM Corp
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License
  10  * as published by the Free Software Foundation; either version
  11  * 2 of the License, or (at your option) any later version.
  12  */
  13 #ifndef _ASM_POWERPC_PACA_H
  14 #define _ASM_POWERPC_PACA_H
  15 #ifdef __KERNEL__
  16
  17 #ifdef CONFIG_PPC64
  18
  19 #include <linux/string.h>
  20 #include <asm/types.h>
  21 #include <asm/lppaca.h>
  22 #include <asm/mmu.h>
  23 #include <asm/page.h>
  24 #include <asm/exception-64e.h>
  25 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
  26 #include <asm/kvm_book3s_asm.h>
  27 #endif
  28 #include <asm/accounting.h>
  29 #include <asm/hmi.h>
  30
  31 register struct paca_struct *local_paca asm("r13");
  32
  33 #if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
  34 extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */
  35 /*
  36  * Add standard checks that preemption cannot occur when using get_paca():
  37  * otherwise the paca_struct it points to may be the wrong one just after.
  38  */
  39 #define get_paca()      ((void) debug_smp_processor_id(), local_paca)
  40 #else
  41 #define get_paca()      local_paca
  42 #endif
  43
  44 #define get_lppaca()    (get_paca()->lppaca_ptr)
  45 #define get_slb_shadow()        (get_paca()->slb_shadow_ptr)
  46
  47 struct task_struct;
  48
  49 /*
  50  * Defines the layout of the paca.
  51  *
  52  * This structure is not directly accessed by firmware or the service
  53  * processor.
  54  */
  55 struct paca_struct {
  56 #ifdef CONFIG_PPC_BOOK3S
  57         /*
  58          * Because hw_cpu_id, unlike other paca fields, is accessed
  59          * routinely from other CPUs (from the IRQ code), we stick to
  60          * read-only (after boot) fields in the first cacheline to
  61          * avoid cacheline bouncing.
  62          */
  63
  64         struct lppaca *lppaca_ptr;      /* Pointer to LpPaca for PLIC */
  65 #endif /* CONFIG_PPC_BOOK3S */
  66         /*
  67          * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c
  68          * load lock_token and paca_index with a single lwz
  69          * instruction.  They must travel together and be properly
  70          * aligned.
  71          */
  72 #ifdef __BIG_ENDIAN__
  73         u16 lock_token;                 /* Constant 0x8000, used in locks */
  74         u16 paca_index;                 /* Logical processor number */
  75 #else
  76         u16 paca_index;                 /* Logical processor number */
  77         u16 lock_token;                 /* Constant 0x8000, used in locks */
  78 #endif
  79
  80         u64 kernel_toc;                 /* Kernel TOC address */
  81         u64 kernelbase;                 /* Base address of kernel */
  82         u64 kernel_msr;                 /* MSR while running in kernel */
  83         void *emergency_sp;             /* pointer to emergency stack */
  84         u64 data_offset;                /* per cpu data offset */
  85         s16 hw_cpu_id;                  /* Physical processor number */
  86         u8 cpu_start;                   /* At startup, processor spins until */
  87                                         /* this becomes non-zero. */
  88         u8 kexec_state;         /* set when kexec down has irqs off */
  89 #ifdef CONFIG_PPC_STD_MMU_64
  90         struct slb_shadow *slb_shadow_ptr;
  91         struct dtl_entry *dispatch_log;
  92         struct dtl_entry *dispatch_log_end;
  93 #endif /* CONFIG_PPC_STD_MMU_64 */
  94         u64 dscr_default;               /* per-CPU default DSCR */
  95
  96 #ifdef CONFIG_PPC_STD_MMU_64
  97         /*
  98          * Now, starting in cacheline 2, the exception save areas
  99          */
 100         /* used for most interrupts/exceptions */
 101         u64 exgen[13] __attribute__((aligned(0x80)));
 102         u64 exmc[13];           /* used for machine checks */
 103         u64 exslb[13];          /* used for SLB/segment table misses
 104                                  * on the linear mapping */
 105         /* SLB related definitions */
 106         u16 vmalloc_sllp;
 107         u16 slb_cache_ptr;
 108         u32 slb_cache[SLB_CACHE_ENTRIES];
 109 #endif /* CONFIG_PPC_STD_MMU_64 */
 110
 111 #ifdef CONFIG_PPC_BOOK3E
 112         u64 exgen[8] __aligned(0x40);
 113         /* Keep pgd in the same cacheline as the start of extlb */
 114         pgd_t *pgd __aligned(0x40); /* Current PGD */
 115         pgd_t *kernel_pgd;              /* Kernel PGD */
 116
 117         /* Shared by all threads of a core -- points to tcd of first thread */
 118         struct tlb_core_data *tcd_ptr;
 119
 120         /*
 121          * We can have up to 3 levels of reentrancy in the TLB miss handler,
 122          * in each of four exception levels (normal, crit, mcheck, debug).
 123          */
 124         u64 extlb[12][EX_TLB_SIZE / sizeof(u64)];
 125         u64 exmc[8];            /* used for machine checks */
 126         u64 excrit[8];          /* used for crit interrupts */
 127         u64 exdbg[8];           /* used for debug interrupts */
 128
 129         /* Kernel stack pointers for use by special exceptions */
 130         void *mc_kstack;
 131         void *crit_kstack;
 132         void *dbg_kstack;
 133
 134         struct tlb_core_data tcd;
 135 #endif /* CONFIG_PPC_BOOK3E */
 136
 137 #ifdef CONFIG_PPC_BOOK3S
 138         mm_context_id_t mm_ctx_id;
 139 #ifdef CONFIG_PPC_MM_SLICES
 140         u64 mm_ctx_low_slices_psize;
 141         unsigned char mm_ctx_high_slices_psize[SLICE_ARRAY_SIZE];
 142 #else
 143         u16 mm_ctx_user_psize;
 144         u16 mm_ctx_sllp;
 145 #endif
 146 #endif
 147
 148         /*
 149          * then miscellaneous read-write fields
 150          */
 151         struct task_struct *__current;  /* Pointer to current */
 152         u64 kstack;                     /* Saved Kernel stack addr */
 153         u64 stab_rr;                    /* stab/slb round-robin counter */
 154         u64 saved_r1;                   /* r1 save for RTAS calls or PM */
 155         u64 saved_msr;                  /* MSR saved here by enter_rtas */
 156         u16 trap_save;                  /* Used when bad stack is encountered */
 157         u8 soft_enabled;                /* irq soft-enable flag */
 158         u8 irq_happened;                /* irq happened while soft-disabled */
 159         u8 io_sync;                     /* writel() needs spin_unlock sync */
 160         u8 irq_work_pending;            /* IRQ_WORK interrupt while soft-disable */
 161         u8 nap_state_lost;              /* NV GPR values lost in power7_idle */
 162         u64 sprg_vdso;                  /* Saved user-visible sprg */
 163 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 164         u64 tm_scratch;                 /* TM scratch area for reclaim */
 165 #endif
 166
 167 #ifdef CONFIG_PPC_POWERNV
 168         /* Per-core mask tracking idle threads and a lock bit-[L][TTTTTTTT] */
 169         u32 *core_idle_state_ptr;
 170         u8 thread_idle_state;           /* PNV_THREAD_RUNNING/NAP/SLEEP */
 171         /* Mask to indicate thread id in core */
 172         u8 thread_mask;
 173         /* Mask to denote subcore sibling threads */
 174         u8 subcore_sibling_mask;
 175 #endif
 176
 177 #ifdef CONFIG_PPC_BOOK3S_64
 178         /* Exclusive emergency stack pointer for machine check exception. */
 179         void *mc_emergency_sp;
 180         /*
 181          * Flag to check whether we are in machine check early handler
 182          * and already using emergency stack.
 183          */
 184         u16 in_mce;
 185         u8 hmi_event_available;          /* HMI event is available */
 186 #endif
 187
 188         /* Stuff for accurate time accounting */
 189         struct cpu_accounting_data accounting;
 190         u64 stolen_time;                /* TB ticks taken by hypervisor */
 191         u64 dtl_ridx;                   /* read index in dispatch log */
 192         struct dtl_entry *dtl_curr;     /* pointer corresponding to dtl_ridx */
 193
 194 #ifdef CONFIG_KVM_BOOK3S_HANDLER
 195 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
 196         /* We use this to store guest state in */
 197         struct kvmppc_book3s_shadow_vcpu shadow_vcpu;
 198 #endif
 199         struct kvmppc_host_state kvm_hstate;
 200 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 201         /*
 202          * Bitmap for sibling subcore status. See kvm/book3s_hv_ras.c for
 203          * more details
 204          */
 205         struct sibling_subcore_state *sibling_subcore_state;
 206 #endif
 207 #endif
 208 };
 209
 210 #ifdef CONFIG_PPC_BOOK3S
 211 static inline void copy_mm_to_paca(mm_context_t *context)
 212 {
 213         get_paca()->mm_ctx_id = context->id;
 214 #ifdef CONFIG_PPC_MM_SLICES
 215         get_paca()->mm_ctx_low_slices_psize = context->low_slices_psize;
 216         memcpy(&get_paca()->mm_ctx_high_slices_psize,
 217                &context->high_slices_psize, SLICE_ARRAY_SIZE);
 218 #else
 219         get_paca()->mm_ctx_user_psize = context->user_psize;
 220         get_paca()->mm_ctx_sllp = context->sllp;
 221 #endif
 222 }
 223 #else
 224 static inline void copy_mm_to_paca(mm_context_t *context){}
 225 #endif
 226
 227 extern struct paca_struct *paca;
 228 extern void initialise_paca(struct paca_struct *new_paca, int cpu);
 229 extern void setup_paca(struct paca_struct *new_paca);
 230 extern void allocate_pacas(void);
 231 extern void free_unused_pacas(void);
 232
 233 #else /* CONFIG_PPC64 */
 234
 235 static inline void allocate_pacas(void) { };
 236 static inline void free_unused_pacas(void) { };
 237
 238 #endif /* CONFIG_PPC64 */
 239
 240 #endif /* __KERNEL__ */
 241 #endif /* _ASM_POWERPC_PACA_H */