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Merge remote-tracking branch 'xen-tip/linux-next'
[deliverable/linux.git] / arch / s390 / kernel / entry.S
1 /*
2 * S390 low-level entry points.
3 *
4 * Copyright IBM Corp. 1999, 2012
5 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
6 * Hartmut Penner (hp@de.ibm.com),
7 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
8 * Heiko Carstens <heiko.carstens@de.ibm.com>
9 */
10
11 #include <linux/init.h>
12 #include <linux/linkage.h>
13 #include <asm/processor.h>
14 #include <asm/cache.h>
15 #include <asm/errno.h>
16 #include <asm/ptrace.h>
17 #include <asm/thread_info.h>
18 #include <asm/asm-offsets.h>
19 #include <asm/unistd.h>
20 #include <asm/page.h>
21 #include <asm/sigp.h>
22 #include <asm/irq.h>
23 #include <asm/vx-insn.h>
24 #include <asm/setup.h>
25 #include <asm/nmi.h>
26 #include <asm/export.h>
27
28 __PT_R0 = __PT_GPRS
29 __PT_R1 = __PT_GPRS + 8
30 __PT_R2 = __PT_GPRS + 16
31 __PT_R3 = __PT_GPRS + 24
32 __PT_R4 = __PT_GPRS + 32
33 __PT_R5 = __PT_GPRS + 40
34 __PT_R6 = __PT_GPRS + 48
35 __PT_R7 = __PT_GPRS + 56
36 __PT_R8 = __PT_GPRS + 64
37 __PT_R9 = __PT_GPRS + 72
38 __PT_R10 = __PT_GPRS + 80
39 __PT_R11 = __PT_GPRS + 88
40 __PT_R12 = __PT_GPRS + 96
41 __PT_R13 = __PT_GPRS + 104
42 __PT_R14 = __PT_GPRS + 112
43 __PT_R15 = __PT_GPRS + 120
44
45 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
46 STACK_SIZE = 1 << STACK_SHIFT
47 STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
48
49 _TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
50 _TIF_UPROBE)
51 _TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
52 _TIF_SYSCALL_TRACEPOINT)
53 _CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE | _CIF_FPU)
54 _PIF_WORK = (_PIF_PER_TRAP)
55
56 #define BASED(name) name-cleanup_critical(%r13)
57
58 .macro TRACE_IRQS_ON
59 #ifdef CONFIG_TRACE_IRQFLAGS
60 basr %r2,%r0
61 brasl %r14,trace_hardirqs_on_caller
62 #endif
63 .endm
64
65 .macro TRACE_IRQS_OFF
66 #ifdef CONFIG_TRACE_IRQFLAGS
67 basr %r2,%r0
68 brasl %r14,trace_hardirqs_off_caller
69 #endif
70 .endm
71
72 .macro LOCKDEP_SYS_EXIT
73 #ifdef CONFIG_LOCKDEP
74 tm __PT_PSW+1(%r11),0x01 # returning to user ?
75 jz .+10
76 brasl %r14,lockdep_sys_exit
77 #endif
78 .endm
79
80 .macro CHECK_STACK stacksize,savearea
81 #ifdef CONFIG_CHECK_STACK
82 tml %r15,\stacksize - CONFIG_STACK_GUARD
83 lghi %r14,\savearea
84 jz stack_overflow
85 #endif
86 .endm
87
88 .macro SWITCH_ASYNC savearea,timer
89 tmhh %r8,0x0001 # interrupting from user ?
90 jnz 1f
91 lgr %r14,%r9
92 slg %r14,BASED(.Lcritical_start)
93 clg %r14,BASED(.Lcritical_length)
94 jhe 0f
95 lghi %r11,\savearea # inside critical section, do cleanup
96 brasl %r14,cleanup_critical
97 tmhh %r8,0x0001 # retest problem state after cleanup
98 jnz 1f
99 0: lg %r14,__LC_ASYNC_STACK # are we already on the async stack?
100 slgr %r14,%r15
101 srag %r14,%r14,STACK_SHIFT
102 jnz 2f
103 CHECK_STACK 1<<STACK_SHIFT,\savearea
104 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
105 j 3f
106 1: LAST_BREAK %r14
107 UPDATE_VTIME %r14,%r15,\timer
108 2: lg %r15,__LC_ASYNC_STACK # load async stack
109 3: la %r11,STACK_FRAME_OVERHEAD(%r15)
110 .endm
111
112 .macro UPDATE_VTIME w1,w2,enter_timer
113 lg \w1,__LC_EXIT_TIMER
114 lg \w2,__LC_LAST_UPDATE_TIMER
115 slg \w1,\enter_timer
116 slg \w2,__LC_EXIT_TIMER
117 alg \w1,__LC_USER_TIMER
118 alg \w2,__LC_SYSTEM_TIMER
119 stg \w1,__LC_USER_TIMER
120 stg \w2,__LC_SYSTEM_TIMER
121 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer
122 .endm
123
124 .macro LAST_BREAK scratch
125 srag \scratch,%r10,23
126 jz .+10
127 stg %r10,__TI_last_break(%r12)
128 .endm
129
130 .macro REENABLE_IRQS
131 stg %r8,__LC_RETURN_PSW
132 ni __LC_RETURN_PSW,0xbf
133 ssm __LC_RETURN_PSW
134 .endm
135
136 .macro STCK savearea
137 #ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
138 .insn s,0xb27c0000,\savearea # store clock fast
139 #else
140 .insn s,0xb2050000,\savearea # store clock
141 #endif
142 .endm
143
144 /*
145 * The TSTMSK macro generates a test-under-mask instruction by
146 * calculating the memory offset for the specified mask value.
147 * Mask value can be any constant. The macro shifts the mask
148 * value to calculate the memory offset for the test-under-mask
149 * instruction.
150 */
151 .macro TSTMSK addr, mask, size=8, bytepos=0
152 .if (\bytepos < \size) && (\mask >> 8)
153 .if (\mask & 0xff)
154 .error "Mask exceeds byte boundary"
155 .endif
156 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
157 .exitm
158 .endif
159 .ifeq \mask
160 .error "Mask must not be zero"
161 .endif
162 off = \size - \bytepos - 1
163 tm off+\addr, \mask
164 .endm
165
166 .section .kprobes.text, "ax"
167 .Ldummy:
168 /*
169 * This nop exists only in order to avoid that __switch_to starts at
170 * the beginning of the kprobes text section. In that case we would
171 * have several symbols at the same address. E.g. objdump would take
172 * an arbitrary symbol name when disassembling this code.
173 * With the added nop in between the __switch_to symbol is unique
174 * again.
175 */
176 nop 0
177
178 /*
179 * Scheduler resume function, called by switch_to
180 * gpr2 = (task_struct *) prev
181 * gpr3 = (task_struct *) next
182 * Returns:
183 * gpr2 = prev
184 */
185 ENTRY(__switch_to)
186 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
187 lgr %r1,%r2
188 aghi %r1,__TASK_thread # thread_struct of prev task
189 lg %r5,__TASK_thread_info(%r3) # get thread_info of next
190 stg %r15,__THREAD_ksp(%r1) # store kernel stack of prev
191 lgr %r1,%r3
192 aghi %r1,__TASK_thread # thread_struct of next task
193 lgr %r15,%r5
194 aghi %r15,STACK_INIT # end of kernel stack of next
195 stg %r3,__LC_CURRENT # store task struct of next
196 stg %r5,__LC_THREAD_INFO # store thread info of next
197 stg %r15,__LC_KERNEL_STACK # store end of kernel stack
198 lg %r15,__THREAD_ksp(%r1) # load kernel stack of next
199 /* c4 is used in guest detection: arch/s390/kernel/perf_cpum_sf.c */
200 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
201 mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next
202 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
203 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
204 bzr %r14
205 .insn s,0xb2800000,__LC_LPP # set program parameter
206 br %r14
207
208 .L__critical_start:
209
210 #if IS_ENABLED(CONFIG_KVM)
211 /*
212 * sie64a calling convention:
213 * %r2 pointer to sie control block
214 * %r3 guest register save area
215 */
216 ENTRY(sie64a)
217 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
218 stg %r2,__SF_EMPTY(%r15) # save control block pointer
219 stg %r3,__SF_EMPTY+8(%r15) # save guest register save area
220 xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0
221 TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ?
222 jno .Lsie_load_guest_gprs
223 brasl %r14,load_fpu_regs # load guest fp/vx regs
224 .Lsie_load_guest_gprs:
225 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
226 lg %r14,__LC_GMAP # get gmap pointer
227 ltgr %r14,%r14
228 jz .Lsie_gmap
229 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
230 .Lsie_gmap:
231 lg %r14,__SF_EMPTY(%r15) # get control block pointer
232 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now
233 tm __SIE_PROG20+3(%r14),3 # last exit...
234 jnz .Lsie_skip
235 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
236 jo .Lsie_skip # exit if fp/vx regs changed
237 sie 0(%r14)
238 .Lsie_skip:
239 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
240 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
241 .Lsie_done:
242 # some program checks are suppressing. C code (e.g. do_protection_exception)
243 # will rewind the PSW by the ILC, which is 4 bytes in case of SIE. Other
244 # instructions between sie64a and .Lsie_done should not cause program
245 # interrupts. So lets use a nop (47 00 00 00) as a landing pad.
246 # See also .Lcleanup_sie
247 .Lrewind_pad:
248 nop 0
249 .globl sie_exit
250 sie_exit:
251 lg %r14,__SF_EMPTY+8(%r15) # load guest register save area
252 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
253 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
254 lg %r2,__SF_EMPTY+16(%r15) # return exit reason code
255 br %r14
256 .Lsie_fault:
257 lghi %r14,-EFAULT
258 stg %r14,__SF_EMPTY+16(%r15) # set exit reason code
259 j sie_exit
260
261 EX_TABLE(.Lrewind_pad,.Lsie_fault)
262 EX_TABLE(sie_exit,.Lsie_fault)
263 EXPORT_SYMBOL(sie64a)
264 EXPORT_SYMBOL(sie_exit)
265 #endif
266
267 /*
268 * SVC interrupt handler routine. System calls are synchronous events and
269 * are executed with interrupts enabled.
270 */
271
272 ENTRY(system_call)
273 stpt __LC_SYNC_ENTER_TIMER
274 .Lsysc_stmg:
275 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
276 lg %r10,__LC_LAST_BREAK
277 lg %r12,__LC_THREAD_INFO
278 lghi %r14,_PIF_SYSCALL
279 .Lsysc_per:
280 lg %r15,__LC_KERNEL_STACK
281 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
282 LAST_BREAK %r13
283 .Lsysc_vtime:
284 UPDATE_VTIME %r10,%r13,__LC_SYNC_ENTER_TIMER
285 stmg %r0,%r7,__PT_R0(%r11)
286 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
287 mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW
288 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC
289 stg %r14,__PT_FLAGS(%r11)
290 .Lsysc_do_svc:
291 lg %r10,__TI_sysc_table(%r12) # address of system call table
292 llgh %r8,__PT_INT_CODE+2(%r11)
293 slag %r8,%r8,2 # shift and test for svc 0
294 jnz .Lsysc_nr_ok
295 # svc 0: system call number in %r1
296 llgfr %r1,%r1 # clear high word in r1
297 cghi %r1,NR_syscalls
298 jnl .Lsysc_nr_ok
299 sth %r1,__PT_INT_CODE+2(%r11)
300 slag %r8,%r1,2
301 .Lsysc_nr_ok:
302 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
303 stg %r2,__PT_ORIG_GPR2(%r11)
304 stg %r7,STACK_FRAME_OVERHEAD(%r15)
305 lgf %r9,0(%r8,%r10) # get system call add.
306 TSTMSK __TI_flags(%r12),_TIF_TRACE
307 jnz .Lsysc_tracesys
308 basr %r14,%r9 # call sys_xxxx
309 stg %r2,__PT_R2(%r11) # store return value
310
311 .Lsysc_return:
312 LOCKDEP_SYS_EXIT
313 .Lsysc_tif:
314 TSTMSK __PT_FLAGS(%r11),_PIF_WORK
315 jnz .Lsysc_work
316 TSTMSK __TI_flags(%r12),_TIF_WORK
317 jnz .Lsysc_work # check for work
318 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
319 jnz .Lsysc_work
320 .Lsysc_restore:
321 lg %r14,__LC_VDSO_PER_CPU
322 lmg %r0,%r10,__PT_R0(%r11)
323 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
324 stpt __LC_EXIT_TIMER
325 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
326 lmg %r11,%r15,__PT_R11(%r11)
327 lpswe __LC_RETURN_PSW
328 .Lsysc_done:
329
330 #
331 # One of the work bits is on. Find out which one.
332 #
333 .Lsysc_work:
334 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
335 jo .Lsysc_mcck_pending
336 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
337 jo .Lsysc_reschedule
338 #ifdef CONFIG_UPROBES
339 TSTMSK __TI_flags(%r12),_TIF_UPROBE
340 jo .Lsysc_uprobe_notify
341 #endif
342 TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP
343 jo .Lsysc_singlestep
344 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
345 jo .Lsysc_sigpending
346 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
347 jo .Lsysc_notify_resume
348 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
349 jo .Lsysc_vxrs
350 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE
351 jo .Lsysc_uaccess
352 j .Lsysc_return # beware of critical section cleanup
353
354 #
355 # _TIF_NEED_RESCHED is set, call schedule
356 #
357 .Lsysc_reschedule:
358 larl %r14,.Lsysc_return
359 jg schedule
360
361 #
362 # _CIF_MCCK_PENDING is set, call handler
363 #
364 .Lsysc_mcck_pending:
365 larl %r14,.Lsysc_return
366 jg s390_handle_mcck # TIF bit will be cleared by handler
367
368 #
369 # _CIF_ASCE is set, load user space asce
370 #
371 .Lsysc_uaccess:
372 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE
373 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
374 j .Lsysc_return
375
376 #
377 # CIF_FPU is set, restore floating-point controls and floating-point registers.
378 #
379 .Lsysc_vxrs:
380 larl %r14,.Lsysc_return
381 jg load_fpu_regs
382
383 #
384 # _TIF_SIGPENDING is set, call do_signal
385 #
386 .Lsysc_sigpending:
387 lgr %r2,%r11 # pass pointer to pt_regs
388 brasl %r14,do_signal
389 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
390 jno .Lsysc_return
391 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments
392 lg %r10,__TI_sysc_table(%r12) # address of system call table
393 lghi %r8,0 # svc 0 returns -ENOSYS
394 llgh %r1,__PT_INT_CODE+2(%r11) # load new svc number
395 cghi %r1,NR_syscalls
396 jnl .Lsysc_nr_ok # invalid svc number -> do svc 0
397 slag %r8,%r1,2
398 j .Lsysc_nr_ok # restart svc
399
400 #
401 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
402 #
403 .Lsysc_notify_resume:
404 lgr %r2,%r11 # pass pointer to pt_regs
405 larl %r14,.Lsysc_return
406 jg do_notify_resume
407
408 #
409 # _TIF_UPROBE is set, call uprobe_notify_resume
410 #
411 #ifdef CONFIG_UPROBES
412 .Lsysc_uprobe_notify:
413 lgr %r2,%r11 # pass pointer to pt_regs
414 larl %r14,.Lsysc_return
415 jg uprobe_notify_resume
416 #endif
417
418 #
419 # _PIF_PER_TRAP is set, call do_per_trap
420 #
421 .Lsysc_singlestep:
422 ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP
423 lgr %r2,%r11 # pass pointer to pt_regs
424 larl %r14,.Lsysc_return
425 jg do_per_trap
426
427 #
428 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
429 # and after the system call
430 #
431 .Lsysc_tracesys:
432 lgr %r2,%r11 # pass pointer to pt_regs
433 la %r3,0
434 llgh %r0,__PT_INT_CODE+2(%r11)
435 stg %r0,__PT_R2(%r11)
436 brasl %r14,do_syscall_trace_enter
437 lghi %r0,NR_syscalls
438 clgr %r0,%r2
439 jnh .Lsysc_tracenogo
440 sllg %r8,%r2,2
441 lgf %r9,0(%r8,%r10)
442 .Lsysc_tracego:
443 lmg %r3,%r7,__PT_R3(%r11)
444 stg %r7,STACK_FRAME_OVERHEAD(%r15)
445 lg %r2,__PT_ORIG_GPR2(%r11)
446 basr %r14,%r9 # call sys_xxx
447 stg %r2,__PT_R2(%r11) # store return value
448 .Lsysc_tracenogo:
449 TSTMSK __TI_flags(%r12),_TIF_TRACE
450 jz .Lsysc_return
451 lgr %r2,%r11 # pass pointer to pt_regs
452 larl %r14,.Lsysc_return
453 jg do_syscall_trace_exit
454
455 #
456 # a new process exits the kernel with ret_from_fork
457 #
458 ENTRY(ret_from_fork)
459 la %r11,STACK_FRAME_OVERHEAD(%r15)
460 lg %r12,__LC_THREAD_INFO
461 brasl %r14,schedule_tail
462 TRACE_IRQS_ON
463 ssm __LC_SVC_NEW_PSW # reenable interrupts
464 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ?
465 jne .Lsysc_tracenogo
466 # it's a kernel thread
467 lmg %r9,%r10,__PT_R9(%r11) # load gprs
468 ENTRY(kernel_thread_starter)
469 la %r2,0(%r10)
470 basr %r14,%r9
471 j .Lsysc_tracenogo
472
473 /*
474 * Program check handler routine
475 */
476
477 ENTRY(pgm_check_handler)
478 stpt __LC_SYNC_ENTER_TIMER
479 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
480 lg %r10,__LC_LAST_BREAK
481 lg %r12,__LC_THREAD_INFO
482 larl %r13,cleanup_critical
483 lmg %r8,%r9,__LC_PGM_OLD_PSW
484 tmhh %r8,0x0001 # test problem state bit
485 jnz 2f # -> fault in user space
486 #if IS_ENABLED(CONFIG_KVM)
487 # cleanup critical section for sie64a
488 lgr %r14,%r9
489 slg %r14,BASED(.Lsie_critical_start)
490 clg %r14,BASED(.Lsie_critical_length)
491 jhe 0f
492 brasl %r14,.Lcleanup_sie
493 #endif
494 0: tmhh %r8,0x4000 # PER bit set in old PSW ?
495 jnz 1f # -> enabled, can't be a double fault
496 tm __LC_PGM_ILC+3,0x80 # check for per exception
497 jnz .Lpgm_svcper # -> single stepped svc
498 1: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC
499 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
500 j 3f
501 2: LAST_BREAK %r14
502 UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
503 lg %r15,__LC_KERNEL_STACK
504 lg %r14,__TI_task(%r12)
505 aghi %r14,__TASK_thread # pointer to thread_struct
506 lghi %r13,__LC_PGM_TDB
507 tm __LC_PGM_ILC+2,0x02 # check for transaction abort
508 jz 3f
509 mvc __THREAD_trap_tdb(256,%r14),0(%r13)
510 3: la %r11,STACK_FRAME_OVERHEAD(%r15)
511 stmg %r0,%r7,__PT_R0(%r11)
512 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
513 stmg %r8,%r9,__PT_PSW(%r11)
514 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC
515 mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
516 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
517 stg %r10,__PT_ARGS(%r11)
518 tm __LC_PGM_ILC+3,0x80 # check for per exception
519 jz 4f
520 tmhh %r8,0x0001 # kernel per event ?
521 jz .Lpgm_kprobe
522 oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP
523 mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS
524 mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE
525 mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID
526 4: REENABLE_IRQS
527 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
528 larl %r1,pgm_check_table
529 llgh %r10,__PT_INT_CODE+2(%r11)
530 nill %r10,0x007f
531 sll %r10,2
532 je .Lpgm_return
533 lgf %r1,0(%r10,%r1) # load address of handler routine
534 lgr %r2,%r11 # pass pointer to pt_regs
535 basr %r14,%r1 # branch to interrupt-handler
536 .Lpgm_return:
537 LOCKDEP_SYS_EXIT
538 tm __PT_PSW+1(%r11),0x01 # returning to user ?
539 jno .Lsysc_restore
540 j .Lsysc_tif
541
542 #
543 # PER event in supervisor state, must be kprobes
544 #
545 .Lpgm_kprobe:
546 REENABLE_IRQS
547 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
548 lgr %r2,%r11 # pass pointer to pt_regs
549 brasl %r14,do_per_trap
550 j .Lpgm_return
551
552 #
553 # single stepped system call
554 #
555 .Lpgm_svcper:
556 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
557 larl %r14,.Lsysc_per
558 stg %r14,__LC_RETURN_PSW+8
559 lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP
560 lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs
561
562 /*
563 * IO interrupt handler routine
564 */
565 ENTRY(io_int_handler)
566 STCK __LC_INT_CLOCK
567 stpt __LC_ASYNC_ENTER_TIMER
568 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
569 lg %r10,__LC_LAST_BREAK
570 lg %r12,__LC_THREAD_INFO
571 larl %r13,cleanup_critical
572 lmg %r8,%r9,__LC_IO_OLD_PSW
573 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
574 stmg %r0,%r7,__PT_R0(%r11)
575 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
576 stmg %r8,%r9,__PT_PSW(%r11)
577 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
578 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
579 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
580 jo .Lio_restore
581 TRACE_IRQS_OFF
582 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
583 .Lio_loop:
584 lgr %r2,%r11 # pass pointer to pt_regs
585 lghi %r3,IO_INTERRUPT
586 tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ?
587 jz .Lio_call
588 lghi %r3,THIN_INTERRUPT
589 .Lio_call:
590 brasl %r14,do_IRQ
591 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR
592 jz .Lio_return
593 tpi 0
594 jz .Lio_return
595 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
596 j .Lio_loop
597 .Lio_return:
598 LOCKDEP_SYS_EXIT
599 TRACE_IRQS_ON
600 .Lio_tif:
601 TSTMSK __TI_flags(%r12),_TIF_WORK
602 jnz .Lio_work # there is work to do (signals etc.)
603 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
604 jnz .Lio_work
605 .Lio_restore:
606 lg %r14,__LC_VDSO_PER_CPU
607 lmg %r0,%r10,__PT_R0(%r11)
608 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
609 stpt __LC_EXIT_TIMER
610 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
611 lmg %r11,%r15,__PT_R11(%r11)
612 lpswe __LC_RETURN_PSW
613 .Lio_done:
614
615 #
616 # There is work todo, find out in which context we have been interrupted:
617 # 1) if we return to user space we can do all _TIF_WORK work
618 # 2) if we return to kernel code and kvm is enabled check if we need to
619 # modify the psw to leave SIE
620 # 3) if we return to kernel code and preemptive scheduling is enabled check
621 # the preemption counter and if it is zero call preempt_schedule_irq
622 # Before any work can be done, a switch to the kernel stack is required.
623 #
624 .Lio_work:
625 tm __PT_PSW+1(%r11),0x01 # returning to user ?
626 jo .Lio_work_user # yes -> do resched & signal
627 #ifdef CONFIG_PREEMPT
628 # check for preemptive scheduling
629 icm %r0,15,__TI_precount(%r12)
630 jnz .Lio_restore # preemption is disabled
631 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
632 jno .Lio_restore
633 # switch to kernel stack
634 lg %r1,__PT_R15(%r11)
635 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
636 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
637 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
638 la %r11,STACK_FRAME_OVERHEAD(%r1)
639 lgr %r15,%r1
640 # TRACE_IRQS_ON already done at .Lio_return, call
641 # TRACE_IRQS_OFF to keep things symmetrical
642 TRACE_IRQS_OFF
643 brasl %r14,preempt_schedule_irq
644 j .Lio_return
645 #else
646 j .Lio_restore
647 #endif
648
649 #
650 # Need to do work before returning to userspace, switch to kernel stack
651 #
652 .Lio_work_user:
653 lg %r1,__LC_KERNEL_STACK
654 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
655 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
656 la %r11,STACK_FRAME_OVERHEAD(%r1)
657 lgr %r15,%r1
658
659 #
660 # One of the work bits is on. Find out which one.
661 #
662 .Lio_work_tif:
663 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
664 jo .Lio_mcck_pending
665 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
666 jo .Lio_reschedule
667 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
668 jo .Lio_sigpending
669 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
670 jo .Lio_notify_resume
671 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
672 jo .Lio_vxrs
673 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE
674 jo .Lio_uaccess
675 j .Lio_return # beware of critical section cleanup
676
677 #
678 # _CIF_MCCK_PENDING is set, call handler
679 #
680 .Lio_mcck_pending:
681 # TRACE_IRQS_ON already done at .Lio_return
682 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
683 TRACE_IRQS_OFF
684 j .Lio_return
685
686 #
687 # _CIF_ASCE is set, load user space asce
688 #
689 .Lio_uaccess:
690 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE
691 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
692 j .Lio_return
693
694 #
695 # CIF_FPU is set, restore floating-point controls and floating-point registers.
696 #
697 .Lio_vxrs:
698 larl %r14,.Lio_return
699 jg load_fpu_regs
700
701 #
702 # _TIF_NEED_RESCHED is set, call schedule
703 #
704 .Lio_reschedule:
705 # TRACE_IRQS_ON already done at .Lio_return
706 ssm __LC_SVC_NEW_PSW # reenable interrupts
707 brasl %r14,schedule # call scheduler
708 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
709 TRACE_IRQS_OFF
710 j .Lio_return
711
712 #
713 # _TIF_SIGPENDING or is set, call do_signal
714 #
715 .Lio_sigpending:
716 # TRACE_IRQS_ON already done at .Lio_return
717 ssm __LC_SVC_NEW_PSW # reenable interrupts
718 lgr %r2,%r11 # pass pointer to pt_regs
719 brasl %r14,do_signal
720 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
721 TRACE_IRQS_OFF
722 j .Lio_return
723
724 #
725 # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
726 #
727 .Lio_notify_resume:
728 # TRACE_IRQS_ON already done at .Lio_return
729 ssm __LC_SVC_NEW_PSW # reenable interrupts
730 lgr %r2,%r11 # pass pointer to pt_regs
731 brasl %r14,do_notify_resume
732 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
733 TRACE_IRQS_OFF
734 j .Lio_return
735
736 /*
737 * External interrupt handler routine
738 */
739 ENTRY(ext_int_handler)
740 STCK __LC_INT_CLOCK
741 stpt __LC_ASYNC_ENTER_TIMER
742 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
743 lg %r10,__LC_LAST_BREAK
744 lg %r12,__LC_THREAD_INFO
745 larl %r13,cleanup_critical
746 lmg %r8,%r9,__LC_EXT_OLD_PSW
747 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
748 stmg %r0,%r7,__PT_R0(%r11)
749 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
750 stmg %r8,%r9,__PT_PSW(%r11)
751 lghi %r1,__LC_EXT_PARAMS2
752 mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
753 mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
754 mvc __PT_INT_PARM_LONG(8,%r11),0(%r1)
755 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
756 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
757 jo .Lio_restore
758 TRACE_IRQS_OFF
759 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
760 lgr %r2,%r11 # pass pointer to pt_regs
761 lghi %r3,EXT_INTERRUPT
762 brasl %r14,do_IRQ
763 j .Lio_return
764
765 /*
766 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle.
767 */
768 ENTRY(psw_idle)
769 stg %r3,__SF_EMPTY(%r15)
770 larl %r1,.Lpsw_idle_lpsw+4
771 stg %r1,__SF_EMPTY+8(%r15)
772 #ifdef CONFIG_SMP
773 larl %r1,smp_cpu_mtid
774 llgf %r1,0(%r1)
775 ltgr %r1,%r1
776 jz .Lpsw_idle_stcctm
777 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15)
778 .Lpsw_idle_stcctm:
779 #endif
780 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
781 STCK __CLOCK_IDLE_ENTER(%r2)
782 stpt __TIMER_IDLE_ENTER(%r2)
783 .Lpsw_idle_lpsw:
784 lpswe __SF_EMPTY(%r15)
785 br %r14
786 .Lpsw_idle_end:
787
788 /*
789 * Store floating-point controls and floating-point or vector register
790 * depending whether the vector facility is available. A critical section
791 * cleanup assures that the registers are stored even if interrupted for
792 * some other work. The CIF_FPU flag is set to trigger a lazy restore
793 * of the register contents at return from io or a system call.
794 */
795 ENTRY(save_fpu_regs)
796 lg %r2,__LC_CURRENT
797 aghi %r2,__TASK_thread
798 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
799 bor %r14
800 stfpc __THREAD_FPU_fpc(%r2)
801 .Lsave_fpu_regs_fpc_end:
802 lg %r3,__THREAD_FPU_regs(%r2)
803 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
804 jz .Lsave_fpu_regs_fp # no -> store FP regs
805 .Lsave_fpu_regs_vx_low:
806 VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3)
807 .Lsave_fpu_regs_vx_high:
808 VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3)
809 j .Lsave_fpu_regs_done # -> set CIF_FPU flag
810 .Lsave_fpu_regs_fp:
811 std 0,0(%r3)
812 std 1,8(%r3)
813 std 2,16(%r3)
814 std 3,24(%r3)
815 std 4,32(%r3)
816 std 5,40(%r3)
817 std 6,48(%r3)
818 std 7,56(%r3)
819 std 8,64(%r3)
820 std 9,72(%r3)
821 std 10,80(%r3)
822 std 11,88(%r3)
823 std 12,96(%r3)
824 std 13,104(%r3)
825 std 14,112(%r3)
826 std 15,120(%r3)
827 .Lsave_fpu_regs_done:
828 oi __LC_CPU_FLAGS+7,_CIF_FPU
829 br %r14
830 .Lsave_fpu_regs_end:
831 #if IS_ENABLED(CONFIG_KVM)
832 EXPORT_SYMBOL(save_fpu_regs)
833 #endif
834
835 /*
836 * Load floating-point controls and floating-point or vector registers.
837 * A critical section cleanup assures that the register contents are
838 * loaded even if interrupted for some other work.
839 *
840 * There are special calling conventions to fit into sysc and io return work:
841 * %r15: <kernel stack>
842 * The function requires:
843 * %r4
844 */
845 load_fpu_regs:
846 lg %r4,__LC_CURRENT
847 aghi %r4,__TASK_thread
848 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
849 bnor %r14
850 lfpc __THREAD_FPU_fpc(%r4)
851 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
852 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area
853 jz .Lload_fpu_regs_fp # -> no VX, load FP regs
854 .Lload_fpu_regs_vx:
855 VLM %v0,%v15,0,%r4
856 .Lload_fpu_regs_vx_high:
857 VLM %v16,%v31,256,%r4
858 j .Lload_fpu_regs_done
859 .Lload_fpu_regs_fp:
860 ld 0,0(%r4)
861 ld 1,8(%r4)
862 ld 2,16(%r4)
863 ld 3,24(%r4)
864 ld 4,32(%r4)
865 ld 5,40(%r4)
866 ld 6,48(%r4)
867 ld 7,56(%r4)
868 ld 8,64(%r4)
869 ld 9,72(%r4)
870 ld 10,80(%r4)
871 ld 11,88(%r4)
872 ld 12,96(%r4)
873 ld 13,104(%r4)
874 ld 14,112(%r4)
875 ld 15,120(%r4)
876 .Lload_fpu_regs_done:
877 ni __LC_CPU_FLAGS+7,255-_CIF_FPU
878 br %r14
879 .Lload_fpu_regs_end:
880
881 .L__critical_end:
882
883 /*
884 * Machine check handler routines
885 */
886 ENTRY(mcck_int_handler)
887 STCK __LC_MCCK_CLOCK
888 la %r1,4095 # revalidate r1
889 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
890 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
891 lg %r10,__LC_LAST_BREAK
892 lg %r12,__LC_THREAD_INFO
893 larl %r13,cleanup_critical
894 lmg %r8,%r9,__LC_MCK_OLD_PSW
895 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
896 jo .Lmcck_panic # yes -> rest of mcck code invalid
897 lghi %r14,__LC_CPU_TIMER_SAVE_AREA
898 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
899 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
900 jo 3f
901 la %r14,__LC_SYNC_ENTER_TIMER
902 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
903 jl 0f
904 la %r14,__LC_ASYNC_ENTER_TIMER
905 0: clc 0(8,%r14),__LC_EXIT_TIMER
906 jl 1f
907 la %r14,__LC_EXIT_TIMER
908 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
909 jl 2f
910 la %r14,__LC_LAST_UPDATE_TIMER
911 2: spt 0(%r14)
912 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
913 3: TSTMSK __LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID)
914 jno .Lmcck_panic # no -> skip cleanup critical
915 SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER
916 .Lmcck_skip:
917 lghi %r14,__LC_GPREGS_SAVE_AREA+64
918 stmg %r0,%r7,__PT_R0(%r11)
919 mvc __PT_R8(64,%r11),0(%r14)
920 stmg %r8,%r9,__PT_PSW(%r11)
921 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
922 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
923 lgr %r2,%r11 # pass pointer to pt_regs
924 brasl %r14,s390_do_machine_check
925 tm __PT_PSW+1(%r11),0x01 # returning to user ?
926 jno .Lmcck_return
927 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
928 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
929 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
930 la %r11,STACK_FRAME_OVERHEAD(%r1)
931 lgr %r15,%r1
932 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
933 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
934 jno .Lmcck_return
935 TRACE_IRQS_OFF
936 brasl %r14,s390_handle_mcck
937 TRACE_IRQS_ON
938 .Lmcck_return:
939 lg %r14,__LC_VDSO_PER_CPU
940 lmg %r0,%r10,__PT_R0(%r11)
941 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
942 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
943 jno 0f
944 stpt __LC_EXIT_TIMER
945 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
946 0: lmg %r11,%r15,__PT_R11(%r11)
947 lpswe __LC_RETURN_MCCK_PSW
948
949 .Lmcck_panic:
950 lg %r15,__LC_PANIC_STACK
951 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
952 j .Lmcck_skip
953
954 #
955 # PSW restart interrupt handler
956 #
957 ENTRY(restart_int_handler)
958 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
959 jz 0f
960 .insn s,0xb2800000,__LC_LPP
961 0: stg %r15,__LC_SAVE_AREA_RESTART
962 lg %r15,__LC_RESTART_STACK
963 aghi %r15,-__PT_SIZE # create pt_regs on stack
964 xc 0(__PT_SIZE,%r15),0(%r15)
965 stmg %r0,%r14,__PT_R0(%r15)
966 mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
967 mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw
968 aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack
969 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
970 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu
971 lg %r2,__LC_RESTART_DATA
972 lg %r3,__LC_RESTART_SOURCE
973 ltgr %r3,%r3 # test source cpu address
974 jm 1f # negative -> skip source stop
975 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu
976 brc 10,0b # wait for status stored
977 1: basr %r14,%r1 # call function
978 stap __SF_EMPTY(%r15) # store cpu address
979 llgh %r3,__SF_EMPTY(%r15)
980 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu
981 brc 2,2b
982 3: j 3b
983
984 .section .kprobes.text, "ax"
985
986 #ifdef CONFIG_CHECK_STACK
987 /*
988 * The synchronous or the asynchronous stack overflowed. We are dead.
989 * No need to properly save the registers, we are going to panic anyway.
990 * Setup a pt_regs so that show_trace can provide a good call trace.
991 */
992 stack_overflow:
993 lg %r15,__LC_PANIC_STACK # change to panic stack
994 la %r11,STACK_FRAME_OVERHEAD(%r15)
995 stmg %r0,%r7,__PT_R0(%r11)
996 stmg %r8,%r9,__PT_PSW(%r11)
997 mvc __PT_R8(64,%r11),0(%r14)
998 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
999 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1000 lgr %r2,%r11 # pass pointer to pt_regs
1001 jg kernel_stack_overflow
1002 #endif
1003
1004 cleanup_critical:
1005 #if IS_ENABLED(CONFIG_KVM)
1006 clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap
1007 jl 0f
1008 clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done
1009 jl .Lcleanup_sie
1010 #endif
1011 clg %r9,BASED(.Lcleanup_table) # system_call
1012 jl 0f
1013 clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc
1014 jl .Lcleanup_system_call
1015 clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif
1016 jl 0f
1017 clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore
1018 jl .Lcleanup_sysc_tif
1019 clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done
1020 jl .Lcleanup_sysc_restore
1021 clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif
1022 jl 0f
1023 clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore
1024 jl .Lcleanup_io_tif
1025 clg %r9,BASED(.Lcleanup_table+56) # .Lio_done
1026 jl .Lcleanup_io_restore
1027 clg %r9,BASED(.Lcleanup_table+64) # psw_idle
1028 jl 0f
1029 clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end
1030 jl .Lcleanup_idle
1031 clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs
1032 jl 0f
1033 clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end
1034 jl .Lcleanup_save_fpu_regs
1035 clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs
1036 jl 0f
1037 clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end
1038 jl .Lcleanup_load_fpu_regs
1039 0: br %r14
1040
1041 .align 8
1042 .Lcleanup_table:
1043 .quad system_call
1044 .quad .Lsysc_do_svc
1045 .quad .Lsysc_tif
1046 .quad .Lsysc_restore
1047 .quad .Lsysc_done
1048 .quad .Lio_tif
1049 .quad .Lio_restore
1050 .quad .Lio_done
1051 .quad psw_idle
1052 .quad .Lpsw_idle_end
1053 .quad save_fpu_regs
1054 .quad .Lsave_fpu_regs_end
1055 .quad load_fpu_regs
1056 .quad .Lload_fpu_regs_end
1057
1058 #if IS_ENABLED(CONFIG_KVM)
1059 .Lcleanup_table_sie:
1060 .quad .Lsie_gmap
1061 .quad .Lsie_done
1062
1063 .Lcleanup_sie:
1064 lg %r9,__SF_EMPTY(%r15) # get control block pointer
1065 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
1066 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
1067 larl %r9,sie_exit # skip forward to sie_exit
1068 br %r14
1069 #endif
1070
1071 .Lcleanup_system_call:
1072 # check if stpt has been executed
1073 clg %r9,BASED(.Lcleanup_system_call_insn)
1074 jh 0f
1075 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
1076 cghi %r11,__LC_SAVE_AREA_ASYNC
1077 je 0f
1078 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
1079 0: # check if stmg has been executed
1080 clg %r9,BASED(.Lcleanup_system_call_insn+8)
1081 jh 0f
1082 mvc __LC_SAVE_AREA_SYNC(64),0(%r11)
1083 0: # check if base register setup + TIF bit load has been done
1084 clg %r9,BASED(.Lcleanup_system_call_insn+16)
1085 jhe 0f
1086 # set up saved registers r10 and r12
1087 stg %r10,16(%r11) # r10 last break
1088 stg %r12,32(%r11) # r12 thread-info pointer
1089 0: # check if the user time update has been done
1090 clg %r9,BASED(.Lcleanup_system_call_insn+24)
1091 jh 0f
1092 lg %r15,__LC_EXIT_TIMER
1093 slg %r15,__LC_SYNC_ENTER_TIMER
1094 alg %r15,__LC_USER_TIMER
1095 stg %r15,__LC_USER_TIMER
1096 0: # check if the system time update has been done
1097 clg %r9,BASED(.Lcleanup_system_call_insn+32)
1098 jh 0f
1099 lg %r15,__LC_LAST_UPDATE_TIMER
1100 slg %r15,__LC_EXIT_TIMER
1101 alg %r15,__LC_SYSTEM_TIMER
1102 stg %r15,__LC_SYSTEM_TIMER
1103 0: # update accounting time stamp
1104 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1105 # do LAST_BREAK
1106 lg %r9,16(%r11)
1107 srag %r9,%r9,23
1108 jz 0f
1109 mvc __TI_last_break(8,%r12),16(%r11)
1110 0: # set up saved register r11
1111 lg %r15,__LC_KERNEL_STACK
1112 la %r9,STACK_FRAME_OVERHEAD(%r15)
1113 stg %r9,24(%r11) # r11 pt_regs pointer
1114 # fill pt_regs
1115 mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC
1116 stmg %r0,%r7,__PT_R0(%r9)
1117 mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW
1118 mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC
1119 xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9)
1120 mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL
1121 # setup saved register r15
1122 stg %r15,56(%r11) # r15 stack pointer
1123 # set new psw address and exit
1124 larl %r9,.Lsysc_do_svc
1125 br %r14
1126 .Lcleanup_system_call_insn:
1127 .quad system_call
1128 .quad .Lsysc_stmg
1129 .quad .Lsysc_per
1130 .quad .Lsysc_vtime+36
1131 .quad .Lsysc_vtime+42
1132
1133 .Lcleanup_sysc_tif:
1134 larl %r9,.Lsysc_tif
1135 br %r14
1136
1137 .Lcleanup_sysc_restore:
1138 clg %r9,BASED(.Lcleanup_sysc_restore_insn)
1139 je 0f
1140 lg %r9,24(%r11) # get saved pointer to pt_regs
1141 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1142 mvc 0(64,%r11),__PT_R8(%r9)
1143 lmg %r0,%r7,__PT_R0(%r9)
1144 0: lmg %r8,%r9,__LC_RETURN_PSW
1145 br %r14
1146 .Lcleanup_sysc_restore_insn:
1147 .quad .Lsysc_done - 4
1148
1149 .Lcleanup_io_tif:
1150 larl %r9,.Lio_tif
1151 br %r14
1152
1153 .Lcleanup_io_restore:
1154 clg %r9,BASED(.Lcleanup_io_restore_insn)
1155 je 0f
1156 lg %r9,24(%r11) # get saved r11 pointer to pt_regs
1157 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1158 mvc 0(64,%r11),__PT_R8(%r9)
1159 lmg %r0,%r7,__PT_R0(%r9)
1160 0: lmg %r8,%r9,__LC_RETURN_PSW
1161 br %r14
1162 .Lcleanup_io_restore_insn:
1163 .quad .Lio_done - 4
1164
1165 .Lcleanup_idle:
1166 ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT
1167 # copy interrupt clock & cpu timer
1168 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK
1169 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER
1170 cghi %r11,__LC_SAVE_AREA_ASYNC
1171 je 0f
1172 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK
1173 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER
1174 0: # check if stck & stpt have been executed
1175 clg %r9,BASED(.Lcleanup_idle_insn)
1176 jhe 1f
1177 mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2)
1178 mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2)
1179 1: # calculate idle cycles
1180 #ifdef CONFIG_SMP
1181 clg %r9,BASED(.Lcleanup_idle_insn)
1182 jl 3f
1183 larl %r1,smp_cpu_mtid
1184 llgf %r1,0(%r1)
1185 ltgr %r1,%r1
1186 jz 3f
1187 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15)
1188 larl %r3,mt_cycles
1189 ag %r3,__LC_PERCPU_OFFSET
1190 la %r4,__SF_EMPTY+16(%r15)
1191 2: lg %r0,0(%r3)
1192 slg %r0,0(%r4)
1193 alg %r0,64(%r4)
1194 stg %r0,0(%r3)
1195 la %r3,8(%r3)
1196 la %r4,8(%r4)
1197 brct %r1,2b
1198 #endif
1199 3: # account system time going idle
1200 lg %r9,__LC_STEAL_TIMER
1201 alg %r9,__CLOCK_IDLE_ENTER(%r2)
1202 slg %r9,__LC_LAST_UPDATE_CLOCK
1203 stg %r9,__LC_STEAL_TIMER
1204 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
1205 lg %r9,__LC_SYSTEM_TIMER
1206 alg %r9,__LC_LAST_UPDATE_TIMER
1207 slg %r9,__TIMER_IDLE_ENTER(%r2)
1208 stg %r9,__LC_SYSTEM_TIMER
1209 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
1210 # prepare return psw
1211 nihh %r8,0xfcfd # clear irq & wait state bits
1212 lg %r9,48(%r11) # return from psw_idle
1213 br %r14
1214 .Lcleanup_idle_insn:
1215 .quad .Lpsw_idle_lpsw
1216
1217 .Lcleanup_save_fpu_regs:
1218 larl %r9,save_fpu_regs
1219 br %r14
1220
1221 .Lcleanup_load_fpu_regs:
1222 larl %r9,load_fpu_regs
1223 br %r14
1224
1225 /*
1226 * Integer constants
1227 */
1228 .align 8
1229 .Lcritical_start:
1230 .quad .L__critical_start
1231 .Lcritical_length:
1232 .quad .L__critical_end - .L__critical_start
1233 #if IS_ENABLED(CONFIG_KVM)
1234 .Lsie_critical_start:
1235 .quad .Lsie_gmap
1236 .Lsie_critical_length:
1237 .quad .Lsie_done - .Lsie_gmap
1238 #endif
1239
1240 .section .rodata, "a"
1241 #define SYSCALL(esame,emu) .long esame
1242 .globl sys_call_table
1243 sys_call_table:
1244 #include "syscalls.S"
1245 #undef SYSCALL
1246
1247 #ifdef CONFIG_COMPAT
1248
1249 #define SYSCALL(esame,emu) .long emu
1250 .globl sys_call_table_emu
1251 sys_call_table_emu:
1252 #include "syscalls.S"
1253 #undef SYSCALL
1254 #endif
Linux kernel - Deliverables
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