fb: adv7393: off by one in probe function
[deliverable/linux.git] / arch / sparc / lib / VISsave.S
1 /*
2 * VISsave.S: Code for saving FPU register state for
3 * VIS routines. One should not call this directly,
4 * but use macros provided in <asm/visasm.h>.
5 *
6 * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
7 */
8
9 #include <linux/linkage.h>
10
11 #include <asm/asi.h>
12 #include <asm/page.h>
13 #include <asm/ptrace.h>
14 #include <asm/visasm.h>
15 #include <asm/thread_info.h>
16
17 /* On entry: %o5=current FPRS value, %g7 is callers address */
18 /* May clobber %o5, %g1, %g2, %g3, %g7, %icc, %xcc */
19
20 /* Nothing special need be done here to handle pre-emption, this
21 * FPU save/restore mechanism is already preemption safe.
22 */
23 .text
24 .align 32
25 ENTRY(VISenter)
26 ldub [%g6 + TI_FPDEPTH], %g1
27 brnz,a,pn %g1, 1f
28 cmp %g1, 1
29 stb %g0, [%g6 + TI_FPSAVED]
30 stx %fsr, [%g6 + TI_XFSR]
31 9: jmpl %g7 + %g0, %g0
32 nop
33 1: bne,pn %icc, 2f
34
35 srl %g1, 1, %g1
36 vis1: ldub [%g6 + TI_FPSAVED], %g3
37 stx %fsr, [%g6 + TI_XFSR]
38 or %g3, %o5, %g3
39 stb %g3, [%g6 + TI_FPSAVED]
40 rd %gsr, %g3
41 clr %g1
42 ba,pt %xcc, 3f
43
44 stx %g3, [%g6 + TI_GSR]
45 2: add %g6, %g1, %g3
46 mov FPRS_DU | FPRS_DL | FPRS_FEF, %o5
47 sll %g1, 3, %g1
48 stb %o5, [%g3 + TI_FPSAVED]
49 rd %gsr, %g2
50 add %g6, %g1, %g3
51 stx %g2, [%g3 + TI_GSR]
52
53 add %g6, %g1, %g2
54 stx %fsr, [%g2 + TI_XFSR]
55 sll %g1, 5, %g1
56 3: andcc %o5, FPRS_DL|FPRS_DU, %g0
57 be,pn %icc, 9b
58 add %g6, TI_FPREGS, %g2
59 andcc %o5, FPRS_DL, %g0
60
61 be,pn %icc, 4f
62 add %g6, TI_FPREGS+0x40, %g3
63 membar #Sync
64 stda %f0, [%g2 + %g1] ASI_BLK_P
65 stda %f16, [%g3 + %g1] ASI_BLK_P
66 membar #Sync
67 andcc %o5, FPRS_DU, %g0
68 be,pn %icc, 5f
69 4: add %g1, 128, %g1
70 membar #Sync
71 stda %f32, [%g2 + %g1] ASI_BLK_P
72
73 stda %f48, [%g3 + %g1] ASI_BLK_P
74 5: membar #Sync
75 ba,pt %xcc, 80f
76 nop
77
78 .align 32
79 80: jmpl %g7 + %g0, %g0
80 nop
81 ENDPROC(VISenter)
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