Merge branch 'irq/core'
[deliverable/linux.git] / arch / x86 / entry / entry_32.S
1 /*
2 * Copyright (C) 1991,1992 Linus Torvalds
3 *
4 * entry_32.S contains the system-call and low-level fault and trap handling routines.
5 *
6 * Stack layout while running C code:
7 * ptrace needs to have all registers on the stack.
8 * If the order here is changed, it needs to be
9 * updated in fork.c:copy_process(), signal.c:do_signal(),
10 * ptrace.c and ptrace.h
11 *
12 * 0(%esp) - %ebx
13 * 4(%esp) - %ecx
14 * 8(%esp) - %edx
15 * C(%esp) - %esi
16 * 10(%esp) - %edi
17 * 14(%esp) - %ebp
18 * 18(%esp) - %eax
19 * 1C(%esp) - %ds
20 * 20(%esp) - %es
21 * 24(%esp) - %fs
22 * 28(%esp) - %gs saved iff !CONFIG_X86_32_LAZY_GS
23 * 2C(%esp) - orig_eax
24 * 30(%esp) - %eip
25 * 34(%esp) - %cs
26 * 38(%esp) - %eflags
27 * 3C(%esp) - %oldesp
28 * 40(%esp) - %oldss
29 */
30
31 #include <linux/linkage.h>
32 #include <linux/err.h>
33 #include <asm/thread_info.h>
34 #include <asm/irqflags.h>
35 #include <asm/errno.h>
36 #include <asm/segment.h>
37 #include <asm/smp.h>
38 #include <asm/page_types.h>
39 #include <asm/percpu.h>
40 #include <asm/processor-flags.h>
41 #include <asm/ftrace.h>
42 #include <asm/irq_vectors.h>
43 #include <asm/cpufeatures.h>
44 #include <asm/alternative-asm.h>
45 #include <asm/asm.h>
46 #include <asm/smap.h>
47
48 .section .entry.text, "ax"
49
50 /*
51 * We use macros for low-level operations which need to be overridden
52 * for paravirtualization. The following will never clobber any registers:
53 * INTERRUPT_RETURN (aka. "iret")
54 * GET_CR0_INTO_EAX (aka. "movl %cr0, %eax")
55 * ENABLE_INTERRUPTS_SYSEXIT (aka "sti; sysexit").
56 *
57 * For DISABLE_INTERRUPTS/ENABLE_INTERRUPTS (aka "cli"/"sti"), you must
58 * specify what registers can be overwritten (CLBR_NONE, CLBR_EAX/EDX/ECX/ANY).
59 * Allowing a register to be clobbered can shrink the paravirt replacement
60 * enough to patch inline, increasing performance.
61 */
62
63 #ifdef CONFIG_PREEMPT
64 # define preempt_stop(clobbers) DISABLE_INTERRUPTS(clobbers); TRACE_IRQS_OFF
65 #else
66 # define preempt_stop(clobbers)
67 # define resume_kernel restore_all
68 #endif
69
70 .macro TRACE_IRQS_IRET
71 #ifdef CONFIG_TRACE_IRQFLAGS
72 testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off?
73 jz 1f
74 TRACE_IRQS_ON
75 1:
76 #endif
77 .endm
78
79 /*
80 * User gs save/restore
81 *
82 * %gs is used for userland TLS and kernel only uses it for stack
83 * canary which is required to be at %gs:20 by gcc. Read the comment
84 * at the top of stackprotector.h for more info.
85 *
86 * Local labels 98 and 99 are used.
87 */
88 #ifdef CONFIG_X86_32_LAZY_GS
89
90 /* unfortunately push/pop can't be no-op */
91 .macro PUSH_GS
92 pushl $0
93 .endm
94 .macro POP_GS pop=0
95 addl $(4 + \pop), %esp
96 .endm
97 .macro POP_GS_EX
98 .endm
99
100 /* all the rest are no-op */
101 .macro PTGS_TO_GS
102 .endm
103 .macro PTGS_TO_GS_EX
104 .endm
105 .macro GS_TO_REG reg
106 .endm
107 .macro REG_TO_PTGS reg
108 .endm
109 .macro SET_KERNEL_GS reg
110 .endm
111
112 #else /* CONFIG_X86_32_LAZY_GS */
113
114 .macro PUSH_GS
115 pushl %gs
116 .endm
117
118 .macro POP_GS pop=0
119 98: popl %gs
120 .if \pop <> 0
121 add $\pop, %esp
122 .endif
123 .endm
124 .macro POP_GS_EX
125 .pushsection .fixup, "ax"
126 99: movl $0, (%esp)
127 jmp 98b
128 .popsection
129 _ASM_EXTABLE(98b, 99b)
130 .endm
131
132 .macro PTGS_TO_GS
133 98: mov PT_GS(%esp), %gs
134 .endm
135 .macro PTGS_TO_GS_EX
136 .pushsection .fixup, "ax"
137 99: movl $0, PT_GS(%esp)
138 jmp 98b
139 .popsection
140 _ASM_EXTABLE(98b, 99b)
141 .endm
142
143 .macro GS_TO_REG reg
144 movl %gs, \reg
145 .endm
146 .macro REG_TO_PTGS reg
147 movl \reg, PT_GS(%esp)
148 .endm
149 .macro SET_KERNEL_GS reg
150 movl $(__KERNEL_STACK_CANARY), \reg
151 movl \reg, %gs
152 .endm
153
154 #endif /* CONFIG_X86_32_LAZY_GS */
155
156 .macro SAVE_ALL pt_regs_ax=%eax
157 cld
158 PUSH_GS
159 pushl %fs
160 pushl %es
161 pushl %ds
162 pushl \pt_regs_ax
163 pushl %ebp
164 pushl %edi
165 pushl %esi
166 pushl %edx
167 pushl %ecx
168 pushl %ebx
169 movl $(__USER_DS), %edx
170 movl %edx, %ds
171 movl %edx, %es
172 movl $(__KERNEL_PERCPU), %edx
173 movl %edx, %fs
174 SET_KERNEL_GS %edx
175 .endm
176
177 .macro RESTORE_INT_REGS
178 popl %ebx
179 popl %ecx
180 popl %edx
181 popl %esi
182 popl %edi
183 popl %ebp
184 popl %eax
185 .endm
186
187 .macro RESTORE_REGS pop=0
188 RESTORE_INT_REGS
189 1: popl %ds
190 2: popl %es
191 3: popl %fs
192 POP_GS \pop
193 .pushsection .fixup, "ax"
194 4: movl $0, (%esp)
195 jmp 1b
196 5: movl $0, (%esp)
197 jmp 2b
198 6: movl $0, (%esp)
199 jmp 3b
200 .popsection
201 _ASM_EXTABLE(1b, 4b)
202 _ASM_EXTABLE(2b, 5b)
203 _ASM_EXTABLE(3b, 6b)
204 POP_GS_EX
205 .endm
206
207 ENTRY(ret_from_fork)
208 pushl %eax
209 call schedule_tail
210 popl %eax
211
212 /* When we fork, we trace the syscall return in the child, too. */
213 movl %esp, %eax
214 call syscall_return_slowpath
215 jmp restore_all
216 END(ret_from_fork)
217
218 ENTRY(ret_from_kernel_thread)
219 pushl %eax
220 call schedule_tail
221 popl %eax
222 movl PT_EBP(%esp), %eax
223 call *PT_EBX(%esp)
224 movl $0, PT_EAX(%esp)
225
226 /*
227 * Kernel threads return to userspace as if returning from a syscall.
228 * We should check whether anything actually uses this path and, if so,
229 * consider switching it over to ret_from_fork.
230 */
231 movl %esp, %eax
232 call syscall_return_slowpath
233 jmp restore_all
234 ENDPROC(ret_from_kernel_thread)
235
236 /*
237 * Return to user mode is not as complex as all this looks,
238 * but we want the default path for a system call return to
239 * go as quickly as possible which is why some of this is
240 * less clear than it otherwise should be.
241 */
242
243 # userspace resumption stub bypassing syscall exit tracing
244 ALIGN
245 ret_from_exception:
246 preempt_stop(CLBR_ANY)
247 ret_from_intr:
248 #ifdef CONFIG_VM86
249 movl PT_EFLAGS(%esp), %eax # mix EFLAGS and CS
250 movb PT_CS(%esp), %al
251 andl $(X86_EFLAGS_VM | SEGMENT_RPL_MASK), %eax
252 #else
253 /*
254 * We can be coming here from child spawned by kernel_thread().
255 */
256 movl PT_CS(%esp), %eax
257 andl $SEGMENT_RPL_MASK, %eax
258 #endif
259 cmpl $USER_RPL, %eax
260 jb resume_kernel # not returning to v8086 or userspace
261
262 ENTRY(resume_userspace)
263 DISABLE_INTERRUPTS(CLBR_ANY)
264 TRACE_IRQS_OFF
265 movl %esp, %eax
266 call prepare_exit_to_usermode
267 jmp restore_all
268 END(ret_from_exception)
269
270 #ifdef CONFIG_PREEMPT
271 ENTRY(resume_kernel)
272 DISABLE_INTERRUPTS(CLBR_ANY)
273 need_resched:
274 cmpl $0, PER_CPU_VAR(__preempt_count)
275 jnz restore_all
276 testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off (exception path) ?
277 jz restore_all
278 call preempt_schedule_irq
279 jmp need_resched
280 END(resume_kernel)
281 #endif
282
283 GLOBAL(__begin_SYSENTER_singlestep_region)
284 /*
285 * All code from here through __end_SYSENTER_singlestep_region is subject
286 * to being single-stepped if a user program sets TF and executes SYSENTER.
287 * There is absolutely nothing that we can do to prevent this from happening
288 * (thanks Intel!). To keep our handling of this situation as simple as
289 * possible, we handle TF just like AC and NT, except that our #DB handler
290 * will ignore all of the single-step traps generated in this range.
291 */
292
293 #ifdef CONFIG_XEN
294 /*
295 * Xen doesn't set %esp to be precisely what the normal SYSENTER
296 * entry point expects, so fix it up before using the normal path.
297 */
298 ENTRY(xen_sysenter_target)
299 addl $5*4, %esp /* remove xen-provided frame */
300 jmp sysenter_past_esp
301 #endif
302
303 /*
304 * 32-bit SYSENTER entry.
305 *
306 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
307 * if X86_FEATURE_SEP is available. This is the preferred system call
308 * entry on 32-bit systems.
309 *
310 * The SYSENTER instruction, in principle, should *only* occur in the
311 * vDSO. In practice, a small number of Android devices were shipped
312 * with a copy of Bionic that inlined a SYSENTER instruction. This
313 * never happened in any of Google's Bionic versions -- it only happened
314 * in a narrow range of Intel-provided versions.
315 *
316 * SYSENTER loads SS, ESP, CS, and EIP from previously programmed MSRs.
317 * IF and VM in RFLAGS are cleared (IOW: interrupts are off).
318 * SYSENTER does not save anything on the stack,
319 * and does not save old EIP (!!!), ESP, or EFLAGS.
320 *
321 * To avoid losing track of EFLAGS.VM (and thus potentially corrupting
322 * user and/or vm86 state), we explicitly disable the SYSENTER
323 * instruction in vm86 mode by reprogramming the MSRs.
324 *
325 * Arguments:
326 * eax system call number
327 * ebx arg1
328 * ecx arg2
329 * edx arg3
330 * esi arg4
331 * edi arg5
332 * ebp user stack
333 * 0(%ebp) arg6
334 */
335 ENTRY(entry_SYSENTER_32)
336 movl TSS_sysenter_sp0(%esp), %esp
337 sysenter_past_esp:
338 pushl $__USER_DS /* pt_regs->ss */
339 pushl %ebp /* pt_regs->sp (stashed in bp) */
340 pushfl /* pt_regs->flags (except IF = 0) */
341 orl $X86_EFLAGS_IF, (%esp) /* Fix IF */
342 pushl $__USER_CS /* pt_regs->cs */
343 pushl $0 /* pt_regs->ip = 0 (placeholder) */
344 pushl %eax /* pt_regs->orig_ax */
345 SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest */
346
347 /*
348 * SYSENTER doesn't filter flags, so we need to clear NT, AC
349 * and TF ourselves. To save a few cycles, we can check whether
350 * either was set instead of doing an unconditional popfq.
351 * This needs to happen before enabling interrupts so that
352 * we don't get preempted with NT set.
353 *
354 * If TF is set, we will single-step all the way to here -- do_debug
355 * will ignore all the traps. (Yes, this is slow, but so is
356 * single-stepping in general. This allows us to avoid having
357 * a more complicated code to handle the case where a user program
358 * forces us to single-step through the SYSENTER entry code.)
359 *
360 * NB.: .Lsysenter_fix_flags is a label with the code under it moved
361 * out-of-line as an optimization: NT is unlikely to be set in the
362 * majority of the cases and instead of polluting the I$ unnecessarily,
363 * we're keeping that code behind a branch which will predict as
364 * not-taken and therefore its instructions won't be fetched.
365 */
366 testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, PT_EFLAGS(%esp)
367 jnz .Lsysenter_fix_flags
368 .Lsysenter_flags_fixed:
369
370 /*
371 * User mode is traced as though IRQs are on, and SYSENTER
372 * turned them off.
373 */
374 TRACE_IRQS_OFF
375
376 movl %esp, %eax
377 call do_fast_syscall_32
378 /* XEN PV guests always use IRET path */
379 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \
380 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV
381
382 /* Opportunistic SYSEXIT */
383 TRACE_IRQS_ON /* User mode traces as IRQs on. */
384 movl PT_EIP(%esp), %edx /* pt_regs->ip */
385 movl PT_OLDESP(%esp), %ecx /* pt_regs->sp */
386 1: mov PT_FS(%esp), %fs
387 PTGS_TO_GS
388 popl %ebx /* pt_regs->bx */
389 addl $2*4, %esp /* skip pt_regs->cx and pt_regs->dx */
390 popl %esi /* pt_regs->si */
391 popl %edi /* pt_regs->di */
392 popl %ebp /* pt_regs->bp */
393 popl %eax /* pt_regs->ax */
394
395 /*
396 * Restore all flags except IF. (We restore IF separately because
397 * STI gives a one-instruction window in which we won't be interrupted,
398 * whereas POPF does not.)
399 */
400 addl $PT_EFLAGS-PT_DS, %esp /* point esp at pt_regs->flags */
401 btr $X86_EFLAGS_IF_BIT, (%esp)
402 popfl
403
404 /*
405 * Return back to the vDSO, which will pop ecx and edx.
406 * Don't bother with DS and ES (they already contain __USER_DS).
407 */
408 sti
409 sysexit
410
411 .pushsection .fixup, "ax"
412 2: movl $0, PT_FS(%esp)
413 jmp 1b
414 .popsection
415 _ASM_EXTABLE(1b, 2b)
416 PTGS_TO_GS_EX
417
418 .Lsysenter_fix_flags:
419 pushl $X86_EFLAGS_FIXED
420 popfl
421 jmp .Lsysenter_flags_fixed
422 GLOBAL(__end_SYSENTER_singlestep_region)
423 ENDPROC(entry_SYSENTER_32)
424
425 /*
426 * 32-bit legacy system call entry.
427 *
428 * 32-bit x86 Linux system calls traditionally used the INT $0x80
429 * instruction. INT $0x80 lands here.
430 *
431 * This entry point can be used by any 32-bit perform system calls.
432 * Instances of INT $0x80 can be found inline in various programs and
433 * libraries. It is also used by the vDSO's __kernel_vsyscall
434 * fallback for hardware that doesn't support a faster entry method.
435 * Restarted 32-bit system calls also fall back to INT $0x80
436 * regardless of what instruction was originally used to do the system
437 * call. (64-bit programs can use INT $0x80 as well, but they can
438 * only run on 64-bit kernels and therefore land in
439 * entry_INT80_compat.)
440 *
441 * This is considered a slow path. It is not used by most libc
442 * implementations on modern hardware except during process startup.
443 *
444 * Arguments:
445 * eax system call number
446 * ebx arg1
447 * ecx arg2
448 * edx arg3
449 * esi arg4
450 * edi arg5
451 * ebp arg6
452 */
453 ENTRY(entry_INT80_32)
454 ASM_CLAC
455 pushl %eax /* pt_regs->orig_ax */
456 SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest */
457
458 /*
459 * User mode is traced as though IRQs are on, and the interrupt gate
460 * turned them off.
461 */
462 TRACE_IRQS_OFF
463
464 movl %esp, %eax
465 call do_int80_syscall_32
466 .Lsyscall_32_done:
467
468 restore_all:
469 TRACE_IRQS_IRET
470 restore_all_notrace:
471 #ifdef CONFIG_X86_ESPFIX32
472 ALTERNATIVE "jmp restore_nocheck", "", X86_BUG_ESPFIX
473
474 movl PT_EFLAGS(%esp), %eax # mix EFLAGS, SS and CS
475 /*
476 * Warning: PT_OLDSS(%esp) contains the wrong/random values if we
477 * are returning to the kernel.
478 * See comments in process.c:copy_thread() for details.
479 */
480 movb PT_OLDSS(%esp), %ah
481 movb PT_CS(%esp), %al
482 andl $(X86_EFLAGS_VM | (SEGMENT_TI_MASK << 8) | SEGMENT_RPL_MASK), %eax
483 cmpl $((SEGMENT_LDT << 8) | USER_RPL), %eax
484 je ldt_ss # returning to user-space with LDT SS
485 #endif
486 restore_nocheck:
487 RESTORE_REGS 4 # skip orig_eax/error_code
488 irq_return:
489 INTERRUPT_RETURN
490 .section .fixup, "ax"
491 ENTRY(iret_exc )
492 pushl $0 # no error code
493 pushl $do_iret_error
494 jmp error_code
495 .previous
496 _ASM_EXTABLE(irq_return, iret_exc)
497
498 #ifdef CONFIG_X86_ESPFIX32
499 ldt_ss:
500 /*
501 * Setup and switch to ESPFIX stack
502 *
503 * We're returning to userspace with a 16 bit stack. The CPU will not
504 * restore the high word of ESP for us on executing iret... This is an
505 * "official" bug of all the x86-compatible CPUs, which we can work
506 * around to make dosemu and wine happy. We do this by preloading the
507 * high word of ESP with the high word of the userspace ESP while
508 * compensating for the offset by changing to the ESPFIX segment with
509 * a base address that matches for the difference.
510 */
511 #define GDT_ESPFIX_SS PER_CPU_VAR(gdt_page) + (GDT_ENTRY_ESPFIX_SS * 8)
512 mov %esp, %edx /* load kernel esp */
513 mov PT_OLDESP(%esp), %eax /* load userspace esp */
514 mov %dx, %ax /* eax: new kernel esp */
515 sub %eax, %edx /* offset (low word is 0) */
516 shr $16, %edx
517 mov %dl, GDT_ESPFIX_SS + 4 /* bits 16..23 */
518 mov %dh, GDT_ESPFIX_SS + 7 /* bits 24..31 */
519 pushl $__ESPFIX_SS
520 pushl %eax /* new kernel esp */
521 /*
522 * Disable interrupts, but do not irqtrace this section: we
523 * will soon execute iret and the tracer was already set to
524 * the irqstate after the IRET:
525 */
526 DISABLE_INTERRUPTS(CLBR_EAX)
527 lss (%esp), %esp /* switch to espfix segment */
528 jmp restore_nocheck
529 #endif
530 ENDPROC(entry_INT80_32)
531
532 .macro FIXUP_ESPFIX_STACK
533 /*
534 * Switch back for ESPFIX stack to the normal zerobased stack
535 *
536 * We can't call C functions using the ESPFIX stack. This code reads
537 * the high word of the segment base from the GDT and swiches to the
538 * normal stack and adjusts ESP with the matching offset.
539 */
540 #ifdef CONFIG_X86_ESPFIX32
541 /* fixup the stack */
542 mov GDT_ESPFIX_SS + 4, %al /* bits 16..23 */
543 mov GDT_ESPFIX_SS + 7, %ah /* bits 24..31 */
544 shl $16, %eax
545 addl %esp, %eax /* the adjusted stack pointer */
546 pushl $__KERNEL_DS
547 pushl %eax
548 lss (%esp), %esp /* switch to the normal stack segment */
549 #endif
550 .endm
551 .macro UNWIND_ESPFIX_STACK
552 #ifdef CONFIG_X86_ESPFIX32
553 movl %ss, %eax
554 /* see if on espfix stack */
555 cmpw $__ESPFIX_SS, %ax
556 jne 27f
557 movl $__KERNEL_DS, %eax
558 movl %eax, %ds
559 movl %eax, %es
560 /* switch to normal stack */
561 FIXUP_ESPFIX_STACK
562 27:
563 #endif
564 .endm
565
566 /*
567 * Build the entry stubs with some assembler magic.
568 * We pack 1 stub into every 8-byte block.
569 */
570 .align 8
571 ENTRY(irq_entries_start)
572 vector=FIRST_EXTERNAL_VECTOR
573 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
574 pushl $(~vector+0x80) /* Note: always in signed byte range */
575 vector=vector+1
576 jmp common_interrupt
577 .align 8
578 .endr
579 END(irq_entries_start)
580
581 /*
582 * the CPU automatically disables interrupts when executing an IRQ vector,
583 * so IRQ-flags tracing has to follow that:
584 */
585 .p2align CONFIG_X86_L1_CACHE_SHIFT
586 common_interrupt:
587 ASM_CLAC
588 addl $-0x80, (%esp) /* Adjust vector into the [-256, -1] range */
589 SAVE_ALL
590 TRACE_IRQS_OFF
591 movl %esp, %eax
592 call do_IRQ
593 jmp ret_from_intr
594 ENDPROC(common_interrupt)
595
596 #define BUILD_INTERRUPT3(name, nr, fn) \
597 ENTRY(name) \
598 ASM_CLAC; \
599 pushl $~(nr); \
600 SAVE_ALL; \
601 TRACE_IRQS_OFF \
602 movl %esp, %eax; \
603 call fn; \
604 jmp ret_from_intr; \
605 ENDPROC(name)
606
607
608 #ifdef CONFIG_TRACING
609 # define TRACE_BUILD_INTERRUPT(name, nr) BUILD_INTERRUPT3(trace_##name, nr, smp_trace_##name)
610 #else
611 # define TRACE_BUILD_INTERRUPT(name, nr)
612 #endif
613
614 #define BUILD_INTERRUPT(name, nr) \
615 BUILD_INTERRUPT3(name, nr, smp_##name); \
616 TRACE_BUILD_INTERRUPT(name, nr)
617
618 /* The include is where all of the SMP etc. interrupts come from */
619 #include <asm/entry_arch.h>
620
621 ENTRY(coprocessor_error)
622 ASM_CLAC
623 pushl $0
624 pushl $do_coprocessor_error
625 jmp error_code
626 END(coprocessor_error)
627
628 ENTRY(simd_coprocessor_error)
629 ASM_CLAC
630 pushl $0
631 #ifdef CONFIG_X86_INVD_BUG
632 /* AMD 486 bug: invd from userspace calls exception 19 instead of #GP */
633 ALTERNATIVE "pushl $do_general_protection", \
634 "pushl $do_simd_coprocessor_error", \
635 X86_FEATURE_XMM
636 #else
637 pushl $do_simd_coprocessor_error
638 #endif
639 jmp error_code
640 END(simd_coprocessor_error)
641
642 ENTRY(device_not_available)
643 ASM_CLAC
644 pushl $-1 # mark this as an int
645 pushl $do_device_not_available
646 jmp error_code
647 END(device_not_available)
648
649 #ifdef CONFIG_PARAVIRT
650 ENTRY(native_iret)
651 iret
652 _ASM_EXTABLE(native_iret, iret_exc)
653 END(native_iret)
654 #endif
655
656 ENTRY(overflow)
657 ASM_CLAC
658 pushl $0
659 pushl $do_overflow
660 jmp error_code
661 END(overflow)
662
663 ENTRY(bounds)
664 ASM_CLAC
665 pushl $0
666 pushl $do_bounds
667 jmp error_code
668 END(bounds)
669
670 ENTRY(invalid_op)
671 ASM_CLAC
672 pushl $0
673 pushl $do_invalid_op
674 jmp error_code
675 END(invalid_op)
676
677 ENTRY(coprocessor_segment_overrun)
678 ASM_CLAC
679 pushl $0
680 pushl $do_coprocessor_segment_overrun
681 jmp error_code
682 END(coprocessor_segment_overrun)
683
684 ENTRY(invalid_TSS)
685 ASM_CLAC
686 pushl $do_invalid_TSS
687 jmp error_code
688 END(invalid_TSS)
689
690 ENTRY(segment_not_present)
691 ASM_CLAC
692 pushl $do_segment_not_present
693 jmp error_code
694 END(segment_not_present)
695
696 ENTRY(stack_segment)
697 ASM_CLAC
698 pushl $do_stack_segment
699 jmp error_code
700 END(stack_segment)
701
702 ENTRY(alignment_check)
703 ASM_CLAC
704 pushl $do_alignment_check
705 jmp error_code
706 END(alignment_check)
707
708 ENTRY(divide_error)
709 ASM_CLAC
710 pushl $0 # no error code
711 pushl $do_divide_error
712 jmp error_code
713 END(divide_error)
714
715 #ifdef CONFIG_X86_MCE
716 ENTRY(machine_check)
717 ASM_CLAC
718 pushl $0
719 pushl machine_check_vector
720 jmp error_code
721 END(machine_check)
722 #endif
723
724 ENTRY(spurious_interrupt_bug)
725 ASM_CLAC
726 pushl $0
727 pushl $do_spurious_interrupt_bug
728 jmp error_code
729 END(spurious_interrupt_bug)
730
731 #ifdef CONFIG_XEN
732 ENTRY(xen_hypervisor_callback)
733 pushl $-1 /* orig_ax = -1 => not a system call */
734 SAVE_ALL
735 TRACE_IRQS_OFF
736
737 /*
738 * Check to see if we got the event in the critical
739 * region in xen_iret_direct, after we've reenabled
740 * events and checked for pending events. This simulates
741 * iret instruction's behaviour where it delivers a
742 * pending interrupt when enabling interrupts:
743 */
744 movl PT_EIP(%esp), %eax
745 cmpl $xen_iret_start_crit, %eax
746 jb 1f
747 cmpl $xen_iret_end_crit, %eax
748 jae 1f
749
750 jmp xen_iret_crit_fixup
751
752 ENTRY(xen_do_upcall)
753 1: mov %esp, %eax
754 call xen_evtchn_do_upcall
755 #ifndef CONFIG_PREEMPT
756 call xen_maybe_preempt_hcall
757 #endif
758 jmp ret_from_intr
759 ENDPROC(xen_hypervisor_callback)
760
761 /*
762 * Hypervisor uses this for application faults while it executes.
763 * We get here for two reasons:
764 * 1. Fault while reloading DS, ES, FS or GS
765 * 2. Fault while executing IRET
766 * Category 1 we fix up by reattempting the load, and zeroing the segment
767 * register if the load fails.
768 * Category 2 we fix up by jumping to do_iret_error. We cannot use the
769 * normal Linux return path in this case because if we use the IRET hypercall
770 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
771 * We distinguish between categories by maintaining a status value in EAX.
772 */
773 ENTRY(xen_failsafe_callback)
774 pushl %eax
775 movl $1, %eax
776 1: mov 4(%esp), %ds
777 2: mov 8(%esp), %es
778 3: mov 12(%esp), %fs
779 4: mov 16(%esp), %gs
780 /* EAX == 0 => Category 1 (Bad segment)
781 EAX != 0 => Category 2 (Bad IRET) */
782 testl %eax, %eax
783 popl %eax
784 lea 16(%esp), %esp
785 jz 5f
786 jmp iret_exc
787 5: pushl $-1 /* orig_ax = -1 => not a system call */
788 SAVE_ALL
789 jmp ret_from_exception
790
791 .section .fixup, "ax"
792 6: xorl %eax, %eax
793 movl %eax, 4(%esp)
794 jmp 1b
795 7: xorl %eax, %eax
796 movl %eax, 8(%esp)
797 jmp 2b
798 8: xorl %eax, %eax
799 movl %eax, 12(%esp)
800 jmp 3b
801 9: xorl %eax, %eax
802 movl %eax, 16(%esp)
803 jmp 4b
804 .previous
805 _ASM_EXTABLE(1b, 6b)
806 _ASM_EXTABLE(2b, 7b)
807 _ASM_EXTABLE(3b, 8b)
808 _ASM_EXTABLE(4b, 9b)
809 ENDPROC(xen_failsafe_callback)
810
811 BUILD_INTERRUPT3(xen_hvm_callback_vector, HYPERVISOR_CALLBACK_VECTOR,
812 xen_evtchn_do_upcall)
813
814 #endif /* CONFIG_XEN */
815
816 #if IS_ENABLED(CONFIG_HYPERV)
817
818 BUILD_INTERRUPT3(hyperv_callback_vector, HYPERVISOR_CALLBACK_VECTOR,
819 hyperv_vector_handler)
820
821 #endif /* CONFIG_HYPERV */
822
823 #ifdef CONFIG_FUNCTION_TRACER
824 #ifdef CONFIG_DYNAMIC_FTRACE
825
826 ENTRY(mcount)
827 ret
828 END(mcount)
829
830 ENTRY(ftrace_caller)
831 pushl %eax
832 pushl %ecx
833 pushl %edx
834 pushl $0 /* Pass NULL as regs pointer */
835 movl 4*4(%esp), %eax
836 movl 0x4(%ebp), %edx
837 movl function_trace_op, %ecx
838 subl $MCOUNT_INSN_SIZE, %eax
839
840 .globl ftrace_call
841 ftrace_call:
842 call ftrace_stub
843
844 addl $4, %esp /* skip NULL pointer */
845 popl %edx
846 popl %ecx
847 popl %eax
848 ftrace_ret:
849 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
850 .globl ftrace_graph_call
851 ftrace_graph_call:
852 jmp ftrace_stub
853 #endif
854
855 .globl ftrace_stub
856 ftrace_stub:
857 ret
858 END(ftrace_caller)
859
860 ENTRY(ftrace_regs_caller)
861 pushf /* push flags before compare (in cs location) */
862
863 /*
864 * i386 does not save SS and ESP when coming from kernel.
865 * Instead, to get sp, &regs->sp is used (see ptrace.h).
866 * Unfortunately, that means eflags must be at the same location
867 * as the current return ip is. We move the return ip into the
868 * ip location, and move flags into the return ip location.
869 */
870 pushl 4(%esp) /* save return ip into ip slot */
871
872 pushl $0 /* Load 0 into orig_ax */
873 pushl %gs
874 pushl %fs
875 pushl %es
876 pushl %ds
877 pushl %eax
878 pushl %ebp
879 pushl %edi
880 pushl %esi
881 pushl %edx
882 pushl %ecx
883 pushl %ebx
884
885 movl 13*4(%esp), %eax /* Get the saved flags */
886 movl %eax, 14*4(%esp) /* Move saved flags into regs->flags location */
887 /* clobbering return ip */
888 movl $__KERNEL_CS, 13*4(%esp)
889
890 movl 12*4(%esp), %eax /* Load ip (1st parameter) */
891 subl $MCOUNT_INSN_SIZE, %eax /* Adjust ip */
892 movl 0x4(%ebp), %edx /* Load parent ip (2nd parameter) */
893 movl function_trace_op, %ecx /* Save ftrace_pos in 3rd parameter */
894 pushl %esp /* Save pt_regs as 4th parameter */
895
896 GLOBAL(ftrace_regs_call)
897 call ftrace_stub
898
899 addl $4, %esp /* Skip pt_regs */
900 movl 14*4(%esp), %eax /* Move flags back into cs */
901 movl %eax, 13*4(%esp) /* Needed to keep addl from modifying flags */
902 movl 12*4(%esp), %eax /* Get return ip from regs->ip */
903 movl %eax, 14*4(%esp) /* Put return ip back for ret */
904
905 popl %ebx
906 popl %ecx
907 popl %edx
908 popl %esi
909 popl %edi
910 popl %ebp
911 popl %eax
912 popl %ds
913 popl %es
914 popl %fs
915 popl %gs
916 addl $8, %esp /* Skip orig_ax and ip */
917 popf /* Pop flags at end (no addl to corrupt flags) */
918 jmp ftrace_ret
919
920 popf
921 jmp ftrace_stub
922 #else /* ! CONFIG_DYNAMIC_FTRACE */
923
924 ENTRY(mcount)
925 cmpl $__PAGE_OFFSET, %esp
926 jb ftrace_stub /* Paging not enabled yet? */
927
928 cmpl $ftrace_stub, ftrace_trace_function
929 jnz trace
930 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
931 cmpl $ftrace_stub, ftrace_graph_return
932 jnz ftrace_graph_caller
933
934 cmpl $ftrace_graph_entry_stub, ftrace_graph_entry
935 jnz ftrace_graph_caller
936 #endif
937 .globl ftrace_stub
938 ftrace_stub:
939 ret
940
941 /* taken from glibc */
942 trace:
943 pushl %eax
944 pushl %ecx
945 pushl %edx
946 movl 0xc(%esp), %eax
947 movl 0x4(%ebp), %edx
948 subl $MCOUNT_INSN_SIZE, %eax
949
950 call *ftrace_trace_function
951
952 popl %edx
953 popl %ecx
954 popl %eax
955 jmp ftrace_stub
956 END(mcount)
957 #endif /* CONFIG_DYNAMIC_FTRACE */
958 #endif /* CONFIG_FUNCTION_TRACER */
959
960 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
961 ENTRY(ftrace_graph_caller)
962 pushl %eax
963 pushl %ecx
964 pushl %edx
965 movl 0xc(%esp), %eax
966 lea 0x4(%ebp), %edx
967 movl (%ebp), %ecx
968 subl $MCOUNT_INSN_SIZE, %eax
969 call prepare_ftrace_return
970 popl %edx
971 popl %ecx
972 popl %eax
973 ret
974 END(ftrace_graph_caller)
975
976 .globl return_to_handler
977 return_to_handler:
978 pushl %eax
979 pushl %edx
980 movl %ebp, %eax
981 call ftrace_return_to_handler
982 movl %eax, %ecx
983 popl %edx
984 popl %eax
985 jmp *%ecx
986 #endif
987
988 #ifdef CONFIG_TRACING
989 ENTRY(trace_page_fault)
990 ASM_CLAC
991 pushl $trace_do_page_fault
992 jmp error_code
993 END(trace_page_fault)
994 #endif
995
996 ENTRY(page_fault)
997 ASM_CLAC
998 pushl $do_page_fault
999 ALIGN
1000 error_code:
1001 /* the function address is in %gs's slot on the stack */
1002 pushl %fs
1003 pushl %es
1004 pushl %ds
1005 pushl %eax
1006 pushl %ebp
1007 pushl %edi
1008 pushl %esi
1009 pushl %edx
1010 pushl %ecx
1011 pushl %ebx
1012 cld
1013 movl $(__KERNEL_PERCPU), %ecx
1014 movl %ecx, %fs
1015 UNWIND_ESPFIX_STACK
1016 GS_TO_REG %ecx
1017 movl PT_GS(%esp), %edi # get the function address
1018 movl PT_ORIG_EAX(%esp), %edx # get the error code
1019 movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart
1020 REG_TO_PTGS %ecx
1021 SET_KERNEL_GS %ecx
1022 movl $(__USER_DS), %ecx
1023 movl %ecx, %ds
1024 movl %ecx, %es
1025 TRACE_IRQS_OFF
1026 movl %esp, %eax # pt_regs pointer
1027 call *%edi
1028 jmp ret_from_exception
1029 END(page_fault)
1030
1031 ENTRY(debug)
1032 /*
1033 * #DB can happen at the first instruction of
1034 * entry_SYSENTER_32 or in Xen's SYSENTER prologue. If this
1035 * happens, then we will be running on a very small stack. We
1036 * need to detect this condition and switch to the thread
1037 * stack before calling any C code at all.
1038 *
1039 * If you edit this code, keep in mind that NMIs can happen in here.
1040 */
1041 ASM_CLAC
1042 pushl $-1 # mark this as an int
1043 SAVE_ALL
1044 xorl %edx, %edx # error code 0
1045 movl %esp, %eax # pt_regs pointer
1046
1047 /* Are we currently on the SYSENTER stack? */
1048 PER_CPU(cpu_tss + CPU_TSS_SYSENTER_stack + SIZEOF_SYSENTER_stack, %ecx)
1049 subl %eax, %ecx /* ecx = (end of SYSENTER_stack) - esp */
1050 cmpl $SIZEOF_SYSENTER_stack, %ecx
1051 jb .Ldebug_from_sysenter_stack
1052
1053 TRACE_IRQS_OFF
1054 call do_debug
1055 jmp ret_from_exception
1056
1057 .Ldebug_from_sysenter_stack:
1058 /* We're on the SYSENTER stack. Switch off. */
1059 movl %esp, %ebp
1060 movl PER_CPU_VAR(cpu_current_top_of_stack), %esp
1061 TRACE_IRQS_OFF
1062 call do_debug
1063 movl %ebp, %esp
1064 jmp ret_from_exception
1065 END(debug)
1066
1067 /*
1068 * NMI is doubly nasty. It can happen on the first instruction of
1069 * entry_SYSENTER_32 (just like #DB), but it can also interrupt the beginning
1070 * of the #DB handler even if that #DB in turn hit before entry_SYSENTER_32
1071 * switched stacks. We handle both conditions by simply checking whether we
1072 * interrupted kernel code running on the SYSENTER stack.
1073 */
1074 ENTRY(nmi)
1075 ASM_CLAC
1076 #ifdef CONFIG_X86_ESPFIX32
1077 pushl %eax
1078 movl %ss, %eax
1079 cmpw $__ESPFIX_SS, %ax
1080 popl %eax
1081 je nmi_espfix_stack
1082 #endif
1083
1084 pushl %eax # pt_regs->orig_ax
1085 SAVE_ALL
1086 xorl %edx, %edx # zero error code
1087 movl %esp, %eax # pt_regs pointer
1088
1089 /* Are we currently on the SYSENTER stack? */
1090 PER_CPU(cpu_tss + CPU_TSS_SYSENTER_stack + SIZEOF_SYSENTER_stack, %ecx)
1091 subl %eax, %ecx /* ecx = (end of SYSENTER_stack) - esp */
1092 cmpl $SIZEOF_SYSENTER_stack, %ecx
1093 jb .Lnmi_from_sysenter_stack
1094
1095 /* Not on SYSENTER stack. */
1096 call do_nmi
1097 jmp restore_all_notrace
1098
1099 .Lnmi_from_sysenter_stack:
1100 /*
1101 * We're on the SYSENTER stack. Switch off. No one (not even debug)
1102 * is using the thread stack right now, so it's safe for us to use it.
1103 */
1104 movl %esp, %ebp
1105 movl PER_CPU_VAR(cpu_current_top_of_stack), %esp
1106 call do_nmi
1107 movl %ebp, %esp
1108 jmp restore_all_notrace
1109
1110 #ifdef CONFIG_X86_ESPFIX32
1111 nmi_espfix_stack:
1112 /*
1113 * create the pointer to lss back
1114 */
1115 pushl %ss
1116 pushl %esp
1117 addl $4, (%esp)
1118 /* copy the iret frame of 12 bytes */
1119 .rept 3
1120 pushl 16(%esp)
1121 .endr
1122 pushl %eax
1123 SAVE_ALL
1124 FIXUP_ESPFIX_STACK # %eax == %esp
1125 xorl %edx, %edx # zero error code
1126 call do_nmi
1127 RESTORE_REGS
1128 lss 12+4(%esp), %esp # back to espfix stack
1129 jmp irq_return
1130 #endif
1131 END(nmi)
1132
1133 ENTRY(int3)
1134 ASM_CLAC
1135 pushl $-1 # mark this as an int
1136 SAVE_ALL
1137 TRACE_IRQS_OFF
1138 xorl %edx, %edx # zero error code
1139 movl %esp, %eax # pt_regs pointer
1140 call do_int3
1141 jmp ret_from_exception
1142 END(int3)
1143
1144 ENTRY(general_protection)
1145 pushl $do_general_protection
1146 jmp error_code
1147 END(general_protection)
1148
1149 #ifdef CONFIG_KVM_GUEST
1150 ENTRY(async_page_fault)
1151 ASM_CLAC
1152 pushl $do_async_page_fault
1153 jmp error_code
1154 END(async_page_fault)
1155 #endif
1156
1157 ENTRY(rewind_stack_do_exit)
1158 /* Prevent any naive code from trying to unwind to our caller. */
1159 xorl %ebp, %ebp
1160
1161 movl PER_CPU_VAR(cpu_current_top_of_stack), %esi
1162 leal -TOP_OF_KERNEL_STACK_PADDING-PTREGS_SIZE(%esi), %esp
1163
1164 call do_exit
1165 1: jmp 1b
1166 END(rewind_stack_do_exit)
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