2 * linux/arch/x86_64/entry.S
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
8 * entry.S contains the system-call and fault low-level handling routines.
10 * Some of this is documented in Documentation/x86/entry_64.txt
12 * A note on terminology:
13 * - iret frame: Architecture defined interrupt frame from SS to RIP
14 * at the top of the kernel process stack.
17 * - ENTRY/END: Define functions in the symbol table.
18 * - TRACE_IRQ_*: Trace hardirq state for lock debugging.
19 * - idtentry: Define exception entry points.
21 #include <linux/linkage.h>
22 #include <asm/segment.h>
23 #include <asm/cache.h>
24 #include <asm/errno.h>
26 #include <asm/asm-offsets.h>
28 #include <asm/unistd.h>
29 #include <asm/thread_info.h>
30 #include <asm/hw_irq.h>
31 #include <asm/page_types.h>
32 #include <asm/irqflags.h>
33 #include <asm/paravirt.h>
34 #include <asm/percpu.h>
37 #include <asm/pgtable_types.h>
38 #include <linux/err.h>
40 /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */
41 #include <linux/elf-em.h>
42 #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
43 #define __AUDIT_ARCH_64BIT 0x80000000
44 #define __AUDIT_ARCH_LE 0x40000000
47 .section .entry.text, "ax"
49 #ifdef CONFIG_PARAVIRT
50 ENTRY(native_usergs_sysret64)
53 ENDPROC(native_usergs_sysret64)
54 #endif /* CONFIG_PARAVIRT */
56 .macro TRACE_IRQS_IRETQ
57 #ifdef CONFIG_TRACE_IRQFLAGS
58 bt $9, EFLAGS(%rsp) /* interrupts off? */
66 * When dynamic function tracer is enabled it will add a breakpoint
67 * to all locations that it is about to modify, sync CPUs, update
68 * all the code, sync CPUs, then remove the breakpoints. In this time
69 * if lockdep is enabled, it might jump back into the debug handler
70 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
72 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
73 * make sure the stack pointer does not get reset back to the top
74 * of the debug stack, and instead just reuses the current stack.
76 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
78 .macro TRACE_IRQS_OFF_DEBUG
79 call debug_stack_set_zero
81 call debug_stack_reset
84 .macro TRACE_IRQS_ON_DEBUG
85 call debug_stack_set_zero
87 call debug_stack_reset
90 .macro TRACE_IRQS_IRETQ_DEBUG
91 bt $9, EFLAGS(%rsp) /* interrupts off? */
98 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
99 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
100 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
104 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
106 * This is the only entry point used for 64-bit system calls. The
107 * hardware interface is reasonably well designed and the register to
108 * argument mapping Linux uses fits well with the registers that are
109 * available when SYSCALL is used.
111 * SYSCALL instructions can be found inlined in libc implementations as
112 * well as some other programs and libraries. There are also a handful
113 * of SYSCALL instructions in the vDSO used, for example, as a
114 * clock_gettimeofday fallback.
116 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
117 * then loads new ss, cs, and rip from previously programmed MSRs.
118 * rflags gets masked by a value from another MSR (so CLD and CLAC
119 * are not needed). SYSCALL does not save anything on the stack
120 * and does not change rsp.
122 * Registers on entry:
123 * rax system call number
125 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
129 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
132 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
134 * Only called from user space.
136 * When user can change pt_regs->foo always force IRET. That is because
137 * it deals with uncanonical addresses better. SYSRET has trouble
138 * with them due to bugs in both AMD and Intel CPUs.
141 ENTRY(entry_SYSCALL_64)
143 * Interrupts are off on entry.
144 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
145 * it is too small to ever cause noticeable irq latency.
149 * A hypervisor implementation might want to use a label
150 * after the swapgs, so that it can do the swapgs
151 * for the guest and jump here on syscall.
153 GLOBAL(entry_SYSCALL_64_after_swapgs)
155 movq %rsp, PER_CPU_VAR(rsp_scratch)
156 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
160 /* Construct struct pt_regs on stack */
161 pushq $__USER_DS /* pt_regs->ss */
162 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
163 pushq %r11 /* pt_regs->flags */
164 pushq $__USER_CS /* pt_regs->cs */
165 pushq %rcx /* pt_regs->ip */
166 pushq %rax /* pt_regs->orig_ax */
167 pushq %rdi /* pt_regs->di */
168 pushq %rsi /* pt_regs->si */
169 pushq %rdx /* pt_regs->dx */
170 pushq %rcx /* pt_regs->cx */
171 pushq $-ENOSYS /* pt_regs->ax */
172 pushq %r8 /* pt_regs->r8 */
173 pushq %r9 /* pt_regs->r9 */
174 pushq %r10 /* pt_regs->r10 */
175 pushq %r11 /* pt_regs->r11 */
176 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */
179 * If we need to do entry work or if we guess we'll need to do
180 * exit work, go straight to the slow path.
182 testl $_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
183 jnz entry_SYSCALL64_slow_path
185 entry_SYSCALL_64_fastpath:
187 * Easy case: enable interrupts and issue the syscall. If the syscall
188 * needs pt_regs, we'll call a stub that disables interrupts again
189 * and jumps to the slow path.
192 ENABLE_INTERRUPTS(CLBR_NONE)
193 #if __SYSCALL_MASK == ~0
194 cmpq $__NR_syscall_max, %rax
196 andl $__SYSCALL_MASK, %eax
197 cmpl $__NR_syscall_max, %eax
199 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
203 * This call instruction is handled specially in stub_ptregs_64.
204 * It might end up jumping to the slow path. If it jumps, RAX
205 * and all argument registers are clobbered.
207 call *sys_call_table(, %rax, 8)
208 .Lentry_SYSCALL_64_after_fastpath_call:
214 * If we get here, then we know that pt_regs is clean for SYSRET64.
215 * If we see that no exit work is required (which we are required
216 * to check with IRQs off), then we can go straight to SYSRET64.
218 DISABLE_INTERRUPTS(CLBR_NONE)
220 testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
224 TRACE_IRQS_ON /* user mode is traced as IRQs on */
226 movq EFLAGS(%rsp), %r11
227 RESTORE_C_REGS_EXCEPT_RCX_R11
233 * The fast path looked good when we started, but something changed
234 * along the way and we need to switch to the slow path. Calling
235 * raise(3) will trigger this, for example. IRQs are off.
238 ENABLE_INTERRUPTS(CLBR_NONE)
241 call syscall_return_slowpath /* returns with IRQs disabled */
242 jmp return_from_SYSCALL_64
244 entry_SYSCALL64_slow_path:
248 call do_syscall_64 /* returns with IRQs disabled */
250 return_from_SYSCALL_64:
252 TRACE_IRQS_IRETQ /* we're about to change IF */
255 * Try to use SYSRET instead of IRET if we're returning to
256 * a completely clean 64-bit userspace context.
260 cmpq %rcx, %r11 /* RCX == RIP */
261 jne opportunistic_sysret_failed
264 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
265 * in kernel space. This essentially lets the user take over
266 * the kernel, since userspace controls RSP.
268 * If width of "canonical tail" ever becomes variable, this will need
269 * to be updated to remain correct on both old and new CPUs.
271 .ifne __VIRTUAL_MASK_SHIFT - 47
272 .error "virtual address width changed -- SYSRET checks need update"
275 /* Change top 16 bits to be the sign-extension of 47th bit */
276 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
277 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
279 /* If this changed %rcx, it was not canonical */
281 jne opportunistic_sysret_failed
283 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
284 jne opportunistic_sysret_failed
287 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */
288 jne opportunistic_sysret_failed
291 * SYSRET can't restore RF. SYSRET can restore TF, but unlike IRET,
292 * restoring TF results in a trap from userspace immediately after
293 * SYSRET. This would cause an infinite loop whenever #DB happens
294 * with register state that satisfies the opportunistic SYSRET
295 * conditions. For example, single-stepping this user code:
297 * movq $stuck_here, %rcx
302 * would never get past 'stuck_here'.
304 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
305 jnz opportunistic_sysret_failed
307 /* nothing to check for RSP */
309 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
310 jne opportunistic_sysret_failed
313 * We win! This label is here just for ease of understanding
314 * perf profiles. Nothing jumps here.
316 syscall_return_via_sysret:
317 /* rcx and r11 are already restored (see code above) */
318 RESTORE_C_REGS_EXCEPT_RCX_R11
322 opportunistic_sysret_failed:
324 jmp restore_c_regs_and_iret
325 END(entry_SYSCALL_64)
327 ENTRY(stub_ptregs_64)
329 * Syscalls marked as needing ptregs land here.
330 * If we are on the fast path, we need to save the extra regs,
331 * which we achieve by trying again on the slow path. If we are on
332 * the slow path, the extra regs are already saved.
334 * RAX stores a pointer to the C function implementing the syscall.
337 cmpq $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp)
341 * Called from fast path -- disable IRQs again, pop return address
342 * and jump to slow path
344 DISABLE_INTERRUPTS(CLBR_NONE)
347 jmp entry_SYSCALL64_slow_path
351 jmp *%rax /* called from C */
354 .macro ptregs_stub func
356 leaq \func(%rip), %rax
361 /* Instantiate ptregs_stub for each ptregs-using syscall */
362 #define __SYSCALL_64_QUAL_(sym)
363 #define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym
364 #define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym)
365 #include <asm/syscalls_64.h>
368 * A newly forked process directly context switches into this address.
370 * rdi: prev task we switched from
373 LOCK ; btr $TIF_FORK, TI_flags(%r8)
376 popfq /* reset kernel eflags */
378 call schedule_tail /* rdi: 'prev' task parameter */
380 testb $3, CS(%rsp) /* from kernel_thread? */
384 * We came from kernel_thread. This code path is quite twisted, and
385 * someone should clean it up.
387 * copy_thread_tls stashes the function pointer in RBX and the
388 * parameter to be passed in RBP. The called function is permitted
389 * to call do_execve and thereby jump to user mode.
396 * Fall through as though we're exiting a syscall. This makes a
397 * twisted sort of sense if we just called do_execve.
402 call syscall_return_slowpath /* returns with IRQs disabled */
403 TRACE_IRQS_ON /* user mode is traced as IRQS on */
405 jmp restore_regs_and_iret
409 * Build the entry stubs with some assembler magic.
410 * We pack 1 stub into every 8-byte block.
413 ENTRY(irq_entries_start)
414 vector=FIRST_EXTERNAL_VECTOR
415 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
416 pushq $(~vector+0x80) /* Note: always in signed byte range */
421 END(irq_entries_start)
424 * Interrupt entry/exit.
426 * Interrupt entry points save only callee clobbered registers in fast path.
428 * Entry runs with interrupts off.
431 /* 0(%rsp): ~(interrupt number) */
432 .macro interrupt func
434 ALLOC_PT_GPREGS_ON_STACK
442 * IRQ from user mode. Switch to kernel gsbase and inform context
443 * tracking that we're in kernel mode.
448 * We need to tell lockdep that IRQs are off. We can't do this until
449 * we fix gsbase, and we should do it before enter_from_user_mode
450 * (which can take locks). Since TRACE_IRQS_OFF idempotent,
451 * the simplest way to handle it is to just call it twice if
452 * we enter from user mode. There's no reason to optimize this since
453 * TRACE_IRQS_OFF is a no-op if lockdep is off.
457 CALL_enter_from_user_mode
461 * Save previous stack pointer, optionally switch to interrupt stack.
462 * irq_count is used to check if a CPU is already on an interrupt stack
463 * or not. While this is essentially redundant with preempt_count it is
464 * a little cheaper to use a separate counter in the PDA (short of
465 * moving irq_enter into assembly, which would be too much work)
468 incl PER_CPU_VAR(irq_count)
469 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
471 /* We entered an interrupt context - irqs are off: */
474 call \func /* rdi points to pt_regs */
478 * The interrupt stubs push (~vector+0x80) onto the stack and
479 * then jump to common_interrupt.
481 .p2align CONFIG_X86_L1_CACHE_SHIFT
484 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
486 /* 0(%rsp): old RSP */
488 DISABLE_INTERRUPTS(CLBR_NONE)
490 decl PER_CPU_VAR(irq_count)
492 /* Restore saved previous stack */
498 /* Interrupt came from user space */
501 call prepare_exit_to_usermode
504 jmp restore_regs_and_iret
506 /* Returning to kernel space */
508 #ifdef CONFIG_PREEMPT
509 /* Interrupts are off */
510 /* Check if we need preemption */
511 bt $9, EFLAGS(%rsp) /* were interrupts off? */
513 0: cmpl $0, PER_CPU_VAR(__preempt_count)
515 call preempt_schedule_irq
520 * The iretq could re-enable interrupts:
525 * At this label, code paths which return to kernel and to user,
526 * which come from interrupts/exception and from syscalls, merge.
528 GLOBAL(restore_regs_and_iret)
530 restore_c_regs_and_iret:
532 REMOVE_PT_GPREGS_FROM_STACK 8
537 * Are we returning to a stack segment from the LDT? Note: in
538 * 64-bit mode SS:RSP on the exception stack is always valid.
540 #ifdef CONFIG_X86_ESPFIX64
541 testb $4, (SS-RIP)(%rsp)
542 jnz native_irq_return_ldt
545 .global native_irq_return_iret
546 native_irq_return_iret:
548 * This may fault. Non-paranoid faults on return to userspace are
549 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
550 * Double-faults due to espfix64 are handled in do_double_fault.
551 * Other faults here are fatal.
555 #ifdef CONFIG_X86_ESPFIX64
556 native_irq_return_ldt:
560 movq PER_CPU_VAR(espfix_waddr), %rdi
561 movq %rax, (0*8)(%rdi) /* RAX */
562 movq (2*8)(%rsp), %rax /* RIP */
563 movq %rax, (1*8)(%rdi)
564 movq (3*8)(%rsp), %rax /* CS */
565 movq %rax, (2*8)(%rdi)
566 movq (4*8)(%rsp), %rax /* RFLAGS */
567 movq %rax, (3*8)(%rdi)
568 movq (6*8)(%rsp), %rax /* SS */
569 movq %rax, (5*8)(%rdi)
570 movq (5*8)(%rsp), %rax /* RSP */
571 movq %rax, (4*8)(%rdi)
572 andl $0xffff0000, %eax
574 orq PER_CPU_VAR(espfix_stack), %rax
578 jmp native_irq_return_iret
580 END(common_interrupt)
585 .macro apicinterrupt3 num sym do_sym
595 #ifdef CONFIG_TRACING
596 #define trace(sym) trace_##sym
597 #define smp_trace(sym) smp_trace_##sym
599 .macro trace_apicinterrupt num sym
600 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
603 .macro trace_apicinterrupt num sym do_sym
607 .macro apicinterrupt num sym do_sym
608 apicinterrupt3 \num \sym \do_sym
609 trace_apicinterrupt \num \sym
613 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
614 apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt
618 apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt
621 apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt
622 apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi
624 #ifdef CONFIG_HAVE_KVM
625 apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
626 apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
629 #ifdef CONFIG_X86_MCE_THRESHOLD
630 apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt
633 #ifdef CONFIG_X86_MCE_AMD
634 apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt
637 #ifdef CONFIG_X86_THERMAL_VECTOR
638 apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt
642 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt
643 apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt
644 apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt
647 apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt
648 apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
650 #ifdef CONFIG_IRQ_WORK
651 apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
655 * Exception entry points.
657 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
659 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
662 .if \shift_ist != -1 && \paranoid == 0
663 .error "using shift_ist requires paranoid=1"
667 PARAVIRT_ADJUST_EXCEPTION_FRAME
669 .ifeq \has_error_code
670 pushq $-1 /* ORIG_RAX: no syscall to restart */
673 ALLOC_PT_GPREGS_ON_STACK
677 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */
684 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
688 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
694 movq %rsp, %rdi /* pt_regs pointer */
697 movq ORIG_RAX(%rsp), %rsi /* get error code */
698 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
700 xorl %esi, %esi /* no error code */
704 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
710 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
713 /* these procedures expect "no swapgs" flag in ebx */
722 * Paranoid entry from userspace. Switch stacks and treat it
723 * as a normal entry. This means that paranoid handlers
724 * run in real process context if user_mode(regs).
730 movq %rsp, %rdi /* pt_regs pointer */
732 movq %rax, %rsp /* switch stack */
734 movq %rsp, %rdi /* pt_regs pointer */
737 movq ORIG_RAX(%rsp), %rsi /* get error code */
738 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
740 xorl %esi, %esi /* no error code */
745 jmp error_exit /* %ebx: no swapgs flag */
750 #ifdef CONFIG_TRACING
751 .macro trace_idtentry sym do_sym has_error_code:req
752 idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
753 idtentry \sym \do_sym has_error_code=\has_error_code
756 .macro trace_idtentry sym do_sym has_error_code:req
757 idtentry \sym \do_sym has_error_code=\has_error_code
761 idtentry divide_error do_divide_error has_error_code=0
762 idtentry overflow do_overflow has_error_code=0
763 idtentry bounds do_bounds has_error_code=0
764 idtentry invalid_op do_invalid_op has_error_code=0
765 idtentry device_not_available do_device_not_available has_error_code=0
766 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
767 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
768 idtentry invalid_TSS do_invalid_TSS has_error_code=1
769 idtentry segment_not_present do_segment_not_present has_error_code=1
770 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
771 idtentry coprocessor_error do_coprocessor_error has_error_code=0
772 idtentry alignment_check do_alignment_check has_error_code=1
773 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
777 * Reload gs selector with exception handling
780 ENTRY(native_load_gs_index)
782 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
786 2: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE
790 END(native_load_gs_index)
792 _ASM_EXTABLE(.Lgs_change, bad_gs)
793 .section .fixup, "ax"
794 /* running with kernelgs */
796 SWAPGS /* switch back to user gs */
798 /* This can't be a string because the preprocessor needs to see it. */
799 movl $__USER_DS, %eax
802 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG
808 /* Call softirq on interrupt stack. Interrupts are off. */
809 ENTRY(do_softirq_own_stack)
812 incl PER_CPU_VAR(irq_count)
813 cmove PER_CPU_VAR(irq_stack_ptr), %rsp
814 push %rbp /* frame pointer backlink */
817 decl PER_CPU_VAR(irq_count)
819 END(do_softirq_own_stack)
822 idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
825 * A note on the "critical region" in our callback handler.
826 * We want to avoid stacking callback handlers due to events occurring
827 * during handling of the last event. To do this, we keep events disabled
828 * until we've done all processing. HOWEVER, we must enable events before
829 * popping the stack frame (can't be done atomically) and so it would still
830 * be possible to get enough handler activations to overflow the stack.
831 * Although unlikely, bugs of that kind are hard to track down, so we'd
832 * like to avoid the possibility.
833 * So, on entry to the handler we detect whether we interrupted an
834 * existing activation in its critical region -- if so, we pop the current
835 * activation and restart the handler using the previous one.
837 ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */
840 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
841 * see the correct pointer to the pt_regs
843 movq %rdi, %rsp /* we don't return, adjust the stack frame */
844 11: incl PER_CPU_VAR(irq_count)
846 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
847 pushq %rbp /* frame pointer backlink */
848 call xen_evtchn_do_upcall
850 decl PER_CPU_VAR(irq_count)
851 #ifndef CONFIG_PREEMPT
852 call xen_maybe_preempt_hcall
855 END(xen_do_hypervisor_callback)
858 * Hypervisor uses this for application faults while it executes.
859 * We get here for two reasons:
860 * 1. Fault while reloading DS, ES, FS or GS
861 * 2. Fault while executing IRET
862 * Category 1 we do not need to fix up as Xen has already reloaded all segment
863 * registers that could be reloaded and zeroed the others.
864 * Category 2 we fix up by killing the current process. We cannot use the
865 * normal Linux return path in this case because if we use the IRET hypercall
866 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
867 * We distinguish between categories by comparing each saved segment register
868 * with its current contents: any discrepancy means we in category 1.
870 ENTRY(xen_failsafe_callback)
883 /* All segments match their saved values => Category 2 (Bad IRET). */
890 jmp general_protection
891 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
895 pushq $-1 /* orig_ax = -1 => not a system call */
896 ALLOC_PT_GPREGS_ON_STACK
900 END(xen_failsafe_callback)
902 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
903 xen_hvm_callback_vector xen_evtchn_do_upcall
905 #endif /* CONFIG_XEN */
907 #if IS_ENABLED(CONFIG_HYPERV)
908 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
909 hyperv_callback_vector hyperv_vector_handler
910 #endif /* CONFIG_HYPERV */
912 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
913 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
914 idtentry stack_segment do_stack_segment has_error_code=1
917 idtentry xen_debug do_debug has_error_code=0
918 idtentry xen_int3 do_int3 has_error_code=0
919 idtentry xen_stack_segment do_stack_segment has_error_code=1
922 idtentry general_protection do_general_protection has_error_code=1
923 trace_idtentry page_fault do_page_fault has_error_code=1
925 #ifdef CONFIG_KVM_GUEST
926 idtentry async_page_fault do_async_page_fault has_error_code=1
929 #ifdef CONFIG_X86_MCE
930 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
934 * Save all registers in pt_regs, and switch gs if needed.
935 * Use slow, but surefire "are we in kernel?" check.
936 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
938 ENTRY(paranoid_entry)
943 movl $MSR_GS_BASE, %ecx
946 js 1f /* negative -> in kernel */
953 * "Paranoid" exit path from exception stack. This is invoked
954 * only on return from non-NMI IST interrupts that came
957 * We may be returning to very strange contexts (e.g. very early
958 * in syscall entry), so checking for preemption here would
959 * be complicated. Fortunately, we there's no good reason
960 * to try to handle preemption here.
962 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it)
965 DISABLE_INTERRUPTS(CLBR_NONE)
967 testl %ebx, %ebx /* swapgs needed? */
968 jnz paranoid_exit_no_swapgs
971 jmp paranoid_exit_restore
972 paranoid_exit_no_swapgs:
973 TRACE_IRQS_IRETQ_DEBUG
974 paranoid_exit_restore:
977 REMOVE_PT_GPREGS_FROM_STACK 8
982 * Save all registers in pt_regs, and switch gs if needed.
983 * Return: EBX=0: came from user mode; EBX=1: otherwise
991 jz .Lerror_kernelspace
993 .Lerror_entry_from_usermode_swapgs:
995 * We entered from user mode or we're pretending to have entered
996 * from user mode due to an IRET fault.
1000 .Lerror_entry_from_usermode_after_swapgs:
1002 * We need to tell lockdep that IRQs are off. We can't do this until
1003 * we fix gsbase, and we should do it before enter_from_user_mode
1004 * (which can take locks).
1007 CALL_enter_from_user_mode
1015 * There are two places in the kernel that can potentially fault with
1016 * usergs. Handle them here. B stepping K8s sometimes report a
1017 * truncated RIP for IRET exceptions returning to compat mode. Check
1018 * for these here too.
1020 .Lerror_kernelspace:
1022 leaq native_irq_return_iret(%rip), %rcx
1023 cmpq %rcx, RIP+8(%rsp)
1025 movl %ecx, %eax /* zero extend */
1026 cmpq %rax, RIP+8(%rsp)
1028 cmpq $.Lgs_change, RIP+8(%rsp)
1029 jne .Lerror_entry_done
1032 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up
1033 * gsbase and proceed. We'll fix up the exception and land in
1034 * .Lgs_change's error handler with kernel gsbase.
1036 jmp .Lerror_entry_from_usermode_swapgs
1039 /* Fix truncated RIP */
1040 movq %rcx, RIP+8(%rsp)
1045 * We came from an IRET to user mode, so we have user gsbase.
1046 * Switch to kernel gsbase:
1051 * Pretend that the exception came from user mode: set up pt_regs
1052 * as if we faulted immediately after IRET and clear EBX so that
1053 * error_exit knows that we will be returning to user mode.
1059 jmp .Lerror_entry_from_usermode_after_swapgs
1064 * On entry, EBS is a "return to kernel mode" flag:
1065 * 1: already in kernel mode, don't need SWAPGS
1066 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1070 DISABLE_INTERRUPTS(CLBR_NONE)
1077 /* Runs on exception stack */
1080 * Fix up the exception frame if we're on Xen.
1081 * PARAVIRT_ADJUST_EXCEPTION_FRAME is guaranteed to push at most
1082 * one value to the stack on native, so it may clobber the rdx
1083 * scratch slot, but it won't clobber any of the important
1086 * Xen is a different story, because the Xen frame itself overlaps
1087 * the "NMI executing" variable.
1089 PARAVIRT_ADJUST_EXCEPTION_FRAME
1092 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1093 * the iretq it performs will take us out of NMI context.
1094 * This means that we can have nested NMIs where the next
1095 * NMI is using the top of the stack of the previous NMI. We
1096 * can't let it execute because the nested NMI will corrupt the
1097 * stack of the previous NMI. NMI handlers are not re-entrant
1100 * To handle this case we do the following:
1101 * Check the a special location on the stack that contains
1102 * a variable that is set when NMIs are executing.
1103 * The interrupted task's stack is also checked to see if it
1105 * If the variable is not set and the stack is not the NMI
1107 * o Set the special variable on the stack
1108 * o Copy the interrupt frame into an "outermost" location on the
1110 * o Copy the interrupt frame into an "iret" location on the stack
1111 * o Continue processing the NMI
1112 * If the variable is set or the previous stack is the NMI stack:
1113 * o Modify the "iret" location to jump to the repeat_nmi
1114 * o return back to the first NMI
1116 * Now on exit of the first NMI, we first clear the stack variable
1117 * The NMI stack will tell any nested NMIs at that point that it is
1118 * nested. Then we pop the stack normally with iret, and if there was
1119 * a nested NMI that updated the copy interrupt stack frame, a
1120 * jump will be made to the repeat_nmi code that will handle the second
1123 * However, espfix prevents us from directly returning to userspace
1124 * with a single IRET instruction. Similarly, IRET to user mode
1125 * can fault. We therefore handle NMIs from user space like
1126 * other IST entries.
1129 /* Use %rdx as our temp variable throughout */
1132 testb $3, CS-RIP+8(%rsp)
1133 jz .Lnmi_from_kernel
1136 * NMI from user mode. We need to run on the thread stack, but we
1137 * can't go through the normal entry paths: NMIs are masked, and
1138 * we don't want to enable interrupts, because then we'll end
1139 * up in an awkward situation in which IRQs are on but NMIs
1142 * We also must not push anything to the stack before switching
1143 * stacks lest we corrupt the "NMI executing" variable.
1149 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1150 pushq 5*8(%rdx) /* pt_regs->ss */
1151 pushq 4*8(%rdx) /* pt_regs->rsp */
1152 pushq 3*8(%rdx) /* pt_regs->flags */
1153 pushq 2*8(%rdx) /* pt_regs->cs */
1154 pushq 1*8(%rdx) /* pt_regs->rip */
1155 pushq $-1 /* pt_regs->orig_ax */
1156 pushq %rdi /* pt_regs->di */
1157 pushq %rsi /* pt_regs->si */
1158 pushq (%rdx) /* pt_regs->dx */
1159 pushq %rcx /* pt_regs->cx */
1160 pushq %rax /* pt_regs->ax */
1161 pushq %r8 /* pt_regs->r8 */
1162 pushq %r9 /* pt_regs->r9 */
1163 pushq %r10 /* pt_regs->r10 */
1164 pushq %r11 /* pt_regs->r11 */
1165 pushq %rbx /* pt_regs->rbx */
1166 pushq %rbp /* pt_regs->rbp */
1167 pushq %r12 /* pt_regs->r12 */
1168 pushq %r13 /* pt_regs->r13 */
1169 pushq %r14 /* pt_regs->r14 */
1170 pushq %r15 /* pt_regs->r15 */
1173 * At this point we no longer need to worry about stack damage
1174 * due to nesting -- we're on the normal thread stack and we're
1175 * done with the NMI stack.
1183 * Return back to user mode. We must *not* do the normal exit
1184 * work, because we don't want to enable interrupts. Fortunately,
1185 * do_nmi doesn't modify pt_regs.
1188 jmp restore_c_regs_and_iret
1192 * Here's what our stack frame will look like:
1193 * +---------------------------------------------------------+
1195 * | original Return RSP |
1196 * | original RFLAGS |
1199 * +---------------------------------------------------------+
1200 * | temp storage for rdx |
1201 * +---------------------------------------------------------+
1202 * | "NMI executing" variable |
1203 * +---------------------------------------------------------+
1204 * | iret SS } Copied from "outermost" frame |
1205 * | iret Return RSP } on each loop iteration; overwritten |
1206 * | iret RFLAGS } by a nested NMI to force another |
1207 * | iret CS } iteration if needed. |
1209 * +---------------------------------------------------------+
1210 * | outermost SS } initialized in first_nmi; |
1211 * | outermost Return RSP } will not be changed before |
1212 * | outermost RFLAGS } NMI processing is done. |
1213 * | outermost CS } Copied to "iret" frame on each |
1214 * | outermost RIP } iteration. |
1215 * +---------------------------------------------------------+
1217 * +---------------------------------------------------------+
1219 * The "original" frame is used by hardware. Before re-enabling
1220 * NMIs, we need to be done with it, and we need to leave enough
1221 * space for the asm code here.
1223 * We return by executing IRET while RSP points to the "iret" frame.
1224 * That will either return for real or it will loop back into NMI
1227 * The "outermost" frame is copied to the "iret" frame on each
1228 * iteration of the loop, so each iteration starts with the "iret"
1229 * frame pointing to the final return target.
1233 * Determine whether we're a nested NMI.
1235 * If we interrupted kernel code between repeat_nmi and
1236 * end_repeat_nmi, then we are a nested NMI. We must not
1237 * modify the "iret" frame because it's being written by
1238 * the outer NMI. That's okay; the outer NMI handler is
1239 * about to about to call do_nmi anyway, so we can just
1240 * resume the outer NMI.
1243 movq $repeat_nmi, %rdx
1246 movq $end_repeat_nmi, %rdx
1252 * Now check "NMI executing". If it's set, then we're nested.
1253 * This will not detect if we interrupted an outer NMI just
1260 * Now test if the previous stack was an NMI stack. This covers
1261 * the case where we interrupt an outer NMI after it clears
1262 * "NMI executing" but before IRET. We need to be careful, though:
1263 * there is one case in which RSP could point to the NMI stack
1264 * despite there being no NMI active: naughty userspace controls
1265 * RSP at the very beginning of the SYSCALL targets. We can
1266 * pull a fast one on naughty userspace, though: we program
1267 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1268 * if it controls the kernel's RSP. We set DF before we clear
1272 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1273 cmpq %rdx, 4*8(%rsp)
1274 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1277 subq $EXCEPTION_STKSZ, %rdx
1278 cmpq %rdx, 4*8(%rsp)
1279 /* If it is below the NMI stack, it is a normal NMI */
1282 /* Ah, it is within the NMI stack. */
1284 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1285 jz first_nmi /* RSP was user controlled. */
1287 /* This is a nested NMI. */
1291 * Modify the "iret" frame to point to repeat_nmi, forcing another
1292 * iteration of NMI handling.
1295 leaq -10*8(%rsp), %rdx
1302 /* Put stack back */
1308 /* We are returning to kernel mode, so this cannot result in a fault. */
1315 /* Make room for "NMI executing". */
1318 /* Leave room for the "iret" frame */
1321 /* Copy the "original" frame to the "outermost" frame */
1326 /* Everything up to here is safe from nested NMIs */
1328 #ifdef CONFIG_DEBUG_ENTRY
1330 * For ease of testing, unmask NMIs right away. Disabled by
1331 * default because IRET is very expensive.
1334 pushq %rsp /* RSP (minus 8 because of the previous push) */
1335 addq $8, (%rsp) /* Fix up RSP */
1337 pushq $__KERNEL_CS /* CS */
1339 INTERRUPT_RETURN /* continues at repeat_nmi below */
1345 * If there was a nested NMI, the first NMI's iret will return
1346 * here. But NMIs are still enabled and we can take another
1347 * nested NMI. The nested NMI checks the interrupted RIP to see
1348 * if it is between repeat_nmi and end_repeat_nmi, and if so
1349 * it will just return, as we are about to repeat an NMI anyway.
1350 * This makes it safe to copy to the stack frame that a nested
1353 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if
1354 * we're repeating an NMI, gsbase has the same value that it had on
1355 * the first iteration. paranoid_entry will load the kernel
1356 * gsbase if needed before we call do_nmi. "NMI executing"
1359 movq $1, 10*8(%rsp) /* Set "NMI executing". */
1362 * Copy the "outermost" frame to the "iret" frame. NMIs that nest
1363 * here must not modify the "iret" frame while we're writing to
1364 * it or it will end up containing garbage.
1374 * Everything below this point can be preempted by a nested NMI.
1375 * If this happens, then the inner NMI will change the "iret"
1376 * frame to point back to repeat_nmi.
1378 pushq $-1 /* ORIG_RAX: no syscall to restart */
1379 ALLOC_PT_GPREGS_ON_STACK
1382 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1383 * as we should not be calling schedule in NMI context.
1384 * Even with normal interrupts enabled. An NMI should not be
1385 * setting NEED_RESCHED or anything that normal interrupts and
1386 * exceptions might do.
1390 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1395 testl %ebx, %ebx /* swapgs needed? */
1403 /* Point RSP at the "iret" frame. */
1404 REMOVE_PT_GPREGS_FROM_STACK 6*8
1407 * Clear "NMI executing". Set DF first so that we can easily
1408 * distinguish the remaining code between here and IRET from
1409 * the SYSCALL entry and exit paths. On a native kernel, we
1410 * could just inspect RIP, but, on paravirt kernels,
1411 * INTERRUPT_RETURN can translate into a jump into a
1415 movq $0, 5*8(%rsp) /* clear "NMI executing" */
1418 * INTERRUPT_RETURN reads the "iret" frame and exits the NMI
1419 * stack in a single instruction. We are returning to kernel
1420 * mode, so this cannot result in a fault.
1425 ENTRY(ignore_sysret)