arch/x86/events/intel/pt.h

   1 /*
   2  * Intel(R) Processor Trace PMU driver for perf
   3  * Copyright (c) 2013-2014, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * Intel PT is specified in the Intel Architecture Instruction Set Extensions
  15  * Programming Reference:
  16  * http://software.intel.com/en-us/intel-isa-extensions
  17  */
  18
  19 #ifndef __INTEL_PT_H__
  20 #define __INTEL_PT_H__
  21
  22 /*
  23  * Single-entry ToPA: when this close to region boundary, switch
  24  * buffers to avoid losing data.
  25  */
  26 #define TOPA_PMI_MARGIN 512
  27
  28 #define TOPA_SHIFT 12
  29
  30 static inline unsigned int sizes(unsigned int tsz)
  31 {
  32         return 1 << (tsz + TOPA_SHIFT);
  33 };
  34
  35 struct topa_entry {
  36         u64     end     : 1;
  37         u64     rsvd0   : 1;
  38         u64     intr    : 1;
  39         u64     rsvd1   : 1;
  40         u64     stop    : 1;
  41         u64     rsvd2   : 1;
  42         u64     size    : 4;
  43         u64     rsvd3   : 2;
  44         u64     base    : 36;
  45         u64     rsvd4   : 16;
  46 };
  47
  48 #define PT_CPUID_LEAVES         2
  49 #define PT_CPUID_REGS_NUM       4 /* number of regsters (eax, ebx, ecx, edx) */
  50
  51 enum pt_capabilities {
  52         PT_CAP_max_subleaf = 0,
  53         PT_CAP_cr3_filtering,
  54         PT_CAP_psb_cyc,
  55         PT_CAP_mtc,
  56         PT_CAP_topa_output,
  57         PT_CAP_topa_multiple_entries,
  58         PT_CAP_single_range_output,
  59         PT_CAP_payloads_lip,
  60         PT_CAP_mtc_periods,
  61         PT_CAP_cycle_thresholds,
  62         PT_CAP_psb_periods,
  63 };
  64
  65 struct pt_pmu {
  66         struct pmu              pmu;
  67         u32                     caps[PT_CPUID_REGS_NUM * PT_CPUID_LEAVES];
  68         bool                    vmx;
  69 };
  70
  71 /**
  72  * struct pt_buffer - buffer configuration; one buffer per task_struct or
  73  *              cpu, depending on perf event configuration
  74  * @cpu:        cpu for per-cpu allocation
  75  * @tables:     list of ToPA tables in this buffer
  76  * @first:      shorthand for first topa table
  77  * @last:       shorthand for last topa table
  78  * @cur:        current topa table
  79  * @nr_pages:   buffer size in pages
  80  * @cur_idx:    current output region's index within @cur table
  81  * @output_off: offset within the current output region
  82  * @data_size:  running total of the amount of data in this buffer
  83  * @lost:       if data was lost/truncated
  84  * @head:       logical write offset inside the buffer
  85  * @snapshot:   if this is for a snapshot/overwrite counter
  86  * @stop_pos:   STOP topa entry in the buffer
  87  * @intr_pos:   INT topa entry in the buffer
  88  * @data_pages: array of pages from perf
  89  * @topa_index: table of topa entries indexed by page offset
  90  */
  91 struct pt_buffer {
  92         int                     cpu;
  93         struct list_head        tables;
  94         struct topa             *first, *last, *cur;
  95         unsigned int            cur_idx;
  96         size_t                  output_off;
  97         unsigned long           nr_pages;
  98         local_t                 data_size;
  99         local_t                 lost;
 100         local64_t               head;
 101         bool                    snapshot;
 102         unsigned long           stop_pos, intr_pos;
 103         void                    **data_pages;
 104         struct topa_entry       *topa_index[0];
 105 };
 106
 107 /**
 108  * struct pt - per-cpu pt context
 109  * @handle:     perf output handle
 110  * @handle_nmi: do handle PT PMI on this cpu, there's an active event
 111  * @vmx_on:     1 if VMX is ON on this cpu
 112  */
 113 struct pt {
 114         struct perf_output_handle handle;
 115         int                     handle_nmi;
 116         int                     vmx_on;
 117 };
 118
 119 #endif /* __INTEL_PT_H__ */