x86, thp: remove infrastructure for handling splitting PMDs
[deliverable/linux.git] / arch / x86 / include / asm / pgtable.h
1 #ifndef _ASM_X86_PGTABLE_H
2 #define _ASM_X86_PGTABLE_H
3
4 #include <asm/page.h>
5 #include <asm/e820.h>
6
7 #include <asm/pgtable_types.h>
8
9 /*
10 * Macro to mark a page protection value as UC-
11 */
12 #define pgprot_noncached(prot) \
13 ((boot_cpu_data.x86 > 3) \
14 ? (__pgprot(pgprot_val(prot) | \
15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \
16 : (prot))
17
18 #ifndef __ASSEMBLY__
19 #include <asm/x86_init.h>
20
21 void ptdump_walk_pgd_level(struct seq_file *m, pgd_t *pgd);
22 void ptdump_walk_pgd_level_checkwx(void);
23
24 #ifdef CONFIG_DEBUG_WX
25 #define debug_checkwx() ptdump_walk_pgd_level_checkwx()
26 #else
27 #define debug_checkwx() do { } while (0)
28 #endif
29
30 /*
31 * ZERO_PAGE is a global shared page that is always zero: used
32 * for zero-mapped memory areas etc..
33 */
34 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
35 __visible;
36 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
37
38 extern spinlock_t pgd_lock;
39 extern struct list_head pgd_list;
40
41 extern struct mm_struct *pgd_page_get_mm(struct page *page);
42
43 #ifdef CONFIG_PARAVIRT
44 #include <asm/paravirt.h>
45 #else /* !CONFIG_PARAVIRT */
46 #define set_pte(ptep, pte) native_set_pte(ptep, pte)
47 #define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
48 #define set_pmd_at(mm, addr, pmdp, pmd) native_set_pmd_at(mm, addr, pmdp, pmd)
49
50 #define set_pte_atomic(ptep, pte) \
51 native_set_pte_atomic(ptep, pte)
52
53 #define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
54
55 #ifndef __PAGETABLE_PUD_FOLDED
56 #define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
57 #define pgd_clear(pgd) native_pgd_clear(pgd)
58 #endif
59
60 #ifndef set_pud
61 # define set_pud(pudp, pud) native_set_pud(pudp, pud)
62 #endif
63
64 #ifndef __PAGETABLE_PMD_FOLDED
65 #define pud_clear(pud) native_pud_clear(pud)
66 #endif
67
68 #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
69 #define pmd_clear(pmd) native_pmd_clear(pmd)
70
71 #define pte_update(mm, addr, ptep) do { } while (0)
72
73 #define pgd_val(x) native_pgd_val(x)
74 #define __pgd(x) native_make_pgd(x)
75
76 #ifndef __PAGETABLE_PUD_FOLDED
77 #define pud_val(x) native_pud_val(x)
78 #define __pud(x) native_make_pud(x)
79 #endif
80
81 #ifndef __PAGETABLE_PMD_FOLDED
82 #define pmd_val(x) native_pmd_val(x)
83 #define __pmd(x) native_make_pmd(x)
84 #endif
85
86 #define pte_val(x) native_pte_val(x)
87 #define __pte(x) native_make_pte(x)
88
89 #define arch_end_context_switch(prev) do {} while(0)
90
91 #endif /* CONFIG_PARAVIRT */
92
93 /*
94 * The following only work if pte_present() is true.
95 * Undefined behaviour if not..
96 */
97 static inline int pte_dirty(pte_t pte)
98 {
99 return pte_flags(pte) & _PAGE_DIRTY;
100 }
101
102 static inline int pte_young(pte_t pte)
103 {
104 return pte_flags(pte) & _PAGE_ACCESSED;
105 }
106
107 static inline int pmd_dirty(pmd_t pmd)
108 {
109 return pmd_flags(pmd) & _PAGE_DIRTY;
110 }
111
112 static inline int pmd_young(pmd_t pmd)
113 {
114 return pmd_flags(pmd) & _PAGE_ACCESSED;
115 }
116
117 static inline int pte_write(pte_t pte)
118 {
119 return pte_flags(pte) & _PAGE_RW;
120 }
121
122 static inline int pte_huge(pte_t pte)
123 {
124 return pte_flags(pte) & _PAGE_PSE;
125 }
126
127 static inline int pte_global(pte_t pte)
128 {
129 return pte_flags(pte) & _PAGE_GLOBAL;
130 }
131
132 static inline int pte_exec(pte_t pte)
133 {
134 return !(pte_flags(pte) & _PAGE_NX);
135 }
136
137 static inline int pte_special(pte_t pte)
138 {
139 return pte_flags(pte) & _PAGE_SPECIAL;
140 }
141
142 static inline unsigned long pte_pfn(pte_t pte)
143 {
144 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
145 }
146
147 static inline unsigned long pmd_pfn(pmd_t pmd)
148 {
149 return (pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT;
150 }
151
152 static inline unsigned long pud_pfn(pud_t pud)
153 {
154 return (pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT;
155 }
156
157 #define pte_page(pte) pfn_to_page(pte_pfn(pte))
158
159 static inline int pmd_large(pmd_t pte)
160 {
161 return pmd_flags(pte) & _PAGE_PSE;
162 }
163
164 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
165 static inline int pmd_trans_huge(pmd_t pmd)
166 {
167 return pmd_val(pmd) & _PAGE_PSE;
168 }
169
170 static inline int has_transparent_hugepage(void)
171 {
172 return cpu_has_pse;
173 }
174 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
175
176 static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
177 {
178 pteval_t v = native_pte_val(pte);
179
180 return native_make_pte(v | set);
181 }
182
183 static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
184 {
185 pteval_t v = native_pte_val(pte);
186
187 return native_make_pte(v & ~clear);
188 }
189
190 static inline pte_t pte_mkclean(pte_t pte)
191 {
192 return pte_clear_flags(pte, _PAGE_DIRTY);
193 }
194
195 static inline pte_t pte_mkold(pte_t pte)
196 {
197 return pte_clear_flags(pte, _PAGE_ACCESSED);
198 }
199
200 static inline pte_t pte_wrprotect(pte_t pte)
201 {
202 return pte_clear_flags(pte, _PAGE_RW);
203 }
204
205 static inline pte_t pte_mkexec(pte_t pte)
206 {
207 return pte_clear_flags(pte, _PAGE_NX);
208 }
209
210 static inline pte_t pte_mkdirty(pte_t pte)
211 {
212 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
213 }
214
215 static inline pte_t pte_mkyoung(pte_t pte)
216 {
217 return pte_set_flags(pte, _PAGE_ACCESSED);
218 }
219
220 static inline pte_t pte_mkwrite(pte_t pte)
221 {
222 return pte_set_flags(pte, _PAGE_RW);
223 }
224
225 static inline pte_t pte_mkhuge(pte_t pte)
226 {
227 return pte_set_flags(pte, _PAGE_PSE);
228 }
229
230 static inline pte_t pte_clrhuge(pte_t pte)
231 {
232 return pte_clear_flags(pte, _PAGE_PSE);
233 }
234
235 static inline pte_t pte_mkglobal(pte_t pte)
236 {
237 return pte_set_flags(pte, _PAGE_GLOBAL);
238 }
239
240 static inline pte_t pte_clrglobal(pte_t pte)
241 {
242 return pte_clear_flags(pte, _PAGE_GLOBAL);
243 }
244
245 static inline pte_t pte_mkspecial(pte_t pte)
246 {
247 return pte_set_flags(pte, _PAGE_SPECIAL);
248 }
249
250 static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
251 {
252 pmdval_t v = native_pmd_val(pmd);
253
254 return __pmd(v | set);
255 }
256
257 static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
258 {
259 pmdval_t v = native_pmd_val(pmd);
260
261 return __pmd(v & ~clear);
262 }
263
264 static inline pmd_t pmd_mkold(pmd_t pmd)
265 {
266 return pmd_clear_flags(pmd, _PAGE_ACCESSED);
267 }
268
269 static inline pmd_t pmd_wrprotect(pmd_t pmd)
270 {
271 return pmd_clear_flags(pmd, _PAGE_RW);
272 }
273
274 static inline pmd_t pmd_mkdirty(pmd_t pmd)
275 {
276 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
277 }
278
279 static inline pmd_t pmd_mkhuge(pmd_t pmd)
280 {
281 return pmd_set_flags(pmd, _PAGE_PSE);
282 }
283
284 static inline pmd_t pmd_mkyoung(pmd_t pmd)
285 {
286 return pmd_set_flags(pmd, _PAGE_ACCESSED);
287 }
288
289 static inline pmd_t pmd_mkwrite(pmd_t pmd)
290 {
291 return pmd_set_flags(pmd, _PAGE_RW);
292 }
293
294 static inline pmd_t pmd_mknotpresent(pmd_t pmd)
295 {
296 return pmd_clear_flags(pmd, _PAGE_PRESENT | _PAGE_PROTNONE);
297 }
298
299 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
300 static inline int pte_soft_dirty(pte_t pte)
301 {
302 return pte_flags(pte) & _PAGE_SOFT_DIRTY;
303 }
304
305 static inline int pmd_soft_dirty(pmd_t pmd)
306 {
307 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY;
308 }
309
310 static inline pte_t pte_mksoft_dirty(pte_t pte)
311 {
312 return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
313 }
314
315 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
316 {
317 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY);
318 }
319
320 static inline pte_t pte_clear_soft_dirty(pte_t pte)
321 {
322 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY);
323 }
324
325 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
326 {
327 return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY);
328 }
329
330 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
331
332 /*
333 * Mask out unsupported bits in a present pgprot. Non-present pgprots
334 * can use those bits for other purposes, so leave them be.
335 */
336 static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
337 {
338 pgprotval_t protval = pgprot_val(pgprot);
339
340 if (protval & _PAGE_PRESENT)
341 protval &= __supported_pte_mask;
342
343 return protval;
344 }
345
346 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
347 {
348 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) |
349 massage_pgprot(pgprot));
350 }
351
352 static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
353 {
354 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) |
355 massage_pgprot(pgprot));
356 }
357
358 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
359 {
360 pteval_t val = pte_val(pte);
361
362 /*
363 * Chop off the NX bit (if present), and add the NX portion of
364 * the newprot (if present):
365 */
366 val &= _PAGE_CHG_MASK;
367 val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK;
368
369 return __pte(val);
370 }
371
372 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
373 {
374 pmdval_t val = pmd_val(pmd);
375
376 val &= _HPAGE_CHG_MASK;
377 val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK;
378
379 return __pmd(val);
380 }
381
382 /* mprotect needs to preserve PAT bits when updating vm_page_prot */
383 #define pgprot_modify pgprot_modify
384 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
385 {
386 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
387 pgprotval_t addbits = pgprot_val(newprot);
388 return __pgprot(preservebits | addbits);
389 }
390
391 #define pte_pgprot(x) __pgprot(pte_flags(x))
392 #define pmd_pgprot(x) __pgprot(pmd_flags(x))
393 #define pud_pgprot(x) __pgprot(pud_flags(x))
394
395 #define canon_pgprot(p) __pgprot(massage_pgprot(p))
396
397 static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
398 enum page_cache_mode pcm,
399 enum page_cache_mode new_pcm)
400 {
401 /*
402 * PAT type is always WB for untracked ranges, so no need to check.
403 */
404 if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
405 return 1;
406
407 /*
408 * Certain new memtypes are not allowed with certain
409 * requested memtype:
410 * - request is uncached, return cannot be write-back
411 * - request is write-combine, return cannot be write-back
412 * - request is write-through, return cannot be write-back
413 * - request is write-through, return cannot be write-combine
414 */
415 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS &&
416 new_pcm == _PAGE_CACHE_MODE_WB) ||
417 (pcm == _PAGE_CACHE_MODE_WC &&
418 new_pcm == _PAGE_CACHE_MODE_WB) ||
419 (pcm == _PAGE_CACHE_MODE_WT &&
420 new_pcm == _PAGE_CACHE_MODE_WB) ||
421 (pcm == _PAGE_CACHE_MODE_WT &&
422 new_pcm == _PAGE_CACHE_MODE_WC)) {
423 return 0;
424 }
425
426 return 1;
427 }
428
429 pmd_t *populate_extra_pmd(unsigned long vaddr);
430 pte_t *populate_extra_pte(unsigned long vaddr);
431 #endif /* __ASSEMBLY__ */
432
433 #ifdef CONFIG_X86_32
434 # include <asm/pgtable_32.h>
435 #else
436 # include <asm/pgtable_64.h>
437 #endif
438
439 #ifndef __ASSEMBLY__
440 #include <linux/mm_types.h>
441 #include <linux/mmdebug.h>
442 #include <linux/log2.h>
443
444 static inline int pte_none(pte_t pte)
445 {
446 return !pte.pte;
447 }
448
449 #define __HAVE_ARCH_PTE_SAME
450 static inline int pte_same(pte_t a, pte_t b)
451 {
452 return a.pte == b.pte;
453 }
454
455 static inline int pte_present(pte_t a)
456 {
457 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
458 }
459
460 #define pte_accessible pte_accessible
461 static inline bool pte_accessible(struct mm_struct *mm, pte_t a)
462 {
463 if (pte_flags(a) & _PAGE_PRESENT)
464 return true;
465
466 if ((pte_flags(a) & _PAGE_PROTNONE) &&
467 mm_tlb_flush_pending(mm))
468 return true;
469
470 return false;
471 }
472
473 static inline int pte_hidden(pte_t pte)
474 {
475 return pte_flags(pte) & _PAGE_HIDDEN;
476 }
477
478 static inline int pmd_present(pmd_t pmd)
479 {
480 /*
481 * Checking for _PAGE_PSE is needed too because
482 * split_huge_page will temporarily clear the present bit (but
483 * the _PAGE_PSE flag will remain set at all times while the
484 * _PAGE_PRESENT bit is clear).
485 */
486 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE);
487 }
488
489 #ifdef CONFIG_NUMA_BALANCING
490 /*
491 * These work without NUMA balancing but the kernel does not care. See the
492 * comment in include/asm-generic/pgtable.h
493 */
494 static inline int pte_protnone(pte_t pte)
495 {
496 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT))
497 == _PAGE_PROTNONE;
498 }
499
500 static inline int pmd_protnone(pmd_t pmd)
501 {
502 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT))
503 == _PAGE_PROTNONE;
504 }
505 #endif /* CONFIG_NUMA_BALANCING */
506
507 static inline int pmd_none(pmd_t pmd)
508 {
509 /* Only check low word on 32-bit platforms, since it might be
510 out of sync with upper half. */
511 return (unsigned long)native_pmd_val(pmd) == 0;
512 }
513
514 static inline unsigned long pmd_page_vaddr(pmd_t pmd)
515 {
516 return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd));
517 }
518
519 /*
520 * Currently stuck as a macro due to indirect forward reference to
521 * linux/mmzone.h's __section_mem_map_addr() definition:
522 */
523 #define pmd_page(pmd) \
524 pfn_to_page((pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT)
525
526 /*
527 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
528 *
529 * this macro returns the index of the entry in the pmd page which would
530 * control the given virtual address
531 */
532 static inline unsigned long pmd_index(unsigned long address)
533 {
534 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
535 }
536
537 /*
538 * Conversion functions: convert a page and protection to a page entry,
539 * and a page entry and page directory to the page they refer to.
540 *
541 * (Currently stuck as a macro because of indirect forward reference
542 * to linux/mm.h:page_to_nid())
543 */
544 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
545
546 /*
547 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
548 *
549 * this function returns the index of the entry in the pte page which would
550 * control the given virtual address
551 */
552 static inline unsigned long pte_index(unsigned long address)
553 {
554 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
555 }
556
557 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
558 {
559 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
560 }
561
562 static inline int pmd_bad(pmd_t pmd)
563 {
564 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
565 }
566
567 static inline unsigned long pages_to_mb(unsigned long npg)
568 {
569 return npg >> (20 - PAGE_SHIFT);
570 }
571
572 #if CONFIG_PGTABLE_LEVELS > 2
573 static inline int pud_none(pud_t pud)
574 {
575 return native_pud_val(pud) == 0;
576 }
577
578 static inline int pud_present(pud_t pud)
579 {
580 return pud_flags(pud) & _PAGE_PRESENT;
581 }
582
583 static inline unsigned long pud_page_vaddr(pud_t pud)
584 {
585 return (unsigned long)__va(pud_val(pud) & pud_pfn_mask(pud));
586 }
587
588 /*
589 * Currently stuck as a macro due to indirect forward reference to
590 * linux/mmzone.h's __section_mem_map_addr() definition:
591 */
592 #define pud_page(pud) \
593 pfn_to_page((pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT)
594
595 /* Find an entry in the second-level page table.. */
596 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
597 {
598 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
599 }
600
601 static inline int pud_large(pud_t pud)
602 {
603 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
604 (_PAGE_PSE | _PAGE_PRESENT);
605 }
606
607 static inline int pud_bad(pud_t pud)
608 {
609 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
610 }
611 #else
612 static inline int pud_large(pud_t pud)
613 {
614 return 0;
615 }
616 #endif /* CONFIG_PGTABLE_LEVELS > 2 */
617
618 #if CONFIG_PGTABLE_LEVELS > 3
619 static inline int pgd_present(pgd_t pgd)
620 {
621 return pgd_flags(pgd) & _PAGE_PRESENT;
622 }
623
624 static inline unsigned long pgd_page_vaddr(pgd_t pgd)
625 {
626 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
627 }
628
629 /*
630 * Currently stuck as a macro due to indirect forward reference to
631 * linux/mmzone.h's __section_mem_map_addr() definition:
632 */
633 #define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
634
635 /* to find an entry in a page-table-directory. */
636 static inline unsigned long pud_index(unsigned long address)
637 {
638 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
639 }
640
641 static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
642 {
643 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
644 }
645
646 static inline int pgd_bad(pgd_t pgd)
647 {
648 return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE;
649 }
650
651 static inline int pgd_none(pgd_t pgd)
652 {
653 return !native_pgd_val(pgd);
654 }
655 #endif /* CONFIG_PGTABLE_LEVELS > 3 */
656
657 #endif /* __ASSEMBLY__ */
658
659 /*
660 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
661 *
662 * this macro returns the index of the entry in the pgd page which would
663 * control the given virtual address
664 */
665 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
666
667 /*
668 * pgd_offset() returns a (pgd_t *)
669 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
670 */
671 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
672 /*
673 * a shortcut which implies the use of the kernel's pgd, instead
674 * of a process's
675 */
676 #define pgd_offset_k(address) pgd_offset(&init_mm, (address))
677
678
679 #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
680 #define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
681
682 #ifndef __ASSEMBLY__
683
684 extern int direct_gbpages;
685 void init_mem_mapping(void);
686 void early_alloc_pgt_buf(void);
687
688 /* local pte updates need not use xchg for locking */
689 static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
690 {
691 pte_t res = *ptep;
692
693 /* Pure native function needs no input for mm, addr */
694 native_pte_clear(NULL, 0, ptep);
695 return res;
696 }
697
698 static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
699 {
700 pmd_t res = *pmdp;
701
702 native_pmd_clear(pmdp);
703 return res;
704 }
705
706 static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
707 pte_t *ptep , pte_t pte)
708 {
709 native_set_pte(ptep, pte);
710 }
711
712 static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr,
713 pmd_t *pmdp , pmd_t pmd)
714 {
715 native_set_pmd(pmdp, pmd);
716 }
717
718 #ifndef CONFIG_PARAVIRT
719 /*
720 * Rules for using pte_update - it must be called after any PTE update which
721 * has not been done using the set_pte / clear_pte interfaces. It is used by
722 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
723 * updates should either be sets, clears, or set_pte_atomic for P->P
724 * transitions, which means this hook should only be called for user PTEs.
725 * This hook implies a P->P protection or access change has taken place, which
726 * requires a subsequent TLB flush.
727 */
728 #define pte_update(mm, addr, ptep) do { } while (0)
729 #endif
730
731 /*
732 * We only update the dirty/accessed state if we set
733 * the dirty bit by hand in the kernel, since the hardware
734 * will do the accessed bit for us, and we don't want to
735 * race with other CPU's that might be updating the dirty
736 * bit at the same time.
737 */
738 struct vm_area_struct;
739
740 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
741 extern int ptep_set_access_flags(struct vm_area_struct *vma,
742 unsigned long address, pte_t *ptep,
743 pte_t entry, int dirty);
744
745 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
746 extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
747 unsigned long addr, pte_t *ptep);
748
749 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
750 extern int ptep_clear_flush_young(struct vm_area_struct *vma,
751 unsigned long address, pte_t *ptep);
752
753 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
754 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
755 pte_t *ptep)
756 {
757 pte_t pte = native_ptep_get_and_clear(ptep);
758 pte_update(mm, addr, ptep);
759 return pte;
760 }
761
762 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
763 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
764 unsigned long addr, pte_t *ptep,
765 int full)
766 {
767 pte_t pte;
768 if (full) {
769 /*
770 * Full address destruction in progress; paravirt does not
771 * care about updates and native needs no locking
772 */
773 pte = native_local_ptep_get_and_clear(ptep);
774 } else {
775 pte = ptep_get_and_clear(mm, addr, ptep);
776 }
777 return pte;
778 }
779
780 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
781 static inline void ptep_set_wrprotect(struct mm_struct *mm,
782 unsigned long addr, pte_t *ptep)
783 {
784 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
785 pte_update(mm, addr, ptep);
786 }
787
788 #define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
789
790 #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
791
792 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
793 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
794 unsigned long address, pmd_t *pmdp,
795 pmd_t entry, int dirty);
796
797 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
798 extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
799 unsigned long addr, pmd_t *pmdp);
800
801 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
802 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
803 unsigned long address, pmd_t *pmdp);
804
805
806 #define __HAVE_ARCH_PMD_WRITE
807 static inline int pmd_write(pmd_t pmd)
808 {
809 return pmd_flags(pmd) & _PAGE_RW;
810 }
811
812 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
813 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr,
814 pmd_t *pmdp)
815 {
816 return native_pmdp_get_and_clear(pmdp);
817 }
818
819 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
820 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
821 unsigned long addr, pmd_t *pmdp)
822 {
823 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
824 }
825
826 /*
827 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
828 *
829 * dst - pointer to pgd range anwhere on a pgd page
830 * src - ""
831 * count - the number of pgds to copy.
832 *
833 * dst and src can be on the same page, but the range must not overlap,
834 * and must not cross a page boundary.
835 */
836 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
837 {
838 memcpy(dst, src, count * sizeof(pgd_t));
839 }
840
841 #define PTE_SHIFT ilog2(PTRS_PER_PTE)
842 static inline int page_level_shift(enum pg_level level)
843 {
844 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
845 }
846 static inline unsigned long page_level_size(enum pg_level level)
847 {
848 return 1UL << page_level_shift(level);
849 }
850 static inline unsigned long page_level_mask(enum pg_level level)
851 {
852 return ~(page_level_size(level) - 1);
853 }
854
855 /*
856 * The x86 doesn't have any external MMU info: the kernel page
857 * tables contain all the necessary information.
858 */
859 static inline void update_mmu_cache(struct vm_area_struct *vma,
860 unsigned long addr, pte_t *ptep)
861 {
862 }
863 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
864 unsigned long addr, pmd_t *pmd)
865 {
866 }
867
868 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
869 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
870 {
871 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY);
872 }
873
874 static inline int pte_swp_soft_dirty(pte_t pte)
875 {
876 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY;
877 }
878
879 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
880 {
881 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY);
882 }
883 #endif
884
885 #include <asm-generic/pgtable.h>
886 #endif /* __ASSEMBLY__ */
887
888 #endif /* _ASM_X86_PGTABLE_H */
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