ACPI / util: cast data to u64 before shifting to fix sign extension
[deliverable/linux.git] / arch / x86 / kernel / fpu / xstate.c
1 /*
2 * xsave/xrstor support.
3 *
4 * Author: Suresh Siddha <suresh.b.siddha@intel.com>
5 */
6 #include <linux/compat.h>
7 #include <linux/cpu.h>
8
9 #include <asm/fpu/api.h>
10 #include <asm/fpu/internal.h>
11 #include <asm/fpu/signal.h>
12 #include <asm/fpu/regset.h>
13
14 #include <asm/tlbflush.h>
15
16 static const char *xfeature_names[] =
17 {
18 "x87 floating point registers" ,
19 "SSE registers" ,
20 "AVX registers" ,
21 "MPX bounds registers" ,
22 "MPX CSR" ,
23 "AVX-512 opmask" ,
24 "AVX-512 Hi256" ,
25 "AVX-512 ZMM_Hi256" ,
26 "unknown xstate feature" ,
27 };
28
29 /*
30 * Mask of xstate features supported by the CPU and the kernel:
31 */
32 u64 xfeatures_mask __read_mostly;
33
34 static unsigned int xstate_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
35 static unsigned int xstate_sizes[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
36 static unsigned int xstate_comp_offsets[sizeof(xfeatures_mask)*8];
37
38 /*
39 * Clear all of the X86_FEATURE_* bits that are unavailable
40 * when the CPU has no XSAVE support.
41 */
42 void fpu__xstate_clear_all_cpu_caps(void)
43 {
44 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
45 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
46 setup_clear_cpu_cap(X86_FEATURE_XSAVEC);
47 setup_clear_cpu_cap(X86_FEATURE_XSAVES);
48 setup_clear_cpu_cap(X86_FEATURE_AVX);
49 setup_clear_cpu_cap(X86_FEATURE_AVX2);
50 setup_clear_cpu_cap(X86_FEATURE_AVX512F);
51 setup_clear_cpu_cap(X86_FEATURE_AVX512PF);
52 setup_clear_cpu_cap(X86_FEATURE_AVX512ER);
53 setup_clear_cpu_cap(X86_FEATURE_AVX512CD);
54 setup_clear_cpu_cap(X86_FEATURE_MPX);
55 setup_clear_cpu_cap(X86_FEATURE_XGETBV1);
56 }
57
58 /*
59 * Return whether the system supports a given xfeature.
60 *
61 * Also return the name of the (most advanced) feature that the caller requested:
62 */
63 int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name)
64 {
65 u64 xfeatures_missing = xfeatures_needed & ~xfeatures_mask;
66
67 if (unlikely(feature_name)) {
68 long xfeature_idx, max_idx;
69 u64 xfeatures_print;
70 /*
71 * So we use FLS here to be able to print the most advanced
72 * feature that was requested but is missing. So if a driver
73 * asks about "XFEATURE_MASK_SSE | XFEATURE_MASK_YMM" we'll print the
74 * missing AVX feature - this is the most informative message
75 * to users:
76 */
77 if (xfeatures_missing)
78 xfeatures_print = xfeatures_missing;
79 else
80 xfeatures_print = xfeatures_needed;
81
82 xfeature_idx = fls64(xfeatures_print)-1;
83 max_idx = ARRAY_SIZE(xfeature_names)-1;
84 xfeature_idx = min(xfeature_idx, max_idx);
85
86 *feature_name = xfeature_names[xfeature_idx];
87 }
88
89 if (xfeatures_missing)
90 return 0;
91
92 return 1;
93 }
94 EXPORT_SYMBOL_GPL(cpu_has_xfeatures);
95
96 /*
97 * When executing XSAVEOPT (or other optimized XSAVE instructions), if
98 * a processor implementation detects that an FPU state component is still
99 * (or is again) in its initialized state, it may clear the corresponding
100 * bit in the header.xfeatures field, and can skip the writeout of registers
101 * to the corresponding memory layout.
102 *
103 * This means that when the bit is zero, the state component might still contain
104 * some previous - non-initialized register state.
105 *
106 * Before writing xstate information to user-space we sanitize those components,
107 * to always ensure that the memory layout of a feature will be in the init state
108 * if the corresponding header bit is zero. This is to ensure that user-space doesn't
109 * see some stale state in the memory layout during signal handling, debugging etc.
110 */
111 void fpstate_sanitize_xstate(struct fpu *fpu)
112 {
113 struct fxregs_state *fx = &fpu->state.fxsave;
114 int feature_bit;
115 u64 xfeatures;
116
117 if (!use_xsaveopt())
118 return;
119
120 xfeatures = fpu->state.xsave.header.xfeatures;
121
122 /*
123 * None of the feature bits are in init state. So nothing else
124 * to do for us, as the memory layout is up to date.
125 */
126 if ((xfeatures & xfeatures_mask) == xfeatures_mask)
127 return;
128
129 /*
130 * FP is in init state
131 */
132 if (!(xfeatures & XFEATURE_MASK_FP)) {
133 fx->cwd = 0x37f;
134 fx->swd = 0;
135 fx->twd = 0;
136 fx->fop = 0;
137 fx->rip = 0;
138 fx->rdp = 0;
139 memset(&fx->st_space[0], 0, 128);
140 }
141
142 /*
143 * SSE is in init state
144 */
145 if (!(xfeatures & XFEATURE_MASK_SSE))
146 memset(&fx->xmm_space[0], 0, 256);
147
148 /*
149 * First two features are FPU and SSE, which above we handled
150 * in a special way already:
151 */
152 feature_bit = 0x2;
153 xfeatures = (xfeatures_mask & ~xfeatures) >> 2;
154
155 /*
156 * Update all the remaining memory layouts according to their
157 * standard xstate layout, if their header bit is in the init
158 * state:
159 */
160 while (xfeatures) {
161 if (xfeatures & 0x1) {
162 int offset = xstate_offsets[feature_bit];
163 int size = xstate_sizes[feature_bit];
164
165 memcpy((void *)fx + offset,
166 (void *)&init_fpstate.xsave + offset,
167 size);
168 }
169
170 xfeatures >>= 1;
171 feature_bit++;
172 }
173 }
174
175 /*
176 * Enable the extended processor state save/restore feature.
177 * Called once per CPU onlining.
178 */
179 void fpu__init_cpu_xstate(void)
180 {
181 if (!cpu_has_xsave || !xfeatures_mask)
182 return;
183
184 cr4_set_bits(X86_CR4_OSXSAVE);
185 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
186 }
187
188 /*
189 * Note that in the future we will likely need a pair of
190 * functions here: one for user xstates and the other for
191 * system xstates. For now, they are the same.
192 */
193 static int xfeature_enabled(enum xfeature xfeature)
194 {
195 return !!(xfeatures_mask & (1UL << xfeature));
196 }
197
198 /*
199 * Record the offsets and sizes of various xstates contained
200 * in the XSAVE state memory layout.
201 */
202 static void __init setup_xstate_features(void)
203 {
204 u32 eax, ebx, ecx, edx, i;
205 /* start at the beginnning of the "extended state" */
206 unsigned int last_good_offset = offsetof(struct xregs_state,
207 extended_state_area);
208
209 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
210 if (!xfeature_enabled(i))
211 continue;
212
213 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
214 xstate_offsets[i] = ebx;
215 xstate_sizes[i] = eax;
216 /*
217 * In our xstate size checks, we assume that the
218 * highest-numbered xstate feature has the
219 * highest offset in the buffer. Ensure it does.
220 */
221 WARN_ONCE(last_good_offset > xstate_offsets[i],
222 "x86/fpu: misordered xstate at %d\n", last_good_offset);
223 last_good_offset = xstate_offsets[i];
224
225 printk(KERN_INFO "x86/fpu: xstate_offset[%d]: %4d, xstate_sizes[%d]: %4d\n", i, ebx, i, eax);
226 }
227 }
228
229 static void __init print_xstate_feature(u64 xstate_mask)
230 {
231 const char *feature_name;
232
233 if (cpu_has_xfeatures(xstate_mask, &feature_name))
234 pr_info("x86/fpu: Supporting XSAVE feature 0x%02Lx: '%s'\n", xstate_mask, feature_name);
235 }
236
237 /*
238 * Print out all the supported xstate features:
239 */
240 static void __init print_xstate_features(void)
241 {
242 print_xstate_feature(XFEATURE_MASK_FP);
243 print_xstate_feature(XFEATURE_MASK_SSE);
244 print_xstate_feature(XFEATURE_MASK_YMM);
245 print_xstate_feature(XFEATURE_MASK_BNDREGS);
246 print_xstate_feature(XFEATURE_MASK_BNDCSR);
247 print_xstate_feature(XFEATURE_MASK_OPMASK);
248 print_xstate_feature(XFEATURE_MASK_ZMM_Hi256);
249 print_xstate_feature(XFEATURE_MASK_Hi16_ZMM);
250 }
251
252 /*
253 * This function sets up offsets and sizes of all extended states in
254 * xsave area. This supports both standard format and compacted format
255 * of the xsave aread.
256 */
257 static void __init setup_xstate_comp(void)
258 {
259 unsigned int xstate_comp_sizes[sizeof(xfeatures_mask)*8];
260 int i;
261
262 /*
263 * The FP xstates and SSE xstates are legacy states. They are always
264 * in the fixed offsets in the xsave area in either compacted form
265 * or standard form.
266 */
267 xstate_comp_offsets[0] = 0;
268 xstate_comp_offsets[1] = offsetof(struct fxregs_state, xmm_space);
269
270 if (!cpu_has_xsaves) {
271 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
272 if (xfeature_enabled(i)) {
273 xstate_comp_offsets[i] = xstate_offsets[i];
274 xstate_comp_sizes[i] = xstate_sizes[i];
275 }
276 }
277 return;
278 }
279
280 xstate_comp_offsets[FIRST_EXTENDED_XFEATURE] =
281 FXSAVE_SIZE + XSAVE_HDR_SIZE;
282
283 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
284 if (xfeature_enabled(i))
285 xstate_comp_sizes[i] = xstate_sizes[i];
286 else
287 xstate_comp_sizes[i] = 0;
288
289 if (i > FIRST_EXTENDED_XFEATURE)
290 xstate_comp_offsets[i] = xstate_comp_offsets[i-1]
291 + xstate_comp_sizes[i-1];
292
293 }
294 }
295
296 /*
297 * setup the xstate image representing the init state
298 */
299 static void __init setup_init_fpu_buf(void)
300 {
301 static int on_boot_cpu __initdata = 1;
302
303 WARN_ON_FPU(!on_boot_cpu);
304 on_boot_cpu = 0;
305
306 if (!cpu_has_xsave)
307 return;
308
309 setup_xstate_features();
310 print_xstate_features();
311
312 if (cpu_has_xsaves) {
313 init_fpstate.xsave.header.xcomp_bv = (u64)1 << 63 | xfeatures_mask;
314 init_fpstate.xsave.header.xfeatures = xfeatures_mask;
315 }
316
317 /*
318 * Init all the features state with header_bv being 0x0
319 */
320 copy_kernel_to_xregs_booting(&init_fpstate.xsave);
321
322 /*
323 * Dump the init state again. This is to identify the init state
324 * of any feature which is not represented by all zero's.
325 */
326 copy_xregs_to_kernel_booting(&init_fpstate.xsave);
327 }
328
329 static int xfeature_is_supervisor(int xfeature_nr)
330 {
331 /*
332 * We currently do not support supervisor states, but if
333 * we did, we could find out like this.
334 *
335 * SDM says: If state component i is a user state component,
336 * ECX[0] return 0; if state component i is a supervisor
337 * state component, ECX[0] returns 1.
338 u32 eax, ebx, ecx, edx;
339 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx;
340 return !!(ecx & 1);
341 */
342 return 0;
343 }
344 /*
345 static int xfeature_is_user(int xfeature_nr)
346 {
347 return !xfeature_is_supervisor(xfeature_nr);
348 }
349 */
350
351 /*
352 * This check is important because it is easy to get XSTATE_*
353 * confused with XSTATE_BIT_*.
354 */
355 #define CHECK_XFEATURE(nr) do { \
356 WARN_ON(nr < FIRST_EXTENDED_XFEATURE); \
357 WARN_ON(nr >= XFEATURE_MAX); \
358 } while (0)
359
360 /*
361 * We could cache this like xstate_size[], but we only use
362 * it here, so it would be a waste of space.
363 */
364 static int xfeature_is_aligned(int xfeature_nr)
365 {
366 u32 eax, ebx, ecx, edx;
367
368 CHECK_XFEATURE(xfeature_nr);
369 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
370 /*
371 * The value returned by ECX[1] indicates the alignment
372 * of state component i when the compacted format
373 * of the extended region of an XSAVE area is used
374 */
375 return !!(ecx & 2);
376 }
377
378 static int xfeature_uncompacted_offset(int xfeature_nr)
379 {
380 u32 eax, ebx, ecx, edx;
381
382 CHECK_XFEATURE(xfeature_nr);
383 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
384 return ebx;
385 }
386
387 static int xfeature_size(int xfeature_nr)
388 {
389 u32 eax, ebx, ecx, edx;
390
391 CHECK_XFEATURE(xfeature_nr);
392 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
393 return eax;
394 }
395
396 /*
397 * 'XSAVES' implies two different things:
398 * 1. saving of supervisor/system state
399 * 2. using the compacted format
400 *
401 * Use this function when dealing with the compacted format so
402 * that it is obvious which aspect of 'XSAVES' is being handled
403 * by the calling code.
404 */
405 static int using_compacted_format(void)
406 {
407 return cpu_has_xsaves;
408 }
409
410 static void __xstate_dump_leaves(void)
411 {
412 int i;
413 u32 eax, ebx, ecx, edx;
414 static int should_dump = 1;
415
416 if (!should_dump)
417 return;
418 should_dump = 0;
419 /*
420 * Dump out a few leaves past the ones that we support
421 * just in case there are some goodies up there
422 */
423 for (i = 0; i < XFEATURE_MAX + 10; i++) {
424 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
425 pr_warn("CPUID[%02x, %02x]: eax=%08x ebx=%08x ecx=%08x edx=%08x\n",
426 XSTATE_CPUID, i, eax, ebx, ecx, edx);
427 }
428 }
429
430 #define XSTATE_WARN_ON(x) do { \
431 if (WARN_ONCE(x, "XSAVE consistency problem, dumping leaves")) { \
432 __xstate_dump_leaves(); \
433 } \
434 } while (0)
435
436 #define XCHECK_SZ(sz, nr, nr_macro, __struct) do { \
437 if ((nr == nr_macro) && \
438 WARN_ONCE(sz != sizeof(__struct), \
439 "%s: struct is %zu bytes, cpu state %d bytes\n", \
440 __stringify(nr_macro), sizeof(__struct), sz)) { \
441 __xstate_dump_leaves(); \
442 } \
443 } while (0)
444
445 /*
446 * We have a C struct for each 'xstate'. We need to ensure
447 * that our software representation matches what the CPU
448 * tells us about the state's size.
449 */
450 static void check_xstate_against_struct(int nr)
451 {
452 /*
453 * Ask the CPU for the size of the state.
454 */
455 int sz = xfeature_size(nr);
456 /*
457 * Match each CPU state with the corresponding software
458 * structure.
459 */
460 XCHECK_SZ(sz, nr, XFEATURE_YMM, struct ymmh_struct);
461 XCHECK_SZ(sz, nr, XFEATURE_BNDREGS, struct mpx_bndreg_state);
462 XCHECK_SZ(sz, nr, XFEATURE_BNDCSR, struct mpx_bndcsr_state);
463 XCHECK_SZ(sz, nr, XFEATURE_OPMASK, struct avx_512_opmask_state);
464 XCHECK_SZ(sz, nr, XFEATURE_ZMM_Hi256, struct avx_512_zmm_uppers_state);
465 XCHECK_SZ(sz, nr, XFEATURE_Hi16_ZMM, struct avx_512_hi16_state);
466
467 /*
468 * Make *SURE* to add any feature numbers in below if
469 * there are "holes" in the xsave state component
470 * numbers.
471 */
472 if ((nr < XFEATURE_YMM) ||
473 (nr >= XFEATURE_MAX)) {
474 WARN_ONCE(1, "no structure for xstate: %d\n", nr);
475 XSTATE_WARN_ON(1);
476 }
477 }
478
479 /*
480 * This essentially double-checks what the cpu told us about
481 * how large the XSAVE buffer needs to be. We are recalculating
482 * it to be safe.
483 */
484 static void do_extra_xstate_size_checks(void)
485 {
486 int paranoid_xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE;
487 int i;
488
489 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
490 if (!xfeature_enabled(i))
491 continue;
492
493 check_xstate_against_struct(i);
494 /*
495 * Supervisor state components can be managed only by
496 * XSAVES, which is compacted-format only.
497 */
498 if (!using_compacted_format())
499 XSTATE_WARN_ON(xfeature_is_supervisor(i));
500
501 /* Align from the end of the previous feature */
502 if (xfeature_is_aligned(i))
503 paranoid_xstate_size = ALIGN(paranoid_xstate_size, 64);
504 /*
505 * The offset of a given state in the non-compacted
506 * format is given to us in a CPUID leaf. We check
507 * them for being ordered (increasing offsets) in
508 * setup_xstate_features().
509 */
510 if (!using_compacted_format())
511 paranoid_xstate_size = xfeature_uncompacted_offset(i);
512 /*
513 * The compacted-format offset always depends on where
514 * the previous state ended.
515 */
516 paranoid_xstate_size += xfeature_size(i);
517 }
518 XSTATE_WARN_ON(paranoid_xstate_size != xstate_size);
519 }
520
521 /*
522 * Calculate total size of enabled xstates in XCR0/xfeatures_mask.
523 *
524 * Note the SDM's wording here. "sub-function 0" only enumerates
525 * the size of the *user* states. If we use it to size a buffer
526 * that we use 'XSAVES' on, we could potentially overflow the
527 * buffer because 'XSAVES' saves system states too.
528 *
529 * Note that we do not currently set any bits on IA32_XSS so
530 * 'XCR0 | IA32_XSS == XCR0' for now.
531 */
532 static unsigned int __init calculate_xstate_size(void)
533 {
534 unsigned int eax, ebx, ecx, edx;
535 unsigned int calculated_xstate_size;
536
537 if (!cpu_has_xsaves) {
538 /*
539 * - CPUID function 0DH, sub-function 0:
540 * EBX enumerates the size (in bytes) required by
541 * the XSAVE instruction for an XSAVE area
542 * containing all the *user* state components
543 * corresponding to bits currently set in XCR0.
544 */
545 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
546 calculated_xstate_size = ebx;
547 } else {
548 /*
549 * - CPUID function 0DH, sub-function 1:
550 * EBX enumerates the size (in bytes) required by
551 * the XSAVES instruction for an XSAVE area
552 * containing all the state components
553 * corresponding to bits currently set in
554 * XCR0 | IA32_XSS.
555 */
556 cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
557 calculated_xstate_size = ebx;
558 }
559 return calculated_xstate_size;
560 }
561
562 /*
563 * Will the runtime-enumerated 'xstate_size' fit in the init
564 * task's statically-allocated buffer?
565 */
566 static bool is_supported_xstate_size(unsigned int test_xstate_size)
567 {
568 if (test_xstate_size <= sizeof(union fpregs_state))
569 return true;
570
571 pr_warn("x86/fpu: xstate buffer too small (%zu < %d), disabling xsave\n",
572 sizeof(union fpregs_state), test_xstate_size);
573 return false;
574 }
575
576 static int init_xstate_size(void)
577 {
578 /* Recompute the context size for enabled features: */
579 unsigned int possible_xstate_size = calculate_xstate_size();
580
581 /* Ensure we have the space to store all enabled: */
582 if (!is_supported_xstate_size(possible_xstate_size))
583 return -EINVAL;
584
585 /*
586 * The size is OK, we are definitely going to use xsave,
587 * make it known to the world that we need more space.
588 */
589 xstate_size = possible_xstate_size;
590 do_extra_xstate_size_checks();
591 return 0;
592 }
593
594 /*
595 * We enabled the XSAVE hardware, but something went wrong and
596 * we can not use it. Disable it.
597 */
598 static void fpu__init_disable_system_xstate(void)
599 {
600 xfeatures_mask = 0;
601 cr4_clear_bits(X86_CR4_OSXSAVE);
602 fpu__xstate_clear_all_cpu_caps();
603 }
604
605 /*
606 * Enable and initialize the xsave feature.
607 * Called once per system bootup.
608 */
609 void __init fpu__init_system_xstate(void)
610 {
611 unsigned int eax, ebx, ecx, edx;
612 static int on_boot_cpu __initdata = 1;
613 int err;
614
615 WARN_ON_FPU(!on_boot_cpu);
616 on_boot_cpu = 0;
617
618 if (!cpu_has_xsave) {
619 pr_info("x86/fpu: Legacy x87 FPU detected.\n");
620 return;
621 }
622
623 if (boot_cpu_data.cpuid_level < XSTATE_CPUID) {
624 WARN_ON_FPU(1);
625 return;
626 }
627
628 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
629 xfeatures_mask = eax + ((u64)edx << 32);
630
631 if ((xfeatures_mask & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) {
632 pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", xfeatures_mask);
633 BUG();
634 }
635
636 xfeatures_mask &= fpu__get_supported_xfeatures_mask();
637
638 /* Enable xstate instructions to be able to continue with initialization: */
639 fpu__init_cpu_xstate();
640 err = init_xstate_size();
641 if (err) {
642 /* something went wrong, boot without any XSAVE support */
643 fpu__init_disable_system_xstate();
644 return;
645 }
646
647 update_regset_xstate_info(xstate_size, xfeatures_mask);
648 fpu__init_prepare_fx_sw_frame();
649 setup_init_fpu_buf();
650 setup_xstate_comp();
651
652 pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is %d bytes, using '%s' format.\n",
653 xfeatures_mask,
654 xstate_size,
655 cpu_has_xsaves ? "compacted" : "standard");
656 }
657
658 /*
659 * Restore minimal FPU state after suspend:
660 */
661 void fpu__resume_cpu(void)
662 {
663 /*
664 * Restore XCR0 on xsave capable CPUs:
665 */
666 if (cpu_has_xsave)
667 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
668 }
669
670 /*
671 * Given the xsave area and a state inside, this function returns the
672 * address of the state.
673 *
674 * This is the API that is called to get xstate address in either
675 * standard format or compacted format of xsave area.
676 *
677 * Note that if there is no data for the field in the xsave buffer
678 * this will return NULL.
679 *
680 * Inputs:
681 * xstate: the thread's storage area for all FPU data
682 * xstate_feature: state which is defined in xsave.h (e.g.
683 * XFEATURE_MASK_FP, XFEATURE_MASK_SSE, etc...)
684 * Output:
685 * address of the state in the xsave area, or NULL if the
686 * field is not present in the xsave buffer.
687 */
688 void *get_xsave_addr(struct xregs_state *xsave, int xstate_feature)
689 {
690 int feature_nr = fls64(xstate_feature) - 1;
691 /*
692 * Do we even *have* xsave state?
693 */
694 if (!boot_cpu_has(X86_FEATURE_XSAVE))
695 return NULL;
696
697 /*
698 * We should not ever be requesting features that we
699 * have not enabled. Remember that pcntxt_mask is
700 * what we write to the XCR0 register.
701 */
702 WARN_ONCE(!(xfeatures_mask & xstate_feature),
703 "get of unsupported state");
704 /*
705 * This assumes the last 'xsave*' instruction to
706 * have requested that 'xstate_feature' be saved.
707 * If it did not, we might be seeing and old value
708 * of the field in the buffer.
709 *
710 * This can happen because the last 'xsave' did not
711 * request that this feature be saved (unlikely)
712 * or because the "init optimization" caused it
713 * to not be saved.
714 */
715 if (!(xsave->header.xfeatures & xstate_feature))
716 return NULL;
717
718 return (void *)xsave + xstate_comp_offsets[feature_nr];
719 }
720 EXPORT_SYMBOL_GPL(get_xsave_addr);
721
722 /*
723 * This wraps up the common operations that need to occur when retrieving
724 * data from xsave state. It first ensures that the current task was
725 * using the FPU and retrieves the data in to a buffer. It then calculates
726 * the offset of the requested field in the buffer.
727 *
728 * This function is safe to call whether the FPU is in use or not.
729 *
730 * Note that this only works on the current task.
731 *
732 * Inputs:
733 * @xsave_state: state which is defined in xsave.h (e.g. XFEATURE_MASK_FP,
734 * XFEATURE_MASK_SSE, etc...)
735 * Output:
736 * address of the state in the xsave area or NULL if the state
737 * is not present or is in its 'init state'.
738 */
739 const void *get_xsave_field_ptr(int xsave_state)
740 {
741 struct fpu *fpu = &current->thread.fpu;
742
743 if (!fpu->fpstate_active)
744 return NULL;
745 /*
746 * fpu__save() takes the CPU's xstate registers
747 * and saves them off to the 'fpu memory buffer.
748 */
749 fpu__save(fpu);
750
751 return get_xsave_addr(&fpu->state.xsave, xsave_state);
752 }
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