2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include "assigned-dev.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/module.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <trace/events/kvm.h>
58 #define CREATE_TRACE_POINTS
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
71 #define MAX_IO_MSRS 256
72 #define KVM_MAX_MCE_BANKS 32
73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
75 #define emul_to_vcpu(ctxt) \
76 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
79 * - enable syscall per default because its emulated by KVM
80 * - enable LME and LMA per default on 64 bit KVM
84 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
86 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
92 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
93 static void process_nmi(struct kvm_vcpu
*vcpu
);
94 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
96 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
97 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
99 static bool __read_mostly ignore_msrs
= 0;
100 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
102 unsigned int min_timer_period_us
= 500;
103 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
105 static bool __read_mostly kvmclock_periodic_sync
= true;
106 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
108 bool __read_mostly kvm_has_tsc_control
;
109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
110 u32 __read_mostly kvm_max_guest_tsc_khz
;
111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
112 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
113 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
114 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
115 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
116 static u64 __read_mostly kvm_default_tsc_scaling_ratio
;
118 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
119 static u32 __read_mostly tsc_tolerance_ppm
= 250;
120 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
122 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
123 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
124 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
126 static bool __read_mostly vector_hashing
= true;
127 module_param(vector_hashing
, bool, S_IRUGO
);
129 static bool __read_mostly backwards_tsc_observed
= false;
131 #define KVM_NR_SHARED_MSRS 16
133 struct kvm_shared_msrs_global
{
135 u32 msrs
[KVM_NR_SHARED_MSRS
];
138 struct kvm_shared_msrs
{
139 struct user_return_notifier urn
;
141 struct kvm_shared_msr_values
{
144 } values
[KVM_NR_SHARED_MSRS
];
147 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
148 static struct kvm_shared_msrs __percpu
*shared_msrs
;
150 struct kvm_stats_debugfs_item debugfs_entries
[] = {
151 { "pf_fixed", VCPU_STAT(pf_fixed
) },
152 { "pf_guest", VCPU_STAT(pf_guest
) },
153 { "tlb_flush", VCPU_STAT(tlb_flush
) },
154 { "invlpg", VCPU_STAT(invlpg
) },
155 { "exits", VCPU_STAT(exits
) },
156 { "io_exits", VCPU_STAT(io_exits
) },
157 { "mmio_exits", VCPU_STAT(mmio_exits
) },
158 { "signal_exits", VCPU_STAT(signal_exits
) },
159 { "irq_window", VCPU_STAT(irq_window_exits
) },
160 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
161 { "halt_exits", VCPU_STAT(halt_exits
) },
162 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
163 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
164 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
165 { "hypercalls", VCPU_STAT(hypercalls
) },
166 { "request_irq", VCPU_STAT(request_irq_exits
) },
167 { "irq_exits", VCPU_STAT(irq_exits
) },
168 { "host_state_reload", VCPU_STAT(host_state_reload
) },
169 { "efer_reload", VCPU_STAT(efer_reload
) },
170 { "fpu_reload", VCPU_STAT(fpu_reload
) },
171 { "insn_emulation", VCPU_STAT(insn_emulation
) },
172 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
173 { "irq_injections", VCPU_STAT(irq_injections
) },
174 { "nmi_injections", VCPU_STAT(nmi_injections
) },
175 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
176 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
177 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
178 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
179 { "mmu_flooded", VM_STAT(mmu_flooded
) },
180 { "mmu_recycled", VM_STAT(mmu_recycled
) },
181 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
182 { "mmu_unsync", VM_STAT(mmu_unsync
) },
183 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
184 { "largepages", VM_STAT(lpages
) },
188 u64 __read_mostly host_xcr0
;
190 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
192 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
195 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
196 vcpu
->arch
.apf
.gfns
[i
] = ~0;
199 static void kvm_on_user_return(struct user_return_notifier
*urn
)
202 struct kvm_shared_msrs
*locals
203 = container_of(urn
, struct kvm_shared_msrs
, urn
);
204 struct kvm_shared_msr_values
*values
;
206 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
207 values
= &locals
->values
[slot
];
208 if (values
->host
!= values
->curr
) {
209 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
210 values
->curr
= values
->host
;
213 locals
->registered
= false;
214 user_return_notifier_unregister(urn
);
217 static void shared_msr_update(unsigned slot
, u32 msr
)
220 unsigned int cpu
= smp_processor_id();
221 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
223 /* only read, and nobody should modify it at this time,
224 * so don't need lock */
225 if (slot
>= shared_msrs_global
.nr
) {
226 printk(KERN_ERR
"kvm: invalid MSR slot!");
229 rdmsrl_safe(msr
, &value
);
230 smsr
->values
[slot
].host
= value
;
231 smsr
->values
[slot
].curr
= value
;
234 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
236 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
237 shared_msrs_global
.msrs
[slot
] = msr
;
238 if (slot
>= shared_msrs_global
.nr
)
239 shared_msrs_global
.nr
= slot
+ 1;
241 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
243 static void kvm_shared_msr_cpu_online(void)
247 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
248 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
251 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
253 unsigned int cpu
= smp_processor_id();
254 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
257 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
259 smsr
->values
[slot
].curr
= value
;
260 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
264 if (!smsr
->registered
) {
265 smsr
->urn
.on_user_return
= kvm_on_user_return
;
266 user_return_notifier_register(&smsr
->urn
);
267 smsr
->registered
= true;
271 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
273 static void drop_user_return_notifiers(void)
275 unsigned int cpu
= smp_processor_id();
276 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
278 if (smsr
->registered
)
279 kvm_on_user_return(&smsr
->urn
);
282 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
284 return vcpu
->arch
.apic_base
;
286 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
288 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
290 u64 old_state
= vcpu
->arch
.apic_base
&
291 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
292 u64 new_state
= msr_info
->data
&
293 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
294 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
295 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
297 if (!msr_info
->host_initiated
&&
298 ((msr_info
->data
& reserved_bits
) != 0 ||
299 new_state
== X2APIC_ENABLE
||
300 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
301 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
302 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
306 kvm_lapic_set_base(vcpu
, msr_info
->data
);
309 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
311 asmlinkage __visible
void kvm_spurious_fault(void)
313 /* Fault while not rebooting. We want the trace. */
316 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
318 #define EXCPT_BENIGN 0
319 #define EXCPT_CONTRIBUTORY 1
322 static int exception_class(int vector
)
332 return EXCPT_CONTRIBUTORY
;
339 #define EXCPT_FAULT 0
341 #define EXCPT_ABORT 2
342 #define EXCPT_INTERRUPT 3
344 static int exception_type(int vector
)
348 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
349 return EXCPT_INTERRUPT
;
353 /* #DB is trap, as instruction watchpoints are handled elsewhere */
354 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
357 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
360 /* Reserved exceptions will result in fault */
364 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
365 unsigned nr
, bool has_error
, u32 error_code
,
371 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
373 if (!vcpu
->arch
.exception
.pending
) {
375 if (has_error
&& !is_protmode(vcpu
))
377 vcpu
->arch
.exception
.pending
= true;
378 vcpu
->arch
.exception
.has_error_code
= has_error
;
379 vcpu
->arch
.exception
.nr
= nr
;
380 vcpu
->arch
.exception
.error_code
= error_code
;
381 vcpu
->arch
.exception
.reinject
= reinject
;
385 /* to check exception */
386 prev_nr
= vcpu
->arch
.exception
.nr
;
387 if (prev_nr
== DF_VECTOR
) {
388 /* triple fault -> shutdown */
389 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
392 class1
= exception_class(prev_nr
);
393 class2
= exception_class(nr
);
394 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
395 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
396 /* generate double fault per SDM Table 5-5 */
397 vcpu
->arch
.exception
.pending
= true;
398 vcpu
->arch
.exception
.has_error_code
= true;
399 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
400 vcpu
->arch
.exception
.error_code
= 0;
402 /* replace previous exception with a new one in a hope
403 that instruction re-execution will regenerate lost
408 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
410 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
412 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
414 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
416 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
418 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
420 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
423 kvm_inject_gp(vcpu
, 0);
425 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
427 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
429 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
431 ++vcpu
->stat
.pf_guest
;
432 vcpu
->arch
.cr2
= fault
->address
;
433 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
435 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
437 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
439 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
440 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
442 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
444 return fault
->nested_page_fault
;
447 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
449 atomic_inc(&vcpu
->arch
.nmi_queued
);
450 kvm_make_request(KVM_REQ_NMI
, vcpu
);
452 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
454 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
456 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
458 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
460 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
462 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
464 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
467 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
468 * a #GP and return false.
470 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
472 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
474 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
477 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
479 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
481 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
484 kvm_queue_exception(vcpu
, UD_VECTOR
);
487 EXPORT_SYMBOL_GPL(kvm_require_dr
);
490 * This function will be used to read from the physical memory of the currently
491 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
492 * can read from guest physical or from the guest's guest physical memory.
494 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
495 gfn_t ngfn
, void *data
, int offset
, int len
,
498 struct x86_exception exception
;
502 ngpa
= gfn_to_gpa(ngfn
);
503 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
504 if (real_gfn
== UNMAPPED_GVA
)
507 real_gfn
= gpa_to_gfn(real_gfn
);
509 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
511 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
513 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
514 void *data
, int offset
, int len
, u32 access
)
516 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
517 data
, offset
, len
, access
);
521 * Load the pae pdptrs. Return true is they are all valid.
523 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
525 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
526 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
529 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
531 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
532 offset
* sizeof(u64
), sizeof(pdpte
),
533 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
538 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
539 if (is_present_gpte(pdpte
[i
]) &&
541 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
548 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
549 __set_bit(VCPU_EXREG_PDPTR
,
550 (unsigned long *)&vcpu
->arch
.regs_avail
);
551 __set_bit(VCPU_EXREG_PDPTR
,
552 (unsigned long *)&vcpu
->arch
.regs_dirty
);
557 EXPORT_SYMBOL_GPL(load_pdptrs
);
559 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
561 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
567 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
570 if (!test_bit(VCPU_EXREG_PDPTR
,
571 (unsigned long *)&vcpu
->arch
.regs_avail
))
574 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
575 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
576 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
577 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
580 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
586 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
588 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
589 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
594 if (cr0
& 0xffffffff00000000UL
)
598 cr0
&= ~CR0_RESERVED_BITS
;
600 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
603 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
606 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
608 if ((vcpu
->arch
.efer
& EFER_LME
)) {
613 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
618 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
623 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
626 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
628 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
629 kvm_clear_async_pf_completion_queue(vcpu
);
630 kvm_async_pf_hash_reset(vcpu
);
633 if ((cr0
^ old_cr0
) & update_bits
)
634 kvm_mmu_reset_context(vcpu
);
636 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
637 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
638 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
639 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
643 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
645 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
647 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
649 EXPORT_SYMBOL_GPL(kvm_lmsw
);
651 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
653 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
654 !vcpu
->guest_xcr0_loaded
) {
655 /* kvm_set_xcr() also depends on this */
656 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
657 vcpu
->guest_xcr0_loaded
= 1;
661 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
663 if (vcpu
->guest_xcr0_loaded
) {
664 if (vcpu
->arch
.xcr0
!= host_xcr0
)
665 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
666 vcpu
->guest_xcr0_loaded
= 0;
670 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
673 u64 old_xcr0
= vcpu
->arch
.xcr0
;
676 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
677 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
679 if (!(xcr0
& XFEATURE_MASK_FP
))
681 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
685 * Do not allow the guest to set bits that we do not support
686 * saving. However, xcr0 bit 0 is always set, even if the
687 * emulated CPU does not support XSAVE (see fx_init).
689 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
690 if (xcr0
& ~valid_bits
)
693 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
694 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
697 if (xcr0
& XFEATURE_MASK_AVX512
) {
698 if (!(xcr0
& XFEATURE_MASK_YMM
))
700 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
703 kvm_put_guest_xcr0(vcpu
);
704 vcpu
->arch
.xcr0
= xcr0
;
706 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
707 kvm_update_cpuid(vcpu
);
711 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
713 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
714 __kvm_set_xcr(vcpu
, index
, xcr
)) {
715 kvm_inject_gp(vcpu
, 0);
720 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
722 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
724 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
725 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
726 X86_CR4_SMEP
| X86_CR4_SMAP
;
728 if (cr4
& CR4_RESERVED_BITS
)
731 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
734 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
737 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
740 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
743 if (is_long_mode(vcpu
)) {
744 if (!(cr4
& X86_CR4_PAE
))
746 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
747 && ((cr4
^ old_cr4
) & pdptr_bits
)
748 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
752 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
753 if (!guest_cpuid_has_pcid(vcpu
))
756 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
757 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
761 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
764 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
765 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
766 kvm_mmu_reset_context(vcpu
);
768 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
769 kvm_update_cpuid(vcpu
);
773 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
775 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
778 cr3
&= ~CR3_PCID_INVD
;
781 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
782 kvm_mmu_sync_roots(vcpu
);
783 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
787 if (is_long_mode(vcpu
)) {
788 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
790 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
791 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
794 vcpu
->arch
.cr3
= cr3
;
795 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
796 kvm_mmu_new_cr3(vcpu
);
799 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
801 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
803 if (cr8
& CR8_RESERVED_BITS
)
805 if (lapic_in_kernel(vcpu
))
806 kvm_lapic_set_tpr(vcpu
, cr8
);
808 vcpu
->arch
.cr8
= cr8
;
811 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
813 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
815 if (lapic_in_kernel(vcpu
))
816 return kvm_lapic_get_cr8(vcpu
);
818 return vcpu
->arch
.cr8
;
820 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
822 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
826 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
827 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
828 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
829 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
833 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
835 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
836 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
839 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
843 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
844 dr7
= vcpu
->arch
.guest_debug_dr7
;
846 dr7
= vcpu
->arch
.dr7
;
847 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
848 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
849 if (dr7
& DR7_BP_EN_MASK
)
850 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
853 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
855 u64 fixed
= DR6_FIXED_1
;
857 if (!guest_cpuid_has_rtm(vcpu
))
862 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
866 vcpu
->arch
.db
[dr
] = val
;
867 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
868 vcpu
->arch
.eff_db
[dr
] = val
;
873 if (val
& 0xffffffff00000000ULL
)
875 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
876 kvm_update_dr6(vcpu
);
881 if (val
& 0xffffffff00000000ULL
)
883 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
884 kvm_update_dr7(vcpu
);
891 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
893 if (__kvm_set_dr(vcpu
, dr
, val
)) {
894 kvm_inject_gp(vcpu
, 0);
899 EXPORT_SYMBOL_GPL(kvm_set_dr
);
901 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
905 *val
= vcpu
->arch
.db
[dr
];
910 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
911 *val
= vcpu
->arch
.dr6
;
913 *val
= kvm_x86_ops
->get_dr6(vcpu
);
918 *val
= vcpu
->arch
.dr7
;
923 EXPORT_SYMBOL_GPL(kvm_get_dr
);
925 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
927 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
931 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
934 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
935 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
938 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
941 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
942 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
944 * This list is modified at module load time to reflect the
945 * capabilities of the host cpu. This capabilities test skips MSRs that are
946 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
947 * may depend on host virtualization features rather than host cpu features.
950 static u32 msrs_to_save
[] = {
951 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
954 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
956 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
957 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
960 static unsigned num_msrs_to_save
;
962 static u32 emulated_msrs
[] = {
963 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
964 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
965 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
966 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
967 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
968 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
971 HV_X64_MSR_VP_RUNTIME
,
973 HV_X64_MSR_STIMER0_CONFIG
,
974 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
978 MSR_IA32_TSCDEADLINE
,
979 MSR_IA32_MISC_ENABLE
,
985 static unsigned num_emulated_msrs
;
987 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
989 if (efer
& efer_reserved_bits
)
992 if (efer
& EFER_FFXSR
) {
993 struct kvm_cpuid_entry2
*feat
;
995 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
996 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
1000 if (efer
& EFER_SVME
) {
1001 struct kvm_cpuid_entry2
*feat
;
1003 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1004 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
1010 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1012 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1014 u64 old_efer
= vcpu
->arch
.efer
;
1016 if (!kvm_valid_efer(vcpu
, efer
))
1020 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1024 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1026 kvm_x86_ops
->set_efer(vcpu
, efer
);
1028 /* Update reserved bits */
1029 if ((efer
^ old_efer
) & EFER_NX
)
1030 kvm_mmu_reset_context(vcpu
);
1035 void kvm_enable_efer_bits(u64 mask
)
1037 efer_reserved_bits
&= ~mask
;
1039 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1042 * Writes msr value into into the appropriate "register".
1043 * Returns 0 on success, non-0 otherwise.
1044 * Assumes vcpu_load() was already called.
1046 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1048 switch (msr
->index
) {
1051 case MSR_KERNEL_GS_BASE
:
1054 if (is_noncanonical_address(msr
->data
))
1057 case MSR_IA32_SYSENTER_EIP
:
1058 case MSR_IA32_SYSENTER_ESP
:
1060 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1061 * non-canonical address is written on Intel but not on
1062 * AMD (which ignores the top 32-bits, because it does
1063 * not implement 64-bit SYSENTER).
1065 * 64-bit code should hence be able to write a non-canonical
1066 * value on AMD. Making the address canonical ensures that
1067 * vmentry does not fail on Intel after writing a non-canonical
1068 * value, and that something deterministic happens if the guest
1069 * invokes 64-bit SYSENTER.
1071 msr
->data
= get_canonical(msr
->data
);
1073 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1075 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1078 * Adapt set_msr() to msr_io()'s calling convention
1080 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1082 struct msr_data msr
;
1086 msr
.host_initiated
= true;
1087 r
= kvm_get_msr(vcpu
, &msr
);
1095 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1097 struct msr_data msr
;
1101 msr
.host_initiated
= true;
1102 return kvm_set_msr(vcpu
, &msr
);
1105 #ifdef CONFIG_X86_64
1106 struct pvclock_gtod_data
{
1109 struct { /* extract of a clocksource struct */
1121 static struct pvclock_gtod_data pvclock_gtod_data
;
1123 static void update_pvclock_gtod(struct timekeeper
*tk
)
1125 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1128 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1130 write_seqcount_begin(&vdata
->seq
);
1132 /* copy pvclock gtod data */
1133 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1134 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1135 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1136 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1137 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1139 vdata
->boot_ns
= boot_ns
;
1140 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1142 write_seqcount_end(&vdata
->seq
);
1146 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1149 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1150 * vcpu_enter_guest. This function is only called from
1151 * the physical CPU that is running vcpu.
1153 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1156 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1160 struct pvclock_wall_clock wc
;
1161 struct timespec boot
;
1166 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1171 ++version
; /* first time write, random junk */
1175 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1179 * The guest calculates current wall clock time by adding
1180 * system time (updated by kvm_guest_time_update below) to the
1181 * wall clock specified here. guest system time equals host
1182 * system time for us, thus we must fill in host boot time here.
1186 if (kvm
->arch
.kvmclock_offset
) {
1187 struct timespec ts
= ns_to_timespec(kvm
->arch
.kvmclock_offset
);
1188 boot
= timespec_sub(boot
, ts
);
1190 wc
.sec
= boot
.tv_sec
;
1191 wc
.nsec
= boot
.tv_nsec
;
1192 wc
.version
= version
;
1194 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1197 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1200 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1202 do_shl32_div32(dividend
, divisor
);
1206 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1207 s8
*pshift
, u32
*pmultiplier
)
1215 scaled64
= scaled_hz
;
1216 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1221 tps32
= (uint32_t)tps64
;
1222 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1223 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1231 *pmultiplier
= div_frac(scaled64
, tps32
);
1233 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1234 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1237 #ifdef CONFIG_X86_64
1238 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1241 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1242 static unsigned long max_tsc_khz
;
1244 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1246 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1247 vcpu
->arch
.virtual_tsc_shift
);
1250 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1252 u64 v
= (u64
)khz
* (1000000 + ppm
);
1257 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1261 /* Guest TSC same frequency as host TSC? */
1263 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1267 /* TSC scaling supported? */
1268 if (!kvm_has_tsc_control
) {
1269 if (user_tsc_khz
> tsc_khz
) {
1270 vcpu
->arch
.tsc_catchup
= 1;
1271 vcpu
->arch
.tsc_always_catchup
= 1;
1274 WARN(1, "user requested TSC rate below hardware speed\n");
1279 /* TSC scaling required - calculate ratio */
1280 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1281 user_tsc_khz
, tsc_khz
);
1283 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1284 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1289 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1293 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1295 u32 thresh_lo
, thresh_hi
;
1296 int use_scaling
= 0;
1298 /* tsc_khz can be zero if TSC calibration fails */
1299 if (user_tsc_khz
== 0) {
1300 /* set tsc_scaling_ratio to a safe value */
1301 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1305 /* Compute a scale to convert nanoseconds in TSC cycles */
1306 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1307 &vcpu
->arch
.virtual_tsc_shift
,
1308 &vcpu
->arch
.virtual_tsc_mult
);
1309 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1312 * Compute the variation in TSC rate which is acceptable
1313 * within the range of tolerance and decide if the
1314 * rate being applied is within that bounds of the hardware
1315 * rate. If so, no scaling or compensation need be done.
1317 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1318 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1319 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1320 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1323 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1326 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1328 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1329 vcpu
->arch
.virtual_tsc_mult
,
1330 vcpu
->arch
.virtual_tsc_shift
);
1331 tsc
+= vcpu
->arch
.this_tsc_write
;
1335 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1337 #ifdef CONFIG_X86_64
1339 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1340 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1342 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1343 atomic_read(&vcpu
->kvm
->online_vcpus
));
1346 * Once the masterclock is enabled, always perform request in
1347 * order to update it.
1349 * In order to enable masterclock, the host clocksource must be TSC
1350 * and the vcpus need to have matched TSCs. When that happens,
1351 * perform request to enable masterclock.
1353 if (ka
->use_master_clock
||
1354 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1355 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1357 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1358 atomic_read(&vcpu
->kvm
->online_vcpus
),
1359 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1363 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1365 u64 curr_offset
= kvm_x86_ops
->read_tsc_offset(vcpu
);
1366 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1370 * Multiply tsc by a fixed point number represented by ratio.
1372 * The most significant 64-N bits (mult) of ratio represent the
1373 * integral part of the fixed point number; the remaining N bits
1374 * (frac) represent the fractional part, ie. ratio represents a fixed
1375 * point number (mult + frac * 2^(-N)).
1377 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1379 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1381 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1384 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1387 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1389 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1390 _tsc
= __scale_tsc(ratio
, tsc
);
1394 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1396 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1400 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1402 return target_tsc
- tsc
;
1405 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1407 return kvm_x86_ops
->read_l1_tsc(vcpu
, kvm_scale_tsc(vcpu
, host_tsc
));
1409 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1411 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1413 struct kvm
*kvm
= vcpu
->kvm
;
1414 u64 offset
, ns
, elapsed
;
1415 unsigned long flags
;
1418 bool already_matched
;
1419 u64 data
= msr
->data
;
1421 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1422 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1423 ns
= get_kernel_ns();
1424 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1426 if (vcpu
->arch
.virtual_tsc_khz
) {
1429 /* n.b - signed multiplication and division required */
1430 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1431 #ifdef CONFIG_X86_64
1432 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1434 /* do_div() only does unsigned */
1435 asm("1: idivl %[divisor]\n"
1436 "2: xor %%edx, %%edx\n"
1437 " movl $0, %[faulted]\n"
1439 ".section .fixup,\"ax\"\n"
1440 "4: movl $1, %[faulted]\n"
1444 _ASM_EXTABLE(1b
, 4b
)
1446 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1447 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1450 do_div(elapsed
, 1000);
1455 /* idivl overflow => difference is larger than USEC_PER_SEC */
1457 usdiff
= USEC_PER_SEC
;
1459 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1462 * Special case: TSC write with a small delta (1 second) of virtual
1463 * cycle time against real time is interpreted as an attempt to
1464 * synchronize the CPU.
1466 * For a reliable TSC, we can match TSC offsets, and for an unstable
1467 * TSC, we add elapsed time in this computation. We could let the
1468 * compensation code attempt to catch up if we fall behind, but
1469 * it's better to try to match offsets from the beginning.
1471 if (usdiff
< USEC_PER_SEC
&&
1472 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1473 if (!check_tsc_unstable()) {
1474 offset
= kvm
->arch
.cur_tsc_offset
;
1475 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1477 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1479 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1480 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1483 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1486 * We split periods of matched TSC writes into generations.
1487 * For each generation, we track the original measured
1488 * nanosecond time, offset, and write, so if TSCs are in
1489 * sync, we can match exact offset, and if not, we can match
1490 * exact software computation in compute_guest_tsc()
1492 * These values are tracked in kvm->arch.cur_xxx variables.
1494 kvm
->arch
.cur_tsc_generation
++;
1495 kvm
->arch
.cur_tsc_nsec
= ns
;
1496 kvm
->arch
.cur_tsc_write
= data
;
1497 kvm
->arch
.cur_tsc_offset
= offset
;
1499 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1500 kvm
->arch
.cur_tsc_generation
, data
);
1504 * We also track th most recent recorded KHZ, write and time to
1505 * allow the matching interval to be extended at each write.
1507 kvm
->arch
.last_tsc_nsec
= ns
;
1508 kvm
->arch
.last_tsc_write
= data
;
1509 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1511 vcpu
->arch
.last_guest_tsc
= data
;
1513 /* Keep track of which generation this VCPU has synchronized to */
1514 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1515 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1516 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1518 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1519 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1520 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1521 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1523 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1525 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1526 } else if (!already_matched
) {
1527 kvm
->arch
.nr_vcpus_matched_tsc
++;
1530 kvm_track_tsc_matching(vcpu
);
1531 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1534 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1536 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1539 kvm_x86_ops
->adjust_tsc_offset_guest(vcpu
, adjustment
);
1542 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1544 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1545 WARN_ON(adjustment
< 0);
1546 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1547 kvm_x86_ops
->adjust_tsc_offset_guest(vcpu
, adjustment
);
1550 #ifdef CONFIG_X86_64
1552 static cycle_t
read_tsc(void)
1554 cycle_t ret
= (cycle_t
)rdtsc_ordered();
1555 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1557 if (likely(ret
>= last
))
1561 * GCC likes to generate cmov here, but this branch is extremely
1562 * predictable (it's just a funciton of time and the likely is
1563 * very likely) and there's a data dependence, so force GCC
1564 * to generate a branch instead. I don't barrier() because
1565 * we don't actually need a barrier, and if this function
1566 * ever gets inlined it will generate worse code.
1572 static inline u64
vgettsc(cycle_t
*cycle_now
)
1575 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1577 *cycle_now
= read_tsc();
1579 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1580 return v
* gtod
->clock
.mult
;
1583 static int do_monotonic_boot(s64
*t
, cycle_t
*cycle_now
)
1585 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1591 seq
= read_seqcount_begin(>od
->seq
);
1592 mode
= gtod
->clock
.vclock_mode
;
1593 ns
= gtod
->nsec_base
;
1594 ns
+= vgettsc(cycle_now
);
1595 ns
>>= gtod
->clock
.shift
;
1596 ns
+= gtod
->boot_ns
;
1597 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1603 /* returns true if host is using tsc clocksource */
1604 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, cycle_t
*cycle_now
)
1606 /* checked again under seqlock below */
1607 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1610 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1616 * Assuming a stable TSC across physical CPUS, and a stable TSC
1617 * across virtual CPUs, the following condition is possible.
1618 * Each numbered line represents an event visible to both
1619 * CPUs at the next numbered event.
1621 * "timespecX" represents host monotonic time. "tscX" represents
1624 * VCPU0 on CPU0 | VCPU1 on CPU1
1626 * 1. read timespec0,tsc0
1627 * 2. | timespec1 = timespec0 + N
1629 * 3. transition to guest | transition to guest
1630 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1631 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1632 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1634 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1637 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1639 * - 0 < N - M => M < N
1641 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1642 * always the case (the difference between two distinct xtime instances
1643 * might be smaller then the difference between corresponding TSC reads,
1644 * when updating guest vcpus pvclock areas).
1646 * To avoid that problem, do not allow visibility of distinct
1647 * system_timestamp/tsc_timestamp values simultaneously: use a master
1648 * copy of host monotonic time values. Update that master copy
1651 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1655 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1657 #ifdef CONFIG_X86_64
1658 struct kvm_arch
*ka
= &kvm
->arch
;
1660 bool host_tsc_clocksource
, vcpus_matched
;
1662 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1663 atomic_read(&kvm
->online_vcpus
));
1666 * If the host uses TSC clock, then passthrough TSC as stable
1669 host_tsc_clocksource
= kvm_get_time_and_clockread(
1670 &ka
->master_kernel_ns
,
1671 &ka
->master_cycle_now
);
1673 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1674 && !backwards_tsc_observed
1675 && !ka
->boot_vcpu_runs_old_kvmclock
;
1677 if (ka
->use_master_clock
)
1678 atomic_set(&kvm_guest_has_master_clock
, 1);
1680 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1681 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1686 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1688 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1691 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1693 #ifdef CONFIG_X86_64
1695 struct kvm_vcpu
*vcpu
;
1696 struct kvm_arch
*ka
= &kvm
->arch
;
1698 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1699 kvm_make_mclock_inprogress_request(kvm
);
1700 /* no guest entries from this point */
1701 pvclock_update_vm_gtod_copy(kvm
);
1703 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1704 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1706 /* guest entries allowed */
1707 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1708 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1710 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1714 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1716 unsigned long flags
, tgt_tsc_khz
;
1717 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1718 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1720 u64 tsc_timestamp
, host_tsc
;
1721 struct pvclock_vcpu_time_info guest_hv_clock
;
1723 bool use_master_clock
;
1729 * If the host uses TSC clock, then passthrough TSC as stable
1732 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1733 use_master_clock
= ka
->use_master_clock
;
1734 if (use_master_clock
) {
1735 host_tsc
= ka
->master_cycle_now
;
1736 kernel_ns
= ka
->master_kernel_ns
;
1738 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1740 /* Keep irq disabled to prevent changes to the clock */
1741 local_irq_save(flags
);
1742 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1743 if (unlikely(tgt_tsc_khz
== 0)) {
1744 local_irq_restore(flags
);
1745 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1748 if (!use_master_clock
) {
1750 kernel_ns
= get_kernel_ns();
1753 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1756 * We may have to catch up the TSC to match elapsed wall clock
1757 * time for two reasons, even if kvmclock is used.
1758 * 1) CPU could have been running below the maximum TSC rate
1759 * 2) Broken TSC compensation resets the base at each VCPU
1760 * entry to avoid unknown leaps of TSC even when running
1761 * again on the same CPU. This may cause apparent elapsed
1762 * time to disappear, and the guest to stand still or run
1765 if (vcpu
->tsc_catchup
) {
1766 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1767 if (tsc
> tsc_timestamp
) {
1768 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1769 tsc_timestamp
= tsc
;
1773 local_irq_restore(flags
);
1775 if (!vcpu
->pv_time_enabled
)
1778 if (kvm_has_tsc_control
)
1779 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
1781 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
1782 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
1783 &vcpu
->hv_clock
.tsc_shift
,
1784 &vcpu
->hv_clock
.tsc_to_system_mul
);
1785 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
1788 /* With all the info we got, fill in the values */
1789 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1790 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1791 vcpu
->last_guest_tsc
= tsc_timestamp
;
1793 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1794 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1797 /* This VCPU is paused, but it's legal for a guest to read another
1798 * VCPU's kvmclock, so we really have to follow the specification where
1799 * it says that version is odd if data is being modified, and even after
1802 * Version field updates must be kept separate. This is because
1803 * kvm_write_guest_cached might use a "rep movs" instruction, and
1804 * writes within a string instruction are weakly ordered. So there
1805 * are three writes overall.
1807 * As a small optimization, only write the version field in the first
1808 * and third write. The vcpu->pv_time cache is still valid, because the
1809 * version field is the first in the struct.
1811 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1813 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1814 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1816 sizeof(vcpu
->hv_clock
.version
));
1820 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1821 pvclock_flags
= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1823 if (vcpu
->pvclock_set_guest_stopped_request
) {
1824 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1825 vcpu
->pvclock_set_guest_stopped_request
= false;
1828 /* If the host uses TSC clocksource, then it is stable */
1829 if (use_master_clock
)
1830 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1832 vcpu
->hv_clock
.flags
= pvclock_flags
;
1834 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1836 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1838 sizeof(vcpu
->hv_clock
));
1842 vcpu
->hv_clock
.version
++;
1843 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1845 sizeof(vcpu
->hv_clock
.version
));
1850 * kvmclock updates which are isolated to a given vcpu, such as
1851 * vcpu->cpu migration, should not allow system_timestamp from
1852 * the rest of the vcpus to remain static. Otherwise ntp frequency
1853 * correction applies to one vcpu's system_timestamp but not
1856 * So in those cases, request a kvmclock update for all vcpus.
1857 * We need to rate-limit these requests though, as they can
1858 * considerably slow guests that have a large number of vcpus.
1859 * The time for a remote vcpu to update its kvmclock is bound
1860 * by the delay we use to rate-limit the updates.
1863 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1865 static void kvmclock_update_fn(struct work_struct
*work
)
1868 struct delayed_work
*dwork
= to_delayed_work(work
);
1869 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1870 kvmclock_update_work
);
1871 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1872 struct kvm_vcpu
*vcpu
;
1874 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1875 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1876 kvm_vcpu_kick(vcpu
);
1880 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1882 struct kvm
*kvm
= v
->kvm
;
1884 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1885 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1886 KVMCLOCK_UPDATE_DELAY
);
1889 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1891 static void kvmclock_sync_fn(struct work_struct
*work
)
1893 struct delayed_work
*dwork
= to_delayed_work(work
);
1894 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1895 kvmclock_sync_work
);
1896 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1898 if (!kvmclock_periodic_sync
)
1901 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1902 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1903 KVMCLOCK_SYNC_PERIOD
);
1906 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1908 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1909 unsigned bank_num
= mcg_cap
& 0xff;
1912 case MSR_IA32_MCG_STATUS
:
1913 vcpu
->arch
.mcg_status
= data
;
1915 case MSR_IA32_MCG_CTL
:
1916 if (!(mcg_cap
& MCG_CTL_P
))
1918 if (data
!= 0 && data
!= ~(u64
)0)
1920 vcpu
->arch
.mcg_ctl
= data
;
1923 if (msr
>= MSR_IA32_MC0_CTL
&&
1924 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
1925 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1926 /* only 0 or all 1s can be written to IA32_MCi_CTL
1927 * some Linux kernels though clear bit 10 in bank 4 to
1928 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1929 * this to avoid an uncatched #GP in the guest
1931 if ((offset
& 0x3) == 0 &&
1932 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1934 vcpu
->arch
.mce_banks
[offset
] = data
;
1942 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1944 struct kvm
*kvm
= vcpu
->kvm
;
1945 int lm
= is_long_mode(vcpu
);
1946 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1947 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1948 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1949 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1950 u32 page_num
= data
& ~PAGE_MASK
;
1951 u64 page_addr
= data
& PAGE_MASK
;
1956 if (page_num
>= blob_size
)
1959 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1964 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
1973 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1975 gpa_t gpa
= data
& ~0x3f;
1977 /* Bits 2:5 are reserved, Should be zero */
1981 vcpu
->arch
.apf
.msr_val
= data
;
1983 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1984 kvm_clear_async_pf_completion_queue(vcpu
);
1985 kvm_async_pf_hash_reset(vcpu
);
1989 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
1993 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
1994 kvm_async_pf_wakeup_all(vcpu
);
1998 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2000 vcpu
->arch
.pv_time_enabled
= false;
2003 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
2007 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2010 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
2011 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2012 vcpu
->arch
.st
.accum_steal
= delta
;
2015 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2017 accumulate_steal_time(vcpu
);
2019 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2022 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2023 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2026 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
2027 vcpu
->arch
.st
.steal
.version
+= 2;
2028 vcpu
->arch
.st
.accum_steal
= 0;
2030 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2031 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2034 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2037 u32 msr
= msr_info
->index
;
2038 u64 data
= msr_info
->data
;
2041 case MSR_AMD64_NB_CFG
:
2042 case MSR_IA32_UCODE_REV
:
2043 case MSR_IA32_UCODE_WRITE
:
2044 case MSR_VM_HSAVE_PA
:
2045 case MSR_AMD64_PATCH_LOADER
:
2046 case MSR_AMD64_BU_CFG2
:
2050 return set_efer(vcpu
, data
);
2052 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2053 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2054 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2055 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2057 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2062 case MSR_FAM10H_MMIO_CONF_BASE
:
2064 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2069 case MSR_IA32_DEBUGCTLMSR
:
2071 /* We support the non-activated case already */
2073 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2074 /* Values other than LBR and BTF are vendor-specific,
2075 thus reserved and should throw a #GP */
2078 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2081 case 0x200 ... 0x2ff:
2082 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2083 case MSR_IA32_APICBASE
:
2084 return kvm_set_apic_base(vcpu
, msr_info
);
2085 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2086 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2087 case MSR_IA32_TSCDEADLINE
:
2088 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2090 case MSR_IA32_TSC_ADJUST
:
2091 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2092 if (!msr_info
->host_initiated
) {
2093 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2094 adjust_tsc_offset_guest(vcpu
, adj
);
2096 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2099 case MSR_IA32_MISC_ENABLE
:
2100 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2102 case MSR_IA32_SMBASE
:
2103 if (!msr_info
->host_initiated
)
2105 vcpu
->arch
.smbase
= data
;
2107 case MSR_KVM_WALL_CLOCK_NEW
:
2108 case MSR_KVM_WALL_CLOCK
:
2109 vcpu
->kvm
->arch
.wall_clock
= data
;
2110 kvm_write_wall_clock(vcpu
->kvm
, data
);
2112 case MSR_KVM_SYSTEM_TIME_NEW
:
2113 case MSR_KVM_SYSTEM_TIME
: {
2115 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2117 kvmclock_reset(vcpu
);
2119 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2120 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2122 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2123 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
2126 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2129 vcpu
->arch
.time
= data
;
2130 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2132 /* we verify if the enable bit is set... */
2136 gpa_offset
= data
& ~(PAGE_MASK
| 1);
2138 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2139 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2140 sizeof(struct pvclock_vcpu_time_info
)))
2141 vcpu
->arch
.pv_time_enabled
= false;
2143 vcpu
->arch
.pv_time_enabled
= true;
2147 case MSR_KVM_ASYNC_PF_EN
:
2148 if (kvm_pv_enable_async_pf(vcpu
, data
))
2151 case MSR_KVM_STEAL_TIME
:
2153 if (unlikely(!sched_info_on()))
2156 if (data
& KVM_STEAL_RESERVED_MASK
)
2159 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2160 data
& KVM_STEAL_VALID_BITS
,
2161 sizeof(struct kvm_steal_time
)))
2164 vcpu
->arch
.st
.msr_val
= data
;
2166 if (!(data
& KVM_MSR_ENABLED
))
2169 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2172 case MSR_KVM_PV_EOI_EN
:
2173 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2177 case MSR_IA32_MCG_CTL
:
2178 case MSR_IA32_MCG_STATUS
:
2179 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2180 return set_msr_mce(vcpu
, msr
, data
);
2182 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2183 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2184 pr
= true; /* fall through */
2185 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2186 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2187 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2188 return kvm_pmu_set_msr(vcpu
, msr_info
);
2190 if (pr
|| data
!= 0)
2191 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2192 "0x%x data 0x%llx\n", msr
, data
);
2194 case MSR_K7_CLK_CTL
:
2196 * Ignore all writes to this no longer documented MSR.
2197 * Writes are only relevant for old K7 processors,
2198 * all pre-dating SVM, but a recommended workaround from
2199 * AMD for these chips. It is possible to specify the
2200 * affected processor models on the command line, hence
2201 * the need to ignore the workaround.
2204 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2205 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2206 case HV_X64_MSR_CRASH_CTL
:
2207 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2208 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2209 msr_info
->host_initiated
);
2210 case MSR_IA32_BBL_CR_CTL3
:
2211 /* Drop writes to this legacy MSR -- see rdmsr
2212 * counterpart for further detail.
2214 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
2216 case MSR_AMD64_OSVW_ID_LENGTH
:
2217 if (!guest_cpuid_has_osvw(vcpu
))
2219 vcpu
->arch
.osvw
.length
= data
;
2221 case MSR_AMD64_OSVW_STATUS
:
2222 if (!guest_cpuid_has_osvw(vcpu
))
2224 vcpu
->arch
.osvw
.status
= data
;
2227 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2228 return xen_hvm_config(vcpu
, data
);
2229 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2230 return kvm_pmu_set_msr(vcpu
, msr_info
);
2232 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
2236 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
2243 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2247 * Reads an msr value (of 'msr_index') into 'pdata'.
2248 * Returns 0 on success, non-0 otherwise.
2249 * Assumes vcpu_load() was already called.
2251 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2253 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2255 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2257 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2260 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2261 unsigned bank_num
= mcg_cap
& 0xff;
2264 case MSR_IA32_P5_MC_ADDR
:
2265 case MSR_IA32_P5_MC_TYPE
:
2268 case MSR_IA32_MCG_CAP
:
2269 data
= vcpu
->arch
.mcg_cap
;
2271 case MSR_IA32_MCG_CTL
:
2272 if (!(mcg_cap
& MCG_CTL_P
))
2274 data
= vcpu
->arch
.mcg_ctl
;
2276 case MSR_IA32_MCG_STATUS
:
2277 data
= vcpu
->arch
.mcg_status
;
2280 if (msr
>= MSR_IA32_MC0_CTL
&&
2281 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2282 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2283 data
= vcpu
->arch
.mce_banks
[offset
];
2292 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2294 switch (msr_info
->index
) {
2295 case MSR_IA32_PLATFORM_ID
:
2296 case MSR_IA32_EBL_CR_POWERON
:
2297 case MSR_IA32_DEBUGCTLMSR
:
2298 case MSR_IA32_LASTBRANCHFROMIP
:
2299 case MSR_IA32_LASTBRANCHTOIP
:
2300 case MSR_IA32_LASTINTFROMIP
:
2301 case MSR_IA32_LASTINTTOIP
:
2303 case MSR_K8_TSEG_ADDR
:
2304 case MSR_K8_TSEG_MASK
:
2306 case MSR_VM_HSAVE_PA
:
2307 case MSR_K8_INT_PENDING_MSG
:
2308 case MSR_AMD64_NB_CFG
:
2309 case MSR_FAM10H_MMIO_CONF_BASE
:
2310 case MSR_AMD64_BU_CFG2
:
2313 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2314 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2315 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2316 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2317 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2318 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2321 case MSR_IA32_UCODE_REV
:
2322 msr_info
->data
= 0x100000000ULL
;
2325 case 0x200 ... 0x2ff:
2326 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2327 case 0xcd: /* fsb frequency */
2331 * MSR_EBC_FREQUENCY_ID
2332 * Conservative value valid for even the basic CPU models.
2333 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2334 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2335 * and 266MHz for model 3, or 4. Set Core Clock
2336 * Frequency to System Bus Frequency Ratio to 1 (bits
2337 * 31:24) even though these are only valid for CPU
2338 * models > 2, however guests may end up dividing or
2339 * multiplying by zero otherwise.
2341 case MSR_EBC_FREQUENCY_ID
:
2342 msr_info
->data
= 1 << 24;
2344 case MSR_IA32_APICBASE
:
2345 msr_info
->data
= kvm_get_apic_base(vcpu
);
2347 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2348 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2350 case MSR_IA32_TSCDEADLINE
:
2351 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2353 case MSR_IA32_TSC_ADJUST
:
2354 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2356 case MSR_IA32_MISC_ENABLE
:
2357 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2359 case MSR_IA32_SMBASE
:
2360 if (!msr_info
->host_initiated
)
2362 msr_info
->data
= vcpu
->arch
.smbase
;
2364 case MSR_IA32_PERF_STATUS
:
2365 /* TSC increment by tick */
2366 msr_info
->data
= 1000ULL;
2367 /* CPU multiplier */
2368 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2371 msr_info
->data
= vcpu
->arch
.efer
;
2373 case MSR_KVM_WALL_CLOCK
:
2374 case MSR_KVM_WALL_CLOCK_NEW
:
2375 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2377 case MSR_KVM_SYSTEM_TIME
:
2378 case MSR_KVM_SYSTEM_TIME_NEW
:
2379 msr_info
->data
= vcpu
->arch
.time
;
2381 case MSR_KVM_ASYNC_PF_EN
:
2382 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2384 case MSR_KVM_STEAL_TIME
:
2385 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2387 case MSR_KVM_PV_EOI_EN
:
2388 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2390 case MSR_IA32_P5_MC_ADDR
:
2391 case MSR_IA32_P5_MC_TYPE
:
2392 case MSR_IA32_MCG_CAP
:
2393 case MSR_IA32_MCG_CTL
:
2394 case MSR_IA32_MCG_STATUS
:
2395 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2396 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2397 case MSR_K7_CLK_CTL
:
2399 * Provide expected ramp-up count for K7. All other
2400 * are set to zero, indicating minimum divisors for
2403 * This prevents guest kernels on AMD host with CPU
2404 * type 6, model 8 and higher from exploding due to
2405 * the rdmsr failing.
2407 msr_info
->data
= 0x20000000;
2409 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2410 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2411 case HV_X64_MSR_CRASH_CTL
:
2412 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2413 return kvm_hv_get_msr_common(vcpu
,
2414 msr_info
->index
, &msr_info
->data
);
2416 case MSR_IA32_BBL_CR_CTL3
:
2417 /* This legacy MSR exists but isn't fully documented in current
2418 * silicon. It is however accessed by winxp in very narrow
2419 * scenarios where it sets bit #19, itself documented as
2420 * a "reserved" bit. Best effort attempt to source coherent
2421 * read data here should the balance of the register be
2422 * interpreted by the guest:
2424 * L2 cache control register 3: 64GB range, 256KB size,
2425 * enabled, latency 0x1, configured
2427 msr_info
->data
= 0xbe702111;
2429 case MSR_AMD64_OSVW_ID_LENGTH
:
2430 if (!guest_cpuid_has_osvw(vcpu
))
2432 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2434 case MSR_AMD64_OSVW_STATUS
:
2435 if (!guest_cpuid_has_osvw(vcpu
))
2437 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2440 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2441 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2443 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr_info
->index
);
2446 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr_info
->index
);
2453 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2456 * Read or write a bunch of msrs. All parameters are kernel addresses.
2458 * @return number of msrs set successfully.
2460 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2461 struct kvm_msr_entry
*entries
,
2462 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2463 unsigned index
, u64
*data
))
2467 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2468 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2469 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2471 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2477 * Read or write a bunch of msrs. Parameters are user addresses.
2479 * @return number of msrs set successfully.
2481 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2482 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2483 unsigned index
, u64
*data
),
2486 struct kvm_msrs msrs
;
2487 struct kvm_msr_entry
*entries
;
2492 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2496 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2499 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2500 entries
= memdup_user(user_msrs
->entries
, size
);
2501 if (IS_ERR(entries
)) {
2502 r
= PTR_ERR(entries
);
2506 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2511 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2522 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2527 case KVM_CAP_IRQCHIP
:
2529 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2530 case KVM_CAP_SET_TSS_ADDR
:
2531 case KVM_CAP_EXT_CPUID
:
2532 case KVM_CAP_EXT_EMUL_CPUID
:
2533 case KVM_CAP_CLOCKSOURCE
:
2535 case KVM_CAP_NOP_IO_DELAY
:
2536 case KVM_CAP_MP_STATE
:
2537 case KVM_CAP_SYNC_MMU
:
2538 case KVM_CAP_USER_NMI
:
2539 case KVM_CAP_REINJECT_CONTROL
:
2540 case KVM_CAP_IRQ_INJECT_STATUS
:
2541 case KVM_CAP_IOEVENTFD
:
2542 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2544 case KVM_CAP_PIT_STATE2
:
2545 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2546 case KVM_CAP_XEN_HVM
:
2547 case KVM_CAP_ADJUST_CLOCK
:
2548 case KVM_CAP_VCPU_EVENTS
:
2549 case KVM_CAP_HYPERV
:
2550 case KVM_CAP_HYPERV_VAPIC
:
2551 case KVM_CAP_HYPERV_SPIN
:
2552 case KVM_CAP_HYPERV_SYNIC
:
2553 case KVM_CAP_PCI_SEGMENT
:
2554 case KVM_CAP_DEBUGREGS
:
2555 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2557 case KVM_CAP_ASYNC_PF
:
2558 case KVM_CAP_GET_TSC_KHZ
:
2559 case KVM_CAP_KVMCLOCK_CTRL
:
2560 case KVM_CAP_READONLY_MEM
:
2561 case KVM_CAP_HYPERV_TIME
:
2562 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2563 case KVM_CAP_TSC_DEADLINE_TIMER
:
2564 case KVM_CAP_ENABLE_CAP_VM
:
2565 case KVM_CAP_DISABLE_QUIRKS
:
2566 case KVM_CAP_SET_BOOT_CPU_ID
:
2567 case KVM_CAP_SPLIT_IRQCHIP
:
2568 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2569 case KVM_CAP_ASSIGN_DEV_IRQ
:
2570 case KVM_CAP_PCI_2_3
:
2574 case KVM_CAP_X86_SMM
:
2575 /* SMBASE is usually relocated above 1M on modern chipsets,
2576 * and SMM handlers might indeed rely on 4G segment limits,
2577 * so do not report SMM to be available if real mode is
2578 * emulated via vm86 mode. Still, do not go to great lengths
2579 * to avoid userspace's usage of the feature, because it is a
2580 * fringe case that is not enabled except via specific settings
2581 * of the module parameters.
2583 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2585 case KVM_CAP_COALESCED_MMIO
:
2586 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2589 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2591 case KVM_CAP_NR_VCPUS
:
2592 r
= KVM_SOFT_MAX_VCPUS
;
2594 case KVM_CAP_MAX_VCPUS
:
2597 case KVM_CAP_NR_MEMSLOTS
:
2598 r
= KVM_USER_MEM_SLOTS
;
2600 case KVM_CAP_PV_MMU
: /* obsolete */
2603 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2605 r
= iommu_present(&pci_bus_type
);
2609 r
= KVM_MAX_MCE_BANKS
;
2614 case KVM_CAP_TSC_CONTROL
:
2615 r
= kvm_has_tsc_control
;
2625 long kvm_arch_dev_ioctl(struct file
*filp
,
2626 unsigned int ioctl
, unsigned long arg
)
2628 void __user
*argp
= (void __user
*)arg
;
2632 case KVM_GET_MSR_INDEX_LIST
: {
2633 struct kvm_msr_list __user
*user_msr_list
= argp
;
2634 struct kvm_msr_list msr_list
;
2638 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2641 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2642 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2645 if (n
< msr_list
.nmsrs
)
2648 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2649 num_msrs_to_save
* sizeof(u32
)))
2651 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2653 num_emulated_msrs
* sizeof(u32
)))
2658 case KVM_GET_SUPPORTED_CPUID
:
2659 case KVM_GET_EMULATED_CPUID
: {
2660 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2661 struct kvm_cpuid2 cpuid
;
2664 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2667 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2673 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2678 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2681 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2683 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2695 static void wbinvd_ipi(void *garbage
)
2700 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2702 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2705 static inline void kvm_migrate_timers(struct kvm_vcpu
*vcpu
)
2707 set_bit(KVM_REQ_MIGRATE_TIMER
, &vcpu
->requests
);
2710 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2712 /* Address WBINVD may be executed by guest */
2713 if (need_emulate_wbinvd(vcpu
)) {
2714 if (kvm_x86_ops
->has_wbinvd_exit())
2715 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2716 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2717 smp_call_function_single(vcpu
->cpu
,
2718 wbinvd_ipi
, NULL
, 1);
2721 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2723 /* Apply any externally detected TSC adjustments (due to suspend) */
2724 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2725 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2726 vcpu
->arch
.tsc_offset_adjustment
= 0;
2727 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2730 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2731 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2732 rdtsc() - vcpu
->arch
.last_host_tsc
;
2734 mark_tsc_unstable("KVM discovered backwards TSC");
2735 if (check_tsc_unstable()) {
2736 u64 offset
= kvm_compute_tsc_offset(vcpu
,
2737 vcpu
->arch
.last_guest_tsc
);
2738 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2739 vcpu
->arch
.tsc_catchup
= 1;
2742 * On a host with synchronized TSC, there is no need to update
2743 * kvmclock on vcpu->cpu migration
2745 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2746 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2747 if (vcpu
->cpu
!= cpu
)
2748 kvm_migrate_timers(vcpu
);
2752 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2755 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2757 kvm_x86_ops
->vcpu_put(vcpu
);
2758 kvm_put_guest_fpu(vcpu
);
2759 vcpu
->arch
.last_host_tsc
= rdtsc();
2762 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2763 struct kvm_lapic_state
*s
)
2765 if (vcpu
->arch
.apicv_active
)
2766 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2768 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2773 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2774 struct kvm_lapic_state
*s
)
2776 kvm_apic_post_state_restore(vcpu
, s
);
2777 update_cr8_intercept(vcpu
);
2782 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
2784 return (!lapic_in_kernel(vcpu
) ||
2785 kvm_apic_accept_pic_intr(vcpu
));
2789 * if userspace requested an interrupt window, check that the
2790 * interrupt window is open.
2792 * No need to exit to userspace if we already have an interrupt queued.
2794 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
2796 return kvm_arch_interrupt_allowed(vcpu
) &&
2797 !kvm_cpu_has_interrupt(vcpu
) &&
2798 !kvm_event_needs_reinjection(vcpu
) &&
2799 kvm_cpu_accept_dm_intr(vcpu
);
2802 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2803 struct kvm_interrupt
*irq
)
2805 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2808 if (!irqchip_in_kernel(vcpu
->kvm
)) {
2809 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2810 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2815 * With in-kernel LAPIC, we only use this to inject EXTINT, so
2816 * fail for in-kernel 8259.
2818 if (pic_in_kernel(vcpu
->kvm
))
2821 if (vcpu
->arch
.pending_external_vector
!= -1)
2824 vcpu
->arch
.pending_external_vector
= irq
->irq
;
2825 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2829 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2831 kvm_inject_nmi(vcpu
);
2836 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
2838 kvm_make_request(KVM_REQ_SMI
, vcpu
);
2843 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2844 struct kvm_tpr_access_ctl
*tac
)
2848 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2852 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2856 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2859 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2861 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2864 vcpu
->arch
.mcg_cap
= mcg_cap
;
2865 /* Init IA32_MCG_CTL to all 1s */
2866 if (mcg_cap
& MCG_CTL_P
)
2867 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2868 /* Init IA32_MCi_CTL to all 1s */
2869 for (bank
= 0; bank
< bank_num
; bank
++)
2870 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2875 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2876 struct kvm_x86_mce
*mce
)
2878 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2879 unsigned bank_num
= mcg_cap
& 0xff;
2880 u64
*banks
= vcpu
->arch
.mce_banks
;
2882 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2885 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2886 * reporting is disabled
2888 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2889 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2891 banks
+= 4 * mce
->bank
;
2893 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2894 * reporting is disabled for the bank
2896 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2898 if (mce
->status
& MCI_STATUS_UC
) {
2899 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2900 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2901 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2904 if (banks
[1] & MCI_STATUS_VAL
)
2905 mce
->status
|= MCI_STATUS_OVER
;
2906 banks
[2] = mce
->addr
;
2907 banks
[3] = mce
->misc
;
2908 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2909 banks
[1] = mce
->status
;
2910 kvm_queue_exception(vcpu
, MC_VECTOR
);
2911 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2912 || !(banks
[1] & MCI_STATUS_UC
)) {
2913 if (banks
[1] & MCI_STATUS_VAL
)
2914 mce
->status
|= MCI_STATUS_OVER
;
2915 banks
[2] = mce
->addr
;
2916 banks
[3] = mce
->misc
;
2917 banks
[1] = mce
->status
;
2919 banks
[1] |= MCI_STATUS_OVER
;
2923 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2924 struct kvm_vcpu_events
*events
)
2927 events
->exception
.injected
=
2928 vcpu
->arch
.exception
.pending
&&
2929 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2930 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2931 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2932 events
->exception
.pad
= 0;
2933 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2935 events
->interrupt
.injected
=
2936 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2937 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2938 events
->interrupt
.soft
= 0;
2939 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
2941 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2942 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
2943 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2944 events
->nmi
.pad
= 0;
2946 events
->sipi_vector
= 0; /* never valid when reporting to user space */
2948 events
->smi
.smm
= is_smm(vcpu
);
2949 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
2950 events
->smi
.smm_inside_nmi
=
2951 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
2952 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
2954 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2955 | KVM_VCPUEVENT_VALID_SHADOW
2956 | KVM_VCPUEVENT_VALID_SMM
);
2957 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2960 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2961 struct kvm_vcpu_events
*events
)
2963 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2964 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2965 | KVM_VCPUEVENT_VALID_SHADOW
2966 | KVM_VCPUEVENT_VALID_SMM
))
2970 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2971 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2972 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2973 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2975 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2976 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2977 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2978 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2979 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2980 events
->interrupt
.shadow
);
2982 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2983 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2984 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2985 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2987 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
2988 lapic_in_kernel(vcpu
))
2989 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
2991 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
2992 if (events
->smi
.smm
)
2993 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
2995 vcpu
->arch
.hflags
&= ~HF_SMM_MASK
;
2996 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
2997 if (events
->smi
.smm_inside_nmi
)
2998 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3000 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3001 if (lapic_in_kernel(vcpu
)) {
3002 if (events
->smi
.latched_init
)
3003 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3005 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3009 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3014 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3015 struct kvm_debugregs
*dbgregs
)
3019 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3020 kvm_get_dr(vcpu
, 6, &val
);
3022 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3024 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3027 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3028 struct kvm_debugregs
*dbgregs
)
3033 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3034 kvm_update_dr0123(vcpu
);
3035 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3036 kvm_update_dr6(vcpu
);
3037 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3038 kvm_update_dr7(vcpu
);
3043 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3045 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3047 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3048 u64 xstate_bv
= xsave
->header
.xfeatures
;
3052 * Copy legacy XSAVE area, to avoid complications with CPUID
3053 * leaves 0 and 1 in the loop below.
3055 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3058 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3061 * Copy each region from the possibly compacted offset to the
3062 * non-compacted offset.
3064 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3066 u64 feature
= valid
& -valid
;
3067 int index
= fls64(feature
) - 1;
3068 void *src
= get_xsave_addr(xsave
, feature
);
3071 u32 size
, offset
, ecx
, edx
;
3072 cpuid_count(XSTATE_CPUID
, index
,
3073 &size
, &offset
, &ecx
, &edx
);
3074 memcpy(dest
+ offset
, src
, size
);
3081 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3083 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3084 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3088 * Copy legacy XSAVE area, to avoid complications with CPUID
3089 * leaves 0 and 1 in the loop below.
3091 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3093 /* Set XSTATE_BV and possibly XCOMP_BV. */
3094 xsave
->header
.xfeatures
= xstate_bv
;
3096 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3099 * Copy each region from the non-compacted offset to the
3100 * possibly compacted offset.
3102 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3104 u64 feature
= valid
& -valid
;
3105 int index
= fls64(feature
) - 1;
3106 void *dest
= get_xsave_addr(xsave
, feature
);
3109 u32 size
, offset
, ecx
, edx
;
3110 cpuid_count(XSTATE_CPUID
, index
,
3111 &size
, &offset
, &ecx
, &edx
);
3112 memcpy(dest
, src
+ offset
, size
);
3119 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3120 struct kvm_xsave
*guest_xsave
)
3122 if (cpu_has_xsave
) {
3123 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3124 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3126 memcpy(guest_xsave
->region
,
3127 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3128 sizeof(struct fxregs_state
));
3129 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3130 XFEATURE_MASK_FPSSE
;
3134 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3135 struct kvm_xsave
*guest_xsave
)
3138 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3140 if (cpu_has_xsave
) {
3142 * Here we allow setting states that are not present in
3143 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3144 * with old userspace.
3146 if (xstate_bv
& ~kvm_supported_xcr0())
3148 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3150 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
)
3152 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3153 guest_xsave
->region
, sizeof(struct fxregs_state
));
3158 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3159 struct kvm_xcrs
*guest_xcrs
)
3161 if (!cpu_has_xsave
) {
3162 guest_xcrs
->nr_xcrs
= 0;
3166 guest_xcrs
->nr_xcrs
= 1;
3167 guest_xcrs
->flags
= 0;
3168 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3169 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3172 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3173 struct kvm_xcrs
*guest_xcrs
)
3180 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3183 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3184 /* Only support XCR0 currently */
3185 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3186 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3187 guest_xcrs
->xcrs
[i
].value
);
3196 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3197 * stopped by the hypervisor. This function will be called from the host only.
3198 * EINVAL is returned when the host attempts to set the flag for a guest that
3199 * does not support pv clocks.
3201 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3203 if (!vcpu
->arch
.pv_time_enabled
)
3205 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3206 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3210 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3211 struct kvm_enable_cap
*cap
)
3217 case KVM_CAP_HYPERV_SYNIC
:
3218 return kvm_hv_activate_synic(vcpu
);
3224 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3225 unsigned int ioctl
, unsigned long arg
)
3227 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3228 void __user
*argp
= (void __user
*)arg
;
3231 struct kvm_lapic_state
*lapic
;
3232 struct kvm_xsave
*xsave
;
3233 struct kvm_xcrs
*xcrs
;
3239 case KVM_GET_LAPIC
: {
3241 if (!lapic_in_kernel(vcpu
))
3243 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3248 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3252 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3257 case KVM_SET_LAPIC
: {
3259 if (!lapic_in_kernel(vcpu
))
3261 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3262 if (IS_ERR(u
.lapic
))
3263 return PTR_ERR(u
.lapic
);
3265 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3268 case KVM_INTERRUPT
: {
3269 struct kvm_interrupt irq
;
3272 if (copy_from_user(&irq
, argp
, sizeof irq
))
3274 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3278 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3282 r
= kvm_vcpu_ioctl_smi(vcpu
);
3285 case KVM_SET_CPUID
: {
3286 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3287 struct kvm_cpuid cpuid
;
3290 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3292 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3295 case KVM_SET_CPUID2
: {
3296 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3297 struct kvm_cpuid2 cpuid
;
3300 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3302 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3303 cpuid_arg
->entries
);
3306 case KVM_GET_CPUID2
: {
3307 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3308 struct kvm_cpuid2 cpuid
;
3311 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3313 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3314 cpuid_arg
->entries
);
3318 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3324 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3327 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3329 case KVM_TPR_ACCESS_REPORTING
: {
3330 struct kvm_tpr_access_ctl tac
;
3333 if (copy_from_user(&tac
, argp
, sizeof tac
))
3335 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3339 if (copy_to_user(argp
, &tac
, sizeof tac
))
3344 case KVM_SET_VAPIC_ADDR
: {
3345 struct kvm_vapic_addr va
;
3348 if (!lapic_in_kernel(vcpu
))
3351 if (copy_from_user(&va
, argp
, sizeof va
))
3353 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3356 case KVM_X86_SETUP_MCE
: {
3360 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3362 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3365 case KVM_X86_SET_MCE
: {
3366 struct kvm_x86_mce mce
;
3369 if (copy_from_user(&mce
, argp
, sizeof mce
))
3371 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3374 case KVM_GET_VCPU_EVENTS
: {
3375 struct kvm_vcpu_events events
;
3377 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3380 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3385 case KVM_SET_VCPU_EVENTS
: {
3386 struct kvm_vcpu_events events
;
3389 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3392 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3395 case KVM_GET_DEBUGREGS
: {
3396 struct kvm_debugregs dbgregs
;
3398 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3401 if (copy_to_user(argp
, &dbgregs
,
3402 sizeof(struct kvm_debugregs
)))
3407 case KVM_SET_DEBUGREGS
: {
3408 struct kvm_debugregs dbgregs
;
3411 if (copy_from_user(&dbgregs
, argp
,
3412 sizeof(struct kvm_debugregs
)))
3415 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3418 case KVM_GET_XSAVE
: {
3419 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3424 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3427 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3432 case KVM_SET_XSAVE
: {
3433 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3434 if (IS_ERR(u
.xsave
))
3435 return PTR_ERR(u
.xsave
);
3437 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3440 case KVM_GET_XCRS
: {
3441 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3446 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3449 if (copy_to_user(argp
, u
.xcrs
,
3450 sizeof(struct kvm_xcrs
)))
3455 case KVM_SET_XCRS
: {
3456 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3458 return PTR_ERR(u
.xcrs
);
3460 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3463 case KVM_SET_TSC_KHZ
: {
3467 user_tsc_khz
= (u32
)arg
;
3469 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3472 if (user_tsc_khz
== 0)
3473 user_tsc_khz
= tsc_khz
;
3475 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3480 case KVM_GET_TSC_KHZ
: {
3481 r
= vcpu
->arch
.virtual_tsc_khz
;
3484 case KVM_KVMCLOCK_CTRL
: {
3485 r
= kvm_set_guest_paused(vcpu
);
3488 case KVM_ENABLE_CAP
: {
3489 struct kvm_enable_cap cap
;
3492 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3494 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3505 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3507 return VM_FAULT_SIGBUS
;
3510 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3514 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3516 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3520 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3523 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3527 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3528 u32 kvm_nr_mmu_pages
)
3530 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3533 mutex_lock(&kvm
->slots_lock
);
3535 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3536 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3538 mutex_unlock(&kvm
->slots_lock
);
3542 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3544 return kvm
->arch
.n_max_mmu_pages
;
3547 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3552 switch (chip
->chip_id
) {
3553 case KVM_IRQCHIP_PIC_MASTER
:
3554 memcpy(&chip
->chip
.pic
,
3555 &pic_irqchip(kvm
)->pics
[0],
3556 sizeof(struct kvm_pic_state
));
3558 case KVM_IRQCHIP_PIC_SLAVE
:
3559 memcpy(&chip
->chip
.pic
,
3560 &pic_irqchip(kvm
)->pics
[1],
3561 sizeof(struct kvm_pic_state
));
3563 case KVM_IRQCHIP_IOAPIC
:
3564 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3573 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3578 switch (chip
->chip_id
) {
3579 case KVM_IRQCHIP_PIC_MASTER
:
3580 spin_lock(&pic_irqchip(kvm
)->lock
);
3581 memcpy(&pic_irqchip(kvm
)->pics
[0],
3583 sizeof(struct kvm_pic_state
));
3584 spin_unlock(&pic_irqchip(kvm
)->lock
);
3586 case KVM_IRQCHIP_PIC_SLAVE
:
3587 spin_lock(&pic_irqchip(kvm
)->lock
);
3588 memcpy(&pic_irqchip(kvm
)->pics
[1],
3590 sizeof(struct kvm_pic_state
));
3591 spin_unlock(&pic_irqchip(kvm
)->lock
);
3593 case KVM_IRQCHIP_IOAPIC
:
3594 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3600 kvm_pic_update_irq(pic_irqchip(kvm
));
3604 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3606 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3608 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3610 mutex_lock(&kps
->lock
);
3611 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
3612 mutex_unlock(&kps
->lock
);
3616 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3619 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3621 mutex_lock(&pit
->pit_state
.lock
);
3622 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
3623 for (i
= 0; i
< 3; i
++)
3624 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
3625 mutex_unlock(&pit
->pit_state
.lock
);
3629 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3631 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3632 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3633 sizeof(ps
->channels
));
3634 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3635 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3636 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3640 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3644 u32 prev_legacy
, cur_legacy
;
3645 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3647 mutex_lock(&pit
->pit_state
.lock
);
3648 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3649 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3650 if (!prev_legacy
&& cur_legacy
)
3652 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
3653 sizeof(pit
->pit_state
.channels
));
3654 pit
->pit_state
.flags
= ps
->flags
;
3655 for (i
= 0; i
< 3; i
++)
3656 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
3658 mutex_unlock(&pit
->pit_state
.lock
);
3662 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3663 struct kvm_reinject_control
*control
)
3665 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3670 /* pit->pit_state.lock was overloaded to prevent userspace from getting
3671 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3672 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
3674 mutex_lock(&pit
->pit_state
.lock
);
3675 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
3676 mutex_unlock(&pit
->pit_state
.lock
);
3682 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3683 * @kvm: kvm instance
3684 * @log: slot id and address to which we copy the log
3686 * Steps 1-4 below provide general overview of dirty page logging. See
3687 * kvm_get_dirty_log_protect() function description for additional details.
3689 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3690 * always flush the TLB (step 4) even if previous step failed and the dirty
3691 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3692 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3693 * writes will be marked dirty for next log read.
3695 * 1. Take a snapshot of the bit and clear it if needed.
3696 * 2. Write protect the corresponding page.
3697 * 3. Copy the snapshot to the userspace.
3698 * 4. Flush TLB's if needed.
3700 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3702 bool is_dirty
= false;
3705 mutex_lock(&kvm
->slots_lock
);
3708 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3710 if (kvm_x86_ops
->flush_log_dirty
)
3711 kvm_x86_ops
->flush_log_dirty(kvm
);
3713 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3716 * All the TLBs can be flushed out of mmu lock, see the comments in
3717 * kvm_mmu_slot_remove_write_access().
3719 lockdep_assert_held(&kvm
->slots_lock
);
3721 kvm_flush_remote_tlbs(kvm
);
3723 mutex_unlock(&kvm
->slots_lock
);
3727 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3730 if (!irqchip_in_kernel(kvm
))
3733 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3734 irq_event
->irq
, irq_event
->level
,
3739 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3740 struct kvm_enable_cap
*cap
)
3748 case KVM_CAP_DISABLE_QUIRKS
:
3749 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3752 case KVM_CAP_SPLIT_IRQCHIP
: {
3753 mutex_lock(&kvm
->lock
);
3755 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
3756 goto split_irqchip_unlock
;
3758 if (irqchip_in_kernel(kvm
))
3759 goto split_irqchip_unlock
;
3760 if (atomic_read(&kvm
->online_vcpus
))
3761 goto split_irqchip_unlock
;
3762 r
= kvm_setup_empty_irq_routing(kvm
);
3764 goto split_irqchip_unlock
;
3765 /* Pairs with irqchip_in_kernel. */
3767 kvm
->arch
.irqchip_split
= true;
3768 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
3770 split_irqchip_unlock
:
3771 mutex_unlock(&kvm
->lock
);
3781 long kvm_arch_vm_ioctl(struct file
*filp
,
3782 unsigned int ioctl
, unsigned long arg
)
3784 struct kvm
*kvm
= filp
->private_data
;
3785 void __user
*argp
= (void __user
*)arg
;
3788 * This union makes it completely explicit to gcc-3.x
3789 * that these two variables' stack usage should be
3790 * combined, not added together.
3793 struct kvm_pit_state ps
;
3794 struct kvm_pit_state2 ps2
;
3795 struct kvm_pit_config pit_config
;
3799 case KVM_SET_TSS_ADDR
:
3800 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3802 case KVM_SET_IDENTITY_MAP_ADDR
: {
3806 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3808 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3811 case KVM_SET_NR_MMU_PAGES
:
3812 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3814 case KVM_GET_NR_MMU_PAGES
:
3815 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3817 case KVM_CREATE_IRQCHIP
: {
3818 struct kvm_pic
*vpic
;
3820 mutex_lock(&kvm
->lock
);
3823 goto create_irqchip_unlock
;
3825 if (atomic_read(&kvm
->online_vcpus
))
3826 goto create_irqchip_unlock
;
3828 vpic
= kvm_create_pic(kvm
);
3830 r
= kvm_ioapic_init(kvm
);
3832 mutex_lock(&kvm
->slots_lock
);
3833 kvm_destroy_pic(vpic
);
3834 mutex_unlock(&kvm
->slots_lock
);
3835 goto create_irqchip_unlock
;
3838 goto create_irqchip_unlock
;
3839 r
= kvm_setup_default_irq_routing(kvm
);
3841 mutex_lock(&kvm
->slots_lock
);
3842 mutex_lock(&kvm
->irq_lock
);
3843 kvm_ioapic_destroy(kvm
);
3844 kvm_destroy_pic(vpic
);
3845 mutex_unlock(&kvm
->irq_lock
);
3846 mutex_unlock(&kvm
->slots_lock
);
3847 goto create_irqchip_unlock
;
3849 /* Write kvm->irq_routing before kvm->arch.vpic. */
3851 kvm
->arch
.vpic
= vpic
;
3852 create_irqchip_unlock
:
3853 mutex_unlock(&kvm
->lock
);
3856 case KVM_CREATE_PIT
:
3857 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3859 case KVM_CREATE_PIT2
:
3861 if (copy_from_user(&u
.pit_config
, argp
,
3862 sizeof(struct kvm_pit_config
)))
3865 mutex_lock(&kvm
->slots_lock
);
3868 goto create_pit_unlock
;
3870 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3874 mutex_unlock(&kvm
->slots_lock
);
3876 case KVM_GET_IRQCHIP
: {
3877 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3878 struct kvm_irqchip
*chip
;
3880 chip
= memdup_user(argp
, sizeof(*chip
));
3887 if (!irqchip_in_kernel(kvm
) || irqchip_split(kvm
))
3888 goto get_irqchip_out
;
3889 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3891 goto get_irqchip_out
;
3893 if (copy_to_user(argp
, chip
, sizeof *chip
))
3894 goto get_irqchip_out
;
3900 case KVM_SET_IRQCHIP
: {
3901 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3902 struct kvm_irqchip
*chip
;
3904 chip
= memdup_user(argp
, sizeof(*chip
));
3911 if (!irqchip_in_kernel(kvm
) || irqchip_split(kvm
))
3912 goto set_irqchip_out
;
3913 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3915 goto set_irqchip_out
;
3923 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3926 if (!kvm
->arch
.vpit
)
3928 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3932 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3939 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3942 if (!kvm
->arch
.vpit
)
3944 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3947 case KVM_GET_PIT2
: {
3949 if (!kvm
->arch
.vpit
)
3951 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3955 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3960 case KVM_SET_PIT2
: {
3962 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3965 if (!kvm
->arch
.vpit
)
3967 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3970 case KVM_REINJECT_CONTROL
: {
3971 struct kvm_reinject_control control
;
3973 if (copy_from_user(&control
, argp
, sizeof(control
)))
3975 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3978 case KVM_SET_BOOT_CPU_ID
:
3980 mutex_lock(&kvm
->lock
);
3981 if (atomic_read(&kvm
->online_vcpus
) != 0)
3984 kvm
->arch
.bsp_vcpu_id
= arg
;
3985 mutex_unlock(&kvm
->lock
);
3987 case KVM_XEN_HVM_CONFIG
: {
3989 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3990 sizeof(struct kvm_xen_hvm_config
)))
3993 if (kvm
->arch
.xen_hvm_config
.flags
)
3998 case KVM_SET_CLOCK
: {
3999 struct kvm_clock_data user_ns
;
4004 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4012 local_irq_disable();
4013 now_ns
= get_kernel_ns();
4014 delta
= user_ns
.clock
- now_ns
;
4016 kvm
->arch
.kvmclock_offset
= delta
;
4017 kvm_gen_update_masterclock(kvm
);
4020 case KVM_GET_CLOCK
: {
4021 struct kvm_clock_data user_ns
;
4024 local_irq_disable();
4025 now_ns
= get_kernel_ns();
4026 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
4029 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4032 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4037 case KVM_ENABLE_CAP
: {
4038 struct kvm_enable_cap cap
;
4041 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4043 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4047 r
= kvm_vm_ioctl_assigned_device(kvm
, ioctl
, arg
);
4053 static void kvm_init_msr_list(void)
4058 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4059 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4063 * Even MSRs that are valid in the host may not be exposed
4064 * to the guests in some cases.
4066 switch (msrs_to_save
[i
]) {
4067 case MSR_IA32_BNDCFGS
:
4068 if (!kvm_x86_ops
->mpx_supported())
4072 if (!kvm_x86_ops
->rdtscp_supported())
4080 msrs_to_save
[j
] = msrs_to_save
[i
];
4083 num_msrs_to_save
= j
;
4085 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4086 switch (emulated_msrs
[i
]) {
4087 case MSR_IA32_SMBASE
:
4088 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
4096 emulated_msrs
[j
] = emulated_msrs
[i
];
4099 num_emulated_msrs
= j
;
4102 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4110 if (!(lapic_in_kernel(vcpu
) &&
4111 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4112 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4123 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4130 if (!(lapic_in_kernel(vcpu
) &&
4131 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4133 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4135 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4145 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4146 struct kvm_segment
*var
, int seg
)
4148 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4151 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4152 struct kvm_segment
*var
, int seg
)
4154 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4157 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4158 struct x86_exception
*exception
)
4162 BUG_ON(!mmu_is_nested(vcpu
));
4164 /* NPT walks are always user-walks */
4165 access
|= PFERR_USER_MASK
;
4166 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4171 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4172 struct x86_exception
*exception
)
4174 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4175 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4178 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4179 struct x86_exception
*exception
)
4181 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4182 access
|= PFERR_FETCH_MASK
;
4183 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4186 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4187 struct x86_exception
*exception
)
4189 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4190 access
|= PFERR_WRITE_MASK
;
4191 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4194 /* uses this to access any guest's mapped memory without checking CPL */
4195 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4196 struct x86_exception
*exception
)
4198 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4201 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4202 struct kvm_vcpu
*vcpu
, u32 access
,
4203 struct x86_exception
*exception
)
4206 int r
= X86EMUL_CONTINUE
;
4209 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4211 unsigned offset
= addr
& (PAGE_SIZE
-1);
4212 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4215 if (gpa
== UNMAPPED_GVA
)
4216 return X86EMUL_PROPAGATE_FAULT
;
4217 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4220 r
= X86EMUL_IO_NEEDED
;
4232 /* used for instruction fetching */
4233 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4234 gva_t addr
, void *val
, unsigned int bytes
,
4235 struct x86_exception
*exception
)
4237 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4238 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4242 /* Inline kvm_read_guest_virt_helper for speed. */
4243 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4245 if (unlikely(gpa
== UNMAPPED_GVA
))
4246 return X86EMUL_PROPAGATE_FAULT
;
4248 offset
= addr
& (PAGE_SIZE
-1);
4249 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4250 bytes
= (unsigned)PAGE_SIZE
- offset
;
4251 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4253 if (unlikely(ret
< 0))
4254 return X86EMUL_IO_NEEDED
;
4256 return X86EMUL_CONTINUE
;
4259 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4260 gva_t addr
, void *val
, unsigned int bytes
,
4261 struct x86_exception
*exception
)
4263 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4264 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4266 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4269 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4271 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4272 gva_t addr
, void *val
, unsigned int bytes
,
4273 struct x86_exception
*exception
)
4275 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4276 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4279 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4280 unsigned long addr
, void *val
, unsigned int bytes
)
4282 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4283 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4285 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4288 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4289 gva_t addr
, void *val
,
4291 struct x86_exception
*exception
)
4293 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4295 int r
= X86EMUL_CONTINUE
;
4298 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4301 unsigned offset
= addr
& (PAGE_SIZE
-1);
4302 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4305 if (gpa
== UNMAPPED_GVA
)
4306 return X86EMUL_PROPAGATE_FAULT
;
4307 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4309 r
= X86EMUL_IO_NEEDED
;
4320 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4322 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4323 gpa_t
*gpa
, struct x86_exception
*exception
,
4326 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4327 | (write
? PFERR_WRITE_MASK
: 0);
4329 if (vcpu_match_mmio_gva(vcpu
, gva
)
4330 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4331 vcpu
->arch
.access
, access
)) {
4332 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4333 (gva
& (PAGE_SIZE
- 1));
4334 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4338 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4340 if (*gpa
== UNMAPPED_GVA
)
4343 /* For APIC access vmexit */
4344 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4347 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4348 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4355 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4356 const void *val
, int bytes
)
4360 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4363 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4367 struct read_write_emulator_ops
{
4368 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4370 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4371 void *val
, int bytes
);
4372 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4373 int bytes
, void *val
);
4374 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4375 void *val
, int bytes
);
4379 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4381 if (vcpu
->mmio_read_completed
) {
4382 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4383 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4384 vcpu
->mmio_read_completed
= 0;
4391 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4392 void *val
, int bytes
)
4394 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4397 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4398 void *val
, int bytes
)
4400 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4403 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4405 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4406 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4409 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4410 void *val
, int bytes
)
4412 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4413 return X86EMUL_IO_NEEDED
;
4416 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4417 void *val
, int bytes
)
4419 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4421 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4422 return X86EMUL_CONTINUE
;
4425 static const struct read_write_emulator_ops read_emultor
= {
4426 .read_write_prepare
= read_prepare
,
4427 .read_write_emulate
= read_emulate
,
4428 .read_write_mmio
= vcpu_mmio_read
,
4429 .read_write_exit_mmio
= read_exit_mmio
,
4432 static const struct read_write_emulator_ops write_emultor
= {
4433 .read_write_emulate
= write_emulate
,
4434 .read_write_mmio
= write_mmio
,
4435 .read_write_exit_mmio
= write_exit_mmio
,
4439 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4441 struct x86_exception
*exception
,
4442 struct kvm_vcpu
*vcpu
,
4443 const struct read_write_emulator_ops
*ops
)
4447 bool write
= ops
->write
;
4448 struct kvm_mmio_fragment
*frag
;
4450 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4453 return X86EMUL_PROPAGATE_FAULT
;
4455 /* For APIC access vmexit */
4459 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4460 return X86EMUL_CONTINUE
;
4464 * Is this MMIO handled locally?
4466 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4467 if (handled
== bytes
)
4468 return X86EMUL_CONTINUE
;
4474 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4475 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4479 return X86EMUL_CONTINUE
;
4482 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4484 void *val
, unsigned int bytes
,
4485 struct x86_exception
*exception
,
4486 const struct read_write_emulator_ops
*ops
)
4488 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4492 if (ops
->read_write_prepare
&&
4493 ops
->read_write_prepare(vcpu
, val
, bytes
))
4494 return X86EMUL_CONTINUE
;
4496 vcpu
->mmio_nr_fragments
= 0;
4498 /* Crossing a page boundary? */
4499 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4502 now
= -addr
& ~PAGE_MASK
;
4503 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4506 if (rc
!= X86EMUL_CONTINUE
)
4509 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4515 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4517 if (rc
!= X86EMUL_CONTINUE
)
4520 if (!vcpu
->mmio_nr_fragments
)
4523 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4525 vcpu
->mmio_needed
= 1;
4526 vcpu
->mmio_cur_fragment
= 0;
4528 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4529 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4530 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4531 vcpu
->run
->mmio
.phys_addr
= gpa
;
4533 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4536 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4540 struct x86_exception
*exception
)
4542 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4543 exception
, &read_emultor
);
4546 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4550 struct x86_exception
*exception
)
4552 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4553 exception
, &write_emultor
);
4556 #define CMPXCHG_TYPE(t, ptr, old, new) \
4557 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4559 #ifdef CONFIG_X86_64
4560 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4562 # define CMPXCHG64(ptr, old, new) \
4563 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4566 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4571 struct x86_exception
*exception
)
4573 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4579 /* guests cmpxchg8b have to be emulated atomically */
4580 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4583 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4585 if (gpa
== UNMAPPED_GVA
||
4586 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4589 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4592 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4593 if (is_error_page(page
))
4596 kaddr
= kmap_atomic(page
);
4597 kaddr
+= offset_in_page(gpa
);
4600 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4603 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4606 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4609 exchanged
= CMPXCHG64(kaddr
, old
, new);
4614 kunmap_atomic(kaddr
);
4615 kvm_release_page_dirty(page
);
4618 return X86EMUL_CMPXCHG_FAILED
;
4620 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4621 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
4623 return X86EMUL_CONTINUE
;
4626 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4628 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4631 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4633 /* TODO: String I/O for in kernel device */
4636 if (vcpu
->arch
.pio
.in
)
4637 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4638 vcpu
->arch
.pio
.size
, pd
);
4640 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4641 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4646 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4647 unsigned short port
, void *val
,
4648 unsigned int count
, bool in
)
4650 vcpu
->arch
.pio
.port
= port
;
4651 vcpu
->arch
.pio
.in
= in
;
4652 vcpu
->arch
.pio
.count
= count
;
4653 vcpu
->arch
.pio
.size
= size
;
4655 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4656 vcpu
->arch
.pio
.count
= 0;
4660 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4661 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4662 vcpu
->run
->io
.size
= size
;
4663 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4664 vcpu
->run
->io
.count
= count
;
4665 vcpu
->run
->io
.port
= port
;
4670 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4671 int size
, unsigned short port
, void *val
,
4674 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4677 if (vcpu
->arch
.pio
.count
)
4680 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4683 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4684 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4685 vcpu
->arch
.pio
.count
= 0;
4692 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4693 int size
, unsigned short port
,
4694 const void *val
, unsigned int count
)
4696 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4698 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4699 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4700 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4703 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4705 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4708 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4710 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4713 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4715 if (!need_emulate_wbinvd(vcpu
))
4716 return X86EMUL_CONTINUE
;
4718 if (kvm_x86_ops
->has_wbinvd_exit()) {
4719 int cpu
= get_cpu();
4721 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4722 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4723 wbinvd_ipi
, NULL
, 1);
4725 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4728 return X86EMUL_CONTINUE
;
4731 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4733 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
4734 return kvm_emulate_wbinvd_noskip(vcpu
);
4736 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4740 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4742 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
4745 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4746 unsigned long *dest
)
4748 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4751 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4752 unsigned long value
)
4755 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4758 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4760 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4763 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4765 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4766 unsigned long value
;
4770 value
= kvm_read_cr0(vcpu
);
4773 value
= vcpu
->arch
.cr2
;
4776 value
= kvm_read_cr3(vcpu
);
4779 value
= kvm_read_cr4(vcpu
);
4782 value
= kvm_get_cr8(vcpu
);
4785 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4792 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4794 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4799 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4802 vcpu
->arch
.cr2
= val
;
4805 res
= kvm_set_cr3(vcpu
, val
);
4808 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4811 res
= kvm_set_cr8(vcpu
, val
);
4814 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4821 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4823 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4826 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4828 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4831 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4833 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4836 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4838 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4841 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4843 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4846 static unsigned long emulator_get_cached_segment_base(
4847 struct x86_emulate_ctxt
*ctxt
, int seg
)
4849 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4852 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4853 struct desc_struct
*desc
, u32
*base3
,
4856 struct kvm_segment var
;
4858 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4859 *selector
= var
.selector
;
4862 memset(desc
, 0, sizeof(*desc
));
4868 set_desc_limit(desc
, var
.limit
);
4869 set_desc_base(desc
, (unsigned long)var
.base
);
4870 #ifdef CONFIG_X86_64
4872 *base3
= var
.base
>> 32;
4874 desc
->type
= var
.type
;
4876 desc
->dpl
= var
.dpl
;
4877 desc
->p
= var
.present
;
4878 desc
->avl
= var
.avl
;
4886 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4887 struct desc_struct
*desc
, u32 base3
,
4890 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4891 struct kvm_segment var
;
4893 var
.selector
= selector
;
4894 var
.base
= get_desc_base(desc
);
4895 #ifdef CONFIG_X86_64
4896 var
.base
|= ((u64
)base3
) << 32;
4898 var
.limit
= get_desc_limit(desc
);
4900 var
.limit
= (var
.limit
<< 12) | 0xfff;
4901 var
.type
= desc
->type
;
4902 var
.dpl
= desc
->dpl
;
4907 var
.avl
= desc
->avl
;
4908 var
.present
= desc
->p
;
4909 var
.unusable
= !var
.present
;
4912 kvm_set_segment(vcpu
, &var
, seg
);
4916 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4917 u32 msr_index
, u64
*pdata
)
4919 struct msr_data msr
;
4922 msr
.index
= msr_index
;
4923 msr
.host_initiated
= false;
4924 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
4932 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4933 u32 msr_index
, u64 data
)
4935 struct msr_data msr
;
4938 msr
.index
= msr_index
;
4939 msr
.host_initiated
= false;
4940 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
4943 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
4945 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4947 return vcpu
->arch
.smbase
;
4950 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
4952 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4954 vcpu
->arch
.smbase
= smbase
;
4957 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
4960 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
4963 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
4964 u32 pmc
, u64
*pdata
)
4966 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
4969 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4971 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4974 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4977 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4979 * CR0.TS may reference the host fpu state, not the guest fpu state,
4980 * so it may be clear at this point.
4985 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4990 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4991 struct x86_instruction_info
*info
,
4992 enum x86_intercept_stage stage
)
4994 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
4997 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
4998 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
5000 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
5003 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5005 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5008 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5010 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5013 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5015 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5018 static const struct x86_emulate_ops emulate_ops
= {
5019 .read_gpr
= emulator_read_gpr
,
5020 .write_gpr
= emulator_write_gpr
,
5021 .read_std
= kvm_read_guest_virt_system
,
5022 .write_std
= kvm_write_guest_virt_system
,
5023 .read_phys
= kvm_read_guest_phys_system
,
5024 .fetch
= kvm_fetch_guest_virt
,
5025 .read_emulated
= emulator_read_emulated
,
5026 .write_emulated
= emulator_write_emulated
,
5027 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5028 .invlpg
= emulator_invlpg
,
5029 .pio_in_emulated
= emulator_pio_in_emulated
,
5030 .pio_out_emulated
= emulator_pio_out_emulated
,
5031 .get_segment
= emulator_get_segment
,
5032 .set_segment
= emulator_set_segment
,
5033 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5034 .get_gdt
= emulator_get_gdt
,
5035 .get_idt
= emulator_get_idt
,
5036 .set_gdt
= emulator_set_gdt
,
5037 .set_idt
= emulator_set_idt
,
5038 .get_cr
= emulator_get_cr
,
5039 .set_cr
= emulator_set_cr
,
5040 .cpl
= emulator_get_cpl
,
5041 .get_dr
= emulator_get_dr
,
5042 .set_dr
= emulator_set_dr
,
5043 .get_smbase
= emulator_get_smbase
,
5044 .set_smbase
= emulator_set_smbase
,
5045 .set_msr
= emulator_set_msr
,
5046 .get_msr
= emulator_get_msr
,
5047 .check_pmc
= emulator_check_pmc
,
5048 .read_pmc
= emulator_read_pmc
,
5049 .halt
= emulator_halt
,
5050 .wbinvd
= emulator_wbinvd
,
5051 .fix_hypercall
= emulator_fix_hypercall
,
5052 .get_fpu
= emulator_get_fpu
,
5053 .put_fpu
= emulator_put_fpu
,
5054 .intercept
= emulator_intercept
,
5055 .get_cpuid
= emulator_get_cpuid
,
5056 .set_nmi_mask
= emulator_set_nmi_mask
,
5059 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5061 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5063 * an sti; sti; sequence only disable interrupts for the first
5064 * instruction. So, if the last instruction, be it emulated or
5065 * not, left the system with the INT_STI flag enabled, it
5066 * means that the last instruction is an sti. We should not
5067 * leave the flag on in this case. The same goes for mov ss
5069 if (int_shadow
& mask
)
5071 if (unlikely(int_shadow
|| mask
)) {
5072 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5074 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5078 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5080 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5081 if (ctxt
->exception
.vector
== PF_VECTOR
)
5082 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5084 if (ctxt
->exception
.error_code_valid
)
5085 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5086 ctxt
->exception
.error_code
);
5088 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5092 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5094 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5097 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5099 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5100 ctxt
->eip
= kvm_rip_read(vcpu
);
5101 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5102 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5103 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5104 cs_db
? X86EMUL_MODE_PROT32
:
5105 X86EMUL_MODE_PROT16
;
5106 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5107 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5108 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5109 ctxt
->emul_flags
= vcpu
->arch
.hflags
;
5111 init_decode_cache(ctxt
);
5112 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5115 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5117 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5120 init_emulate_ctxt(vcpu
);
5124 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5125 ret
= emulate_int_real(ctxt
, irq
);
5127 if (ret
!= X86EMUL_CONTINUE
)
5128 return EMULATE_FAIL
;
5130 ctxt
->eip
= ctxt
->_eip
;
5131 kvm_rip_write(vcpu
, ctxt
->eip
);
5132 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5134 if (irq
== NMI_VECTOR
)
5135 vcpu
->arch
.nmi_pending
= 0;
5137 vcpu
->arch
.interrupt
.pending
= false;
5139 return EMULATE_DONE
;
5141 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5143 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5145 int r
= EMULATE_DONE
;
5147 ++vcpu
->stat
.insn_emulation_fail
;
5148 trace_kvm_emulate_insn_failed(vcpu
);
5149 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5150 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5151 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5152 vcpu
->run
->internal
.ndata
= 0;
5155 kvm_queue_exception(vcpu
, UD_VECTOR
);
5160 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5161 bool write_fault_to_shadow_pgtable
,
5167 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5170 if (!vcpu
->arch
.mmu
.direct_map
) {
5172 * Write permission should be allowed since only
5173 * write access need to be emulated.
5175 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5178 * If the mapping is invalid in guest, let cpu retry
5179 * it to generate fault.
5181 if (gpa
== UNMAPPED_GVA
)
5186 * Do not retry the unhandleable instruction if it faults on the
5187 * readonly host memory, otherwise it will goto a infinite loop:
5188 * retry instruction -> write #PF -> emulation fail -> retry
5189 * instruction -> ...
5191 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5194 * If the instruction failed on the error pfn, it can not be fixed,
5195 * report the error to userspace.
5197 if (is_error_noslot_pfn(pfn
))
5200 kvm_release_pfn_clean(pfn
);
5202 /* The instructions are well-emulated on direct mmu. */
5203 if (vcpu
->arch
.mmu
.direct_map
) {
5204 unsigned int indirect_shadow_pages
;
5206 spin_lock(&vcpu
->kvm
->mmu_lock
);
5207 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5208 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5210 if (indirect_shadow_pages
)
5211 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5217 * if emulation was due to access to shadowed page table
5218 * and it failed try to unshadow page and re-enter the
5219 * guest to let CPU execute the instruction.
5221 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5224 * If the access faults on its page table, it can not
5225 * be fixed by unprotecting shadow page and it should
5226 * be reported to userspace.
5228 return !write_fault_to_shadow_pgtable
;
5231 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5232 unsigned long cr2
, int emulation_type
)
5234 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5235 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5237 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5238 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5241 * If the emulation is caused by #PF and it is non-page_table
5242 * writing instruction, it means the VM-EXIT is caused by shadow
5243 * page protected, we can zap the shadow page and retry this
5244 * instruction directly.
5246 * Note: if the guest uses a non-page-table modifying instruction
5247 * on the PDE that points to the instruction, then we will unmap
5248 * the instruction and go to an infinite loop. So, we cache the
5249 * last retried eip and the last fault address, if we meet the eip
5250 * and the address again, we can break out of the potential infinite
5253 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5255 if (!(emulation_type
& EMULTYPE_RETRY
))
5258 if (x86_page_table_writing_insn(ctxt
))
5261 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5264 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5265 vcpu
->arch
.last_retry_addr
= cr2
;
5267 if (!vcpu
->arch
.mmu
.direct_map
)
5268 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5270 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5275 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5276 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5278 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5280 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5281 /* This is a good place to trace that we are exiting SMM. */
5282 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5284 if (unlikely(vcpu
->arch
.smi_pending
)) {
5285 kvm_make_request(KVM_REQ_SMI
, vcpu
);
5286 vcpu
->arch
.smi_pending
= 0;
5288 /* Process a latched INIT, if any. */
5289 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5293 kvm_mmu_reset_context(vcpu
);
5296 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5298 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5300 vcpu
->arch
.hflags
= emul_flags
;
5302 if (changed
& HF_SMM_MASK
)
5303 kvm_smm_changed(vcpu
);
5306 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5315 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5316 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5321 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, unsigned long rflags
, int *r
)
5323 struct kvm_run
*kvm_run
= vcpu
->run
;
5326 * rflags is the old, "raw" value of the flags. The new value has
5327 * not been saved yet.
5329 * This is correct even for TF set by the guest, because "the
5330 * processor will not generate this exception after the instruction
5331 * that sets the TF flag".
5333 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5334 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5335 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
|
5337 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5338 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5339 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5340 *r
= EMULATE_USER_EXIT
;
5342 vcpu
->arch
.emulate_ctxt
.eflags
&= ~X86_EFLAGS_TF
;
5344 * "Certain debug exceptions may clear bit 0-3. The
5345 * remaining contents of the DR6 register are never
5346 * cleared by the processor".
5348 vcpu
->arch
.dr6
&= ~15;
5349 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5350 kvm_queue_exception(vcpu
, DB_VECTOR
);
5355 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5357 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5358 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5359 struct kvm_run
*kvm_run
= vcpu
->run
;
5360 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5361 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5362 vcpu
->arch
.guest_debug_dr7
,
5366 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5367 kvm_run
->debug
.arch
.pc
= eip
;
5368 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5369 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5370 *r
= EMULATE_USER_EXIT
;
5375 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5376 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5377 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5378 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5383 vcpu
->arch
.dr6
&= ~15;
5384 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5385 kvm_queue_exception(vcpu
, DB_VECTOR
);
5394 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5401 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5402 bool writeback
= true;
5403 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5406 * Clear write_fault_to_shadow_pgtable here to ensure it is
5409 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5410 kvm_clear_exception_queue(vcpu
);
5412 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5413 init_emulate_ctxt(vcpu
);
5416 * We will reenter on the same instruction since
5417 * we do not set complete_userspace_io. This does not
5418 * handle watchpoints yet, those would be handled in
5421 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5424 ctxt
->interruptibility
= 0;
5425 ctxt
->have_exception
= false;
5426 ctxt
->exception
.vector
= -1;
5427 ctxt
->perm_ok
= false;
5429 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5431 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5433 trace_kvm_emulate_insn_start(vcpu
);
5434 ++vcpu
->stat
.insn_emulation
;
5435 if (r
!= EMULATION_OK
) {
5436 if (emulation_type
& EMULTYPE_TRAP_UD
)
5437 return EMULATE_FAIL
;
5438 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5440 return EMULATE_DONE
;
5441 if (emulation_type
& EMULTYPE_SKIP
)
5442 return EMULATE_FAIL
;
5443 return handle_emulation_failure(vcpu
);
5447 if (emulation_type
& EMULTYPE_SKIP
) {
5448 kvm_rip_write(vcpu
, ctxt
->_eip
);
5449 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5450 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5451 return EMULATE_DONE
;
5454 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5455 return EMULATE_DONE
;
5457 /* this is needed for vmware backdoor interface to work since it
5458 changes registers values during IO operation */
5459 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5460 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5461 emulator_invalidate_register_cache(ctxt
);
5465 r
= x86_emulate_insn(ctxt
);
5467 if (r
== EMULATION_INTERCEPTED
)
5468 return EMULATE_DONE
;
5470 if (r
== EMULATION_FAILED
) {
5471 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5473 return EMULATE_DONE
;
5475 return handle_emulation_failure(vcpu
);
5478 if (ctxt
->have_exception
) {
5480 if (inject_emulated_exception(vcpu
))
5482 } else if (vcpu
->arch
.pio
.count
) {
5483 if (!vcpu
->arch
.pio
.in
) {
5484 /* FIXME: return into emulator if single-stepping. */
5485 vcpu
->arch
.pio
.count
= 0;
5488 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5490 r
= EMULATE_USER_EXIT
;
5491 } else if (vcpu
->mmio_needed
) {
5492 if (!vcpu
->mmio_is_write
)
5494 r
= EMULATE_USER_EXIT
;
5495 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5496 } else if (r
== EMULATION_RESTART
)
5502 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5503 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5504 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5505 if (vcpu
->arch
.hflags
!= ctxt
->emul_flags
)
5506 kvm_set_hflags(vcpu
, ctxt
->emul_flags
);
5507 kvm_rip_write(vcpu
, ctxt
->eip
);
5508 if (r
== EMULATE_DONE
)
5509 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5510 if (!ctxt
->have_exception
||
5511 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5512 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5515 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5516 * do nothing, and it will be requested again as soon as
5517 * the shadow expires. But we still need to check here,
5518 * because POPF has no interrupt shadow.
5520 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5521 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5523 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5527 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5529 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5531 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5532 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5533 size
, port
, &val
, 1);
5534 /* do not return to emulator after return from userspace */
5535 vcpu
->arch
.pio
.count
= 0;
5538 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5540 static void tsc_bad(void *info
)
5542 __this_cpu_write(cpu_tsc_khz
, 0);
5545 static void tsc_khz_changed(void *data
)
5547 struct cpufreq_freqs
*freq
= data
;
5548 unsigned long khz
= 0;
5552 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5553 khz
= cpufreq_quick_get(raw_smp_processor_id());
5556 __this_cpu_write(cpu_tsc_khz
, khz
);
5559 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5562 struct cpufreq_freqs
*freq
= data
;
5564 struct kvm_vcpu
*vcpu
;
5565 int i
, send_ipi
= 0;
5568 * We allow guests to temporarily run on slowing clocks,
5569 * provided we notify them after, or to run on accelerating
5570 * clocks, provided we notify them before. Thus time never
5573 * However, we have a problem. We can't atomically update
5574 * the frequency of a given CPU from this function; it is
5575 * merely a notifier, which can be called from any CPU.
5576 * Changing the TSC frequency at arbitrary points in time
5577 * requires a recomputation of local variables related to
5578 * the TSC for each VCPU. We must flag these local variables
5579 * to be updated and be sure the update takes place with the
5580 * new frequency before any guests proceed.
5582 * Unfortunately, the combination of hotplug CPU and frequency
5583 * change creates an intractable locking scenario; the order
5584 * of when these callouts happen is undefined with respect to
5585 * CPU hotplug, and they can race with each other. As such,
5586 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5587 * undefined; you can actually have a CPU frequency change take
5588 * place in between the computation of X and the setting of the
5589 * variable. To protect against this problem, all updates of
5590 * the per_cpu tsc_khz variable are done in an interrupt
5591 * protected IPI, and all callers wishing to update the value
5592 * must wait for a synchronous IPI to complete (which is trivial
5593 * if the caller is on the CPU already). This establishes the
5594 * necessary total order on variable updates.
5596 * Note that because a guest time update may take place
5597 * anytime after the setting of the VCPU's request bit, the
5598 * correct TSC value must be set before the request. However,
5599 * to ensure the update actually makes it to any guest which
5600 * starts running in hardware virtualization between the set
5601 * and the acquisition of the spinlock, we must also ping the
5602 * CPU after setting the request bit.
5606 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5608 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5611 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5613 spin_lock(&kvm_lock
);
5614 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5615 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5616 if (vcpu
->cpu
!= freq
->cpu
)
5618 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5619 if (vcpu
->cpu
!= smp_processor_id())
5623 spin_unlock(&kvm_lock
);
5625 if (freq
->old
< freq
->new && send_ipi
) {
5627 * We upscale the frequency. Must make the guest
5628 * doesn't see old kvmclock values while running with
5629 * the new frequency, otherwise we risk the guest sees
5630 * time go backwards.
5632 * In case we update the frequency for another cpu
5633 * (which might be in guest context) send an interrupt
5634 * to kick the cpu out of guest context. Next time
5635 * guest context is entered kvmclock will be updated,
5636 * so the guest will not see stale values.
5638 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5643 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5644 .notifier_call
= kvmclock_cpufreq_notifier
5647 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
5648 unsigned long action
, void *hcpu
)
5650 unsigned int cpu
= (unsigned long)hcpu
;
5654 case CPU_DOWN_FAILED
:
5655 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5657 case CPU_DOWN_PREPARE
:
5658 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
5664 static struct notifier_block kvmclock_cpu_notifier_block
= {
5665 .notifier_call
= kvmclock_cpu_notifier
,
5666 .priority
= -INT_MAX
5669 static void kvm_timer_init(void)
5673 max_tsc_khz
= tsc_khz
;
5675 cpu_notifier_register_begin();
5676 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5677 #ifdef CONFIG_CPU_FREQ
5678 struct cpufreq_policy policy
;
5679 memset(&policy
, 0, sizeof(policy
));
5681 cpufreq_get_policy(&policy
, cpu
);
5682 if (policy
.cpuinfo
.max_freq
)
5683 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5686 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5687 CPUFREQ_TRANSITION_NOTIFIER
);
5689 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5690 for_each_online_cpu(cpu
)
5691 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5693 __register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5694 cpu_notifier_register_done();
5698 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5700 int kvm_is_in_guest(void)
5702 return __this_cpu_read(current_vcpu
) != NULL
;
5705 static int kvm_is_user_mode(void)
5709 if (__this_cpu_read(current_vcpu
))
5710 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5712 return user_mode
!= 0;
5715 static unsigned long kvm_get_guest_ip(void)
5717 unsigned long ip
= 0;
5719 if (__this_cpu_read(current_vcpu
))
5720 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5725 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5726 .is_in_guest
= kvm_is_in_guest
,
5727 .is_user_mode
= kvm_is_user_mode
,
5728 .get_guest_ip
= kvm_get_guest_ip
,
5731 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5733 __this_cpu_write(current_vcpu
, vcpu
);
5735 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5737 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5739 __this_cpu_write(current_vcpu
, NULL
);
5741 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5743 static void kvm_set_mmio_spte_mask(void)
5746 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5749 * Set the reserved bits and the present bit of an paging-structure
5750 * entry to generate page fault with PFER.RSV = 1.
5752 /* Mask the reserved physical address bits. */
5753 mask
= rsvd_bits(maxphyaddr
, 51);
5755 /* Bit 62 is always reserved for 32bit host. */
5756 mask
|= 0x3ull
<< 62;
5758 /* Set the present bit. */
5761 #ifdef CONFIG_X86_64
5763 * If reserved bit is not supported, clear the present bit to disable
5766 if (maxphyaddr
== 52)
5770 kvm_mmu_set_mmio_spte_mask(mask
);
5773 #ifdef CONFIG_X86_64
5774 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5778 struct kvm_vcpu
*vcpu
;
5781 spin_lock(&kvm_lock
);
5782 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5783 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5784 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
5785 atomic_set(&kvm_guest_has_master_clock
, 0);
5786 spin_unlock(&kvm_lock
);
5789 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5792 * Notification about pvclock gtod data update.
5794 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5797 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5798 struct timekeeper
*tk
= priv
;
5800 update_pvclock_gtod(tk
);
5802 /* disable master clock if host does not trust, or does not
5803 * use, TSC clocksource
5805 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5806 atomic_read(&kvm_guest_has_master_clock
) != 0)
5807 queue_work(system_long_wq
, &pvclock_gtod_work
);
5812 static struct notifier_block pvclock_gtod_notifier
= {
5813 .notifier_call
= pvclock_gtod_notify
,
5817 int kvm_arch_init(void *opaque
)
5820 struct kvm_x86_ops
*ops
= opaque
;
5823 printk(KERN_ERR
"kvm: already loaded the other module\n");
5828 if (!ops
->cpu_has_kvm_support()) {
5829 printk(KERN_ERR
"kvm: no hardware support\n");
5833 if (ops
->disabled_by_bios()) {
5834 printk(KERN_ERR
"kvm: disabled by bios\n");
5840 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
5842 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
5846 r
= kvm_mmu_module_init();
5848 goto out_free_percpu
;
5850 kvm_set_mmio_spte_mask();
5854 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
5855 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
5859 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
5862 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
5865 #ifdef CONFIG_X86_64
5866 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
5872 free_percpu(shared_msrs
);
5877 void kvm_arch_exit(void)
5879 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
5881 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5882 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
5883 CPUFREQ_TRANSITION_NOTIFIER
);
5884 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5885 #ifdef CONFIG_X86_64
5886 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
5889 kvm_mmu_module_exit();
5890 free_percpu(shared_msrs
);
5893 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
5895 ++vcpu
->stat
.halt_exits
;
5896 if (lapic_in_kernel(vcpu
)) {
5897 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
5900 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
5904 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
5906 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
5908 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5909 return kvm_vcpu_halt(vcpu
);
5911 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
5914 * kvm_pv_kick_cpu_op: Kick a vcpu.
5916 * @apicid - apicid of vcpu to be kicked.
5918 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
5920 struct kvm_lapic_irq lapic_irq
;
5922 lapic_irq
.shorthand
= 0;
5923 lapic_irq
.dest_mode
= 0;
5924 lapic_irq
.dest_id
= apicid
;
5925 lapic_irq
.msi_redir_hint
= false;
5927 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
5928 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
5931 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
5933 vcpu
->arch
.apicv_active
= false;
5934 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
5937 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5939 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5940 int op_64_bit
, r
= 1;
5942 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5944 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5945 return kvm_hv_hypercall(vcpu
);
5947 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5948 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5949 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5950 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5951 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5953 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5955 op_64_bit
= is_64_bit_mode(vcpu
);
5964 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5970 case KVM_HC_VAPIC_POLL_IRQ
:
5973 case KVM_HC_KICK_CPU
:
5974 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
5984 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5985 ++vcpu
->stat
.hypercalls
;
5988 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
5990 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
5992 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5993 char instruction
[3];
5994 unsigned long rip
= kvm_rip_read(vcpu
);
5996 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
5998 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
6001 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6003 return vcpu
->run
->request_interrupt_window
&&
6004 likely(!pic_in_kernel(vcpu
->kvm
));
6007 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6009 struct kvm_run
*kvm_run
= vcpu
->run
;
6011 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6012 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6013 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6014 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6015 kvm_run
->ready_for_interrupt_injection
=
6016 pic_in_kernel(vcpu
->kvm
) ||
6017 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6020 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6024 if (!kvm_x86_ops
->update_cr8_intercept
)
6027 if (!lapic_in_kernel(vcpu
))
6030 if (vcpu
->arch
.apicv_active
)
6033 if (!vcpu
->arch
.apic
->vapic_addr
)
6034 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6041 tpr
= kvm_lapic_get_cr8(vcpu
);
6043 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6046 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6050 /* try to reinject previous events if any */
6051 if (vcpu
->arch
.exception
.pending
) {
6052 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6053 vcpu
->arch
.exception
.has_error_code
,
6054 vcpu
->arch
.exception
.error_code
);
6056 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6057 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6060 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6061 (vcpu
->arch
.dr7
& DR7_GD
)) {
6062 vcpu
->arch
.dr7
&= ~DR7_GD
;
6063 kvm_update_dr7(vcpu
);
6066 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
6067 vcpu
->arch
.exception
.has_error_code
,
6068 vcpu
->arch
.exception
.error_code
,
6069 vcpu
->arch
.exception
.reinject
);
6073 if (vcpu
->arch
.nmi_injected
) {
6074 kvm_x86_ops
->set_nmi(vcpu
);
6078 if (vcpu
->arch
.interrupt
.pending
) {
6079 kvm_x86_ops
->set_irq(vcpu
);
6083 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6084 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6089 /* try to inject new event if pending */
6090 if (vcpu
->arch
.nmi_pending
) {
6091 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
6092 --vcpu
->arch
.nmi_pending
;
6093 vcpu
->arch
.nmi_injected
= true;
6094 kvm_x86_ops
->set_nmi(vcpu
);
6096 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6098 * Because interrupts can be injected asynchronously, we are
6099 * calling check_nested_events again here to avoid a race condition.
6100 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6101 * proposal and current concerns. Perhaps we should be setting
6102 * KVM_REQ_EVENT only on certain events and not unconditionally?
6104 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6105 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6109 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6110 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6112 kvm_x86_ops
->set_irq(vcpu
);
6118 static void process_nmi(struct kvm_vcpu
*vcpu
)
6123 * x86 is limited to one NMI running, and one NMI pending after it.
6124 * If an NMI is already in progress, limit further NMIs to just one.
6125 * Otherwise, allow two (and we'll inject the first one immediately).
6127 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6130 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6131 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6132 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6135 #define put_smstate(type, buf, offset, val) \
6136 *(type *)((buf) + (offset) - 0x7e00) = val
6138 static u32
process_smi_get_segment_flags(struct kvm_segment
*seg
)
6141 flags
|= seg
->g
<< 23;
6142 flags
|= seg
->db
<< 22;
6143 flags
|= seg
->l
<< 21;
6144 flags
|= seg
->avl
<< 20;
6145 flags
|= seg
->present
<< 15;
6146 flags
|= seg
->dpl
<< 13;
6147 flags
|= seg
->s
<< 12;
6148 flags
|= seg
->type
<< 8;
6152 static void process_smi_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6154 struct kvm_segment seg
;
6157 kvm_get_segment(vcpu
, &seg
, n
);
6158 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6161 offset
= 0x7f84 + n
* 12;
6163 offset
= 0x7f2c + (n
- 3) * 12;
6165 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6166 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6167 put_smstate(u32
, buf
, offset
, process_smi_get_segment_flags(&seg
));
6170 #ifdef CONFIG_X86_64
6171 static void process_smi_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6173 struct kvm_segment seg
;
6177 kvm_get_segment(vcpu
, &seg
, n
);
6178 offset
= 0x7e00 + n
* 16;
6180 flags
= process_smi_get_segment_flags(&seg
) >> 8;
6181 put_smstate(u16
, buf
, offset
, seg
.selector
);
6182 put_smstate(u16
, buf
, offset
+ 2, flags
);
6183 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6184 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6188 static void process_smi_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6191 struct kvm_segment seg
;
6195 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6196 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6197 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6198 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6200 for (i
= 0; i
< 8; i
++)
6201 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6203 kvm_get_dr(vcpu
, 6, &val
);
6204 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6205 kvm_get_dr(vcpu
, 7, &val
);
6206 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6208 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6209 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6210 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6211 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6212 put_smstate(u32
, buf
, 0x7f5c, process_smi_get_segment_flags(&seg
));
6214 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6215 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6216 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6217 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6218 put_smstate(u32
, buf
, 0x7f78, process_smi_get_segment_flags(&seg
));
6220 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6221 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6222 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6224 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6225 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6226 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6228 for (i
= 0; i
< 6; i
++)
6229 process_smi_save_seg_32(vcpu
, buf
, i
);
6231 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6234 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6235 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6238 static void process_smi_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6240 #ifdef CONFIG_X86_64
6242 struct kvm_segment seg
;
6246 for (i
= 0; i
< 16; i
++)
6247 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6249 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6250 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6252 kvm_get_dr(vcpu
, 6, &val
);
6253 put_smstate(u64
, buf
, 0x7f68, val
);
6254 kvm_get_dr(vcpu
, 7, &val
);
6255 put_smstate(u64
, buf
, 0x7f60, val
);
6257 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6258 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6259 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6261 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6264 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6266 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6268 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6269 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6270 put_smstate(u16
, buf
, 0x7e92, process_smi_get_segment_flags(&seg
) >> 8);
6271 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6272 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6274 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6275 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6276 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6278 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6279 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6280 put_smstate(u16
, buf
, 0x7e72, process_smi_get_segment_flags(&seg
) >> 8);
6281 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6282 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6284 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6285 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6286 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6288 for (i
= 0; i
< 6; i
++)
6289 process_smi_save_seg_64(vcpu
, buf
, i
);
6295 static void process_smi(struct kvm_vcpu
*vcpu
)
6297 struct kvm_segment cs
, ds
;
6303 vcpu
->arch
.smi_pending
= true;
6307 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6308 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6309 memset(buf
, 0, 512);
6310 if (guest_cpuid_has_longmode(vcpu
))
6311 process_smi_save_state_64(vcpu
, buf
);
6313 process_smi_save_state_32(vcpu
, buf
);
6315 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6317 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6318 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6320 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6322 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6323 kvm_rip_write(vcpu
, 0x8000);
6325 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6326 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6327 vcpu
->arch
.cr0
= cr0
;
6329 kvm_x86_ops
->set_cr4(vcpu
, 0);
6331 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6332 dt
.address
= dt
.size
= 0;
6333 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6335 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6337 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6338 cs
.base
= vcpu
->arch
.smbase
;
6343 cs
.limit
= ds
.limit
= 0xffffffff;
6344 cs
.type
= ds
.type
= 0x3;
6345 cs
.dpl
= ds
.dpl
= 0;
6350 cs
.avl
= ds
.avl
= 0;
6351 cs
.present
= ds
.present
= 1;
6352 cs
.unusable
= ds
.unusable
= 0;
6353 cs
.padding
= ds
.padding
= 0;
6355 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6356 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6357 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6358 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6359 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6360 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6362 if (guest_cpuid_has_longmode(vcpu
))
6363 kvm_x86_ops
->set_efer(vcpu
, 0);
6365 kvm_update_cpuid(vcpu
);
6366 kvm_mmu_reset_context(vcpu
);
6369 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6371 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6374 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6376 u64 eoi_exit_bitmap
[4];
6378 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6381 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6383 if (irqchip_split(vcpu
->kvm
))
6384 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6386 if (vcpu
->arch
.apicv_active
)
6387 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6388 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6390 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6391 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6392 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6395 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6397 ++vcpu
->stat
.tlb_flush
;
6398 kvm_x86_ops
->tlb_flush(vcpu
);
6401 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6403 struct page
*page
= NULL
;
6405 if (!lapic_in_kernel(vcpu
))
6408 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6411 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6412 if (is_error_page(page
))
6414 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6417 * Do not pin apic access page in memory, the MMU notifier
6418 * will call us again if it is migrated or swapped out.
6422 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6424 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6425 unsigned long address
)
6428 * The physical address of apic access page is stored in the VMCS.
6429 * Update it when it becomes invalid.
6431 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6432 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6436 * Returns 1 to let vcpu_run() continue the guest execution loop without
6437 * exiting to the userspace. Otherwise, the value will be returned to the
6440 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6444 dm_request_for_irq_injection(vcpu
) &&
6445 kvm_cpu_accept_dm_intr(vcpu
);
6447 bool req_immediate_exit
= false;
6449 if (vcpu
->requests
) {
6450 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6451 kvm_mmu_unload(vcpu
);
6452 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6453 __kvm_migrate_timers(vcpu
);
6454 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6455 kvm_gen_update_masterclock(vcpu
->kvm
);
6456 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6457 kvm_gen_kvmclock_update(vcpu
);
6458 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6459 r
= kvm_guest_time_update(vcpu
);
6463 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6464 kvm_mmu_sync_roots(vcpu
);
6465 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6466 kvm_vcpu_flush_tlb(vcpu
);
6467 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6468 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6472 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6473 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6477 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
6478 vcpu
->fpu_active
= 0;
6479 kvm_x86_ops
->fpu_deactivate(vcpu
);
6481 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6482 /* Page is swapped out. Do synthetic halt */
6483 vcpu
->arch
.apf
.halted
= true;
6487 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6488 record_steal_time(vcpu
);
6489 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6491 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6493 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6494 kvm_pmu_handle_event(vcpu
);
6495 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6496 kvm_pmu_deliver_pmi(vcpu
);
6497 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
6498 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
6499 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
6500 vcpu
->arch
.ioapic_handled_vectors
)) {
6501 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
6502 vcpu
->run
->eoi
.vector
=
6503 vcpu
->arch
.pending_ioapic_eoi
;
6508 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6509 vcpu_scan_ioapic(vcpu
);
6510 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6511 kvm_vcpu_reload_apic_access_page(vcpu
);
6512 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
6513 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6514 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
6518 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
6519 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6520 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
6524 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
6525 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
6526 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
6532 * KVM_REQ_HV_STIMER has to be processed after
6533 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6534 * depend on the guest clock being up-to-date
6536 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
6537 kvm_hv_process_stimers(vcpu
);
6541 * KVM_REQ_EVENT is not set when posted interrupts are set by
6542 * VT-d hardware, so we have to update RVI unconditionally.
6544 if (kvm_lapic_enabled(vcpu
)) {
6546 * Update architecture specific hints for APIC
6547 * virtual interrupt delivery.
6549 if (vcpu
->arch
.apicv_active
)
6550 kvm_x86_ops
->hwapic_irr_update(vcpu
,
6551 kvm_lapic_find_highest_irr(vcpu
));
6554 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6555 kvm_apic_accept_events(vcpu
);
6556 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6561 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6562 req_immediate_exit
= true;
6563 /* enable NMI/IRQ window open exits if needed */
6564 else if (vcpu
->arch
.nmi_pending
)
6565 kvm_x86_ops
->enable_nmi_window(vcpu
);
6566 else if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6567 kvm_x86_ops
->enable_irq_window(vcpu
);
6569 if (kvm_lapic_enabled(vcpu
)) {
6570 update_cr8_intercept(vcpu
);
6571 kvm_lapic_sync_to_vapic(vcpu
);
6575 r
= kvm_mmu_reload(vcpu
);
6577 goto cancel_injection
;
6582 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6583 if (vcpu
->fpu_active
)
6584 kvm_load_guest_fpu(vcpu
);
6585 kvm_load_guest_xcr0(vcpu
);
6587 vcpu
->mode
= IN_GUEST_MODE
;
6589 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6591 /* We should set ->mode before check ->requests,
6592 * see the comment in make_all_cpus_request.
6594 smp_mb__after_srcu_read_unlock();
6596 local_irq_disable();
6598 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
6599 || need_resched() || signal_pending(current
)) {
6600 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6604 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6606 goto cancel_injection
;
6609 if (req_immediate_exit
)
6610 smp_send_reschedule(vcpu
->cpu
);
6612 trace_kvm_entry(vcpu
->vcpu_id
);
6613 wait_lapic_expire(vcpu
);
6614 __kvm_guest_enter();
6616 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6618 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6619 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6620 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6621 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6622 set_debugreg(vcpu
->arch
.dr6
, 6);
6623 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6626 kvm_x86_ops
->run(vcpu
);
6629 * Do this here before restoring debug registers on the host. And
6630 * since we do this before handling the vmexit, a DR access vmexit
6631 * can (a) read the correct value of the debug registers, (b) set
6632 * KVM_DEBUGREG_WONT_EXIT again.
6634 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6635 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6636 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6637 kvm_update_dr0123(vcpu
);
6638 kvm_update_dr6(vcpu
);
6639 kvm_update_dr7(vcpu
);
6640 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6644 * If the guest has used debug registers, at least dr7
6645 * will be disabled while returning to the host.
6646 * If we don't have active breakpoints in the host, we don't
6647 * care about the messed up debug address registers. But if
6648 * we have some of them active, restore the old state.
6650 if (hw_breakpoint_active())
6651 hw_breakpoint_restore();
6653 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
6655 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6658 /* Interrupt is enabled by handle_external_intr() */
6659 kvm_x86_ops
->handle_external_intr(vcpu
);
6664 * We must have an instruction between local_irq_enable() and
6665 * kvm_guest_exit(), so the timer interrupt isn't delayed by
6666 * the interrupt shadow. The stat.exits increment will do nicely.
6667 * But we need to prevent reordering, hence this barrier():
6675 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6678 * Profile KVM exit RIPs:
6680 if (unlikely(prof_on
== KVM_PROFILING
)) {
6681 unsigned long rip
= kvm_rip_read(vcpu
);
6682 profile_hit(KVM_PROFILING
, (void *)rip
);
6685 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6686 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6688 if (vcpu
->arch
.apic_attention
)
6689 kvm_lapic_sync_from_vapic(vcpu
);
6691 r
= kvm_x86_ops
->handle_exit(vcpu
);
6695 kvm_x86_ops
->cancel_injection(vcpu
);
6696 if (unlikely(vcpu
->arch
.apic_attention
))
6697 kvm_lapic_sync_from_vapic(vcpu
);
6702 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
6704 if (!kvm_arch_vcpu_runnable(vcpu
) &&
6705 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
6706 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6707 kvm_vcpu_block(vcpu
);
6708 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6710 if (kvm_x86_ops
->post_block
)
6711 kvm_x86_ops
->post_block(vcpu
);
6713 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
6717 kvm_apic_accept_events(vcpu
);
6718 switch(vcpu
->arch
.mp_state
) {
6719 case KVM_MP_STATE_HALTED
:
6720 vcpu
->arch
.pv
.pv_unhalted
= false;
6721 vcpu
->arch
.mp_state
=
6722 KVM_MP_STATE_RUNNABLE
;
6723 case KVM_MP_STATE_RUNNABLE
:
6724 vcpu
->arch
.apf
.halted
= false;
6726 case KVM_MP_STATE_INIT_RECEIVED
:
6735 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
6737 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6738 !vcpu
->arch
.apf
.halted
);
6741 static int vcpu_run(struct kvm_vcpu
*vcpu
)
6744 struct kvm
*kvm
= vcpu
->kvm
;
6746 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6749 if (kvm_vcpu_running(vcpu
)) {
6750 r
= vcpu_enter_guest(vcpu
);
6752 r
= vcpu_block(kvm
, vcpu
);
6758 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
6759 if (kvm_cpu_has_pending_timer(vcpu
))
6760 kvm_inject_pending_timer_irqs(vcpu
);
6762 if (dm_request_for_irq_injection(vcpu
) &&
6763 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
6765 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
6766 ++vcpu
->stat
.request_irq_exits
;
6770 kvm_check_async_pf_completion(vcpu
);
6772 if (signal_pending(current
)) {
6774 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6775 ++vcpu
->stat
.signal_exits
;
6778 if (need_resched()) {
6779 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6781 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6785 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6790 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
6793 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6794 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
6795 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6796 if (r
!= EMULATE_DONE
)
6801 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
6803 BUG_ON(!vcpu
->arch
.pio
.count
);
6805 return complete_emulated_io(vcpu
);
6809 * Implements the following, as a state machine:
6813 * for each mmio piece in the fragment
6821 * for each mmio piece in the fragment
6826 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
6828 struct kvm_run
*run
= vcpu
->run
;
6829 struct kvm_mmio_fragment
*frag
;
6832 BUG_ON(!vcpu
->mmio_needed
);
6834 /* Complete previous fragment */
6835 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
6836 len
= min(8u, frag
->len
);
6837 if (!vcpu
->mmio_is_write
)
6838 memcpy(frag
->data
, run
->mmio
.data
, len
);
6840 if (frag
->len
<= 8) {
6841 /* Switch to the next fragment. */
6843 vcpu
->mmio_cur_fragment
++;
6845 /* Go forward to the next mmio piece. */
6851 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
6852 vcpu
->mmio_needed
= 0;
6854 /* FIXME: return into emulator if single-stepping. */
6855 if (vcpu
->mmio_is_write
)
6857 vcpu
->mmio_read_completed
= 1;
6858 return complete_emulated_io(vcpu
);
6861 run
->exit_reason
= KVM_EXIT_MMIO
;
6862 run
->mmio
.phys_addr
= frag
->gpa
;
6863 if (vcpu
->mmio_is_write
)
6864 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6865 run
->mmio
.len
= min(8u, frag
->len
);
6866 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
6867 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6872 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
6874 struct fpu
*fpu
= ¤t
->thread
.fpu
;
6878 fpu__activate_curr(fpu
);
6880 if (vcpu
->sigset_active
)
6881 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
6883 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
6884 kvm_vcpu_block(vcpu
);
6885 kvm_apic_accept_events(vcpu
);
6886 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
6891 /* re-sync apic's tpr */
6892 if (!lapic_in_kernel(vcpu
)) {
6893 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
6899 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
6900 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
6901 vcpu
->arch
.complete_userspace_io
= NULL
;
6906 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
6911 post_kvm_run_save(vcpu
);
6912 if (vcpu
->sigset_active
)
6913 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
6918 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6920 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
6922 * We are here if userspace calls get_regs() in the middle of
6923 * instruction emulation. Registers state needs to be copied
6924 * back from emulation context to vcpu. Userspace shouldn't do
6925 * that usually, but some bad designed PV devices (vmware
6926 * backdoor interface) need this to work
6928 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
6929 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6931 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6932 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6933 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6934 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6935 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6936 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
6937 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
6938 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
6939 #ifdef CONFIG_X86_64
6940 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
6941 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
6942 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
6943 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
6944 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
6945 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
6946 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
6947 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
6950 regs
->rip
= kvm_rip_read(vcpu
);
6951 regs
->rflags
= kvm_get_rflags(vcpu
);
6956 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6958 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
6959 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6961 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
6962 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
6963 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
6964 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
6965 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
6966 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
6967 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
6968 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
6969 #ifdef CONFIG_X86_64
6970 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
6971 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
6972 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
6973 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
6974 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
6975 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
6976 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
6977 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
6980 kvm_rip_write(vcpu
, regs
->rip
);
6981 kvm_set_rflags(vcpu
, regs
->rflags
);
6983 vcpu
->arch
.exception
.pending
= false;
6985 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6990 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
6992 struct kvm_segment cs
;
6994 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6998 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7000 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7001 struct kvm_sregs
*sregs
)
7005 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7006 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7007 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7008 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7009 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7010 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7012 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7013 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7015 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7016 sregs
->idt
.limit
= dt
.size
;
7017 sregs
->idt
.base
= dt
.address
;
7018 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7019 sregs
->gdt
.limit
= dt
.size
;
7020 sregs
->gdt
.base
= dt
.address
;
7022 sregs
->cr0
= kvm_read_cr0(vcpu
);
7023 sregs
->cr2
= vcpu
->arch
.cr2
;
7024 sregs
->cr3
= kvm_read_cr3(vcpu
);
7025 sregs
->cr4
= kvm_read_cr4(vcpu
);
7026 sregs
->cr8
= kvm_get_cr8(vcpu
);
7027 sregs
->efer
= vcpu
->arch
.efer
;
7028 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7030 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7032 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7033 set_bit(vcpu
->arch
.interrupt
.nr
,
7034 (unsigned long *)sregs
->interrupt_bitmap
);
7039 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7040 struct kvm_mp_state
*mp_state
)
7042 kvm_apic_accept_events(vcpu
);
7043 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7044 vcpu
->arch
.pv
.pv_unhalted
)
7045 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7047 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7052 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7053 struct kvm_mp_state
*mp_state
)
7055 if (!lapic_in_kernel(vcpu
) &&
7056 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7059 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7060 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7061 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7063 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7064 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7068 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7069 int reason
, bool has_error_code
, u32 error_code
)
7071 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7074 init_emulate_ctxt(vcpu
);
7076 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7077 has_error_code
, error_code
);
7080 return EMULATE_FAIL
;
7082 kvm_rip_write(vcpu
, ctxt
->eip
);
7083 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7084 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7085 return EMULATE_DONE
;
7087 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7089 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7090 struct kvm_sregs
*sregs
)
7092 struct msr_data apic_base_msr
;
7093 int mmu_reset_needed
= 0;
7094 int pending_vec
, max_bits
, idx
;
7097 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
7100 dt
.size
= sregs
->idt
.limit
;
7101 dt
.address
= sregs
->idt
.base
;
7102 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7103 dt
.size
= sregs
->gdt
.limit
;
7104 dt
.address
= sregs
->gdt
.base
;
7105 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7107 vcpu
->arch
.cr2
= sregs
->cr2
;
7108 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7109 vcpu
->arch
.cr3
= sregs
->cr3
;
7110 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7112 kvm_set_cr8(vcpu
, sregs
->cr8
);
7114 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7115 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7116 apic_base_msr
.data
= sregs
->apic_base
;
7117 apic_base_msr
.host_initiated
= true;
7118 kvm_set_apic_base(vcpu
, &apic_base_msr
);
7120 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7121 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7122 vcpu
->arch
.cr0
= sregs
->cr0
;
7124 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7125 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7126 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
7127 kvm_update_cpuid(vcpu
);
7129 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7130 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7131 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7132 mmu_reset_needed
= 1;
7134 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7136 if (mmu_reset_needed
)
7137 kvm_mmu_reset_context(vcpu
);
7139 max_bits
= KVM_NR_INTERRUPTS
;
7140 pending_vec
= find_first_bit(
7141 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7142 if (pending_vec
< max_bits
) {
7143 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7144 pr_debug("Set back pending irq %d\n", pending_vec
);
7147 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7148 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7149 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7150 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7151 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7152 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7154 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7155 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7157 update_cr8_intercept(vcpu
);
7159 /* Older userspace won't unhalt the vcpu on reset. */
7160 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7161 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7163 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7165 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7170 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7171 struct kvm_guest_debug
*dbg
)
7173 unsigned long rflags
;
7176 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7178 if (vcpu
->arch
.exception
.pending
)
7180 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7181 kvm_queue_exception(vcpu
, DB_VECTOR
);
7183 kvm_queue_exception(vcpu
, BP_VECTOR
);
7187 * Read rflags as long as potentially injected trace flags are still
7190 rflags
= kvm_get_rflags(vcpu
);
7192 vcpu
->guest_debug
= dbg
->control
;
7193 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7194 vcpu
->guest_debug
= 0;
7196 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7197 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7198 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7199 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7201 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7202 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7204 kvm_update_dr7(vcpu
);
7206 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7207 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7208 get_segment_base(vcpu
, VCPU_SREG_CS
);
7211 * Trigger an rflags update that will inject or remove the trace
7214 kvm_set_rflags(vcpu
, rflags
);
7216 kvm_x86_ops
->update_bp_intercept(vcpu
);
7226 * Translate a guest virtual address to a guest physical address.
7228 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7229 struct kvm_translation
*tr
)
7231 unsigned long vaddr
= tr
->linear_address
;
7235 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7236 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7237 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7238 tr
->physical_address
= gpa
;
7239 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7246 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7248 struct fxregs_state
*fxsave
=
7249 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7251 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7252 fpu
->fcw
= fxsave
->cwd
;
7253 fpu
->fsw
= fxsave
->swd
;
7254 fpu
->ftwx
= fxsave
->twd
;
7255 fpu
->last_opcode
= fxsave
->fop
;
7256 fpu
->last_ip
= fxsave
->rip
;
7257 fpu
->last_dp
= fxsave
->rdp
;
7258 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7263 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7265 struct fxregs_state
*fxsave
=
7266 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7268 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7269 fxsave
->cwd
= fpu
->fcw
;
7270 fxsave
->swd
= fpu
->fsw
;
7271 fxsave
->twd
= fpu
->ftwx
;
7272 fxsave
->fop
= fpu
->last_opcode
;
7273 fxsave
->rip
= fpu
->last_ip
;
7274 fxsave
->rdp
= fpu
->last_dp
;
7275 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7280 static void fx_init(struct kvm_vcpu
*vcpu
)
7282 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7284 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7285 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7288 * Ensure guest xcr0 is valid for loading
7290 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7292 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7295 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7297 if (vcpu
->guest_fpu_loaded
)
7301 * Restore all possible states in the guest,
7302 * and assume host would use all available bits.
7303 * Guest xcr0 would be loaded later.
7305 kvm_put_guest_xcr0(vcpu
);
7306 vcpu
->guest_fpu_loaded
= 1;
7307 __kernel_fpu_begin();
7308 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
);
7312 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7314 kvm_put_guest_xcr0(vcpu
);
7316 if (!vcpu
->guest_fpu_loaded
) {
7317 vcpu
->fpu_counter
= 0;
7321 vcpu
->guest_fpu_loaded
= 0;
7322 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7324 ++vcpu
->stat
.fpu_reload
;
7326 * If using eager FPU mode, or if the guest is a frequent user
7327 * of the FPU, just leave the FPU active for next time.
7328 * Every 255 times fpu_counter rolls over to 0; a guest that uses
7329 * the FPU in bursts will revert to loading it on demand.
7331 if (!use_eager_fpu()) {
7332 if (++vcpu
->fpu_counter
< 5)
7333 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
7338 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7340 kvmclock_reset(vcpu
);
7342 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
7343 kvm_x86_ops
->vcpu_free(vcpu
);
7346 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7349 struct kvm_vcpu
*vcpu
;
7351 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7352 printk_once(KERN_WARNING
7353 "kvm: SMP vm created on host with unstable TSC; "
7354 "guest TSC will not be reliable\n");
7356 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7361 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7365 kvm_vcpu_mtrr_init(vcpu
);
7366 r
= vcpu_load(vcpu
);
7369 kvm_vcpu_reset(vcpu
, false);
7370 kvm_mmu_setup(vcpu
);
7375 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7377 struct msr_data msr
;
7378 struct kvm
*kvm
= vcpu
->kvm
;
7380 if (vcpu_load(vcpu
))
7383 msr
.index
= MSR_IA32_TSC
;
7384 msr
.host_initiated
= true;
7385 kvm_write_tsc(vcpu
, &msr
);
7388 if (!kvmclock_periodic_sync
)
7391 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7392 KVMCLOCK_SYNC_PERIOD
);
7395 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7398 vcpu
->arch
.apf
.msr_val
= 0;
7400 r
= vcpu_load(vcpu
);
7402 kvm_mmu_unload(vcpu
);
7405 kvm_x86_ops
->vcpu_free(vcpu
);
7408 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7410 vcpu
->arch
.hflags
= 0;
7412 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7413 vcpu
->arch
.nmi_pending
= 0;
7414 vcpu
->arch
.nmi_injected
= false;
7415 kvm_clear_interrupt_queue(vcpu
);
7416 kvm_clear_exception_queue(vcpu
);
7418 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7419 kvm_update_dr0123(vcpu
);
7420 vcpu
->arch
.dr6
= DR6_INIT
;
7421 kvm_update_dr6(vcpu
);
7422 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7423 kvm_update_dr7(vcpu
);
7427 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7428 vcpu
->arch
.apf
.msr_val
= 0;
7429 vcpu
->arch
.st
.msr_val
= 0;
7431 kvmclock_reset(vcpu
);
7433 kvm_clear_async_pf_completion_queue(vcpu
);
7434 kvm_async_pf_hash_reset(vcpu
);
7435 vcpu
->arch
.apf
.halted
= false;
7438 kvm_pmu_reset(vcpu
);
7439 vcpu
->arch
.smbase
= 0x30000;
7442 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7443 vcpu
->arch
.regs_avail
= ~0;
7444 vcpu
->arch
.regs_dirty
= ~0;
7446 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7449 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7451 struct kvm_segment cs
;
7453 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7454 cs
.selector
= vector
<< 8;
7455 cs
.base
= vector
<< 12;
7456 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7457 kvm_rip_write(vcpu
, 0);
7460 int kvm_arch_hardware_enable(void)
7463 struct kvm_vcpu
*vcpu
;
7468 bool stable
, backwards_tsc
= false;
7470 kvm_shared_msr_cpu_online();
7471 ret
= kvm_x86_ops
->hardware_enable();
7475 local_tsc
= rdtsc();
7476 stable
= !check_tsc_unstable();
7477 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7478 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7479 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7480 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7481 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7482 backwards_tsc
= true;
7483 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7484 max_tsc
= vcpu
->arch
.last_host_tsc
;
7490 * Sometimes, even reliable TSCs go backwards. This happens on
7491 * platforms that reset TSC during suspend or hibernate actions, but
7492 * maintain synchronization. We must compensate. Fortunately, we can
7493 * detect that condition here, which happens early in CPU bringup,
7494 * before any KVM threads can be running. Unfortunately, we can't
7495 * bring the TSCs fully up to date with real time, as we aren't yet far
7496 * enough into CPU bringup that we know how much real time has actually
7497 * elapsed; our helper function, get_kernel_ns() will be using boot
7498 * variables that haven't been updated yet.
7500 * So we simply find the maximum observed TSC above, then record the
7501 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7502 * the adjustment will be applied. Note that we accumulate
7503 * adjustments, in case multiple suspend cycles happen before some VCPU
7504 * gets a chance to run again. In the event that no KVM threads get a
7505 * chance to run, we will miss the entire elapsed period, as we'll have
7506 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7507 * loose cycle time. This isn't too big a deal, since the loss will be
7508 * uniform across all VCPUs (not to mention the scenario is extremely
7509 * unlikely). It is possible that a second hibernate recovery happens
7510 * much faster than a first, causing the observed TSC here to be
7511 * smaller; this would require additional padding adjustment, which is
7512 * why we set last_host_tsc to the local tsc observed here.
7514 * N.B. - this code below runs only on platforms with reliable TSC,
7515 * as that is the only way backwards_tsc is set above. Also note
7516 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7517 * have the same delta_cyc adjustment applied if backwards_tsc
7518 * is detected. Note further, this adjustment is only done once,
7519 * as we reset last_host_tsc on all VCPUs to stop this from being
7520 * called multiple times (one for each physical CPU bringup).
7522 * Platforms with unreliable TSCs don't have to deal with this, they
7523 * will be compensated by the logic in vcpu_load, which sets the TSC to
7524 * catchup mode. This will catchup all VCPUs to real time, but cannot
7525 * guarantee that they stay in perfect synchronization.
7527 if (backwards_tsc
) {
7528 u64 delta_cyc
= max_tsc
- local_tsc
;
7529 backwards_tsc_observed
= true;
7530 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7531 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7532 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7533 vcpu
->arch
.last_host_tsc
= local_tsc
;
7534 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7538 * We have to disable TSC offset matching.. if you were
7539 * booting a VM while issuing an S4 host suspend....
7540 * you may have some problem. Solving this issue is
7541 * left as an exercise to the reader.
7543 kvm
->arch
.last_tsc_nsec
= 0;
7544 kvm
->arch
.last_tsc_write
= 0;
7551 void kvm_arch_hardware_disable(void)
7553 kvm_x86_ops
->hardware_disable();
7554 drop_user_return_notifiers();
7557 int kvm_arch_hardware_setup(void)
7561 r
= kvm_x86_ops
->hardware_setup();
7565 if (kvm_has_tsc_control
) {
7567 * Make sure the user can only configure tsc_khz values that
7568 * fit into a signed integer.
7569 * A min value is not calculated needed because it will always
7570 * be 1 on all machines.
7572 u64 max
= min(0x7fffffffULL
,
7573 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
7574 kvm_max_guest_tsc_khz
= max
;
7576 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
7579 kvm_init_msr_list();
7583 void kvm_arch_hardware_unsetup(void)
7585 kvm_x86_ops
->hardware_unsetup();
7588 void kvm_arch_check_processor_compat(void *rtn
)
7590 kvm_x86_ops
->check_processor_compatibility(rtn
);
7593 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
7595 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
7597 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
7599 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
7601 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
7604 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
7606 return irqchip_in_kernel(vcpu
->kvm
) == lapic_in_kernel(vcpu
);
7609 struct static_key kvm_no_apic_vcpu __read_mostly
;
7610 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
7612 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7618 BUG_ON(vcpu
->kvm
== NULL
);
7621 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv();
7622 vcpu
->arch
.pv
.pv_unhalted
= false;
7623 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7624 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
7625 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7627 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7629 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7634 vcpu
->arch
.pio_data
= page_address(page
);
7636 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7638 r
= kvm_mmu_create(vcpu
);
7640 goto fail_free_pio_data
;
7642 if (irqchip_in_kernel(kvm
)) {
7643 r
= kvm_create_lapic(vcpu
);
7645 goto fail_mmu_destroy
;
7647 static_key_slow_inc(&kvm_no_apic_vcpu
);
7649 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7651 if (!vcpu
->arch
.mce_banks
) {
7653 goto fail_free_lapic
;
7655 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7657 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7659 goto fail_free_mce_banks
;
7664 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7665 vcpu
->arch
.pv_time_enabled
= false;
7667 vcpu
->arch
.guest_supported_xcr0
= 0;
7668 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7670 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
7672 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
7674 kvm_async_pf_hash_reset(vcpu
);
7677 vcpu
->arch
.pending_external_vector
= -1;
7679 kvm_hv_vcpu_init(vcpu
);
7683 fail_free_mce_banks
:
7684 kfree(vcpu
->arch
.mce_banks
);
7686 kvm_free_lapic(vcpu
);
7688 kvm_mmu_destroy(vcpu
);
7690 free_page((unsigned long)vcpu
->arch
.pio_data
);
7695 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
7699 kvm_hv_vcpu_uninit(vcpu
);
7700 kvm_pmu_destroy(vcpu
);
7701 kfree(vcpu
->arch
.mce_banks
);
7702 kvm_free_lapic(vcpu
);
7703 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7704 kvm_mmu_destroy(vcpu
);
7705 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7706 free_page((unsigned long)vcpu
->arch
.pio_data
);
7707 if (!lapic_in_kernel(vcpu
))
7708 static_key_slow_dec(&kvm_no_apic_vcpu
);
7711 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
7713 kvm_x86_ops
->sched_in(vcpu
, cpu
);
7716 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
7721 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
7722 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7723 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7724 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
7725 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
7727 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7728 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
7729 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7730 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
7731 &kvm
->arch
.irq_sources_bitmap
);
7733 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
7734 mutex_init(&kvm
->arch
.apic_map_lock
);
7735 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
7737 pvclock_update_vm_gtod_copy(kvm
);
7739 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
7740 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
7742 kvm_page_track_init(kvm
);
7743 kvm_mmu_init_vm(kvm
);
7748 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
7751 r
= vcpu_load(vcpu
);
7753 kvm_mmu_unload(vcpu
);
7757 static void kvm_free_vcpus(struct kvm
*kvm
)
7760 struct kvm_vcpu
*vcpu
;
7763 * Unpin any mmu pages first.
7765 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7766 kvm_clear_async_pf_completion_queue(vcpu
);
7767 kvm_unload_vcpu_mmu(vcpu
);
7769 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7770 kvm_arch_vcpu_free(vcpu
);
7772 mutex_lock(&kvm
->lock
);
7773 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
7774 kvm
->vcpus
[i
] = NULL
;
7776 atomic_set(&kvm
->online_vcpus
, 0);
7777 mutex_unlock(&kvm
->lock
);
7780 void kvm_arch_sync_events(struct kvm
*kvm
)
7782 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
7783 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
7784 kvm_free_all_assigned_devices(kvm
);
7788 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
7792 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
7793 struct kvm_memory_slot
*slot
, old
;
7795 /* Called with kvm->slots_lock held. */
7796 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
7799 slot
= id_to_memslot(slots
, id
);
7801 if (WARN_ON(slot
->npages
))
7805 * MAP_SHARED to prevent internal slot pages from being moved
7808 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
7809 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7810 if (IS_ERR((void *)hva
))
7811 return PTR_ERR((void *)hva
);
7820 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
7821 struct kvm_userspace_memory_region m
;
7823 m
.slot
= id
| (i
<< 16);
7825 m
.guest_phys_addr
= gpa
;
7826 m
.userspace_addr
= hva
;
7827 m
.memory_size
= size
;
7828 r
= __kvm_set_memory_region(kvm
, &m
);
7834 r
= vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
7840 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
7842 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
7846 mutex_lock(&kvm
->slots_lock
);
7847 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
7848 mutex_unlock(&kvm
->slots_lock
);
7852 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
7854 void kvm_arch_destroy_vm(struct kvm
*kvm
)
7856 if (current
->mm
== kvm
->mm
) {
7858 * Free memory regions allocated on behalf of userspace,
7859 * unless the the memory map has changed due to process exit
7862 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
7863 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
7864 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
7866 kvm_iommu_unmap_guest(kvm
);
7867 kfree(kvm
->arch
.vpic
);
7868 kfree(kvm
->arch
.vioapic
);
7869 kvm_free_vcpus(kvm
);
7870 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
7871 kvm_mmu_uninit_vm(kvm
);
7874 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
7875 struct kvm_memory_slot
*dont
)
7879 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7880 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
7881 kvfree(free
->arch
.rmap
[i
]);
7882 free
->arch
.rmap
[i
] = NULL
;
7887 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
7888 dont
->arch
.lpage_info
[i
- 1]) {
7889 kvfree(free
->arch
.lpage_info
[i
- 1]);
7890 free
->arch
.lpage_info
[i
- 1] = NULL
;
7894 kvm_page_track_free_memslot(free
, dont
);
7897 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
7898 unsigned long npages
)
7902 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7903 struct kvm_lpage_info
*linfo
;
7908 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
7909 slot
->base_gfn
, level
) + 1;
7911 slot
->arch
.rmap
[i
] =
7912 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
7913 if (!slot
->arch
.rmap
[i
])
7918 linfo
= kvm_kvzalloc(lpages
* sizeof(*linfo
));
7922 slot
->arch
.lpage_info
[i
- 1] = linfo
;
7924 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
7925 linfo
[0].disallow_lpage
= 1;
7926 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
7927 linfo
[lpages
- 1].disallow_lpage
= 1;
7928 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
7930 * If the gfn and userspace address are not aligned wrt each
7931 * other, or if explicitly asked to, disable large page
7932 * support for this slot
7934 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
7935 !kvm_largepages_enabled()) {
7938 for (j
= 0; j
< lpages
; ++j
)
7939 linfo
[j
].disallow_lpage
= 1;
7943 if (kvm_page_track_create_memslot(slot
, npages
))
7949 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7950 kvfree(slot
->arch
.rmap
[i
]);
7951 slot
->arch
.rmap
[i
] = NULL
;
7955 kvfree(slot
->arch
.lpage_info
[i
- 1]);
7956 slot
->arch
.lpage_info
[i
- 1] = NULL
;
7961 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
7964 * memslots->generation has been incremented.
7965 * mmio generation may have reached its maximum value.
7967 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
7970 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
7971 struct kvm_memory_slot
*memslot
,
7972 const struct kvm_userspace_memory_region
*mem
,
7973 enum kvm_mr_change change
)
7978 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
7979 struct kvm_memory_slot
*new)
7981 /* Still write protect RO slot */
7982 if (new->flags
& KVM_MEM_READONLY
) {
7983 kvm_mmu_slot_remove_write_access(kvm
, new);
7988 * Call kvm_x86_ops dirty logging hooks when they are valid.
7990 * kvm_x86_ops->slot_disable_log_dirty is called when:
7992 * - KVM_MR_CREATE with dirty logging is disabled
7993 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7995 * The reason is, in case of PML, we need to set D-bit for any slots
7996 * with dirty logging disabled in order to eliminate unnecessary GPA
7997 * logging in PML buffer (and potential PML buffer full VMEXT). This
7998 * guarantees leaving PML enabled during guest's lifetime won't have
7999 * any additonal overhead from PML when guest is running with dirty
8000 * logging disabled for memory slots.
8002 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8003 * to dirty logging mode.
8005 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8007 * In case of write protect:
8009 * Write protect all pages for dirty logging.
8011 * All the sptes including the large sptes which point to this
8012 * slot are set to readonly. We can not create any new large
8013 * spte on this slot until the end of the logging.
8015 * See the comments in fast_page_fault().
8017 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8018 if (kvm_x86_ops
->slot_enable_log_dirty
)
8019 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8021 kvm_mmu_slot_remove_write_access(kvm
, new);
8023 if (kvm_x86_ops
->slot_disable_log_dirty
)
8024 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8028 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8029 const struct kvm_userspace_memory_region
*mem
,
8030 const struct kvm_memory_slot
*old
,
8031 const struct kvm_memory_slot
*new,
8032 enum kvm_mr_change change
)
8034 int nr_mmu_pages
= 0;
8036 if (!kvm
->arch
.n_requested_mmu_pages
)
8037 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8040 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8043 * Dirty logging tracks sptes in 4k granularity, meaning that large
8044 * sptes have to be split. If live migration is successful, the guest
8045 * in the source machine will be destroyed and large sptes will be
8046 * created in the destination. However, if the guest continues to run
8047 * in the source machine (for example if live migration fails), small
8048 * sptes will remain around and cause bad performance.
8050 * Scan sptes if dirty logging has been stopped, dropping those
8051 * which can be collapsed into a single large-page spte. Later
8052 * page faults will create the large-page sptes.
8054 if ((change
!= KVM_MR_DELETE
) &&
8055 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8056 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8057 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8060 * Set up write protection and/or dirty logging for the new slot.
8062 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8063 * been zapped so no dirty logging staff is needed for old slot. For
8064 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8065 * new and it's also covered when dealing with the new slot.
8067 * FIXME: const-ify all uses of struct kvm_memory_slot.
8069 if (change
!= KVM_MR_DELETE
)
8070 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8073 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8075 kvm_mmu_invalidate_zap_all_pages(kvm
);
8078 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8079 struct kvm_memory_slot
*slot
)
8081 kvm_mmu_invalidate_zap_all_pages(kvm
);
8084 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8086 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8089 if (kvm_apic_has_events(vcpu
))
8092 if (vcpu
->arch
.pv
.pv_unhalted
)
8095 if (atomic_read(&vcpu
->arch
.nmi_queued
))
8098 if (test_bit(KVM_REQ_SMI
, &vcpu
->requests
))
8101 if (kvm_arch_interrupt_allowed(vcpu
) &&
8102 kvm_cpu_has_interrupt(vcpu
))
8105 if (kvm_hv_has_stimer_pending(vcpu
))
8111 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8113 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
8114 kvm_x86_ops
->check_nested_events(vcpu
, false);
8116 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8119 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8121 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8124 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8126 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8129 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8131 if (is_64_bit_mode(vcpu
))
8132 return kvm_rip_read(vcpu
);
8133 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8134 kvm_rip_read(vcpu
));
8136 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8138 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8140 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8142 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8144 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8146 unsigned long rflags
;
8148 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8149 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8150 rflags
&= ~X86_EFLAGS_TF
;
8153 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8155 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8157 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8158 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8159 rflags
|= X86_EFLAGS_TF
;
8160 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8163 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8165 __kvm_set_rflags(vcpu
, rflags
);
8166 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8168 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8170 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8174 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8178 r
= kvm_mmu_reload(vcpu
);
8182 if (!vcpu
->arch
.mmu
.direct_map
&&
8183 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8186 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8189 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8191 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8194 static inline u32
kvm_async_pf_next_probe(u32 key
)
8196 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8199 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8201 u32 key
= kvm_async_pf_hash_fn(gfn
);
8203 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8204 key
= kvm_async_pf_next_probe(key
);
8206 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8209 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8212 u32 key
= kvm_async_pf_hash_fn(gfn
);
8214 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8215 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8216 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8217 key
= kvm_async_pf_next_probe(key
);
8222 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8224 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8227 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8231 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8233 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8235 j
= kvm_async_pf_next_probe(j
);
8236 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8238 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8240 * k lies cyclically in ]i,j]
8242 * |....j i.k.| or |.k..j i...|
8244 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8245 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8250 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8253 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8257 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8258 struct kvm_async_pf
*work
)
8260 struct x86_exception fault
;
8262 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8263 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8265 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8266 (vcpu
->arch
.apf
.send_user_only
&&
8267 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8268 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8269 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8270 fault
.vector
= PF_VECTOR
;
8271 fault
.error_code_valid
= true;
8272 fault
.error_code
= 0;
8273 fault
.nested_page_fault
= false;
8274 fault
.address
= work
->arch
.token
;
8275 kvm_inject_page_fault(vcpu
, &fault
);
8279 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8280 struct kvm_async_pf
*work
)
8282 struct x86_exception fault
;
8284 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8285 if (work
->wakeup_all
)
8286 work
->arch
.token
= ~0; /* broadcast wakeup */
8288 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8290 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
8291 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8292 fault
.vector
= PF_VECTOR
;
8293 fault
.error_code_valid
= true;
8294 fault
.error_code
= 0;
8295 fault
.nested_page_fault
= false;
8296 fault
.address
= work
->arch
.token
;
8297 kvm_inject_page_fault(vcpu
, &fault
);
8299 vcpu
->arch
.apf
.halted
= false;
8300 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8303 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8305 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8308 return !kvm_event_needs_reinjection(vcpu
) &&
8309 kvm_x86_ops
->interrupt_allowed(vcpu
);
8312 void kvm_arch_start_assignment(struct kvm
*kvm
)
8314 atomic_inc(&kvm
->arch
.assigned_device_count
);
8316 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8318 void kvm_arch_end_assignment(struct kvm
*kvm
)
8320 atomic_dec(&kvm
->arch
.assigned_device_count
);
8322 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8324 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8326 return atomic_read(&kvm
->arch
.assigned_device_count
);
8328 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8330 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8332 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8334 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8336 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8338 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8340 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8342 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8344 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8346 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8348 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8349 struct irq_bypass_producer
*prod
)
8351 struct kvm_kernel_irqfd
*irqfd
=
8352 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8354 if (kvm_x86_ops
->update_pi_irte
) {
8355 irqfd
->producer
= prod
;
8356 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8357 prod
->irq
, irqfd
->gsi
, 1);
8363 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
8364 struct irq_bypass_producer
*prod
)
8367 struct kvm_kernel_irqfd
*irqfd
=
8368 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8370 if (!kvm_x86_ops
->update_pi_irte
) {
8371 WARN_ON(irqfd
->producer
!= NULL
);
8375 WARN_ON(irqfd
->producer
!= prod
);
8376 irqfd
->producer
= NULL
;
8379 * When producer of consumer is unregistered, we change back to
8380 * remapped mode, so we can re-use the current implementation
8381 * when the irq is masked/disabed or the consumer side (KVM
8382 * int this case doesn't want to receive the interrupts.
8384 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
8386 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
8387 " fails: %d\n", irqfd
->consumer
.token
, ret
);
8390 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
8391 uint32_t guest_irq
, bool set
)
8393 if (!kvm_x86_ops
->update_pi_irte
)
8396 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
8399 bool kvm_vector_hashing_enabled(void)
8401 return vector_hashing
;
8403 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
8405 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8406 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
8407 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8408 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8409 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8410 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8411 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8412 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8413 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8414 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8415 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8416 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8417 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8418 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8419 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8420 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
8421 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);