30d12afe52ed173b2a81720cd5c89c24e667de2a
[deliverable/linux.git] / arch / x86 / xen / enlighten.c
1 /*
2 * Core of Xen paravirt_ops implementation.
3 *
4 * This file contains the xen_paravirt_ops structure itself, and the
5 * implementations for:
6 * - privileged instructions
7 * - interrupt flags
8 * - segment operations
9 * - booting and setup
10 *
11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
12 */
13
14 #include <linux/cpu.h>
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/smp.h>
18 #include <linux/preempt.h>
19 #include <linux/hardirq.h>
20 #include <linux/percpu.h>
21 #include <linux/delay.h>
22 #include <linux/start_kernel.h>
23 #include <linux/sched.h>
24 #include <linux/kprobes.h>
25 #include <linux/bootmem.h>
26 #include <linux/module.h>
27 #include <linux/mm.h>
28 #include <linux/page-flags.h>
29 #include <linux/highmem.h>
30 #include <linux/console.h>
31 #include <linux/pci.h>
32 #include <linux/gfp.h>
33 #include <linux/memblock.h>
34 #include <linux/edd.h>
35
36 #include <xen/xen.h>
37 #include <xen/events.h>
38 #include <xen/interface/xen.h>
39 #include <xen/interface/version.h>
40 #include <xen/interface/physdev.h>
41 #include <xen/interface/vcpu.h>
42 #include <xen/interface/memory.h>
43 #include <xen/interface/nmi.h>
44 #include <xen/interface/xen-mca.h>
45 #include <xen/features.h>
46 #include <xen/page.h>
47 #include <xen/hvm.h>
48 #include <xen/hvc-console.h>
49 #include <xen/acpi.h>
50
51 #include <asm/paravirt.h>
52 #include <asm/apic.h>
53 #include <asm/page.h>
54 #include <asm/xen/pci.h>
55 #include <asm/xen/hypercall.h>
56 #include <asm/xen/hypervisor.h>
57 #include <asm/fixmap.h>
58 #include <asm/processor.h>
59 #include <asm/proto.h>
60 #include <asm/msr-index.h>
61 #include <asm/traps.h>
62 #include <asm/setup.h>
63 #include <asm/desc.h>
64 #include <asm/pgalloc.h>
65 #include <asm/pgtable.h>
66 #include <asm/tlbflush.h>
67 #include <asm/reboot.h>
68 #include <asm/stackprotector.h>
69 #include <asm/hypervisor.h>
70 #include <asm/mach_traps.h>
71 #include <asm/mwait.h>
72 #include <asm/pci_x86.h>
73 #include <asm/pat.h>
74
75 #ifdef CONFIG_ACPI
76 #include <linux/acpi.h>
77 #include <asm/acpi.h>
78 #include <acpi/pdc_intel.h>
79 #include <acpi/processor.h>
80 #include <xen/interface/platform.h>
81 #endif
82
83 #include "xen-ops.h"
84 #include "mmu.h"
85 #include "smp.h"
86 #include "multicalls.h"
87 #include "pmu.h"
88
89 EXPORT_SYMBOL_GPL(hypercall_page);
90
91 /*
92 * Pointer to the xen_vcpu_info structure or
93 * &HYPERVISOR_shared_info->vcpu_info[cpu]. See xen_hvm_init_shared_info
94 * and xen_vcpu_setup for details. By default it points to share_info->vcpu_info
95 * but if the hypervisor supports VCPUOP_register_vcpu_info then it can point
96 * to xen_vcpu_info. The pointer is used in __xen_evtchn_do_upcall to
97 * acknowledge pending events.
98 * Also more subtly it is used by the patched version of irq enable/disable
99 * e.g. xen_irq_enable_direct and xen_iret in PV mode.
100 *
101 * The desire to be able to do those mask/unmask operations as a single
102 * instruction by using the per-cpu offset held in %gs is the real reason
103 * vcpu info is in a per-cpu pointer and the original reason for this
104 * hypercall.
105 *
106 */
107 DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
108
109 /*
110 * Per CPU pages used if hypervisor supports VCPUOP_register_vcpu_info
111 * hypercall. This can be used both in PV and PVHVM mode. The structure
112 * overrides the default per_cpu(xen_vcpu, cpu) value.
113 */
114 DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
115
116 enum xen_domain_type xen_domain_type = XEN_NATIVE;
117 EXPORT_SYMBOL_GPL(xen_domain_type);
118
119 unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START;
120 EXPORT_SYMBOL(machine_to_phys_mapping);
121 unsigned long machine_to_phys_nr;
122 EXPORT_SYMBOL(machine_to_phys_nr);
123
124 struct start_info *xen_start_info;
125 EXPORT_SYMBOL_GPL(xen_start_info);
126
127 struct shared_info xen_dummy_shared_info;
128
129 void *xen_initial_gdt;
130
131 RESERVE_BRK(shared_info_page_brk, PAGE_SIZE);
132 __read_mostly int xen_have_vector_callback;
133 EXPORT_SYMBOL_GPL(xen_have_vector_callback);
134
135 /*
136 * Point at some empty memory to start with. We map the real shared_info
137 * page as soon as fixmap is up and running.
138 */
139 struct shared_info *HYPERVISOR_shared_info = &xen_dummy_shared_info;
140
141 /*
142 * Flag to determine whether vcpu info placement is available on all
143 * VCPUs. We assume it is to start with, and then set it to zero on
144 * the first failure. This is because it can succeed on some VCPUs
145 * and not others, since it can involve hypervisor memory allocation,
146 * or because the guest failed to guarantee all the appropriate
147 * constraints on all VCPUs (ie buffer can't cross a page boundary).
148 *
149 * Note that any particular CPU may be using a placed vcpu structure,
150 * but we can only optimise if the all are.
151 *
152 * 0: not available, 1: available
153 */
154 static int have_vcpu_info_placement = 1;
155
156 struct tls_descs {
157 struct desc_struct desc[3];
158 };
159
160 /*
161 * Updating the 3 TLS descriptors in the GDT on every task switch is
162 * surprisingly expensive so we avoid updating them if they haven't
163 * changed. Since Xen writes different descriptors than the one
164 * passed in the update_descriptor hypercall we keep shadow copies to
165 * compare against.
166 */
167 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc);
168
169 static void clamp_max_cpus(void)
170 {
171 #ifdef CONFIG_SMP
172 if (setup_max_cpus > MAX_VIRT_CPUS)
173 setup_max_cpus = MAX_VIRT_CPUS;
174 #endif
175 }
176
177 static void xen_vcpu_setup(int cpu)
178 {
179 struct vcpu_register_vcpu_info info;
180 int err;
181 struct vcpu_info *vcpup;
182
183 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
184
185 /*
186 * This path is called twice on PVHVM - first during bootup via
187 * smp_init -> xen_hvm_cpu_notify, and then if the VCPU is being
188 * hotplugged: cpu_up -> xen_hvm_cpu_notify.
189 * As we can only do the VCPUOP_register_vcpu_info once lets
190 * not over-write its result.
191 *
192 * For PV it is called during restore (xen_vcpu_restore) and bootup
193 * (xen_setup_vcpu_info_placement). The hotplug mechanism does not
194 * use this function.
195 */
196 if (xen_hvm_domain()) {
197 if (per_cpu(xen_vcpu, cpu) == &per_cpu(xen_vcpu_info, cpu))
198 return;
199 }
200 if (cpu < MAX_VIRT_CPUS)
201 per_cpu(xen_vcpu,cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
202
203 if (!have_vcpu_info_placement) {
204 if (cpu >= MAX_VIRT_CPUS)
205 clamp_max_cpus();
206 return;
207 }
208
209 vcpup = &per_cpu(xen_vcpu_info, cpu);
210 info.mfn = arbitrary_virt_to_mfn(vcpup);
211 info.offset = offset_in_page(vcpup);
212
213 /* Check to see if the hypervisor will put the vcpu_info
214 structure where we want it, which allows direct access via
215 a percpu-variable.
216 N.B. This hypercall can _only_ be called once per CPU. Subsequent
217 calls will error out with -EINVAL. This is due to the fact that
218 hypervisor has no unregister variant and this hypercall does not
219 allow to over-write info.mfn and info.offset.
220 */
221 err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info);
222
223 if (err) {
224 printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err);
225 have_vcpu_info_placement = 0;
226 clamp_max_cpus();
227 } else {
228 /* This cpu is using the registered vcpu info, even if
229 later ones fail to. */
230 per_cpu(xen_vcpu, cpu) = vcpup;
231 }
232 }
233
234 /*
235 * On restore, set the vcpu placement up again.
236 * If it fails, then we're in a bad state, since
237 * we can't back out from using it...
238 */
239 void xen_vcpu_restore(void)
240 {
241 int cpu;
242
243 for_each_possible_cpu(cpu) {
244 bool other_cpu = (cpu != smp_processor_id());
245 bool is_up = HYPERVISOR_vcpu_op(VCPUOP_is_up, cpu, NULL);
246
247 if (other_cpu && is_up &&
248 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
249 BUG();
250
251 xen_setup_runstate_info(cpu);
252
253 if (have_vcpu_info_placement)
254 xen_vcpu_setup(cpu);
255
256 if (other_cpu && is_up &&
257 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
258 BUG();
259 }
260 }
261
262 static void __init xen_banner(void)
263 {
264 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
265 struct xen_extraversion extra;
266 HYPERVISOR_xen_version(XENVER_extraversion, &extra);
267
268 pr_info("Booting paravirtualized kernel %son %s\n",
269 xen_feature(XENFEAT_auto_translated_physmap) ?
270 "with PVH extensions " : "", pv_info.name);
271 printk(KERN_INFO "Xen version: %d.%d%s%s\n",
272 version >> 16, version & 0xffff, extra.extraversion,
273 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
274 }
275 /* Check if running on Xen version (major, minor) or later */
276 bool
277 xen_running_on_version_or_later(unsigned int major, unsigned int minor)
278 {
279 unsigned int version;
280
281 if (!xen_domain())
282 return false;
283
284 version = HYPERVISOR_xen_version(XENVER_version, NULL);
285 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) ||
286 ((version >> 16) > major))
287 return true;
288 return false;
289 }
290
291 #define CPUID_THERM_POWER_LEAF 6
292 #define APERFMPERF_PRESENT 0
293
294 static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0;
295 static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0;
296
297 static __read_mostly unsigned int cpuid_leaf1_ecx_set_mask;
298 static __read_mostly unsigned int cpuid_leaf5_ecx_val;
299 static __read_mostly unsigned int cpuid_leaf5_edx_val;
300
301 static void xen_cpuid(unsigned int *ax, unsigned int *bx,
302 unsigned int *cx, unsigned int *dx)
303 {
304 unsigned maskebx = ~0;
305 unsigned maskecx = ~0;
306 unsigned maskedx = ~0;
307 unsigned setecx = 0;
308 /*
309 * Mask out inconvenient features, to try and disable as many
310 * unsupported kernel subsystems as possible.
311 */
312 switch (*ax) {
313 case 1:
314 maskecx = cpuid_leaf1_ecx_mask;
315 setecx = cpuid_leaf1_ecx_set_mask;
316 maskedx = cpuid_leaf1_edx_mask;
317 break;
318
319 case CPUID_MWAIT_LEAF:
320 /* Synthesize the values.. */
321 *ax = 0;
322 *bx = 0;
323 *cx = cpuid_leaf5_ecx_val;
324 *dx = cpuid_leaf5_edx_val;
325 return;
326
327 case CPUID_THERM_POWER_LEAF:
328 /* Disabling APERFMPERF for kernel usage */
329 maskecx = ~(1 << APERFMPERF_PRESENT);
330 break;
331
332 case 0xb:
333 /* Suppress extended topology stuff */
334 maskebx = 0;
335 break;
336 }
337
338 asm(XEN_EMULATE_PREFIX "cpuid"
339 : "=a" (*ax),
340 "=b" (*bx),
341 "=c" (*cx),
342 "=d" (*dx)
343 : "0" (*ax), "2" (*cx));
344
345 *bx &= maskebx;
346 *cx &= maskecx;
347 *cx |= setecx;
348 *dx &= maskedx;
349
350 }
351
352 static bool __init xen_check_mwait(void)
353 {
354 #ifdef CONFIG_ACPI
355 struct xen_platform_op op = {
356 .cmd = XENPF_set_processor_pminfo,
357 .u.set_pminfo.id = -1,
358 .u.set_pminfo.type = XEN_PM_PDC,
359 };
360 uint32_t buf[3];
361 unsigned int ax, bx, cx, dx;
362 unsigned int mwait_mask;
363
364 /* We need to determine whether it is OK to expose the MWAIT
365 * capability to the kernel to harvest deeper than C3 states from ACPI
366 * _CST using the processor_harvest_xen.c module. For this to work, we
367 * need to gather the MWAIT_LEAF values (which the cstate.c code
368 * checks against). The hypervisor won't expose the MWAIT flag because
369 * it would break backwards compatibility; so we will find out directly
370 * from the hardware and hypercall.
371 */
372 if (!xen_initial_domain())
373 return false;
374
375 /*
376 * When running under platform earlier than Xen4.2, do not expose
377 * mwait, to avoid the risk of loading native acpi pad driver
378 */
379 if (!xen_running_on_version_or_later(4, 2))
380 return false;
381
382 ax = 1;
383 cx = 0;
384
385 native_cpuid(&ax, &bx, &cx, &dx);
386
387 mwait_mask = (1 << (X86_FEATURE_EST % 32)) |
388 (1 << (X86_FEATURE_MWAIT % 32));
389
390 if ((cx & mwait_mask) != mwait_mask)
391 return false;
392
393 /* We need to emulate the MWAIT_LEAF and for that we need both
394 * ecx and edx. The hypercall provides only partial information.
395 */
396
397 ax = CPUID_MWAIT_LEAF;
398 bx = 0;
399 cx = 0;
400 dx = 0;
401
402 native_cpuid(&ax, &bx, &cx, &dx);
403
404 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so,
405 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3.
406 */
407 buf[0] = ACPI_PDC_REVISION_ID;
408 buf[1] = 1;
409 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP);
410
411 set_xen_guest_handle(op.u.set_pminfo.pdc, buf);
412
413 if ((HYPERVISOR_dom0_op(&op) == 0) &&
414 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) {
415 cpuid_leaf5_ecx_val = cx;
416 cpuid_leaf5_edx_val = dx;
417 }
418 return true;
419 #else
420 return false;
421 #endif
422 }
423 static void __init xen_init_cpuid_mask(void)
424 {
425 unsigned int ax, bx, cx, dx;
426 unsigned int xsave_mask;
427
428 cpuid_leaf1_edx_mask =
429 ~((1 << X86_FEATURE_MTRR) | /* disable MTRR */
430 (1 << X86_FEATURE_ACC)); /* thermal monitoring */
431
432 if (!xen_initial_domain())
433 cpuid_leaf1_edx_mask &=
434 ~((1 << X86_FEATURE_ACPI)); /* disable ACPI */
435
436 cpuid_leaf1_ecx_mask &= ~(1 << (X86_FEATURE_X2APIC % 32));
437
438 ax = 1;
439 cx = 0;
440 cpuid(1, &ax, &bx, &cx, &dx);
441
442 xsave_mask =
443 (1 << (X86_FEATURE_XSAVE % 32)) |
444 (1 << (X86_FEATURE_OSXSAVE % 32));
445
446 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */
447 if ((cx & xsave_mask) != xsave_mask)
448 cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */
449 if (xen_check_mwait())
450 cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32));
451 }
452
453 static void xen_set_debugreg(int reg, unsigned long val)
454 {
455 HYPERVISOR_set_debugreg(reg, val);
456 }
457
458 static unsigned long xen_get_debugreg(int reg)
459 {
460 return HYPERVISOR_get_debugreg(reg);
461 }
462
463 static void xen_end_context_switch(struct task_struct *next)
464 {
465 xen_mc_flush();
466 paravirt_end_context_switch(next);
467 }
468
469 static unsigned long xen_store_tr(void)
470 {
471 return 0;
472 }
473
474 /*
475 * Set the page permissions for a particular virtual address. If the
476 * address is a vmalloc mapping (or other non-linear mapping), then
477 * find the linear mapping of the page and also set its protections to
478 * match.
479 */
480 static void set_aliased_prot(void *v, pgprot_t prot)
481 {
482 int level;
483 pte_t *ptep;
484 pte_t pte;
485 unsigned long pfn;
486 struct page *page;
487 unsigned char dummy;
488
489 ptep = lookup_address((unsigned long)v, &level);
490 BUG_ON(ptep == NULL);
491
492 pfn = pte_pfn(*ptep);
493 page = pfn_to_page(pfn);
494
495 pte = pfn_pte(pfn, prot);
496
497 /*
498 * Careful: update_va_mapping() will fail if the virtual address
499 * we're poking isn't populated in the page tables. We don't
500 * need to worry about the direct map (that's always in the page
501 * tables), but we need to be careful about vmap space. In
502 * particular, the top level page table can lazily propagate
503 * entries between processes, so if we've switched mms since we
504 * vmapped the target in the first place, we might not have the
505 * top-level page table entry populated.
506 *
507 * We disable preemption because we want the same mm active when
508 * we probe the target and when we issue the hypercall. We'll
509 * have the same nominal mm, but if we're a kernel thread, lazy
510 * mm dropping could change our pgd.
511 *
512 * Out of an abundance of caution, this uses __get_user() to fault
513 * in the target address just in case there's some obscure case
514 * in which the target address isn't readable.
515 */
516
517 preempt_disable();
518
519 pagefault_disable(); /* Avoid warnings due to being atomic. */
520 __get_user(dummy, (unsigned char __user __force *)v);
521 pagefault_enable();
522
523 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
524 BUG();
525
526 if (!PageHighMem(page)) {
527 void *av = __va(PFN_PHYS(pfn));
528
529 if (av != v)
530 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0))
531 BUG();
532 } else
533 kmap_flush_unused();
534
535 preempt_enable();
536 }
537
538 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
539 {
540 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
541 int i;
542
543 /*
544 * We need to mark the all aliases of the LDT pages RO. We
545 * don't need to call vm_flush_aliases(), though, since that's
546 * only responsible for flushing aliases out the TLBs, not the
547 * page tables, and Xen will flush the TLB for us if needed.
548 *
549 * To avoid confusing future readers: none of this is necessary
550 * to load the LDT. The hypervisor only checks this when the
551 * LDT is faulted in due to subsequent descriptor access.
552 */
553
554 for(i = 0; i < entries; i += entries_per_page)
555 set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
556 }
557
558 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
559 {
560 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
561 int i;
562
563 for(i = 0; i < entries; i += entries_per_page)
564 set_aliased_prot(ldt + i, PAGE_KERNEL);
565 }
566
567 static void xen_set_ldt(const void *addr, unsigned entries)
568 {
569 struct mmuext_op *op;
570 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
571
572 trace_xen_cpu_set_ldt(addr, entries);
573
574 op = mcs.args;
575 op->cmd = MMUEXT_SET_LDT;
576 op->arg1.linear_addr = (unsigned long)addr;
577 op->arg2.nr_ents = entries;
578
579 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
580
581 xen_mc_issue(PARAVIRT_LAZY_CPU);
582 }
583
584 static void xen_load_gdt(const struct desc_ptr *dtr)
585 {
586 unsigned long va = dtr->address;
587 unsigned int size = dtr->size + 1;
588 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
589 unsigned long frames[pages];
590 int f;
591
592 /*
593 * A GDT can be up to 64k in size, which corresponds to 8192
594 * 8-byte entries, or 16 4k pages..
595 */
596
597 BUG_ON(size > 65536);
598 BUG_ON(va & ~PAGE_MASK);
599
600 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
601 int level;
602 pte_t *ptep;
603 unsigned long pfn, mfn;
604 void *virt;
605
606 /*
607 * The GDT is per-cpu and is in the percpu data area.
608 * That can be virtually mapped, so we need to do a
609 * page-walk to get the underlying MFN for the
610 * hypercall. The page can also be in the kernel's
611 * linear range, so we need to RO that mapping too.
612 */
613 ptep = lookup_address(va, &level);
614 BUG_ON(ptep == NULL);
615
616 pfn = pte_pfn(*ptep);
617 mfn = pfn_to_mfn(pfn);
618 virt = __va(PFN_PHYS(pfn));
619
620 frames[f] = mfn;
621
622 make_lowmem_page_readonly((void *)va);
623 make_lowmem_page_readonly(virt);
624 }
625
626 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
627 BUG();
628 }
629
630 /*
631 * load_gdt for early boot, when the gdt is only mapped once
632 */
633 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
634 {
635 unsigned long va = dtr->address;
636 unsigned int size = dtr->size + 1;
637 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
638 unsigned long frames[pages];
639 int f;
640
641 /*
642 * A GDT can be up to 64k in size, which corresponds to 8192
643 * 8-byte entries, or 16 4k pages..
644 */
645
646 BUG_ON(size > 65536);
647 BUG_ON(va & ~PAGE_MASK);
648
649 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
650 pte_t pte;
651 unsigned long pfn, mfn;
652
653 pfn = virt_to_pfn(va);
654 mfn = pfn_to_mfn(pfn);
655
656 pte = pfn_pte(pfn, PAGE_KERNEL_RO);
657
658 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
659 BUG();
660
661 frames[f] = mfn;
662 }
663
664 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
665 BUG();
666 }
667
668 static inline bool desc_equal(const struct desc_struct *d1,
669 const struct desc_struct *d2)
670 {
671 return d1->a == d2->a && d1->b == d2->b;
672 }
673
674 static void load_TLS_descriptor(struct thread_struct *t,
675 unsigned int cpu, unsigned int i)
676 {
677 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i];
678 struct desc_struct *gdt;
679 xmaddr_t maddr;
680 struct multicall_space mc;
681
682 if (desc_equal(shadow, &t->tls_array[i]))
683 return;
684
685 *shadow = t->tls_array[i];
686
687 gdt = get_cpu_gdt_table(cpu);
688 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
689 mc = __xen_mc_entry(0);
690
691 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
692 }
693
694 static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
695 {
696 /*
697 * XXX sleazy hack: If we're being called in a lazy-cpu zone
698 * and lazy gs handling is enabled, it means we're in a
699 * context switch, and %gs has just been saved. This means we
700 * can zero it out to prevent faults on exit from the
701 * hypervisor if the next process has no %gs. Either way, it
702 * has been saved, and the new value will get loaded properly.
703 * This will go away as soon as Xen has been modified to not
704 * save/restore %gs for normal hypercalls.
705 *
706 * On x86_64, this hack is not used for %gs, because gs points
707 * to KERNEL_GS_BASE (and uses it for PDA references), so we
708 * must not zero %gs on x86_64
709 *
710 * For x86_64, we need to zero %fs, otherwise we may get an
711 * exception between the new %fs descriptor being loaded and
712 * %fs being effectively cleared at __switch_to().
713 */
714 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
715 #ifdef CONFIG_X86_32
716 lazy_load_gs(0);
717 #else
718 loadsegment(fs, 0);
719 #endif
720 }
721
722 xen_mc_batch();
723
724 load_TLS_descriptor(t, cpu, 0);
725 load_TLS_descriptor(t, cpu, 1);
726 load_TLS_descriptor(t, cpu, 2);
727
728 xen_mc_issue(PARAVIRT_LAZY_CPU);
729 }
730
731 #ifdef CONFIG_X86_64
732 static void xen_load_gs_index(unsigned int idx)
733 {
734 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
735 BUG();
736 }
737 #endif
738
739 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
740 const void *ptr)
741 {
742 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
743 u64 entry = *(u64 *)ptr;
744
745 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry);
746
747 preempt_disable();
748
749 xen_mc_flush();
750 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
751 BUG();
752
753 preempt_enable();
754 }
755
756 static int cvt_gate_to_trap(int vector, const gate_desc *val,
757 struct trap_info *info)
758 {
759 unsigned long addr;
760
761 if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT)
762 return 0;
763
764 info->vector = vector;
765
766 addr = gate_offset(*val);
767 #ifdef CONFIG_X86_64
768 /*
769 * Look for known traps using IST, and substitute them
770 * appropriately. The debugger ones are the only ones we care
771 * about. Xen will handle faults like double_fault,
772 * so we should never see them. Warn if
773 * there's an unexpected IST-using fault handler.
774 */
775 if (addr == (unsigned long)debug)
776 addr = (unsigned long)xen_debug;
777 else if (addr == (unsigned long)int3)
778 addr = (unsigned long)xen_int3;
779 else if (addr == (unsigned long)stack_segment)
780 addr = (unsigned long)xen_stack_segment;
781 else if (addr == (unsigned long)double_fault) {
782 /* Don't need to handle these */
783 return 0;
784 #ifdef CONFIG_X86_MCE
785 } else if (addr == (unsigned long)machine_check) {
786 /*
787 * when xen hypervisor inject vMCE to guest,
788 * use native mce handler to handle it
789 */
790 ;
791 #endif
792 } else if (addr == (unsigned long)nmi)
793 /*
794 * Use the native version as well.
795 */
796 ;
797 else {
798 /* Some other trap using IST? */
799 if (WARN_ON(val->ist != 0))
800 return 0;
801 }
802 #endif /* CONFIG_X86_64 */
803 info->address = addr;
804
805 info->cs = gate_segment(*val);
806 info->flags = val->dpl;
807 /* interrupt gates clear IF */
808 if (val->type == GATE_INTERRUPT)
809 info->flags |= 1 << 2;
810
811 return 1;
812 }
813
814 /* Locations of each CPU's IDT */
815 static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
816
817 /* Set an IDT entry. If the entry is part of the current IDT, then
818 also update Xen. */
819 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
820 {
821 unsigned long p = (unsigned long)&dt[entrynum];
822 unsigned long start, end;
823
824 trace_xen_cpu_write_idt_entry(dt, entrynum, g);
825
826 preempt_disable();
827
828 start = __this_cpu_read(idt_desc.address);
829 end = start + __this_cpu_read(idt_desc.size) + 1;
830
831 xen_mc_flush();
832
833 native_write_idt_entry(dt, entrynum, g);
834
835 if (p >= start && (p + 8) <= end) {
836 struct trap_info info[2];
837
838 info[1].address = 0;
839
840 if (cvt_gate_to_trap(entrynum, g, &info[0]))
841 if (HYPERVISOR_set_trap_table(info))
842 BUG();
843 }
844
845 preempt_enable();
846 }
847
848 static void xen_convert_trap_info(const struct desc_ptr *desc,
849 struct trap_info *traps)
850 {
851 unsigned in, out, count;
852
853 count = (desc->size+1) / sizeof(gate_desc);
854 BUG_ON(count > 256);
855
856 for (in = out = 0; in < count; in++) {
857 gate_desc *entry = (gate_desc*)(desc->address) + in;
858
859 if (cvt_gate_to_trap(in, entry, &traps[out]))
860 out++;
861 }
862 traps[out].address = 0;
863 }
864
865 void xen_copy_trap_info(struct trap_info *traps)
866 {
867 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc);
868
869 xen_convert_trap_info(desc, traps);
870 }
871
872 /* Load a new IDT into Xen. In principle this can be per-CPU, so we
873 hold a spinlock to protect the static traps[] array (static because
874 it avoids allocation, and saves stack space). */
875 static void xen_load_idt(const struct desc_ptr *desc)
876 {
877 static DEFINE_SPINLOCK(lock);
878 static struct trap_info traps[257];
879
880 trace_xen_cpu_load_idt(desc);
881
882 spin_lock(&lock);
883
884 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc));
885
886 xen_convert_trap_info(desc, traps);
887
888 xen_mc_flush();
889 if (HYPERVISOR_set_trap_table(traps))
890 BUG();
891
892 spin_unlock(&lock);
893 }
894
895 /* Write a GDT descriptor entry. Ignore LDT descriptors, since
896 they're handled differently. */
897 static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
898 const void *desc, int type)
899 {
900 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
901
902 preempt_disable();
903
904 switch (type) {
905 case DESC_LDT:
906 case DESC_TSS:
907 /* ignore */
908 break;
909
910 default: {
911 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
912
913 xen_mc_flush();
914 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
915 BUG();
916 }
917
918 }
919
920 preempt_enable();
921 }
922
923 /*
924 * Version of write_gdt_entry for use at early boot-time needed to
925 * update an entry as simply as possible.
926 */
927 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
928 const void *desc, int type)
929 {
930 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
931
932 switch (type) {
933 case DESC_LDT:
934 case DESC_TSS:
935 /* ignore */
936 break;
937
938 default: {
939 xmaddr_t maddr = virt_to_machine(&dt[entry]);
940
941 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
942 dt[entry] = *(struct desc_struct *)desc;
943 }
944
945 }
946 }
947
948 static void xen_load_sp0(struct tss_struct *tss,
949 struct thread_struct *thread)
950 {
951 struct multicall_space mcs;
952
953 mcs = xen_mc_entry(0);
954 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
955 xen_mc_issue(PARAVIRT_LAZY_CPU);
956 tss->x86_tss.sp0 = thread->sp0;
957 }
958
959 static void xen_set_iopl_mask(unsigned mask)
960 {
961 struct physdev_set_iopl set_iopl;
962
963 /* Force the change at ring 0. */
964 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
965 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
966 }
967
968 static void xen_io_delay(void)
969 {
970 }
971
972 static void xen_clts(void)
973 {
974 struct multicall_space mcs;
975
976 mcs = xen_mc_entry(0);
977
978 MULTI_fpu_taskswitch(mcs.mc, 0);
979
980 xen_mc_issue(PARAVIRT_LAZY_CPU);
981 }
982
983 static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
984
985 static unsigned long xen_read_cr0(void)
986 {
987 unsigned long cr0 = this_cpu_read(xen_cr0_value);
988
989 if (unlikely(cr0 == 0)) {
990 cr0 = native_read_cr0();
991 this_cpu_write(xen_cr0_value, cr0);
992 }
993
994 return cr0;
995 }
996
997 static void xen_write_cr0(unsigned long cr0)
998 {
999 struct multicall_space mcs;
1000
1001 this_cpu_write(xen_cr0_value, cr0);
1002
1003 /* Only pay attention to cr0.TS; everything else is
1004 ignored. */
1005 mcs = xen_mc_entry(0);
1006
1007 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
1008
1009 xen_mc_issue(PARAVIRT_LAZY_CPU);
1010 }
1011
1012 static void xen_write_cr4(unsigned long cr4)
1013 {
1014 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE);
1015
1016 native_write_cr4(cr4);
1017 }
1018 #ifdef CONFIG_X86_64
1019 static inline unsigned long xen_read_cr8(void)
1020 {
1021 return 0;
1022 }
1023 static inline void xen_write_cr8(unsigned long val)
1024 {
1025 BUG_ON(val);
1026 }
1027 #endif
1028
1029 static u64 xen_read_msr_safe(unsigned int msr, int *err)
1030 {
1031 u64 val;
1032
1033 if (pmu_msr_read(msr, &val, err))
1034 return val;
1035
1036 val = native_read_msr_safe(msr, err);
1037 switch (msr) {
1038 case MSR_IA32_APICBASE:
1039 #ifdef CONFIG_X86_X2APIC
1040 if (!(cpuid_ecx(1) & (1 << (X86_FEATURE_X2APIC & 31))))
1041 #endif
1042 val &= ~X2APIC_ENABLE;
1043 break;
1044 }
1045 return val;
1046 }
1047
1048 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
1049 {
1050 int ret;
1051
1052 ret = 0;
1053
1054 switch (msr) {
1055 #ifdef CONFIG_X86_64
1056 unsigned which;
1057 u64 base;
1058
1059 case MSR_FS_BASE: which = SEGBASE_FS; goto set;
1060 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
1061 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
1062
1063 set:
1064 base = ((u64)high << 32) | low;
1065 if (HYPERVISOR_set_segment_base(which, base) != 0)
1066 ret = -EIO;
1067 break;
1068 #endif
1069
1070 case MSR_STAR:
1071 case MSR_CSTAR:
1072 case MSR_LSTAR:
1073 case MSR_SYSCALL_MASK:
1074 case MSR_IA32_SYSENTER_CS:
1075 case MSR_IA32_SYSENTER_ESP:
1076 case MSR_IA32_SYSENTER_EIP:
1077 /* Fast syscall setup is all done in hypercalls, so
1078 these are all ignored. Stub them out here to stop
1079 Xen console noise. */
1080
1081 default:
1082 if (!pmu_msr_write(msr, low, high, &ret))
1083 ret = native_write_msr_safe(msr, low, high);
1084 }
1085
1086 return ret;
1087 }
1088
1089 void xen_setup_shared_info(void)
1090 {
1091 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
1092 set_fixmap(FIX_PARAVIRT_BOOTMAP,
1093 xen_start_info->shared_info);
1094
1095 HYPERVISOR_shared_info =
1096 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
1097 } else
1098 HYPERVISOR_shared_info =
1099 (struct shared_info *)__va(xen_start_info->shared_info);
1100
1101 #ifndef CONFIG_SMP
1102 /* In UP this is as good a place as any to set up shared info */
1103 xen_setup_vcpu_info_placement();
1104 #endif
1105
1106 xen_setup_mfn_list_list();
1107 }
1108
1109 /* This is called once we have the cpu_possible_mask */
1110 void xen_setup_vcpu_info_placement(void)
1111 {
1112 int cpu;
1113
1114 for_each_possible_cpu(cpu)
1115 xen_vcpu_setup(cpu);
1116
1117 /* xen_vcpu_setup managed to place the vcpu_info within the
1118 * percpu area for all cpus, so make use of it. Note that for
1119 * PVH we want to use native IRQ mechanism. */
1120 if (have_vcpu_info_placement && !xen_pvh_domain()) {
1121 pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
1122 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct);
1123 pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
1124 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
1125 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
1126 }
1127 }
1128
1129 static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
1130 unsigned long addr, unsigned len)
1131 {
1132 char *start, *end, *reloc;
1133 unsigned ret;
1134
1135 start = end = reloc = NULL;
1136
1137 #define SITE(op, x) \
1138 case PARAVIRT_PATCH(op.x): \
1139 if (have_vcpu_info_placement) { \
1140 start = (char *)xen_##x##_direct; \
1141 end = xen_##x##_direct_end; \
1142 reloc = xen_##x##_direct_reloc; \
1143 } \
1144 goto patch_site
1145
1146 switch (type) {
1147 SITE(pv_irq_ops, irq_enable);
1148 SITE(pv_irq_ops, irq_disable);
1149 SITE(pv_irq_ops, save_fl);
1150 SITE(pv_irq_ops, restore_fl);
1151 #undef SITE
1152
1153 patch_site:
1154 if (start == NULL || (end-start) > len)
1155 goto default_patch;
1156
1157 ret = paravirt_patch_insns(insnbuf, len, start, end);
1158
1159 /* Note: because reloc is assigned from something that
1160 appears to be an array, gcc assumes it's non-null,
1161 but doesn't know its relationship with start and
1162 end. */
1163 if (reloc > start && reloc < end) {
1164 int reloc_off = reloc - start;
1165 long *relocp = (long *)(insnbuf + reloc_off);
1166 long delta = start - (char *)addr;
1167
1168 *relocp += delta;
1169 }
1170 break;
1171
1172 default_patch:
1173 default:
1174 ret = paravirt_patch_default(type, clobbers, insnbuf,
1175 addr, len);
1176 break;
1177 }
1178
1179 return ret;
1180 }
1181
1182 static const struct pv_info xen_info __initconst = {
1183 .paravirt_enabled = 1,
1184 .shared_kernel_pmd = 0,
1185
1186 #ifdef CONFIG_X86_64
1187 .extra_user_64bit_cs = FLAT_USER_CS64,
1188 #endif
1189
1190 .name = "Xen",
1191 };
1192
1193 static const struct pv_init_ops xen_init_ops __initconst = {
1194 .patch = xen_patch,
1195 };
1196
1197 static const struct pv_cpu_ops xen_cpu_ops __initconst = {
1198 .cpuid = xen_cpuid,
1199
1200 .set_debugreg = xen_set_debugreg,
1201 .get_debugreg = xen_get_debugreg,
1202
1203 .clts = xen_clts,
1204
1205 .read_cr0 = xen_read_cr0,
1206 .write_cr0 = xen_write_cr0,
1207
1208 .read_cr4 = native_read_cr4,
1209 .read_cr4_safe = native_read_cr4_safe,
1210 .write_cr4 = xen_write_cr4,
1211
1212 #ifdef CONFIG_X86_64
1213 .read_cr8 = xen_read_cr8,
1214 .write_cr8 = xen_write_cr8,
1215 #endif
1216
1217 .wbinvd = native_wbinvd,
1218
1219 .read_msr = xen_read_msr_safe,
1220 .write_msr = xen_write_msr_safe,
1221
1222 .read_pmc = xen_read_pmc,
1223
1224 .iret = xen_iret,
1225 #ifdef CONFIG_X86_64
1226 .usergs_sysret32 = xen_sysret32,
1227 .usergs_sysret64 = xen_sysret64,
1228 #else
1229 .irq_enable_sysexit = xen_sysexit,
1230 #endif
1231
1232 .load_tr_desc = paravirt_nop,
1233 .set_ldt = xen_set_ldt,
1234 .load_gdt = xen_load_gdt,
1235 .load_idt = xen_load_idt,
1236 .load_tls = xen_load_tls,
1237 #ifdef CONFIG_X86_64
1238 .load_gs_index = xen_load_gs_index,
1239 #endif
1240
1241 .alloc_ldt = xen_alloc_ldt,
1242 .free_ldt = xen_free_ldt,
1243
1244 .store_idt = native_store_idt,
1245 .store_tr = xen_store_tr,
1246
1247 .write_ldt_entry = xen_write_ldt_entry,
1248 .write_gdt_entry = xen_write_gdt_entry,
1249 .write_idt_entry = xen_write_idt_entry,
1250 .load_sp0 = xen_load_sp0,
1251
1252 .set_iopl_mask = xen_set_iopl_mask,
1253 .io_delay = xen_io_delay,
1254
1255 /* Xen takes care of %gs when switching to usermode for us */
1256 .swapgs = paravirt_nop,
1257
1258 .start_context_switch = paravirt_start_context_switch,
1259 .end_context_switch = xen_end_context_switch,
1260 };
1261
1262 static const struct pv_apic_ops xen_apic_ops __initconst = {
1263 #ifdef CONFIG_X86_LOCAL_APIC
1264 .startup_ipi_hook = paravirt_nop,
1265 #endif
1266 };
1267
1268 static void xen_reboot(int reason)
1269 {
1270 struct sched_shutdown r = { .reason = reason };
1271 int cpu;
1272
1273 for_each_online_cpu(cpu)
1274 xen_pmu_finish(cpu);
1275
1276 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
1277 BUG();
1278 }
1279
1280 static void xen_restart(char *msg)
1281 {
1282 xen_reboot(SHUTDOWN_reboot);
1283 }
1284
1285 static void xen_emergency_restart(void)
1286 {
1287 xen_reboot(SHUTDOWN_reboot);
1288 }
1289
1290 static void xen_machine_halt(void)
1291 {
1292 xen_reboot(SHUTDOWN_poweroff);
1293 }
1294
1295 static void xen_machine_power_off(void)
1296 {
1297 if (pm_power_off)
1298 pm_power_off();
1299 xen_reboot(SHUTDOWN_poweroff);
1300 }
1301
1302 static void xen_crash_shutdown(struct pt_regs *regs)
1303 {
1304 xen_reboot(SHUTDOWN_crash);
1305 }
1306
1307 static int
1308 xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr)
1309 {
1310 xen_reboot(SHUTDOWN_crash);
1311 return NOTIFY_DONE;
1312 }
1313
1314 static struct notifier_block xen_panic_block = {
1315 .notifier_call= xen_panic_event,
1316 .priority = INT_MIN
1317 };
1318
1319 int xen_panic_handler_init(void)
1320 {
1321 atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block);
1322 return 0;
1323 }
1324
1325 static const struct machine_ops xen_machine_ops __initconst = {
1326 .restart = xen_restart,
1327 .halt = xen_machine_halt,
1328 .power_off = xen_machine_power_off,
1329 .shutdown = xen_machine_halt,
1330 .crash_shutdown = xen_crash_shutdown,
1331 .emergency_restart = xen_emergency_restart,
1332 };
1333
1334 static unsigned char xen_get_nmi_reason(void)
1335 {
1336 unsigned char reason = 0;
1337
1338 /* Construct a value which looks like it came from port 0x61. */
1339 if (test_bit(_XEN_NMIREASON_io_error,
1340 &HYPERVISOR_shared_info->arch.nmi_reason))
1341 reason |= NMI_REASON_IOCHK;
1342 if (test_bit(_XEN_NMIREASON_pci_serr,
1343 &HYPERVISOR_shared_info->arch.nmi_reason))
1344 reason |= NMI_REASON_SERR;
1345
1346 return reason;
1347 }
1348
1349 static void __init xen_boot_params_init_edd(void)
1350 {
1351 #if IS_ENABLED(CONFIG_EDD)
1352 struct xen_platform_op op;
1353 struct edd_info *edd_info;
1354 u32 *mbr_signature;
1355 unsigned nr;
1356 int ret;
1357
1358 edd_info = boot_params.eddbuf;
1359 mbr_signature = boot_params.edd_mbr_sig_buffer;
1360
1361 op.cmd = XENPF_firmware_info;
1362
1363 op.u.firmware_info.type = XEN_FW_DISK_INFO;
1364 for (nr = 0; nr < EDDMAXNR; nr++) {
1365 struct edd_info *info = edd_info + nr;
1366
1367 op.u.firmware_info.index = nr;
1368 info->params.length = sizeof(info->params);
1369 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params,
1370 &info->params);
1371 ret = HYPERVISOR_dom0_op(&op);
1372 if (ret)
1373 break;
1374
1375 #define C(x) info->x = op.u.firmware_info.u.disk_info.x
1376 C(device);
1377 C(version);
1378 C(interface_support);
1379 C(legacy_max_cylinder);
1380 C(legacy_max_head);
1381 C(legacy_sectors_per_track);
1382 #undef C
1383 }
1384 boot_params.eddbuf_entries = nr;
1385
1386 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE;
1387 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) {
1388 op.u.firmware_info.index = nr;
1389 ret = HYPERVISOR_dom0_op(&op);
1390 if (ret)
1391 break;
1392 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature;
1393 }
1394 boot_params.edd_mbr_sig_buf_entries = nr;
1395 #endif
1396 }
1397
1398 /*
1399 * Set up the GDT and segment registers for -fstack-protector. Until
1400 * we do this, we have to be careful not to call any stack-protected
1401 * function, which is most of the kernel.
1402 *
1403 * Note, that it is __ref because the only caller of this after init
1404 * is PVH which is not going to use xen_load_gdt_boot or other
1405 * __init functions.
1406 */
1407 static void __ref xen_setup_gdt(int cpu)
1408 {
1409 if (xen_feature(XENFEAT_auto_translated_physmap)) {
1410 #ifdef CONFIG_X86_64
1411 unsigned long dummy;
1412
1413 load_percpu_segment(cpu); /* We need to access per-cpu area */
1414 switch_to_new_gdt(cpu); /* GDT and GS set */
1415
1416 /* We are switching of the Xen provided GDT to our HVM mode
1417 * GDT. The new GDT has __KERNEL_CS with CS.L = 1
1418 * and we are jumping to reload it.
1419 */
1420 asm volatile ("pushq %0\n"
1421 "leaq 1f(%%rip),%0\n"
1422 "pushq %0\n"
1423 "lretq\n"
1424 "1:\n"
1425 : "=&r" (dummy) : "0" (__KERNEL_CS));
1426
1427 /*
1428 * While not needed, we also set the %es, %ds, and %fs
1429 * to zero. We don't care about %ss as it is NULL.
1430 * Strictly speaking this is not needed as Xen zeros those
1431 * out (and also MSR_FS_BASE, MSR_GS_BASE, MSR_KERNEL_GS_BASE)
1432 *
1433 * Linux zeros them in cpu_init() and in secondary_startup_64
1434 * (for BSP).
1435 */
1436 loadsegment(es, 0);
1437 loadsegment(ds, 0);
1438 loadsegment(fs, 0);
1439 #else
1440 /* PVH: TODO Implement. */
1441 BUG();
1442 #endif
1443 return; /* PVH does not need any PV GDT ops. */
1444 }
1445 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot;
1446 pv_cpu_ops.load_gdt = xen_load_gdt_boot;
1447
1448 setup_stack_canary_segment(0);
1449 switch_to_new_gdt(0);
1450
1451 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry;
1452 pv_cpu_ops.load_gdt = xen_load_gdt;
1453 }
1454
1455 #ifdef CONFIG_XEN_PVH
1456 /*
1457 * A PV guest starts with default flags that are not set for PVH, set them
1458 * here asap.
1459 */
1460 static void xen_pvh_set_cr_flags(int cpu)
1461 {
1462
1463 /* Some of these are setup in 'secondary_startup_64'. The others:
1464 * X86_CR0_TS, X86_CR0_PE, X86_CR0_ET are set by Xen for HVM guests
1465 * (which PVH shared codepaths), while X86_CR0_PG is for PVH. */
1466 write_cr0(read_cr0() | X86_CR0_MP | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM);
1467
1468 if (!cpu)
1469 return;
1470 /*
1471 * For BSP, PSE PGE are set in probe_page_size_mask(), for APs
1472 * set them here. For all, OSFXSR OSXMMEXCPT are set in fpu__init_cpu().
1473 */
1474 if (cpu_has_pse)
1475 cr4_set_bits_and_update_boot(X86_CR4_PSE);
1476
1477 if (cpu_has_pge)
1478 cr4_set_bits_and_update_boot(X86_CR4_PGE);
1479 }
1480
1481 /*
1482 * Note, that it is ref - because the only caller of this after init
1483 * is PVH which is not going to use xen_load_gdt_boot or other
1484 * __init functions.
1485 */
1486 void __ref xen_pvh_secondary_vcpu_init(int cpu)
1487 {
1488 xen_setup_gdt(cpu);
1489 xen_pvh_set_cr_flags(cpu);
1490 }
1491
1492 static void __init xen_pvh_early_guest_init(void)
1493 {
1494 if (!xen_feature(XENFEAT_auto_translated_physmap))
1495 return;
1496
1497 if (!xen_feature(XENFEAT_hvm_callback_vector))
1498 return;
1499
1500 xen_have_vector_callback = 1;
1501
1502 xen_pvh_early_cpu_init(0, false);
1503 xen_pvh_set_cr_flags(0);
1504
1505 #ifdef CONFIG_X86_32
1506 BUG(); /* PVH: Implement proper support. */
1507 #endif
1508 }
1509 #endif /* CONFIG_XEN_PVH */
1510
1511 /* First C function to be called on Xen boot */
1512 asmlinkage __visible void __init xen_start_kernel(void)
1513 {
1514 struct physdev_set_iopl set_iopl;
1515 unsigned long initrd_start = 0;
1516 u64 pat;
1517 int rc;
1518
1519 if (!xen_start_info)
1520 return;
1521
1522 xen_domain_type = XEN_PV_DOMAIN;
1523
1524 xen_setup_features();
1525 #ifdef CONFIG_XEN_PVH
1526 xen_pvh_early_guest_init();
1527 #endif
1528 xen_setup_machphys_mapping();
1529
1530 /* Install Xen paravirt ops */
1531 pv_info = xen_info;
1532 pv_init_ops = xen_init_ops;
1533 pv_apic_ops = xen_apic_ops;
1534 if (!xen_pvh_domain()) {
1535 pv_cpu_ops = xen_cpu_ops;
1536
1537 x86_platform.get_nmi_reason = xen_get_nmi_reason;
1538 }
1539
1540 if (xen_feature(XENFEAT_auto_translated_physmap))
1541 x86_init.resources.memory_setup = xen_auto_xlated_memory_setup;
1542 else
1543 x86_init.resources.memory_setup = xen_memory_setup;
1544 x86_init.oem.arch_setup = xen_arch_setup;
1545 x86_init.oem.banner = xen_banner;
1546
1547 xen_init_time_ops();
1548
1549 /*
1550 * Set up some pagetable state before starting to set any ptes.
1551 */
1552
1553 xen_init_mmu_ops();
1554
1555 /* Prevent unwanted bits from being set in PTEs. */
1556 __supported_pte_mask &= ~_PAGE_GLOBAL;
1557
1558 /*
1559 * Prevent page tables from being allocated in highmem, even
1560 * if CONFIG_HIGHPTE is enabled.
1561 */
1562 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
1563
1564 /* Work out if we support NX */
1565 x86_configure_nx();
1566
1567 /* Get mfn list */
1568 xen_build_dynamic_phys_to_machine();
1569
1570 /*
1571 * Set up kernel GDT and segment registers, mainly so that
1572 * -fstack-protector code can be executed.
1573 */
1574 xen_setup_gdt(0);
1575
1576 xen_init_irq_ops();
1577 xen_init_cpuid_mask();
1578
1579 #ifdef CONFIG_X86_LOCAL_APIC
1580 /*
1581 * set up the basic apic ops.
1582 */
1583 xen_init_apic();
1584 #endif
1585
1586 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1587 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1588 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1589 }
1590
1591 machine_ops = xen_machine_ops;
1592
1593 /*
1594 * The only reliable way to retain the initial address of the
1595 * percpu gdt_page is to remember it here, so we can go and
1596 * mark it RW later, when the initial percpu area is freed.
1597 */
1598 xen_initial_gdt = &per_cpu(gdt_page, 0);
1599
1600 xen_smp_init();
1601
1602 #ifdef CONFIG_ACPI_NUMA
1603 /*
1604 * The pages we from Xen are not related to machine pages, so
1605 * any NUMA information the kernel tries to get from ACPI will
1606 * be meaningless. Prevent it from trying.
1607 */
1608 acpi_numa = -1;
1609 #endif
1610 /* Don't do the full vcpu_info placement stuff until we have a
1611 possible map and a non-dummy shared_info. */
1612 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
1613
1614 local_irq_disable();
1615 early_boot_irqs_disabled = true;
1616
1617 xen_raw_console_write("mapping kernel into physical memory\n");
1618 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base,
1619 xen_start_info->nr_pages);
1620 xen_reserve_special_pages();
1621
1622 /*
1623 * Modify the cache mode translation tables to match Xen's PAT
1624 * configuration.
1625 */
1626 rdmsrl(MSR_IA32_CR_PAT, pat);
1627 pat_init_cache_modes(pat);
1628
1629 /* keep using Xen gdt for now; no urgent need to change it */
1630
1631 #ifdef CONFIG_X86_32
1632 pv_info.kernel_rpl = 1;
1633 if (xen_feature(XENFEAT_supervisor_mode_kernel))
1634 pv_info.kernel_rpl = 0;
1635 #else
1636 pv_info.kernel_rpl = 0;
1637 #endif
1638 /* set the limit of our address space */
1639 xen_reserve_top();
1640
1641 /* PVH: runs at default kernel iopl of 0 */
1642 if (!xen_pvh_domain()) {
1643 /*
1644 * We used to do this in xen_arch_setup, but that is too late
1645 * on AMD were early_cpu_init (run before ->arch_setup()) calls
1646 * early_amd_init which pokes 0xcf8 port.
1647 */
1648 set_iopl.iopl = 1;
1649 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
1650 if (rc != 0)
1651 xen_raw_printk("physdev_op failed %d\n", rc);
1652 }
1653
1654 #ifdef CONFIG_X86_32
1655 /* set up basic CPUID stuff */
1656 cpu_detect(&new_cpu_data);
1657 set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU);
1658 new_cpu_data.wp_works_ok = 1;
1659 new_cpu_data.x86_capability[0] = cpuid_edx(1);
1660 #endif
1661
1662 if (xen_start_info->mod_start) {
1663 if (xen_start_info->flags & SIF_MOD_START_PFN)
1664 initrd_start = PFN_PHYS(xen_start_info->mod_start);
1665 else
1666 initrd_start = __pa(xen_start_info->mod_start);
1667 }
1668
1669 /* Poke various useful things into boot_params */
1670 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1671 boot_params.hdr.ramdisk_image = initrd_start;
1672 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
1673 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
1674
1675 if (!xen_initial_domain()) {
1676 add_preferred_console("xenboot", 0, NULL);
1677 add_preferred_console("tty", 0, NULL);
1678 add_preferred_console("hvc", 0, NULL);
1679 if (pci_xen)
1680 x86_init.pci.arch_init = pci_xen_init;
1681 } else {
1682 const struct dom0_vga_console_info *info =
1683 (void *)((char *)xen_start_info +
1684 xen_start_info->console.dom0.info_off);
1685 struct xen_platform_op op = {
1686 .cmd = XENPF_firmware_info,
1687 .interface_version = XENPF_INTERFACE_VERSION,
1688 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS,
1689 };
1690
1691 xen_init_vga(info, xen_start_info->console.dom0.info_size);
1692 xen_start_info->console.domU.mfn = 0;
1693 xen_start_info->console.domU.evtchn = 0;
1694
1695 if (HYPERVISOR_dom0_op(&op) == 0)
1696 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags;
1697
1698 /* Make sure ACS will be enabled */
1699 pci_request_acs();
1700
1701 xen_acpi_sleep_register();
1702
1703 /* Avoid searching for BIOS MP tables */
1704 x86_init.mpparse.find_smp_config = x86_init_noop;
1705 x86_init.mpparse.get_smp_config = x86_init_uint_noop;
1706
1707 xen_boot_params_init_edd();
1708 }
1709 #ifdef CONFIG_PCI
1710 /* PCI BIOS service won't work from a PV guest. */
1711 pci_probe &= ~PCI_PROBE_BIOS;
1712 #endif
1713 xen_raw_console_write("about to get started...\n");
1714
1715 xen_setup_runstate_info(0);
1716
1717 xen_efi_init();
1718
1719 /* Start the world */
1720 #ifdef CONFIG_X86_32
1721 i386_start_kernel();
1722 #else
1723 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */
1724 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
1725 #endif
1726 }
1727
1728 void __ref xen_hvm_init_shared_info(void)
1729 {
1730 int cpu;
1731 struct xen_add_to_physmap xatp;
1732 static struct shared_info *shared_info_page = 0;
1733
1734 if (!shared_info_page)
1735 shared_info_page = (struct shared_info *)
1736 extend_brk(PAGE_SIZE, PAGE_SIZE);
1737 xatp.domid = DOMID_SELF;
1738 xatp.idx = 0;
1739 xatp.space = XENMAPSPACE_shared_info;
1740 xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT;
1741 if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp))
1742 BUG();
1743
1744 HYPERVISOR_shared_info = (struct shared_info *)shared_info_page;
1745
1746 /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info
1747 * page, we use it in the event channel upcall and in some pvclock
1748 * related functions. We don't need the vcpu_info placement
1749 * optimizations because we don't use any pv_mmu or pv_irq op on
1750 * HVM.
1751 * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is
1752 * online but xen_hvm_init_shared_info is run at resume time too and
1753 * in that case multiple vcpus might be online. */
1754 for_each_online_cpu(cpu) {
1755 /* Leave it to be NULL. */
1756 if (cpu >= MAX_VIRT_CPUS)
1757 continue;
1758 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
1759 }
1760 }
1761
1762 #ifdef CONFIG_XEN_PVHVM
1763 static void __init init_hvm_pv_info(void)
1764 {
1765 int major, minor;
1766 uint32_t eax, ebx, ecx, edx, pages, msr, base;
1767 u64 pfn;
1768
1769 base = xen_cpuid_base();
1770 cpuid(base + 1, &eax, &ebx, &ecx, &edx);
1771
1772 major = eax >> 16;
1773 minor = eax & 0xffff;
1774 printk(KERN_INFO "Xen version %d.%d.\n", major, minor);
1775
1776 cpuid(base + 2, &pages, &msr, &ecx, &edx);
1777
1778 pfn = __pa(hypercall_page);
1779 wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32));
1780
1781 xen_setup_features();
1782
1783 pv_info.name = "Xen HVM";
1784
1785 xen_domain_type = XEN_HVM_DOMAIN;
1786 }
1787
1788 static int xen_hvm_cpu_notify(struct notifier_block *self, unsigned long action,
1789 void *hcpu)
1790 {
1791 int cpu = (long)hcpu;
1792 switch (action) {
1793 case CPU_UP_PREPARE:
1794 xen_vcpu_setup(cpu);
1795 if (xen_have_vector_callback) {
1796 if (xen_feature(XENFEAT_hvm_safe_pvclock))
1797 xen_setup_timer(cpu);
1798 }
1799 break;
1800 default:
1801 break;
1802 }
1803 return NOTIFY_OK;
1804 }
1805
1806 static struct notifier_block xen_hvm_cpu_notifier = {
1807 .notifier_call = xen_hvm_cpu_notify,
1808 };
1809
1810 static void __init xen_hvm_guest_init(void)
1811 {
1812 if (xen_pv_domain())
1813 return;
1814
1815 init_hvm_pv_info();
1816
1817 xen_hvm_init_shared_info();
1818
1819 xen_panic_handler_init();
1820
1821 if (xen_feature(XENFEAT_hvm_callback_vector))
1822 xen_have_vector_callback = 1;
1823 xen_hvm_smp_init();
1824 register_cpu_notifier(&xen_hvm_cpu_notifier);
1825 xen_unplug_emulated_devices();
1826 x86_init.irqs.intr_init = xen_init_IRQ;
1827 xen_hvm_init_time_ops();
1828 xen_hvm_init_mmu_ops();
1829 }
1830 #endif
1831
1832 static bool xen_nopv = false;
1833 static __init int xen_parse_nopv(char *arg)
1834 {
1835 xen_nopv = true;
1836 return 0;
1837 }
1838 early_param("xen_nopv", xen_parse_nopv);
1839
1840 static uint32_t __init xen_platform(void)
1841 {
1842 if (xen_nopv)
1843 return 0;
1844
1845 return xen_cpuid_base();
1846 }
1847
1848 bool xen_hvm_need_lapic(void)
1849 {
1850 if (xen_nopv)
1851 return false;
1852 if (xen_pv_domain())
1853 return false;
1854 if (!xen_hvm_domain())
1855 return false;
1856 if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback)
1857 return false;
1858 return true;
1859 }
1860 EXPORT_SYMBOL_GPL(xen_hvm_need_lapic);
1861
1862 static void xen_set_cpu_features(struct cpuinfo_x86 *c)
1863 {
1864 if (xen_pv_domain())
1865 clear_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS);
1866 }
1867
1868 const struct hypervisor_x86 x86_hyper_xen = {
1869 .name = "Xen",
1870 .detect = xen_platform,
1871 #ifdef CONFIG_XEN_PVHVM
1872 .init_platform = xen_hvm_guest_init,
1873 #endif
1874 .x2apic_available = xen_x2apic_para_available,
1875 .set_cpu_features = xen_set_cpu_features,
1876 };
1877 EXPORT_SYMBOL(x86_hyper_xen);
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