6 select ARCH_WANT_FRAME_POINTERS
7 select ARCH_WANT_IPC_PARSE_VERSION
8 select BUILDTIME_EXTABLE_SORT
11 select GENERIC_ATOMIC64
12 select GENERIC_CLOCKEVENTS
13 select GENERIC_IRQ_SHOW
14 select GENERIC_PCI_IOMAP
15 select GENERIC_SCHED_CLOCK
16 select HAVE_DEBUG_KMEMLEAK
17 select HAVE_DMA_API_DEBUG
18 select HAVE_EXIT_THREAD
19 select HAVE_FUNCTION_TRACER
20 select HAVE_FUTEX_CMPXCHG if !MMU
21 select HAVE_HW_BREAKPOINT if PERF_EVENTS
22 select HAVE_IRQ_TIME_ACCOUNTING
25 select HAVE_PERF_EVENTS
27 select MODULES_USE_ELF_RELA
29 select PERF_USE_VMALLOC
32 Xtensa processors are 32-bit RISC machines designed by Tensilica
33 primarily for embedded systems. These processors are both
34 configurable and extensible. The Linux port to the Xtensa
35 architecture supports all processor configurations and extensions,
36 with reasonable minimum requirements. The Xtensa Linux project has
37 a home page at <http://www.linux-xtensa.org/>.
39 config RWSEM_XCHGADD_ALGORITHM
42 config GENERIC_HWEIGHT
45 config ARCH_HAS_ILOG2_U32
48 config ARCH_HAS_ILOG2_U64
59 source "kernel/Kconfig.freezer"
61 config LOCKDEP_SUPPORT
64 config STACKTRACE_SUPPORT
67 config TRACE_IRQFLAGS_SUPPORT
73 config VARIANT_IRQ_SWITCH
76 config HAVE_XTENSA_GPIO32
79 menu "Processor type and features"
82 prompt "Xtensa Processor Configuration"
83 default XTENSA_VARIANT_FSF
85 config XTENSA_VARIANT_FSF
86 bool "fsf - default (not generic) configuration"
89 config XTENSA_VARIANT_DC232B
90 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
92 select HAVE_XTENSA_GPIO32
94 This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE).
96 config XTENSA_VARIANT_DC233C
97 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
99 select HAVE_XTENSA_GPIO32
101 This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE).
103 config XTENSA_VARIANT_CUSTOM
104 bool "Custom Xtensa processor configuration"
105 select HAVE_XTENSA_GPIO32
107 Select this variant to use a custom Xtensa processor configuration.
108 You will be prompted for a processor variant CORENAME.
111 config XTENSA_VARIANT_CUSTOM_NAME
112 string "Xtensa Processor Custom Core Variant Name"
113 depends on XTENSA_VARIANT_CUSTOM
115 Provide the name of a custom Xtensa processor variant.
116 This CORENAME selects arch/xtensa/variant/CORENAME.
117 Dont forget you have to select MMU if you have one.
119 config XTENSA_VARIANT_NAME
121 default "dc232b" if XTENSA_VARIANT_DC232B
122 default "dc233c" if XTENSA_VARIANT_DC233C
123 default "fsf" if XTENSA_VARIANT_FSF
124 default XTENSA_VARIANT_CUSTOM_NAME if XTENSA_VARIANT_CUSTOM
126 config XTENSA_VARIANT_MMU
127 bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)"
128 depends on XTENSA_VARIANT_CUSTOM
132 Build a Conventional Kernel with full MMU support,
133 ie: it supports a TLB with auto-loading, page protection.
135 config XTENSA_VARIANT_HAVE_PERF_EVENTS
136 bool "Core variant has Performance Monitor Module"
137 depends on XTENSA_VARIANT_CUSTOM
140 Enable if core variant has Performance Monitor Module with
141 External Registers Interface.
145 config XTENSA_FAKE_NMI
146 bool "Treat PMM IRQ as NMI"
147 depends on XTENSA_VARIANT_HAVE_PERF_EVENTS
150 If PMM IRQ is the only IRQ at EXCM level it is safe to
151 treat it as NMI, which improves accuracy of profiling.
153 If there are other interrupts at or above PMM IRQ priority level
154 but not above the EXCM level, PMM IRQ still may be treated as NMI,
155 but only if these IRQs are not used. There will be a build warning
156 saying that this is not safe, and a bugcheck if one of these IRQs
161 config XTENSA_UNALIGNED_USER
162 bool "Unaligned memory access in use space"
164 The Xtensa architecture currently does not handle unaligned
165 memory accesses in hardware but through an exception handler.
166 Per default, unaligned memory accesses are disabled in user space.
168 Say Y here to enable unaligned memory access in user space.
170 source "kernel/Kconfig.preempt"
173 bool "System Supports SMP (MX)"
174 depends on XTENSA_VARIANT_CUSTOM
177 This option is use to indicate that the system-on-a-chip (SOC)
178 supports Multiprocessing. Multiprocessor support implemented above
179 the CPU core definition and currently needs to be selected manually.
181 Multiprocessor support in implemented with external cache and
182 interrupt controllers.
184 The MX interrupt distributer adds Interprocessor Interrupts
185 and causes the IRQ numbers to be increased by 4 for devices
186 like the open cores ethernet driver and the serial interface.
188 You still have to select "Enable SMP" to enable SMP on this SOC.
191 bool "Enable Symmetric multi-processing support"
193 select GENERIC_SMP_IDLE_THREAD
195 Enabled SMP Software; allows more than one CPU/CORE
196 to be activated during startup.
200 int "Maximum number of CPUs (2-32)"
205 bool "Enable CPU hotplug support"
208 Say Y here to allow turning CPUs off and on. CPUs can be
209 controlled through /sys/devices/system/cpu.
211 Say N if you want to disable CPU hotplug.
213 config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
214 bool "Initialize Xtensa MMU inside the Linux kernel code"
217 Earlier version initialized the MMU in the exception vector
218 before jumping to _startup in head.S and had an advantage that
219 it was possible to place a software breakpoint at 'reset' and
220 then enter your normal kernel breakpoints once the MMU was mapped
221 to the kernel mappings (0XC0000000).
223 This unfortunately doesn't work for U-Boot and likley also wont
224 work for using KEXEC to have a hot kernel ready for doing a
227 So now the MMU is initialized in head.S but it's necessary to
228 use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup.
229 xt-gdb can't place a Software Breakpoint in the 0XD region prior
230 to mapping the MMU and after mapping even if the area of low memory
231 was mapped gdb wouldn't remove the breakpoint on hitting it as the
232 PC wouldn't match. Since Hardware Breakpoints are recommended for
233 Linux configurations it seems reasonable to just assume they exist
234 and leave this older mechanism for unfortunate souls that choose
235 not to follow Tensilica's recommendation.
237 Selecting this will cause U-Boot to set the KERNEL Load and Entry
238 address at 0x00003000 instead of the mapped std of 0xD0003000.
243 hex "Physical address of the KSEG mapping"
244 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU
247 This is the physical address where KSEG is mapped. Please refer to
248 the chosen KSEG layout help for the required address alignment.
249 Unpacked kernel image (including vectors) must be located completely
251 Physical memory below this address is not available to linux.
253 If unsure, leave the default value here.
255 config KERNEL_LOAD_ADDRESS
256 hex "Kernel load address"
259 This is the address where the kernel is loaded.
260 It is virtual address for MMUv2 configurations and physical address
261 for all other configurations.
263 If unsure, leave the default value here.
265 config VECTORS_OFFSET
266 hex "Kernel vectors offset"
269 This is the offset of the kernel image from the relocatable vectors
272 If unsure, leave the default value here.
277 default XTENSA_KSEG_MMU_V2
279 config XTENSA_KSEG_MMU_V2
280 bool "MMUv2: 128MB cached + 128MB uncached"
282 MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting
283 at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000
285 KSEG_PADDR must be aligned to 128MB.
287 config XTENSA_KSEG_256M
288 bool "256MB cached + 256MB uncached"
289 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
291 TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000
292 with cache and to 0xc0000000 without cache.
293 KSEG_PADDR must be aligned to 256MB.
295 config XTENSA_KSEG_512M
296 bool "512MB cached + 512MB uncached"
297 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
299 TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000
300 with cache and to 0xc0000000 without cache.
301 KSEG_PADDR must be aligned to 256MB.
306 bool "High Memory Support"
309 Linux can use the full amount of RAM in the system by
310 default. However, the default MMUv2 setup only maps the
311 lowermost 128 MB of memory linearly to the areas starting
312 at 0xd0000000 (cached) and 0xd8000000 (uncached).
313 When there are more than 128 MB memory in the system not
314 all of it can be "permanently mapped" by the kernel.
315 The physical memory that's not permanently mapped is called
318 If you are compiling a kernel which will never run on a
319 machine with more than 128 MB total physical RAM, answer
324 config FAST_SYSCALL_XTENSA
325 bool "Enable fast atomic syscalls"
328 fast_syscall_xtensa is a syscall that can make atomic operations
329 on UP kernel when processor has no s32c1i support.
331 This syscall is deprecated. It may have issues when called with
332 invalid arguments. It is provided only for backwards compatibility.
333 Only enable it if your userspace software requires it.
337 config FAST_SYSCALL_SPILL_REGISTERS
338 bool "Enable spill registers syscall"
341 fast_syscall_spill_registers is a syscall that spills all active
342 register windows of a calling userspace task onto its stack.
344 This syscall is deprecated. It may have issues when called with
345 invalid arguments. It is provided only for backwards compatibility.
346 Only enable it if your userspace software requires it.
352 config XTENSA_CALIBRATE_CCOUNT
355 On some platforms (XT2000, for example), the CPU clock rate can
356 vary. The frequency can be determined, however, by measuring
357 against a well known, fixed frequency, such as an UART oscillator.
359 config SERIAL_CONSOLE
368 Find out whether you have a PCI motherboard. PCI is the name of a
369 bus system, i.e. the way the CPU talks to the other stuff inside
370 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
371 VESA. If you have PCI, say Y, otherwise N.
373 source "drivers/pci/Kconfig"
377 menu "Platform options"
380 prompt "Xtensa System Type"
381 default XTENSA_PLATFORM_ISS
383 config XTENSA_PLATFORM_ISS
385 select XTENSA_CALIBRATE_CCOUNT
386 select SERIAL_CONSOLE
388 ISS is an acronym for Tensilica's Instruction Set Simulator.
390 config XTENSA_PLATFORM_XT2000
394 XT2000 is the name of Tensilica's feature-rich emulation platform.
395 This hardware is capable of running a full Linux distribution.
397 config XTENSA_PLATFORM_XTFPGA
399 select ETHOC if ETHERNET
400 select PLATFORM_WANT_DEFAULT_MEM if !MMU
401 select SERIAL_CONSOLE
402 select XTENSA_CALIBRATE_CCOUNT
404 XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605).
405 This hardware is capable of running a full Linux distribution.
410 config XTENSA_CPU_CLOCK
411 int "CPU clock rate [MHz]"
412 depends on !XTENSA_CALIBRATE_CCOUNT
415 config GENERIC_CALIBRATE_DELAY
416 bool "Auto calibration of the BogoMIPS value"
418 The BogoMIPS value can easily be derived from the CPU frequency.
421 bool "Default bootloader kernel arguments"
424 string "Initial kernel command string"
425 depends on CMDLINE_BOOL
426 default "console=ttyS0,38400 root=/dev/ram"
428 On some architectures (EBSA110 and CATS), there is currently no way
429 for the boot loader to pass arguments to the kernel. For these
430 architectures, you should supply some command-line options at build
431 time by entering them here. As a minimum, you should specify the
432 memory size and the root device (e.g., mem=64M root=/dev/nfs).
435 bool "Flattened Device Tree support"
437 select OF_EARLY_FLATTREE
438 select OF_RESERVED_MEM
440 Include support for flattened device tree machine descriptions.
443 string "DTB to build into the kernel image"
446 config BLK_DEV_SIMDISK
447 tristate "Host file-based simulated block device support"
449 depends on XTENSA_PLATFORM_ISS && BLOCK
451 Create block devices that map to files in the host file system.
452 Device binding to host file may be changed at runtime via proc
453 interface provided the device is not in use.
455 config BLK_DEV_SIMDISK_COUNT
456 int "Number of host file-based simulated block devices"
458 depends on BLK_DEV_SIMDISK
461 This is the default minimal number of created block devices.
462 Kernel/module parameter 'simdisk_count' may be used to change this
463 value at runtime. More file names (but no more than 10) may be
464 specified as parameters, simdisk_count grows accordingly.
466 config SIMDISK0_FILENAME
467 string "Host filename for the first simulated device"
468 depends on BLK_DEV_SIMDISK = y
471 Attach a first simdisk to a host file. Conventionally, this file
472 contains a root file system.
474 config SIMDISK1_FILENAME
475 string "Host filename for the second simulated device"
476 depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1
479 Another simulated disk in a host file for a buildroot-independent
484 config FORCE_MAX_ZONEORDER
485 int "Maximum zone order"
488 The kernel memory allocator divides physically contiguous memory
489 blocks into "zones", where each zone is a power of two number of
490 pages. This option selects the largest power of two that the kernel
491 keeps in the memory allocator. If you need to allocate very large
492 blocks of physically contiguous memory, then you may need to
495 This config option is actually maximum order plus one. For example,
496 a value of 11 means that the largest free memory block is 2^10 pages.
498 source "drivers/pcmcia/Kconfig"
500 config PLATFORM_WANT_DEFAULT_MEM
503 config DEFAULT_MEM_START
504 hex "Physical address of the default memory area start"
505 depends on PLATFORM_WANT_DEFAULT_MEM
506 default 0x00000000 if MMU
507 default 0x60000000 if !MMU
509 This is the base address of the default memory area.
510 Default memory area has platform-specific meaning, it may be used
511 for e.g. early cache initialization.
513 If unsure, leave the default value here.
515 config DEFAULT_MEM_SIZE
516 hex "Maximal size of the default memory area"
517 depends on PLATFORM_WANT_DEFAULT_MEM
520 This is the size of the default memory area.
521 Default memory area has platform-specific meaning, it may be used
522 for e.g. early cache initialization.
524 If unsure, leave the default value here.
527 bool "Enable XTFPGA LCD driver"
528 depends on XTENSA_PLATFORM_XTFPGA
531 There's a 2x16 LCD on most of XTFPGA boards, kernel may output
532 progress messages there during bootup/shutdown. It may be useful
533 during board bringup.
537 config XTFPGA_LCD_BASE_ADDR
538 hex "XTFPGA LCD base address"
539 depends on XTFPGA_LCD
542 Base address of the LCD controller inside KIO region.
543 Different boards from XTFPGA family have LCD controller at different
544 addresses. Please consult prototyping user guide for your board for
545 the correct address. Wrong address here may lead to hardware lockup.
547 config XTFPGA_LCD_8BIT_ACCESS
548 bool "Use 8-bit access to XTFPGA LCD"
549 depends on XTFPGA_LCD
552 LCD may be connected with 4- or 8-bit interface, 8-bit access may
553 only be used with 8-bit interface. Please consult prototyping user
554 guide for your board for the correct interface width.
558 menu "Executable file formats"
560 source "fs/Kconfig.binfmt"
564 menu "Power management options"
566 source "kernel/power/Kconfig"
572 source "drivers/Kconfig"
576 source "arch/xtensa/Kconfig.debug"
578 source "security/Kconfig"
580 source "crypto/Kconfig"